1 /**
2 ******************************************************************************
3 * @file stm32g4xx_ll_fmac.h
4 * @author MCD Application Team
5 * @brief Header file of FMAC LL module.
6 ******************************************************************************
7 * @attention
8 *
9 * Copyright (c) 2019 STMicroelectronics.
10 * All rights reserved.
11 *
12 * This software is licensed under terms that can be found in the LICENSE file
13 * in the root directory of this software component.
14 * If no LICENSE file comes with this software, it is provided AS-IS.
15 *
16 ******************************************************************************
17 */
18
19 /* Define to prevent recursive inclusion -------------------------------------*/
20 #ifndef STM32G4xx_LL_FMAC_H
21 #define STM32G4xx_LL_FMAC_H
22
23 #ifdef __cplusplus
24 extern "C" {
25 #endif
26
27 /* Includes ------------------------------------------------------------------*/
28 #include "stm32g4xx.h"
29
30 /** @addtogroup STM32G4xx_LL_Driver
31 * @{
32 */
33
34 #if defined(FMAC)
35
36 /** @defgroup FMAC_LL FMAC
37 * @{
38 */
39
40 /* Exported types ------------------------------------------------------------*/
41
42 /* Exported constants --------------------------------------------------------*/
43 /** @defgroup FMAC_LL_Exported_Constants FMAC Exported Constants
44 * @{
45 */
46
47 /** @defgroup FMAC_LL_EC_GET_FLAG Get Flag Defines
48 * @brief Flag defines which can be used with LL_FMAC_ReadReg function
49 * @{
50 */
51 #define LL_FMAC_SR_SAT FMAC_SR_SAT /*!< Saturation Error Flag (this helps in debugging a filter) */
52 #define LL_FMAC_SR_UNFL FMAC_SR_UNFL /*!< Underflow Error Flag */
53 #define LL_FMAC_SR_OVFL FMAC_SR_OVFL /*!< Overflow Error Flag */
54 #define LL_FMAC_SR_X1FULL FMAC_SR_X1FULL /*!< X1 Buffer Full Flag */
55 #define LL_FMAC_SR_YEMPTY FMAC_SR_YEMPTY /*!< Y Buffer Empty Flag */
56 /**
57 * @}
58 */
59
60 /** @defgroup FMAC_LL_EC_IT IT Defines
61 * @brief IT defines which can be used with LL_FMAC_ReadReg and LL_FMAC_WriteReg functions
62 * @{
63 */
64 #define LL_FMAC_CR_SATIEN FMAC_CR_SATIEN /*!< Saturation Error Interrupt Enable (this helps in debugging a filter) */
65 #define LL_FMAC_CR_UNFLIEN FMAC_CR_UNFLIEN /*!< Underflow Error Interrupt Enable */
66 #define LL_FMAC_CR_OVFLIEN FMAC_CR_OVFLIEN /*!< Overflow Error Interrupt Enable */
67 #define LL_FMAC_CR_WIEN FMAC_CR_WIEN /*!< Write Interrupt Enable */
68 #define LL_FMAC_CR_RIEN FMAC_CR_RIEN /*!< Read Interrupt Enable */
69 /**
70 * @}
71 */
72
73 /** @defgroup FMAC_LL_EC_WM FMAC watermarks
74 * @brief Watermark defines that can be used for buffer full (input) or buffer empty (output)
75 * @{
76 */
77 #define LL_FMAC_WM_0_THRESHOLD_1 0x00000000U /*!< Buffer full/empty flag set if there is less than 1 free/unread space. */
78 #define LL_FMAC_WM_1_THRESHOLD_2 0x01000000U /*!< Buffer full/empty flag set if there are less than 2 free/unread spaces. */
79 #define LL_FMAC_WM_2_THRESHOLD_4 0x02000000U /*!< Buffer full/empty flag set if there are less than 4 free/unread spaces. */
80 #define LL_FMAC_WM_3_THRESHOLD_8 0x03000000U /*!< Buffer full/empty flag set if there are less than 8 free/empty spaces. */
81 /**
82 * @}
83 */
84
85 /** @defgroup FMAC_LL_EC_FUNC FMAC functions
86 * @{
87 */
88 #define LL_FMAC_FUNC_LOAD_X1 (FMAC_PARAM_FUNC_0) /*!< Load X1 buffer */
89 #define LL_FMAC_FUNC_LOAD_X2 (FMAC_PARAM_FUNC_1) /*!< Load X2 buffer */
90 #define LL_FMAC_FUNC_LOAD_Y (FMAC_PARAM_FUNC_1 | FMAC_PARAM_FUNC_0) /*!< Load Y buffer */
91 #define LL_FMAC_FUNC_CONVO_FIR (FMAC_PARAM_FUNC_3) /*!< Convolution (FIR filter) */
92 #define LL_FMAC_FUNC_IIR_DIRECT_FORM_1 (FMAC_PARAM_FUNC_3 | FMAC_PARAM_FUNC_0) /*!< IIR filter (direct form 1) */
93 /**
94 * @}
95 */
96
97 /** @defgroup FMAC_LL_EC_PROCESSING FMAC processing
98 * @{
99 */
100 #define LL_FMAC_PROCESSING_STOP 0x00U /*!< Stop FMAC Processing */
101 #define LL_FMAC_PROCESSING_START 0x01U /*!< Start FMAC Processing */
102 /**
103 * @}
104 */
105
106 /**
107 * @}
108 */
109
110 /* External variables --------------------------------------------------------*/
111 /* Exported macros -----------------------------------------------------------*/
112 /** @defgroup FMAC_LL_Exported_Macros FMAC Exported Macros
113 * @{
114 */
115
116 /** @defgroup FMAC_LL_EM_WRITE_READ Common Write and read registers Macros
117 * @{
118 */
119
120 /**
121 * @brief Write a value in FMAC register
122 * @param __INSTANCE__ FMAC Instance
123 * @param __REG__ Register to be written
124 * @param __VALUE__ Value to be written in the register
125 * @retval None
126 */
127 #define LL_FMAC_WriteReg(__INSTANCE__, __REG__, __VALUE__) WRITE_REG(__INSTANCE__->__REG__, (__VALUE__))
128
129 /**
130 * @brief Read a value in FMAC register
131 * @param __INSTANCE__ FMAC Instance
132 * @param __REG__ Register to be read
133 * @retval Register value
134 */
135 #define LL_FMAC_ReadReg(__INSTANCE__, __REG__) READ_REG(__INSTANCE__->__REG__)
136 /**
137 * @}
138 */
139
140 /**
141 * @}
142 */
143
144
145 /* Exported functions --------------------------------------------------------*/
146
147 /** @defgroup FMAC_LL_Exported_Functions FMAC Exported Functions
148 * @{
149 */
150
151 /** @defgroup FMAC_LL_EF_Configuration FMAC Configuration functions
152 * @{
153 */
154
155 /**
156 * @brief Configure X1 full watermark.
157 * @rmtoll X1BUFCFG FULL_WM LL_FMAC_SetX1FullWatermark
158 * @param FMACx FMAC instance
159 * @param Watermark This parameter can be one of the following values:
160 * @arg @ref LL_FMAC_WM_0_THRESHOLD_1
161 * @arg @ref LL_FMAC_WM_1_THRESHOLD_2
162 * @arg @ref LL_FMAC_WM_2_THRESHOLD_4
163 * @arg @ref LL_FMAC_WM_3_THRESHOLD_8
164 * @retval None
165 */
LL_FMAC_SetX1FullWatermark(FMAC_TypeDef * FMACx,uint32_t Watermark)166 __STATIC_INLINE void LL_FMAC_SetX1FullWatermark(FMAC_TypeDef *FMACx, uint32_t Watermark)
167 {
168 MODIFY_REG(FMACx->X1BUFCFG, FMAC_X1BUFCFG_FULL_WM, Watermark);
169 }
170
171 /**
172 * @brief Return X1 full watermark.
173 * @rmtoll X1BUFCFG FULL_WM LL_FMAC_GetX1FullWatermark
174 * @param FMACx FMAC instance
175 * @retval uint32_t Returned value can be one of the following values:
176 * @arg @ref LL_FMAC_WM_0_THRESHOLD_1
177 * @arg @ref LL_FMAC_WM_1_THRESHOLD_2
178 * @arg @ref LL_FMAC_WM_2_THRESHOLD_4
179 * @arg @ref LL_FMAC_WM_3_THRESHOLD_8
180 */
LL_FMAC_GetX1FullWatermark(FMAC_TypeDef * FMACx)181 __STATIC_INLINE uint32_t LL_FMAC_GetX1FullWatermark(FMAC_TypeDef *FMACx)
182 {
183 return (uint32_t)(READ_BIT(FMACx->X1BUFCFG, FMAC_X1BUFCFG_FULL_WM));
184 }
185
186 /**
187 * @brief Configure X1 buffer size.
188 * @rmtoll X1BUFCFG X1_BUF_SIZE LL_FMAC_SetX1BufferSize
189 * @param FMACx FMAC instance
190 * @param BufferSize Number of 16-bit words allocated to the input buffer (including the optional "headroom").
191 * This parameter must be a number between Min_Data=0x01 and Max_Data=0xFF.
192 * @retval None
193 */
LL_FMAC_SetX1BufferSize(FMAC_TypeDef * FMACx,uint8_t BufferSize)194 __STATIC_INLINE void LL_FMAC_SetX1BufferSize(FMAC_TypeDef *FMACx, uint8_t BufferSize)
195 {
196 MODIFY_REG(FMACx->X1BUFCFG, FMAC_X1BUFCFG_X1_BUF_SIZE, ((uint32_t)BufferSize) << FMAC_X1BUFCFG_X1_BUF_SIZE_Pos);
197 }
198
199 /**
200 * @brief Return X1 buffer size.
201 * @rmtoll X1BUFCFG X1_BUF_SIZE LL_FMAC_GetX1BufferSize
202 * @param FMACx FMAC instance
203 * @retval uint8_t Number of 16-bit words allocated to the input buffer
204 * (including the optional "headroom") (value between Min_Data=0x01 and Max_Data=0xFF).
205 */
LL_FMAC_GetX1BufferSize(FMAC_TypeDef * FMACx)206 __STATIC_INLINE uint8_t LL_FMAC_GetX1BufferSize(FMAC_TypeDef *FMACx)
207 {
208 return (uint8_t)(READ_BIT(FMACx->X1BUFCFG, FMAC_X1BUFCFG_X1_BUF_SIZE) >> FMAC_X1BUFCFG_X1_BUF_SIZE_Pos);
209 }
210
211 /**
212 * @brief Configure X1 base.
213 * @rmtoll X1BUFCFG X1_BASE LL_FMAC_SetX1Base
214 * @param FMACx FMAC instance
215 * @param Base Base address of the input buffer (X1) within the internal memory.
216 * This parameter must be a value between Min_Data=0x00 and Max_Data=0xFF.
217 * @retval None
218 */
LL_FMAC_SetX1Base(FMAC_TypeDef * FMACx,uint8_t Base)219 __STATIC_INLINE void LL_FMAC_SetX1Base(FMAC_TypeDef *FMACx, uint8_t Base)
220 {
221 MODIFY_REG(FMACx->X1BUFCFG, FMAC_X1BUFCFG_X1_BASE, ((uint32_t)Base) << FMAC_X1BUFCFG_X1_BASE_Pos);
222 }
223
224 /**
225 * @brief Return X1 base.
226 * @rmtoll X1BUFCFG X1_BASE LL_FMAC_GetX1Base
227 * @param FMACx FMAC instance
228 * @retval uint8_t Base address of the input buffer (X1) within the internal memory
229 * (value between Min_Data=0x00 and Max_Data=0xFF).
230 */
LL_FMAC_GetX1Base(FMAC_TypeDef * FMACx)231 __STATIC_INLINE uint8_t LL_FMAC_GetX1Base(FMAC_TypeDef *FMACx)
232 {
233 return (uint8_t)(READ_BIT(FMACx->X1BUFCFG, FMAC_X1BUFCFG_X1_BASE) >> FMAC_X1BUFCFG_X1_BASE_Pos);
234 }
235
236 /**
237 * @brief Configure X2 buffer size.
238 * @rmtoll X2BUFCFG X2_BUF_SIZE LL_FMAC_SetX2BufferSize
239 * @param FMACx FMAC instance
240 * @param BufferSize Number of 16-bit words allocated to the coefficient buffer.
241 * This parameter must be a number between Min_Data=0x01 and Max_Data=0xFF.
242 * @retval None
243 */
LL_FMAC_SetX2BufferSize(FMAC_TypeDef * FMACx,uint8_t BufferSize)244 __STATIC_INLINE void LL_FMAC_SetX2BufferSize(FMAC_TypeDef *FMACx, uint8_t BufferSize)
245 {
246 MODIFY_REG(FMACx->X2BUFCFG, FMAC_X2BUFCFG_X2_BUF_SIZE, ((uint32_t)BufferSize) << FMAC_X2BUFCFG_X2_BUF_SIZE_Pos);
247 }
248
249 /**
250 * @brief Return X2 buffer size.
251 * @rmtoll X2BUFCFG X2_BUF_SIZE LL_FMAC_GetX2BufferSize
252 * @param FMACx FMAC instance
253 * @retval uint8_t Number of 16-bit words allocated to the coefficient buffer
254 * (value between Min_Data=0x01 and Max_Data=0xFF).
255 */
LL_FMAC_GetX2BufferSize(FMAC_TypeDef * FMACx)256 __STATIC_INLINE uint8_t LL_FMAC_GetX2BufferSize(FMAC_TypeDef *FMACx)
257 {
258 return (uint8_t)(READ_BIT(FMACx->X2BUFCFG, FMAC_X2BUFCFG_X2_BUF_SIZE) >> FMAC_X2BUFCFG_X2_BUF_SIZE_Pos);
259 }
260
261 /**
262 * @brief Configure X2 base.
263 * @rmtoll X2BUFCFG X2_BASE LL_FMAC_SetX2Base
264 * @param FMACx FMAC instance
265 * @param Base Base address of the coefficient buffer (X2) within the internal memory.
266 * This parameter must be a value between Min_Data=0x00 and Max_Data=0xFF.
267 * @retval None
268 */
LL_FMAC_SetX2Base(FMAC_TypeDef * FMACx,uint8_t Base)269 __STATIC_INLINE void LL_FMAC_SetX2Base(FMAC_TypeDef *FMACx, uint8_t Base)
270 {
271 MODIFY_REG(FMACx->X2BUFCFG, FMAC_X2BUFCFG_X2_BASE, ((uint32_t)Base) << FMAC_X2BUFCFG_X2_BASE_Pos);
272 }
273
274 /**
275 * @brief Return X2 base.
276 * @rmtoll X2BUFCFG X2_BASE LL_FMAC_GetX2Base
277 * @param FMACx FMAC instance
278 * @retval uint8_t Base address of the coefficient buffer (X2) within the internal memory
279 * (value between Min_Data=0x00 and Max_Data=0xFF).
280 */
LL_FMAC_GetX2Base(FMAC_TypeDef * FMACx)281 __STATIC_INLINE uint8_t LL_FMAC_GetX2Base(FMAC_TypeDef *FMACx)
282 {
283 return (uint8_t)(READ_BIT(FMACx->X2BUFCFG, FMAC_X2BUFCFG_X2_BASE) >> FMAC_X2BUFCFG_X2_BASE_Pos);
284 }
285
286 /**
287 * @brief Configure Y empty watermark.
288 * @rmtoll YBUFCFG EMPTY_WM LL_FMAC_SetYEmptyWatermark
289 * @param FMACx FMAC instance
290 * @param Watermark This parameter can be one of the following values:
291 * @arg @ref LL_FMAC_WM_0_THRESHOLD_1
292 * @arg @ref LL_FMAC_WM_1_THRESHOLD_2
293 * @arg @ref LL_FMAC_WM_2_THRESHOLD_4
294 * @arg @ref LL_FMAC_WM_3_THRESHOLD_8
295 * @retval None
296 */
LL_FMAC_SetYEmptyWatermark(FMAC_TypeDef * FMACx,uint32_t Watermark)297 __STATIC_INLINE void LL_FMAC_SetYEmptyWatermark(FMAC_TypeDef *FMACx, uint32_t Watermark)
298 {
299 MODIFY_REG(FMACx->YBUFCFG, FMAC_YBUFCFG_EMPTY_WM, Watermark);
300 }
301
302 /**
303 * @brief Return Y empty watermark.
304 * @rmtoll YBUFCFG EMPTY_WM LL_FMAC_GetYEmptyWatermark
305 * @param FMACx FMAC instance
306 * @retval uint32_t Returned value can be one of the following values:
307 * @arg @ref LL_FMAC_WM_0_THRESHOLD_1
308 * @arg @ref LL_FMAC_WM_1_THRESHOLD_2
309 * @arg @ref LL_FMAC_WM_2_THRESHOLD_4
310 * @arg @ref LL_FMAC_WM_3_THRESHOLD_8
311 */
LL_FMAC_GetYEmptyWatermark(FMAC_TypeDef * FMACx)312 __STATIC_INLINE uint32_t LL_FMAC_GetYEmptyWatermark(FMAC_TypeDef *FMACx)
313 {
314 return (uint32_t)(READ_BIT(FMACx->YBUFCFG, FMAC_YBUFCFG_EMPTY_WM));
315 }
316
317 /**
318 * @brief Configure Y buffer size.
319 * @rmtoll YBUFCFG Y_BUF_SIZE LL_FMAC_SetYBufferSize
320 * @param FMACx FMAC instance
321 * @param BufferSize Number of 16-bit words allocated to the output buffer (including the optional "headroom").
322 * This parameter must be a number between Min_Data=0x01 and Max_Data=0xFF.
323 * @retval None
324 */
LL_FMAC_SetYBufferSize(FMAC_TypeDef * FMACx,uint8_t BufferSize)325 __STATIC_INLINE void LL_FMAC_SetYBufferSize(FMAC_TypeDef *FMACx, uint8_t BufferSize)
326 {
327 MODIFY_REG(FMACx->YBUFCFG, FMAC_YBUFCFG_Y_BUF_SIZE, ((uint32_t)BufferSize) << FMAC_YBUFCFG_Y_BUF_SIZE_Pos);
328 }
329
330 /**
331 * @brief Return Y buffer size.
332 * @rmtoll YBUFCFG Y_BUF_SIZE LL_FMAC_GetYBufferSize
333 * @param FMACx FMAC instance
334 * @retval uint8_t Number of 16-bit words allocated to the output buffer
335 * (including the optional "headroom" - value between Min_Data=0x01 and Max_Data=0xFF).
336 */
LL_FMAC_GetYBufferSize(FMAC_TypeDef * FMACx)337 __STATIC_INLINE uint8_t LL_FMAC_GetYBufferSize(FMAC_TypeDef *FMACx)
338 {
339 return (uint8_t)(READ_BIT(FMACx->YBUFCFG, FMAC_YBUFCFG_Y_BUF_SIZE) >> FMAC_YBUFCFG_Y_BUF_SIZE_Pos);
340 }
341
342 /**
343 * @brief Configure Y base.
344 * @rmtoll YBUFCFG Y_BASE LL_FMAC_SetYBase
345 * @param FMACx FMAC instance
346 * @param Base Base address of the output buffer (Y) within the internal memory.
347 * This parameter must be a value between Min_Data=0x00 and Max_Data=0xFF.
348 * @retval None
349 */
LL_FMAC_SetYBase(FMAC_TypeDef * FMACx,uint8_t Base)350 __STATIC_INLINE void LL_FMAC_SetYBase(FMAC_TypeDef *FMACx, uint8_t Base)
351 {
352 MODIFY_REG(FMACx->YBUFCFG, FMAC_YBUFCFG_Y_BASE, ((uint32_t)Base) << FMAC_YBUFCFG_Y_BASE_Pos);
353 }
354
355 /**
356 * @brief Return Y base.
357 * @rmtoll YBUFCFG Y_BASE LL_FMAC_GetYBase
358 * @param FMACx FMAC instance
359 * @retval uint8_t Base address of the output buffer (Y) within the internal memory
360 * (value between Min_Data=0x00 and Max_Data=0xFF).
361 */
LL_FMAC_GetYBase(FMAC_TypeDef * FMACx)362 __STATIC_INLINE uint8_t LL_FMAC_GetYBase(FMAC_TypeDef *FMACx)
363 {
364 return (uint8_t)(READ_BIT(FMACx->YBUFCFG, FMAC_YBUFCFG_Y_BASE) >> FMAC_YBUFCFG_Y_BASE_Pos);
365 }
366
367 /**
368 * @brief Start FMAC processing.
369 * @rmtoll PARAM START LL_FMAC_EnableStart
370 * @param FMACx FMAC instance
371 * @retval None
372 */
LL_FMAC_EnableStart(FMAC_TypeDef * FMACx)373 __STATIC_INLINE void LL_FMAC_EnableStart(FMAC_TypeDef *FMACx)
374 {
375 SET_BIT(FMACx->PARAM, FMAC_PARAM_START);
376 }
377
378 /**
379 * @brief Stop FMAC processing.
380 * @rmtoll PARAM START LL_FMAC_DisableStart
381 * @param FMACx FMAC instance
382 * @retval None
383 */
LL_FMAC_DisableStart(FMAC_TypeDef * FMACx)384 __STATIC_INLINE void LL_FMAC_DisableStart(FMAC_TypeDef *FMACx)
385 {
386 CLEAR_BIT(FMACx->PARAM, FMAC_PARAM_START);
387 }
388
389 /**
390 * @brief Check the state of FMAC processing.
391 * @rmtoll PARAM START LL_FMAC_IsEnabledStart
392 * @param FMACx FMAC instance
393 * @retval uint32_t State of bit (1 or 0).
394 */
LL_FMAC_IsEnabledStart(FMAC_TypeDef * FMACx)395 __STATIC_INLINE uint32_t LL_FMAC_IsEnabledStart(FMAC_TypeDef *FMACx)
396 {
397 return ((READ_BIT(FMACx->PARAM, FMAC_PARAM_START) == (FMAC_PARAM_START)) ? 1UL : 0UL);
398 }
399
400 /**
401 * @brief Configure function.
402 * @rmtoll PARAM FUNC LL_FMAC_SetFunction
403 * @param FMACx FMAC instance
404 * @param Function This parameter can be one of the following values:
405 * @arg @ref LL_FMAC_FUNC_LOAD_X1
406 * @arg @ref LL_FMAC_FUNC_LOAD_X2
407 * @arg @ref LL_FMAC_FUNC_LOAD_Y
408 * @arg @ref LL_FMAC_FUNC_CONVO_FIR
409 * @arg @ref LL_FMAC_FUNC_IIR_DIRECT_FORM_1
410 * @retval None
411 */
LL_FMAC_SetFunction(FMAC_TypeDef * FMACx,uint32_t Function)412 __STATIC_INLINE void LL_FMAC_SetFunction(FMAC_TypeDef *FMACx, uint32_t Function)
413 {
414 MODIFY_REG(FMACx->PARAM, FMAC_PARAM_FUNC, Function);
415 }
416
417 /**
418 * @brief Return function.
419 * @rmtoll PARAM FUNC LL_FMAC_GetFunction
420 * @param FMACx FMAC instance
421 * @retval uint32_t Returned value can be one of the following values:
422 * @arg @ref LL_FMAC_FUNC_LOAD_X1
423 * @arg @ref LL_FMAC_FUNC_LOAD_X2
424 * @arg @ref LL_FMAC_FUNC_LOAD_Y
425 * @arg @ref LL_FMAC_FUNC_CONVO_FIR
426 * @arg @ref LL_FMAC_FUNC_IIR_DIRECT_FORM_1
427 */
LL_FMAC_GetFunction(FMAC_TypeDef * FMACx)428 __STATIC_INLINE uint32_t LL_FMAC_GetFunction(FMAC_TypeDef *FMACx)
429 {
430 return (uint32_t)(READ_BIT(FMACx->PARAM, FMAC_PARAM_FUNC));
431 }
432
433 /**
434 * @brief Configure input parameter R.
435 * @rmtoll PARAM R LL_FMAC_SetParamR
436 * @param FMACx FMAC instance
437 * @param Param Parameter R (gain, etc.).
438 * This parameter must be a value between Min_Data=0x00 and Max_Data=0xFF.
439 * @retval None
440 */
LL_FMAC_SetParamR(FMAC_TypeDef * FMACx,uint8_t Param)441 __STATIC_INLINE void LL_FMAC_SetParamR(FMAC_TypeDef *FMACx, uint8_t Param)
442 {
443 MODIFY_REG(FMACx->PARAM, FMAC_PARAM_R, ((uint32_t)Param) << FMAC_PARAM_R_Pos);
444 }
445
446 /**
447 * @brief Return input parameter R.
448 * @rmtoll PARAM R LL_FMAC_GetParamR
449 * @param FMACx FMAC instance
450 * @retval uint8_t Parameter R (gain, etc.) (value between Min_Data=0x00 and Max_Data=0xFF).
451 */
LL_FMAC_GetParamR(FMAC_TypeDef * FMACx)452 __STATIC_INLINE uint8_t LL_FMAC_GetParamR(FMAC_TypeDef *FMACx)
453 {
454 return (uint8_t)(READ_BIT(FMACx->PARAM, FMAC_PARAM_R) >> FMAC_PARAM_R_Pos);
455 }
456
457 /**
458 * @brief Configure input parameter Q.
459 * @rmtoll PARAM Q LL_FMAC_SetParamQ
460 * @param FMACx FMAC instance
461 * @param Param Parameter Q (vector length, etc.).
462 * This parameter must be a value between Min_Data=0x00 and Max_Data=0xFF.
463 * @retval None
464 */
LL_FMAC_SetParamQ(FMAC_TypeDef * FMACx,uint8_t Param)465 __STATIC_INLINE void LL_FMAC_SetParamQ(FMAC_TypeDef *FMACx, uint8_t Param)
466 {
467 MODIFY_REG(FMACx->PARAM, FMAC_PARAM_Q, ((uint32_t)Param) << FMAC_PARAM_Q_Pos);
468 }
469
470 /**
471 * @brief Return input parameter Q.
472 * @rmtoll PARAM Q LL_FMAC_GetParamQ
473 * @param FMACx FMAC instance
474 * @retval uint8_t Parameter Q (vector length, etc.) (value between Min_Data=0x00 and Max_Data=0xFF).
475 */
LL_FMAC_GetParamQ(FMAC_TypeDef * FMACx)476 __STATIC_INLINE uint8_t LL_FMAC_GetParamQ(FMAC_TypeDef *FMACx)
477 {
478 return (uint8_t)(READ_BIT(FMACx->PARAM, FMAC_PARAM_Q) >> FMAC_PARAM_Q_Pos);
479 }
480
481 /**
482 * @brief Configure input parameter P.
483 * @rmtoll PARAM P LL_FMAC_SetParamP
484 * @param FMACx FMAC instance
485 * @param Param Parameter P (vector length, number of filter taps, etc.).
486 * This parameter must be a value between Min_Data=0x00 and Max_Data=0xFF.
487 * @retval None
488 */
LL_FMAC_SetParamP(FMAC_TypeDef * FMACx,uint8_t Param)489 __STATIC_INLINE void LL_FMAC_SetParamP(FMAC_TypeDef *FMACx, uint8_t Param)
490 {
491 MODIFY_REG(FMACx->PARAM, FMAC_PARAM_P, ((uint32_t)Param));
492 }
493
494 /**
495 * @brief Return input parameter P.
496 * @rmtoll PARAM P LL_FMAC_GetParamP
497 * @param FMACx FMAC instance
498 * @retval uint8_t Parameter P (vector length, number of filter taps, etc.)
499 * (value between Min_Data=0x00 and Max_Data=0xFF).
500 */
LL_FMAC_GetParamP(FMAC_TypeDef * FMACx)501 __STATIC_INLINE uint8_t LL_FMAC_GetParamP(FMAC_TypeDef *FMACx)
502 {
503 return (uint8_t)(READ_BIT(FMACx->PARAM, FMAC_PARAM_P));
504 }
505
506 /**
507 * @}
508 */
509
510 /** @defgroup FMAC_LL_EF_Reset_Management Reset_Management
511 * @{
512 */
513
514 /**
515 * @brief Start the FMAC reset.
516 * @rmtoll CR RESET LL_FMAC_EnableReset
517 * @param FMACx FMAC instance
518 * @retval None
519 */
LL_FMAC_EnableReset(FMAC_TypeDef * FMACx)520 __STATIC_INLINE void LL_FMAC_EnableReset(FMAC_TypeDef *FMACx)
521 {
522 SET_BIT(FMACx->CR, FMAC_CR_RESET);
523 }
524
525 /**
526 * @brief Check the state of the FMAC reset.
527 * @rmtoll CR RESET LL_FMAC_IsEnabledReset
528 * @param FMACx FMAC instance
529 * @retval uint32_t State of bit (1 or 0).
530 */
LL_FMAC_IsEnabledReset(FMAC_TypeDef * FMACx)531 __STATIC_INLINE uint32_t LL_FMAC_IsEnabledReset(FMAC_TypeDef *FMACx)
532 {
533 return ((READ_BIT(FMACx->CR, FMAC_CR_RESET) == (FMAC_CR_RESET)) ? 1UL : 0UL);
534 }
535
536 /**
537 * @}
538 */
539
540 /** @defgroup FMAC_LL_EF_Configuration FMAC Configuration functions
541 * @{
542 */
543
544 /**
545 * @brief Enable Clipping.
546 * @rmtoll CR CLIPEN LL_FMAC_EnableClipping
547 * @param FMACx FMAC instance
548 * @retval None
549 */
LL_FMAC_EnableClipping(FMAC_TypeDef * FMACx)550 __STATIC_INLINE void LL_FMAC_EnableClipping(FMAC_TypeDef *FMACx)
551 {
552 SET_BIT(FMACx->CR, FMAC_CR_CLIPEN);
553 }
554
555 /**
556 * @brief Disable Clipping.
557 * @rmtoll CR CLIPEN LL_FMAC_DisableClipping
558 * @param FMACx FMAC instance
559 * @retval None
560 */
LL_FMAC_DisableClipping(FMAC_TypeDef * FMACx)561 __STATIC_INLINE void LL_FMAC_DisableClipping(FMAC_TypeDef *FMACx)
562 {
563 CLEAR_BIT(FMACx->CR, FMAC_CR_CLIPEN);
564 }
565
566 /**
567 * @brief Check Clipping State.
568 * @rmtoll CR CLIPEN LL_FMAC_IsEnabledClipping
569 * @param FMACx FMAC instance
570 * @retval uint32_t State of bit (1 or 0).
571 */
LL_FMAC_IsEnabledClipping(FMAC_TypeDef * FMACx)572 __STATIC_INLINE uint32_t LL_FMAC_IsEnabledClipping(FMAC_TypeDef *FMACx)
573 {
574 return ((READ_BIT(FMACx->CR, FMAC_CR_CLIPEN) == (FMAC_CR_CLIPEN)) ? 1UL : 0UL);
575 }
576
577 /**
578 * @}
579 */
580
581 /** @defgroup FMAC_LL_EF_DMA_Management DMA_Management
582 * @{
583 */
584
585 /**
586 * @brief Enable FMAC DMA write channel request.
587 * @rmtoll CR DMAWEN LL_FMAC_EnableDMAReq_WRITE
588 * @param FMACx FMAC instance
589 * @retval None
590 */
LL_FMAC_EnableDMAReq_WRITE(FMAC_TypeDef * FMACx)591 __STATIC_INLINE void LL_FMAC_EnableDMAReq_WRITE(FMAC_TypeDef *FMACx)
592 {
593 SET_BIT(FMACx->CR, FMAC_CR_DMAWEN);
594 }
595
596 /**
597 * @brief Disable FMAC DMA write channel request.
598 * @rmtoll CR DMAWEN LL_FMAC_DisableDMAReq_WRITE
599 * @param FMACx FMAC instance
600 * @retval None
601 */
LL_FMAC_DisableDMAReq_WRITE(FMAC_TypeDef * FMACx)602 __STATIC_INLINE void LL_FMAC_DisableDMAReq_WRITE(FMAC_TypeDef *FMACx)
603 {
604 CLEAR_BIT(FMACx->CR, FMAC_CR_DMAWEN);
605 }
606
607 /**
608 * @brief Check FMAC DMA write channel request state.
609 * @rmtoll CR DMAWEN LL_FMAC_IsEnabledDMAReq_WRITE
610 * @param FMACx FMAC instance
611 * @retval uint32_t State of bit (1 or 0).
612 */
LL_FMAC_IsEnabledDMAReq_WRITE(FMAC_TypeDef * FMACx)613 __STATIC_INLINE uint32_t LL_FMAC_IsEnabledDMAReq_WRITE(FMAC_TypeDef *FMACx)
614 {
615 return ((READ_BIT(FMACx->CR, FMAC_CR_DMAWEN) == (FMAC_CR_DMAWEN)) ? 1UL : 0UL);
616 }
617
618 /**
619 * @brief Enable FMAC DMA read channel request.
620 * @rmtoll CR DMAREN LL_FMAC_EnableDMAReq_READ
621 * @param FMACx FMAC instance
622 * @retval None
623 */
LL_FMAC_EnableDMAReq_READ(FMAC_TypeDef * FMACx)624 __STATIC_INLINE void LL_FMAC_EnableDMAReq_READ(FMAC_TypeDef *FMACx)
625 {
626 SET_BIT(FMACx->CR, FMAC_CR_DMAREN);
627 }
628
629 /**
630 * @brief Disable FMAC DMA read channel request.
631 * @rmtoll CR DMAREN LL_FMAC_DisableDMAReq_READ
632 * @param FMACx FMAC instance
633 * @retval None
634 */
LL_FMAC_DisableDMAReq_READ(FMAC_TypeDef * FMACx)635 __STATIC_INLINE void LL_FMAC_DisableDMAReq_READ(FMAC_TypeDef *FMACx)
636 {
637 CLEAR_BIT(FMACx->CR, FMAC_CR_DMAREN);
638 }
639
640 /**
641 * @brief Check FMAC DMA read channel request state.
642 * @rmtoll CR DMAREN LL_FMAC_IsEnabledDMAReq_READ
643 * @param FMACx FMAC instance
644 * @retval uint32_t State of bit (1 or 0).
645 */
LL_FMAC_IsEnabledDMAReq_READ(FMAC_TypeDef * FMACx)646 __STATIC_INLINE uint32_t LL_FMAC_IsEnabledDMAReq_READ(FMAC_TypeDef *FMACx)
647 {
648 return ((READ_BIT(FMACx->CR, FMAC_CR_DMAREN) == (FMAC_CR_DMAREN)) ? 1UL : 0UL);
649 }
650
651 /**
652 * @}
653 */
654
655 /** @defgroup FMAC_LL_EF_IT_Management IT_Management
656 * @{
657 */
658
659 /**
660 * @brief Enable FMAC saturation error interrupt.
661 * @rmtoll CR SATIEN LL_FMAC_EnableIT_SAT
662 * @param FMACx FMAC instance
663 * @retval None
664 */
LL_FMAC_EnableIT_SAT(FMAC_TypeDef * FMACx)665 __STATIC_INLINE void LL_FMAC_EnableIT_SAT(FMAC_TypeDef *FMACx)
666 {
667 SET_BIT(FMACx->CR, FMAC_CR_SATIEN);
668 }
669
670 /**
671 * @brief Disable FMAC saturation error interrupt.
672 * @rmtoll CR SATIEN LL_FMAC_DisableIT_SAT
673 * @param FMACx FMAC instance
674 * @retval None
675 */
LL_FMAC_DisableIT_SAT(FMAC_TypeDef * FMACx)676 __STATIC_INLINE void LL_FMAC_DisableIT_SAT(FMAC_TypeDef *FMACx)
677 {
678 CLEAR_BIT(FMACx->CR, FMAC_CR_SATIEN);
679 }
680
681 /**
682 * @brief Check FMAC saturation error interrupt state.
683 * @rmtoll CR SATIEN LL_FMAC_IsEnabledIT_SAT
684 * @param FMACx FMAC instance
685 * @retval uint32_t State of bit (1 or 0).
686 */
LL_FMAC_IsEnabledIT_SAT(FMAC_TypeDef * FMACx)687 __STATIC_INLINE uint32_t LL_FMAC_IsEnabledIT_SAT(FMAC_TypeDef *FMACx)
688 {
689 return ((READ_BIT(FMACx->CR, FMAC_CR_SATIEN) == (FMAC_CR_SATIEN)) ? 1UL : 0UL);
690 }
691
692 /**
693 * @brief Enable FMAC underflow error interrupt.
694 * @rmtoll CR UNFLIEN LL_FMAC_EnableIT_UNFL
695 * @param FMACx FMAC instance
696 * @retval None
697 */
LL_FMAC_EnableIT_UNFL(FMAC_TypeDef * FMACx)698 __STATIC_INLINE void LL_FMAC_EnableIT_UNFL(FMAC_TypeDef *FMACx)
699 {
700 SET_BIT(FMACx->CR, FMAC_CR_UNFLIEN);
701 }
702
703 /**
704 * @brief Disable FMAC underflow error interrupt.
705 * @rmtoll CR UNFLIEN LL_FMAC_DisableIT_UNFL
706 * @param FMACx FMAC instance
707 * @retval None
708 */
LL_FMAC_DisableIT_UNFL(FMAC_TypeDef * FMACx)709 __STATIC_INLINE void LL_FMAC_DisableIT_UNFL(FMAC_TypeDef *FMACx)
710 {
711 CLEAR_BIT(FMACx->CR, FMAC_CR_UNFLIEN);
712 }
713
714 /**
715 * @brief Check FMAC underflow error interrupt state.
716 * @rmtoll CR UNFLIEN LL_FMAC_IsEnabledIT_UNFL
717 * @param FMACx FMAC instance
718 * @retval uint32_t State of bit (1 or 0).
719 */
LL_FMAC_IsEnabledIT_UNFL(FMAC_TypeDef * FMACx)720 __STATIC_INLINE uint32_t LL_FMAC_IsEnabledIT_UNFL(FMAC_TypeDef *FMACx)
721 {
722 return ((READ_BIT(FMACx->CR, FMAC_CR_UNFLIEN) == (FMAC_CR_UNFLIEN)) ? 1UL : 0UL);
723 }
724
725 /**
726 * @brief Enable FMAC overflow error interrupt.
727 * @rmtoll CR OVFLIEN LL_FMAC_EnableIT_OVFL
728 * @param FMACx FMAC instance
729 * @retval None
730 */
LL_FMAC_EnableIT_OVFL(FMAC_TypeDef * FMACx)731 __STATIC_INLINE void LL_FMAC_EnableIT_OVFL(FMAC_TypeDef *FMACx)
732 {
733 SET_BIT(FMACx->CR, FMAC_CR_OVFLIEN);
734 }
735
736 /**
737 * @brief Disable FMAC overflow error interrupt.
738 * @rmtoll CR OVFLIEN LL_FMAC_DisableIT_OVFL
739 * @param FMACx FMAC instance
740 * @retval None
741 */
LL_FMAC_DisableIT_OVFL(FMAC_TypeDef * FMACx)742 __STATIC_INLINE void LL_FMAC_DisableIT_OVFL(FMAC_TypeDef *FMACx)
743 {
744 CLEAR_BIT(FMACx->CR, FMAC_CR_OVFLIEN);
745 }
746
747 /**
748 * @brief Check FMAC overflow error interrupt state.
749 * @rmtoll CR OVFLIEN LL_FMAC_IsEnabledIT_OVFL
750 * @param FMACx FMAC instance
751 * @retval uint32_t State of bit (1 or 0).
752 */
LL_FMAC_IsEnabledIT_OVFL(FMAC_TypeDef * FMACx)753 __STATIC_INLINE uint32_t LL_FMAC_IsEnabledIT_OVFL(FMAC_TypeDef *FMACx)
754 {
755 return ((READ_BIT(FMACx->CR, FMAC_CR_OVFLIEN) == (FMAC_CR_OVFLIEN)) ? 1UL : 0UL);
756 }
757
758 /**
759 * @brief Enable FMAC write interrupt.
760 * @rmtoll CR WIEN LL_FMAC_EnableIT_WR
761 * @param FMACx FMAC instance
762 * @retval None
763 */
LL_FMAC_EnableIT_WR(FMAC_TypeDef * FMACx)764 __STATIC_INLINE void LL_FMAC_EnableIT_WR(FMAC_TypeDef *FMACx)
765 {
766 SET_BIT(FMACx->CR, FMAC_CR_WIEN);
767 }
768
769 /**
770 * @brief Disable FMAC write interrupt.
771 * @rmtoll CR WIEN LL_FMAC_DisableIT_WR
772 * @param FMACx FMAC instance
773 * @retval None
774 */
LL_FMAC_DisableIT_WR(FMAC_TypeDef * FMACx)775 __STATIC_INLINE void LL_FMAC_DisableIT_WR(FMAC_TypeDef *FMACx)
776 {
777 CLEAR_BIT(FMACx->CR, FMAC_CR_WIEN);
778 }
779
780 /**
781 * @brief Check FMAC write interrupt state.
782 * @rmtoll CR WIEN LL_FMAC_IsEnabledIT_WR
783 * @param FMACx FMAC instance
784 * @retval uint32_t State of bit (1 or 0).
785 */
LL_FMAC_IsEnabledIT_WR(FMAC_TypeDef * FMACx)786 __STATIC_INLINE uint32_t LL_FMAC_IsEnabledIT_WR(FMAC_TypeDef *FMACx)
787 {
788 return ((READ_BIT(FMACx->CR, FMAC_CR_WIEN) == (FMAC_CR_WIEN)) ? 1UL : 0UL);
789 }
790
791 /**
792 * @brief Enable FMAC read interrupt.
793 * @rmtoll CR RIEN LL_FMAC_EnableIT_RD
794 * @param FMACx FMAC instance
795 * @retval None
796 */
LL_FMAC_EnableIT_RD(FMAC_TypeDef * FMACx)797 __STATIC_INLINE void LL_FMAC_EnableIT_RD(FMAC_TypeDef *FMACx)
798 {
799 SET_BIT(FMACx->CR, FMAC_CR_RIEN);
800 }
801
802 /**
803 * @brief Disable FMAC read interrupt.
804 * @rmtoll CR RIEN LL_FMAC_DisableIT_RD
805 * @param FMACx FMAC instance
806 * @retval None
807 */
LL_FMAC_DisableIT_RD(FMAC_TypeDef * FMACx)808 __STATIC_INLINE void LL_FMAC_DisableIT_RD(FMAC_TypeDef *FMACx)
809 {
810 CLEAR_BIT(FMACx->CR, FMAC_CR_RIEN);
811 }
812
813 /**
814 * @brief Check FMAC read interrupt state.
815 * @rmtoll CR RIEN LL_FMAC_IsEnabledIT_RD
816 * @param FMACx FMAC instance
817 * @retval uint32_t State of bit (1 or 0).
818 */
LL_FMAC_IsEnabledIT_RD(FMAC_TypeDef * FMACx)819 __STATIC_INLINE uint32_t LL_FMAC_IsEnabledIT_RD(FMAC_TypeDef *FMACx)
820 {
821 return ((READ_BIT(FMACx->CR, FMAC_CR_RIEN) == (FMAC_CR_RIEN)) ? 1UL : 0UL);
822 }
823
824 /**
825 * @}
826 */
827
828 /** @defgroup FMAC_LL_EF_FLAG_Management FLAG_Management
829 * @{
830 */
831
832 /**
833 * @brief Check FMAC saturation error flag state.
834 * @rmtoll SR SAT LL_FMAC_IsActiveFlag_SAT
835 * @param FMACx FMAC instance
836 * @retval uint32_t State of bit (1 or 0).
837 */
LL_FMAC_IsActiveFlag_SAT(FMAC_TypeDef * FMACx)838 __STATIC_INLINE uint32_t LL_FMAC_IsActiveFlag_SAT(FMAC_TypeDef *FMACx)
839 {
840 return ((READ_BIT(FMACx->SR, FMAC_SR_SAT) == (FMAC_SR_SAT)) ? 1UL : 0UL);
841 }
842
843 /**
844 * @brief Check FMAC underflow error flag state.
845 * @rmtoll SR UNFL LL_FMAC_IsActiveFlag_UNFL
846 * @param FMACx FMAC instance
847 * @retval uint32_t State of bit (1 or 0).
848 */
LL_FMAC_IsActiveFlag_UNFL(FMAC_TypeDef * FMACx)849 __STATIC_INLINE uint32_t LL_FMAC_IsActiveFlag_UNFL(FMAC_TypeDef *FMACx)
850 {
851 return ((READ_BIT(FMACx->SR, FMAC_SR_UNFL) == (FMAC_SR_UNFL)) ? 1UL : 0UL);
852 }
853
854 /**
855 * @brief Check FMAC overflow error flag state.
856 * @rmtoll SR OVFL LL_FMAC_IsActiveFlag_OVFL
857 * @param FMACx FMAC instance
858 * @retval uint32_t State of bit (1 or 0).
859 */
LL_FMAC_IsActiveFlag_OVFL(FMAC_TypeDef * FMACx)860 __STATIC_INLINE uint32_t LL_FMAC_IsActiveFlag_OVFL(FMAC_TypeDef *FMACx)
861 {
862 return ((READ_BIT(FMACx->SR, FMAC_SR_OVFL) == (FMAC_SR_OVFL)) ? 1UL : 0UL);
863 }
864
865 /**
866 * @brief Check FMAC X1 buffer full flag state.
867 * @rmtoll SR X1FULL LL_FMAC_IsActiveFlag_X1FULL
868 * @param FMACx FMAC instance
869 * @retval uint32_t State of bit (1 or 0).
870 */
LL_FMAC_IsActiveFlag_X1FULL(FMAC_TypeDef * FMACx)871 __STATIC_INLINE uint32_t LL_FMAC_IsActiveFlag_X1FULL(FMAC_TypeDef *FMACx)
872 {
873 return ((READ_BIT(FMACx->SR, FMAC_SR_X1FULL) == (FMAC_SR_X1FULL)) ? 1UL : 0UL);
874 }
875
876 /**
877 * @brief Check FMAC Y buffer empty flag state.
878 * @rmtoll SR YEMPTY LL_FMAC_IsActiveFlag_YEMPTY
879 * @param FMACx FMAC instance
880 * @retval uint32_t State of bit (1 or 0).
881 */
LL_FMAC_IsActiveFlag_YEMPTY(FMAC_TypeDef * FMACx)882 __STATIC_INLINE uint32_t LL_FMAC_IsActiveFlag_YEMPTY(FMAC_TypeDef *FMACx)
883 {
884 return ((READ_BIT(FMACx->SR, FMAC_SR_YEMPTY) == (FMAC_SR_YEMPTY)) ? 1UL : 0UL);
885 }
886
887 /**
888 * @}
889 */
890
891 /** @defgroup FMAC_LL_EF_Data_Management Data_Management
892 * @{
893 */
894
895 /**
896 * @brief Write 16-bit input data for the FMAC processing.
897 * @rmtoll WDATA WDATA LL_FMAC_WriteData
898 * @param FMACx FMAC instance
899 * @param InData 16-bit value to be provided as input data for FMAC processing.
900 * This parameter must be a number between Min_Data=0x0000 and Max_Data=0xFFFF.
901 * @retval None
902 */
LL_FMAC_WriteData(FMAC_TypeDef * FMACx,uint16_t InData)903 __STATIC_INLINE void LL_FMAC_WriteData(FMAC_TypeDef *FMACx, uint16_t InData)
904 {
905 WRITE_REG(FMACx->WDATA, InData);
906 }
907
908 /**
909 * @brief Return 16-bit output data of FMAC processing.
910 * @rmtoll RDATA RDATA LL_FMAC_ReadData
911 * @param FMACx FMAC instance
912 * @retval uint16_t 16-bit output data of FMAC processing (value between Min_Data=0x0000 and Max_Data=0xFFFF).
913 */
LL_FMAC_ReadData(FMAC_TypeDef * FMACx)914 __STATIC_INLINE uint16_t LL_FMAC_ReadData(FMAC_TypeDef *FMACx)
915 {
916 return (uint16_t)(READ_REG(FMACx->RDATA));
917 }
918
919 /**
920 * @}
921 */
922
923 /** @defgroup FMAC_LL_EF_Configuration FMAC Configuration functions
924 * @{
925 */
926
927 /**
928 * @brief Configure memory for X1 buffer.
929 * @rmtoll X1BUFCFG FULL_WM LL_FMAC_ConfigX1\n
930 * X1BUFCFG X1_BASE LL_FMAC_ConfigX1\n
931 * X1BUFCFG X1_BUF_SIZE LL_FMAC_ConfigX1
932 * @param FMACx FMAC instance
933 * @param Watermark This parameter can be one of the following values:
934 * @arg @ref LL_FMAC_WM_0_THRESHOLD_1
935 * @arg @ref LL_FMAC_WM_1_THRESHOLD_2
936 * @arg @ref LL_FMAC_WM_2_THRESHOLD_4
937 * @arg @ref LL_FMAC_WM_3_THRESHOLD_8
938 * @param Base Base address of the input buffer (X1) within the internal memory.
939 * This parameter must be a value between Min_Data=0x00 and Max_Data=0xFF.
940 * @param BufferSize Number of 16-bit words allocated to the input buffer (including the optional "headroom").
941 * This parameter must be a number between Min_Data=0x01 and Max_Data=0xFF.
942 * @retval None
943 */
LL_FMAC_ConfigX1(FMAC_TypeDef * FMACx,uint32_t Watermark,uint8_t Base,uint8_t BufferSize)944 __STATIC_INLINE void LL_FMAC_ConfigX1(FMAC_TypeDef *FMACx, uint32_t Watermark, uint8_t Base, uint8_t BufferSize)
945 {
946 MODIFY_REG(FMACx->X1BUFCFG, FMAC_X1BUFCFG_FULL_WM | FMAC_X1BUFCFG_X1_BASE | FMAC_X1BUFCFG_X1_BUF_SIZE,
947 Watermark | (((uint32_t)Base) << FMAC_X1BUFCFG_X1_BASE_Pos) |
948 (((uint32_t)BufferSize) << FMAC_X1BUFCFG_X1_BUF_SIZE_Pos));
949 }
950
951 /**
952 * @brief Configure memory for X2 buffer.
953 * @rmtoll X2BUFCFG X2_BASE LL_FMAC_ConfigX2\n
954 * X2BUFCFG X2_BUF_SIZE LL_FMAC_ConfigX2
955 * @param FMACx FMAC instance
956 * @param Base Base address of the coefficient buffer (X2) within the internal memory.
957 * This parameter must be a value between Min_Data=0x00 and Max_Data=0xFF.
958 * @param BufferSize Number of 16-bit words allocated to the coefficient buffer.
959 * This parameter must be a number between Min_Data=0x01 and Max_Data=0xFF.
960 * @retval None
961 */
LL_FMAC_ConfigX2(FMAC_TypeDef * FMACx,uint8_t Base,uint8_t BufferSize)962 __STATIC_INLINE void LL_FMAC_ConfigX2(FMAC_TypeDef *FMACx, uint8_t Base, uint8_t BufferSize)
963 {
964 MODIFY_REG(FMACx->X2BUFCFG, FMAC_X2BUFCFG_X2_BASE | FMAC_X2BUFCFG_X2_BUF_SIZE,
965 (((uint32_t)Base) << FMAC_X2BUFCFG_X2_BASE_Pos) |
966 (((uint32_t)BufferSize) << FMAC_X2BUFCFG_X2_BUF_SIZE_Pos));
967 }
968
969 /**
970 * @brief Configure memory for Y buffer.
971 * @rmtoll YBUFCFG EMPTY_WM LL_FMAC_ConfigY\n
972 * YBUFCFG Y_BASE LL_FMAC_ConfigY\n
973 * YBUFCFG Y_BUF_SIZE LL_FMAC_ConfigY
974 * @param FMACx FMAC instance
975 * @param Watermark This parameter can be one of the following values:
976 * @arg @ref LL_FMAC_WM_0_THRESHOLD_1
977 * @arg @ref LL_FMAC_WM_1_THRESHOLD_2
978 * @arg @ref LL_FMAC_WM_2_THRESHOLD_4
979 * @arg @ref LL_FMAC_WM_3_THRESHOLD_8
980 * @param Base Base address of the output buffer (Y) within the internal memory.
981 * This parameter must be a value between Min_Data=0x00 and Max_Data=0xFF.
982 * @param BufferSize Number of 16-bit words allocated to the output buffer (including the optional "headroom").
983 * This parameter must be a number between Min_Data=0x01 and Max_Data=0xFF.
984 * @retval None
985 */
LL_FMAC_ConfigY(FMAC_TypeDef * FMACx,uint32_t Watermark,uint8_t Base,uint8_t BufferSize)986 __STATIC_INLINE void LL_FMAC_ConfigY(FMAC_TypeDef *FMACx, uint32_t Watermark, uint8_t Base, uint8_t BufferSize)
987 {
988 MODIFY_REG(FMACx->YBUFCFG, FMAC_YBUFCFG_EMPTY_WM | FMAC_YBUFCFG_Y_BASE | FMAC_YBUFCFG_Y_BUF_SIZE,
989 Watermark | (((uint32_t)Base) << FMAC_YBUFCFG_Y_BASE_Pos) |
990 (((uint32_t)BufferSize) << FMAC_YBUFCFG_Y_BUF_SIZE_Pos));
991 }
992
993 /**
994 * @brief Configure the FMAC processing.
995 * @rmtoll PARAM START LL_FMAC_ConfigFunc\n
996 * PARAM FUNC LL_FMAC_ConfigFunc\n
997 * PARAM P LL_FMAC_ConfigFunc\n
998 * PARAM Q LL_FMAC_ConfigFunc\n
999 * PARAM R LL_FMAC_ConfigFunc
1000 * @param FMACx FMAC instance
1001 * @param Start This parameter can be one of the following values:
1002 * @arg @ref LL_FMAC_PROCESSING_STOP
1003 * @arg @ref LL_FMAC_PROCESSING_START
1004 * @param Function This parameter can be one of the following values:
1005 * @arg @ref LL_FMAC_FUNC_LOAD_X1
1006 * @arg @ref LL_FMAC_FUNC_LOAD_X2
1007 * @arg @ref LL_FMAC_FUNC_LOAD_Y
1008 * @arg @ref LL_FMAC_FUNC_CONVO_FIR
1009 * @arg @ref LL_FMAC_FUNC_IIR_DIRECT_FORM_1
1010 * @param ParamP Parameter P (vector length, number of filter taps, etc.).
1011 * This parameter must be a value between Min_Data=0x00 and Max_Data=0xFF.
1012 * @param ParamQ Parameter Q (vector length, etc.).
1013 * This parameter must be a value between Min_Data=0x00 and Max_Data=0xFF.
1014 * @param ParamR Parameter R (gain, etc.).
1015 * This parameter must be a value between Min_Data=0x00 and Max_Data=0xFF.
1016 * @retval None
1017 */
LL_FMAC_ConfigFunc(FMAC_TypeDef * FMACx,uint8_t Start,uint32_t Function,uint8_t ParamP,uint8_t ParamQ,uint8_t ParamR)1018 __STATIC_INLINE void LL_FMAC_ConfigFunc(FMAC_TypeDef *FMACx, uint8_t Start, uint32_t Function, uint8_t ParamP,
1019 uint8_t ParamQ, uint8_t ParamR)
1020 {
1021 MODIFY_REG(FMACx->PARAM, FMAC_PARAM_START | FMAC_PARAM_FUNC | FMAC_PARAM_P | FMAC_PARAM_Q | FMAC_PARAM_R,
1022 (((uint32_t)Start) << FMAC_PARAM_START_Pos) | Function | (((uint32_t)ParamP) << FMAC_PARAM_P_Pos) |
1023 (((uint32_t)ParamQ) << FMAC_PARAM_Q_Pos) | (((uint32_t)ParamR) << FMAC_PARAM_R_Pos));
1024 }
1025
1026 /**
1027 * @}
1028 */
1029
1030
1031
1032 #if defined(USE_FULL_LL_DRIVER)
1033 /** @defgroup FMAC_LL_EF_Init Initialization and de-initialization functions
1034 * @{
1035 */
1036 ErrorStatus LL_FMAC_Init(FMAC_TypeDef *FMACx);
1037 ErrorStatus LL_FMAC_DeInit(FMAC_TypeDef *FMACx);
1038
1039
1040 /**
1041 * @}
1042 */
1043 #endif /* USE_FULL_LL_DRIVER */
1044
1045 /**
1046 * @}
1047 */
1048
1049 /**
1050 * @}
1051 */
1052
1053 #endif /* defined(FMAC) */
1054
1055 /**
1056 * @}
1057 */
1058
1059 #ifdef __cplusplus
1060 }
1061 #endif
1062
1063 #endif /* STM32G4xx_LL_FMAC_H */
1064
