1 /**
2 ******************************************************************************
3 * @file stm32g4xx_ll_exti.h
4 * @author MCD Application Team
5 * @brief Header file of EXTI LL module.
6 ******************************************************************************
7 * @attention
8 *
9 * Copyright (c) 2019 STMicroelectronics.
10 * All rights reserved.
11 *
12 * This software is licensed under terms that can be found in the LICENSE file
13 * in the root directory of this software component.
14 * If no LICENSE file comes with this software, it is provided AS-IS.
15 *
16 ******************************************************************************
17 */
18
19 /* Define to prevent recursive inclusion -------------------------------------*/
20 #ifndef __STM32G4xx_LL_EXTI_H
21 #define __STM32G4xx_LL_EXTI_H
22
23 #ifdef __cplusplus
24 extern "C" {
25 #endif
26
27 /* Includes ------------------------------------------------------------------*/
28 #include "stm32g4xx.h"
29
30 /** @addtogroup STM32G4xx_LL_Driver
31 * @{
32 */
33
34 #if defined (EXTI)
35
36 /** @defgroup EXTI_LL EXTI
37 * @{
38 */
39
40 /* Private types -------------------------------------------------------------*/
41 /* Private variables ---------------------------------------------------------*/
42 /* Private constants ---------------------------------------------------------*/
43 /* Private Macros ------------------------------------------------------------*/
44 #if defined(USE_FULL_LL_DRIVER)
45 /** @defgroup EXTI_LL_Private_Macros EXTI Private Macros
46 * @{
47 */
48 /**
49 * @}
50 */
51 #endif /*USE_FULL_LL_DRIVER*/
52 /* Exported types ------------------------------------------------------------*/
53 #if defined(USE_FULL_LL_DRIVER)
54 /** @defgroup EXTI_LL_ES_INIT EXTI Exported Init structure
55 * @{
56 */
57 typedef struct
58 {
59
60 uint32_t Line_0_31; /*!< Specifies the EXTI lines to be enabled or disabled for Lines in range 0 to 31
61 This parameter can be any combination of @ref EXTI_LL_EC_LINE */
62
63 uint32_t Line_32_63; /*!< Specifies the EXTI lines to be enabled or disabled for Lines in range 32 to 63
64 This parameter can be any combination of @ref EXTI_LL_EC_LINE */
65
66 FunctionalState LineCommand; /*!< Specifies the new state of the selected EXTI lines.
67 This parameter can be set either to ENABLE or DISABLE */
68
69 uint8_t Mode; /*!< Specifies the mode for the EXTI lines.
70 This parameter can be a value of @ref EXTI_LL_EC_MODE. */
71
72 uint8_t Trigger; /*!< Specifies the trigger signal active edge for the EXTI lines.
73 This parameter can be a value of @ref EXTI_LL_EC_TRIGGER. */
74 } LL_EXTI_InitTypeDef;
75
76 /**
77 * @}
78 */
79 #endif /*USE_FULL_LL_DRIVER*/
80
81 /* Exported constants --------------------------------------------------------*/
82 /** @defgroup EXTI_LL_Exported_Constants EXTI Exported Constants
83 * @{
84 */
85
86 /** @defgroup EXTI_LL_EC_LINE LINE
87 * @{
88 */
89 #define LL_EXTI_LINE_0 EXTI_IMR1_IM0 /*!< Extended line 0 */
90 #define LL_EXTI_LINE_1 EXTI_IMR1_IM1 /*!< Extended line 1 */
91 #define LL_EXTI_LINE_2 EXTI_IMR1_IM2 /*!< Extended line 2 */
92 #define LL_EXTI_LINE_3 EXTI_IMR1_IM3 /*!< Extended line 3 */
93 #define LL_EXTI_LINE_4 EXTI_IMR1_IM4 /*!< Extended line 4 */
94 #define LL_EXTI_LINE_5 EXTI_IMR1_IM5 /*!< Extended line 5 */
95 #define LL_EXTI_LINE_6 EXTI_IMR1_IM6 /*!< Extended line 6 */
96 #define LL_EXTI_LINE_7 EXTI_IMR1_IM7 /*!< Extended line 7 */
97 #define LL_EXTI_LINE_8 EXTI_IMR1_IM8 /*!< Extended line 8 */
98 #define LL_EXTI_LINE_9 EXTI_IMR1_IM9 /*!< Extended line 9 */
99 #define LL_EXTI_LINE_10 EXTI_IMR1_IM10 /*!< Extended line 10 */
100 #define LL_EXTI_LINE_11 EXTI_IMR1_IM11 /*!< Extended line 11 */
101 #define LL_EXTI_LINE_12 EXTI_IMR1_IM12 /*!< Extended line 12 */
102 #define LL_EXTI_LINE_13 EXTI_IMR1_IM13 /*!< Extended line 13 */
103 #define LL_EXTI_LINE_14 EXTI_IMR1_IM14 /*!< Extended line 14 */
104 #define LL_EXTI_LINE_15 EXTI_IMR1_IM15 /*!< Extended line 15 */
105 #if defined(EXTI_IMR1_IM16)
106 #define LL_EXTI_LINE_16 EXTI_IMR1_IM16 /*!< Extended line 16 */
107 #endif /* EXTI_IMR1_IM16 */
108 #define LL_EXTI_LINE_17 EXTI_IMR1_IM17 /*!< Extended line 17 */
109 #if defined(EXTI_IMR1_IM18)
110 #define LL_EXTI_LINE_18 EXTI_IMR1_IM18 /*!< Extended line 18 */
111 #endif /* EXTI_IMR1_IM18 */
112 #define LL_EXTI_LINE_19 EXTI_IMR1_IM19 /*!< Extended line 19 */
113 #if defined(EXTI_IMR1_IM20)
114 #define LL_EXTI_LINE_20 EXTI_IMR1_IM20 /*!< Extended line 20 */
115 #endif /* EXTI_IMR1_IM20 */
116 #if defined(EXTI_IMR1_IM21)
117 #define LL_EXTI_LINE_21 EXTI_IMR1_IM21 /*!< Extended line 21 */
118 #endif /* EXTI_IMR1_IM21 */
119 #if defined(EXTI_IMR1_IM22)
120 #define LL_EXTI_LINE_22 EXTI_IMR1_IM22 /*!< Extended line 22 */
121 #endif /* EXTI_IMR1_IM22 */
122 #define LL_EXTI_LINE_23 EXTI_IMR1_IM23 /*!< Extended line 23 */
123 #if defined(EXTI_IMR1_IM24)
124 #define LL_EXTI_LINE_24 EXTI_IMR1_IM24 /*!< Extended line 24 */
125 #endif /* EXTI_IMR1_IM24 */
126 #if defined(EXTI_IMR1_IM25)
127 #define LL_EXTI_LINE_25 EXTI_IMR1_IM25 /*!< Extended line 25 */
128 #endif /* EXTI_IMR1_IM25 */
129 #if defined(EXTI_IMR1_IM26)
130 #define LL_EXTI_LINE_26 EXTI_IMR1_IM26 /*!< Extended line 26 */
131 #endif /* EXTI_IMR1_IM26 */
132 #if defined(EXTI_IMR1_IM27)
133 #define LL_EXTI_LINE_27 EXTI_IMR1_IM27 /*!< Extended line 27 */
134 #endif /* EXTI_IMR1_IM27 */
135 #if defined(EXTI_IMR1_IM28)
136 #define LL_EXTI_LINE_28 EXTI_IMR1_IM28 /*!< Extended line 28 */
137 #endif /* EXTI_IMR1_IM28 */
138 #if defined(EXTI_IMR1_IM29)
139 #define LL_EXTI_LINE_29 EXTI_IMR1_IM29 /*!< Extended line 29 */
140 #endif /* EXTI_IMR1_IM29 */
141 #if defined(EXTI_IMR1_IM30)
142 #define LL_EXTI_LINE_30 EXTI_IMR1_IM30 /*!< Extended line 30 */
143 #endif /* EXTI_IMR1_IM30 */
144 #if defined(EXTI_IMR1_IM31)
145 #define LL_EXTI_LINE_31 EXTI_IMR1_IM31 /*!< Extended line 31 */
146 #endif /* EXTI_IMR1_IM31 */
147 #define LL_EXTI_LINE_ALL_0_31 EXTI_IMR1_IM /*!< All Extended line not reserved*/
148
149 #if defined(EXTI_IMR2_IM32)
150 #define LL_EXTI_LINE_32 EXTI_IMR2_IM32 /*!< Extended line 32 */
151 #endif /* EXTI_IMR2_IM32 */
152 #if defined(EXTI_IMR2_IM33)
153 #define LL_EXTI_LINE_33 EXTI_IMR2_IM33 /*!< Extended line 33 */
154 #endif /* EXTI_IMR2_IM33 */
155 #if defined(EXTI_IMR2_IM34)
156 #define LL_EXTI_LINE_34 EXTI_IMR2_IM34 /*!< Extended line 34 */
157 #endif /* EXTI_IMR2_IM34 */
158 #if defined(EXTI_IMR2_IM35)
159 #define LL_EXTI_LINE_35 EXTI_IMR2_IM35 /*!< Extended line 35 */
160 #endif /* EXTI_IMR2_IM35 */
161 #if defined(EXTI_IMR2_IM36)
162 #define LL_EXTI_LINE_36 EXTI_IMR2_IM36 /*!< Extended line 36 */
163 #endif /* EXTI_IMR2_IM36 */
164 #if defined(EXTI_IMR2_IM37)
165 #define LL_EXTI_LINE_37 EXTI_IMR2_IM37 /*!< Extended line 37 */
166 #endif /* EXTI_IMR2_IM37 */
167 #if defined(EXTI_IMR2_IM38)
168 #define LL_EXTI_LINE_38 EXTI_IMR2_IM38 /*!< Extended line 38 */
169 #endif /* EXTI_IMR2_IM38 */
170 #if defined(EXTI_IMR2_IM39)
171 #define LL_EXTI_LINE_39 EXTI_IMR2_IM39 /*!< Extended line 39 */
172 #endif /* EXTI_IMR2_IM39 */
173 #if defined(EXTI_IMR2_IM40)
174 #define LL_EXTI_LINE_40 EXTI_IMR2_IM40 /*!< Extended line 40 */
175 #endif /* EXTI_IMR2_IM40 */
176 #if defined(EXTI_IMR2_IM41)
177 #define LL_EXTI_LINE_41 EXTI_IMR2_IM41 /*!< Extended line 41 */
178 #endif /* EXTI_IMR2_IM41 */
179 #if defined(EXTI_IMR2_IM42)
180 #define LL_EXTI_LINE_42 EXTI_IMR2_IM42 /*!< Extended line 42 */
181 #endif /* EXTI_IMR2_IM42 */
182 #define LL_EXTI_LINE_ALL_32_63 EXTI_IMR2_IM /*!< All Extended line not reserved*/
183
184
185 #define LL_EXTI_LINE_ALL (0xFFFFFFFFU) /*!< All Extended line */
186
187 #if defined(USE_FULL_LL_DRIVER)
188 #define LL_EXTI_LINE_NONE 0x00000000U /*!< None Extended line */
189 #endif /*USE_FULL_LL_DRIVER*/
190
191 /**
192 * @}
193 */
194 #if defined(USE_FULL_LL_DRIVER)
195
196 /** @defgroup EXTI_LL_EC_MODE Mode
197 * @{
198 */
199 #define LL_EXTI_MODE_IT ((uint8_t)0x00U) /*!< Interrupt Mode */
200 #define LL_EXTI_MODE_EVENT ((uint8_t)0x01U) /*!< Event Mode */
201 #define LL_EXTI_MODE_IT_EVENT ((uint8_t)0x02U) /*!< Interrupt & Event Mode */
202 /**
203 * @}
204 */
205
206 /** @defgroup EXTI_LL_EC_TRIGGER Edge Trigger
207 * @{
208 */
209 #define LL_EXTI_TRIGGER_NONE ((uint8_t)0x00U) /*!< No Trigger Mode */
210 #define LL_EXTI_TRIGGER_RISING ((uint8_t)0x01U) /*!< Trigger Rising Mode */
211 #define LL_EXTI_TRIGGER_FALLING ((uint8_t)0x02U) /*!< Trigger Falling Mode */
212 #define LL_EXTI_TRIGGER_RISING_FALLING ((uint8_t)0x03U) /*!< Trigger Rising & Falling Mode */
213
214 /**
215 * @}
216 */
217
218
219 #endif /*USE_FULL_LL_DRIVER*/
220
221
222 /**
223 * @}
224 */
225
226 /* Exported macro ------------------------------------------------------------*/
227 /** @defgroup EXTI_LL_Exported_Macros EXTI Exported Macros
228 * @{
229 */
230
231 /** @defgroup EXTI_LL_EM_WRITE_READ Common Write and read registers Macros
232 * @{
233 */
234
235 /**
236 * @brief Write a value in EXTI register
237 * @param __REG__ Register to be written
238 * @param __VALUE__ Value to be written in the register
239 * @retval None
240 */
241 #define LL_EXTI_WriteReg(__REG__, __VALUE__) WRITE_REG(EXTI->__REG__, (__VALUE__))
242
243 /**
244 * @brief Read a value in EXTI register
245 * @param __REG__ Register to be read
246 * @retval Register value
247 */
248 #define LL_EXTI_ReadReg(__REG__) READ_REG(EXTI->__REG__)
249 /**
250 * @}
251 */
252
253
254 /**
255 * @}
256 */
257
258
259
260 /* Exported functions --------------------------------------------------------*/
261 /** @defgroup EXTI_LL_Exported_Functions EXTI Exported Functions
262 * @{
263 */
264 /** @defgroup EXTI_LL_EF_IT_Management IT_Management
265 * @{
266 */
267
268 /**
269 * @brief Enable ExtiLine Interrupt request for Lines in range 0 to 31
270 * @note The reset value for the direct or internal lines (see RM)
271 * is set to 1 in order to enable the interrupt by default.
272 * Bits are set automatically at Power on.
273 * @rmtoll IMR1 IMx LL_EXTI_EnableIT_0_31
274 * @param ExtiLine This parameter can be one of the following values:
275 * @arg @ref LL_EXTI_LINE_0
276 * @arg @ref LL_EXTI_LINE_1
277 * @arg @ref LL_EXTI_LINE_2
278 * @arg @ref LL_EXTI_LINE_3
279 * @arg @ref LL_EXTI_LINE_4
280 * @arg @ref LL_EXTI_LINE_5
281 * @arg @ref LL_EXTI_LINE_6
282 * @arg @ref LL_EXTI_LINE_7
283 * @arg @ref LL_EXTI_LINE_8
284 * @arg @ref LL_EXTI_LINE_9
285 * @arg @ref LL_EXTI_LINE_10
286 * @arg @ref LL_EXTI_LINE_11
287 * @arg @ref LL_EXTI_LINE_12
288 * @arg @ref LL_EXTI_LINE_13
289 * @arg @ref LL_EXTI_LINE_14
290 * @arg @ref LL_EXTI_LINE_15
291 * @arg @ref LL_EXTI_LINE_16
292 * @arg @ref LL_EXTI_LINE_17
293 * @arg @ref LL_EXTI_LINE_18
294 * @arg @ref LL_EXTI_LINE_19
295 * @arg @ref LL_EXTI_LINE_20
296 * @arg @ref LL_EXTI_LINE_21
297 * @arg @ref LL_EXTI_LINE_22
298 * @arg @ref LL_EXTI_LINE_23
299 * @arg @ref LL_EXTI_LINE_24
300 * @arg @ref LL_EXTI_LINE_25
301 * @arg @ref LL_EXTI_LINE_26
302 * @arg @ref LL_EXTI_LINE_27
303 * @arg @ref LL_EXTI_LINE_28
304 * @arg @ref LL_EXTI_LINE_29
305 * @arg @ref LL_EXTI_LINE_30
306 * @arg @ref LL_EXTI_LINE_31 (*)
307 * @arg @ref LL_EXTI_LINE_ALL_0_31
308 * @note (*): Available in some devices
309 * @note Please check each device line mapping for EXTI Line availability
310 * @retval None
311 */
LL_EXTI_EnableIT_0_31(uint32_t ExtiLine)312 __STATIC_INLINE void LL_EXTI_EnableIT_0_31(uint32_t ExtiLine)
313 {
314 SET_BIT(EXTI->IMR1, ExtiLine);
315 }
316 /**
317 * @brief Enable ExtiLine Interrupt request for Lines in range 32 to 63
318 * @note The reset value for the direct lines (lines from 32 to 34, line
319 * 39) is set to 1 in order to enable the interrupt by default.
320 * Bits are set automatically at Power on.
321 * @rmtoll IMR2 IMx LL_EXTI_EnableIT_32_63
322 * @param ExtiLine This parameter can be one of the following values:
323 * @arg @ref LL_EXTI_LINE_32 (*)
324 * @arg @ref LL_EXTI_LINE_33 (*)
325 * @arg @ref LL_EXTI_LINE_34
326 * @arg @ref LL_EXTI_LINE_35 (*)
327 * @arg @ref LL_EXTI_LINE_36
328 * @arg @ref LL_EXTI_LINE_37
329 * @arg @ref LL_EXTI_LINE_38
330 * @arg @ref LL_EXTI_LINE_39
331 * @arg @ref LL_EXTI_LINE_40
332 * @arg @ref LL_EXTI_LINE_41
333 * @arg @ref LL_EXTI_LINE_42(*)
334 * @arg @ref LL_EXTI_LINE_ALL_32_63
335 * @note (*): Available in some devices
336 * @retval None
337 */
LL_EXTI_EnableIT_32_63(uint32_t ExtiLine)338 __STATIC_INLINE void LL_EXTI_EnableIT_32_63(uint32_t ExtiLine)
339 {
340 SET_BIT(EXTI->IMR2, ExtiLine);
341 }
342
343 /**
344 * @brief Disable ExtiLine Interrupt request for Lines in range 0 to 31
345 * @note The reset value for the direct or internal lines (see RM)
346 * is set to 1 in order to enable the interrupt by default.
347 * Bits are set automatically at Power on.
348 * @rmtoll IMR1 IMx LL_EXTI_DisableIT_0_31
349 * @param ExtiLine This parameter can be one of the following values:
350 * @arg @ref LL_EXTI_LINE_0
351 * @arg @ref LL_EXTI_LINE_1
352 * @arg @ref LL_EXTI_LINE_2
353 * @arg @ref LL_EXTI_LINE_3
354 * @arg @ref LL_EXTI_LINE_4
355 * @arg @ref LL_EXTI_LINE_5
356 * @arg @ref LL_EXTI_LINE_6
357 * @arg @ref LL_EXTI_LINE_7
358 * @arg @ref LL_EXTI_LINE_8
359 * @arg @ref LL_EXTI_LINE_9
360 * @arg @ref LL_EXTI_LINE_10
361 * @arg @ref LL_EXTI_LINE_11
362 * @arg @ref LL_EXTI_LINE_12
363 * @arg @ref LL_EXTI_LINE_13
364 * @arg @ref LL_EXTI_LINE_14
365 * @arg @ref LL_EXTI_LINE_15
366 * @arg @ref LL_EXTI_LINE_16
367 * @arg @ref LL_EXTI_LINE_17
368 * @arg @ref LL_EXTI_LINE_18
369 * @arg @ref LL_EXTI_LINE_19
370 * @arg @ref LL_EXTI_LINE_20
371 * @arg @ref LL_EXTI_LINE_21
372 * @arg @ref LL_EXTI_LINE_22
373 * @arg @ref LL_EXTI_LINE_23
374 * @arg @ref LL_EXTI_LINE_24
375 * @arg @ref LL_EXTI_LINE_25
376 * @arg @ref LL_EXTI_LINE_26
377 * @arg @ref LL_EXTI_LINE_27
378 * @arg @ref LL_EXTI_LINE_28
379 * @arg @ref LL_EXTI_LINE_29
380 * @arg @ref LL_EXTI_LINE_30
381 * @arg @ref LL_EXTI_LINE_31
382 * @arg @ref LL_EXTI_LINE_ALL_0_31 (*)
383 * @note (*): Available in some devices
384 * @note Please check each device line mapping for EXTI Line availability
385 * @retval None
386 */
LL_EXTI_DisableIT_0_31(uint32_t ExtiLine)387 __STATIC_INLINE void LL_EXTI_DisableIT_0_31(uint32_t ExtiLine)
388 {
389 CLEAR_BIT(EXTI->IMR1, ExtiLine);
390 }
391
392 /**
393 * @brief Disable ExtiLine Interrupt request for Lines in range 32 to 63
394 * @note The reset value for the direct lines (lines from 32 to 34, line
395 * 39) is set to 1 in order to enable the interrupt by default.
396 * Bits are set automatically at Power on.
397 * @rmtoll IMR2 IMx LL_EXTI_DisableIT_32_63
398 * @param ExtiLine This parameter can be one of the following values:
399 * @arg @ref LL_EXTI_LINE_32 (*)
400 * @arg @ref LL_EXTI_LINE_33 (*)
401 * @arg @ref LL_EXTI_LINE_34
402 * @arg @ref LL_EXTI_LINE_35 (*)
403 * @arg @ref LL_EXTI_LINE_36
404 * @arg @ref LL_EXTI_LINE_37
405 * @arg @ref LL_EXTI_LINE_38
406 * @arg @ref LL_EXTI_LINE_39
407 * @arg @ref LL_EXTI_LINE_40
408 * @arg @ref LL_EXTI_LINE_41
409 * @arg @ref LL_EXTI_LINE_42(*)
410 * @arg @ref LL_EXTI_LINE_ALL_32_63
411 * @note (*): Available in some devices
412 * @retval None
413 */
LL_EXTI_DisableIT_32_63(uint32_t ExtiLine)414 __STATIC_INLINE void LL_EXTI_DisableIT_32_63(uint32_t ExtiLine)
415 {
416 CLEAR_BIT(EXTI->IMR2, ExtiLine);
417 }
418
419 /**
420 * @brief Indicate if ExtiLine Interrupt request is enabled for Lines in range 0 to 31
421 * @note The reset value for the direct or internal lines (see RM)
422 * is set to 1 in order to enable the interrupt by default.
423 * Bits are set automatically at Power on.
424 * @rmtoll IMR1 IMx LL_EXTI_IsEnabledIT_0_31
425 * @param ExtiLine This parameter can be one of the following values:
426 * @arg @ref LL_EXTI_LINE_0
427 * @arg @ref LL_EXTI_LINE_1
428 * @arg @ref LL_EXTI_LINE_2
429 * @arg @ref LL_EXTI_LINE_3
430 * @arg @ref LL_EXTI_LINE_4
431 * @arg @ref LL_EXTI_LINE_5
432 * @arg @ref LL_EXTI_LINE_6
433 * @arg @ref LL_EXTI_LINE_7
434 * @arg @ref LL_EXTI_LINE_8
435 * @arg @ref LL_EXTI_LINE_9
436 * @arg @ref LL_EXTI_LINE_10
437 * @arg @ref LL_EXTI_LINE_11
438 * @arg @ref LL_EXTI_LINE_12
439 * @arg @ref LL_EXTI_LINE_13
440 * @arg @ref LL_EXTI_LINE_14
441 * @arg @ref LL_EXTI_LINE_15
442 * @arg @ref LL_EXTI_LINE_16
443 * @arg @ref LL_EXTI_LINE_17
444 * @arg @ref LL_EXTI_LINE_18
445 * @arg @ref LL_EXTI_LINE_19
446 * @arg @ref LL_EXTI_LINE_20
447 * @arg @ref LL_EXTI_LINE_21
448 * @arg @ref LL_EXTI_LINE_22
449 * @arg @ref LL_EXTI_LINE_23
450 * @arg @ref LL_EXTI_LINE_24
451 * @arg @ref LL_EXTI_LINE_25
452 * @arg @ref LL_EXTI_LINE_26
453 * @arg @ref LL_EXTI_LINE_27
454 * @arg @ref LL_EXTI_LINE_28
455 * @arg @ref LL_EXTI_LINE_29
456 * @arg @ref LL_EXTI_LINE_30
457 * @arg @ref LL_EXTI_LINE_31 (*)
458 * @arg @ref LL_EXTI_LINE_ALL_0_31
459 * @note (*): Available in some devices
460 * @note Please check each device line mapping for EXTI Line availability
461 * @retval State of bit (1 or 0).
462 */
LL_EXTI_IsEnabledIT_0_31(uint32_t ExtiLine)463 __STATIC_INLINE uint32_t LL_EXTI_IsEnabledIT_0_31(uint32_t ExtiLine)
464 {
465 return ((READ_BIT(EXTI->IMR1, ExtiLine) == (ExtiLine)) ? 1UL : 0UL);
466 }
467
468 /**
469 * @brief Indicate if ExtiLine Interrupt request is enabled for Lines in range 32 to 63
470 * @note The reset value for the direct lines (lines from 32 to 34, line
471 * 39) is set to 1 in order to enable the interrupt by default.
472 * Bits are set automatically at Power on.
473 * @rmtoll IMR2 IMx LL_EXTI_IsEnabledIT_32_63
474 * @param ExtiLine This parameter can be one of the following values:
475 * @arg @ref LL_EXTI_LINE_32 (*)
476 * @arg @ref LL_EXTI_LINE_33 (*)
477 * @arg @ref LL_EXTI_LINE_34
478 * @arg @ref LL_EXTI_LINE_35 (*)
479 * @arg @ref LL_EXTI_LINE_36
480 * @arg @ref LL_EXTI_LINE_37
481 * @arg @ref LL_EXTI_LINE_38
482 * @arg @ref LL_EXTI_LINE_39
483 * @arg @ref LL_EXTI_LINE_40
484 * @arg @ref LL_EXTI_LINE_41
485 * @arg @ref LL_EXTI_LINE_42(*)
486 * @arg @ref LL_EXTI_LINE_ALL_32_63
487 * @note (*): Available in some devices
488 * @retval State of bit (1 or 0).
489 */
LL_EXTI_IsEnabledIT_32_63(uint32_t ExtiLine)490 __STATIC_INLINE uint32_t LL_EXTI_IsEnabledIT_32_63(uint32_t ExtiLine)
491 {
492 return ((READ_BIT(EXTI->IMR2, ExtiLine) == (ExtiLine)) ? 1UL : 0UL);
493 }
494
495 /**
496 * @}
497 */
498
499 /** @defgroup EXTI_LL_EF_Event_Management Event_Management
500 * @{
501 */
502
503 /**
504 * @brief Enable ExtiLine Event request for Lines in range 0 to 31
505 * @rmtoll EMR1 EMx LL_EXTI_EnableEvent_0_31
506 * @param ExtiLine This parameter can be one of the following values:
507 * @arg @ref LL_EXTI_LINE_0
508 * @arg @ref LL_EXTI_LINE_1
509 * @arg @ref LL_EXTI_LINE_2
510 * @arg @ref LL_EXTI_LINE_3
511 * @arg @ref LL_EXTI_LINE_4
512 * @arg @ref LL_EXTI_LINE_5
513 * @arg @ref LL_EXTI_LINE_6
514 * @arg @ref LL_EXTI_LINE_7
515 * @arg @ref LL_EXTI_LINE_8
516 * @arg @ref LL_EXTI_LINE_9
517 * @arg @ref LL_EXTI_LINE_10
518 * @arg @ref LL_EXTI_LINE_11
519 * @arg @ref LL_EXTI_LINE_12
520 * @arg @ref LL_EXTI_LINE_13
521 * @arg @ref LL_EXTI_LINE_14
522 * @arg @ref LL_EXTI_LINE_15
523 * @arg @ref LL_EXTI_LINE_16
524 * @arg @ref LL_EXTI_LINE_17
525 * @arg @ref LL_EXTI_LINE_18
526 * @arg @ref LL_EXTI_LINE_19
527 * @arg @ref LL_EXTI_LINE_20
528 * @arg @ref LL_EXTI_LINE_21
529 * @arg @ref LL_EXTI_LINE_22
530 * @arg @ref LL_EXTI_LINE_23
531 * @arg @ref LL_EXTI_LINE_24
532 * @arg @ref LL_EXTI_LINE_25
533 * @arg @ref LL_EXTI_LINE_26
534 * @arg @ref LL_EXTI_LINE_27
535 * @arg @ref LL_EXTI_LINE_28
536 * @arg @ref LL_EXTI_LINE_29
537 * @arg @ref LL_EXTI_LINE_30
538 * @arg @ref LL_EXTI_LINE_31
539 * @arg @ref LL_EXTI_LINE_ALL_0_31 (*)
540 * @note (*): Available in some devices
541 * @note Please check each device line mapping for EXTI Line availability
542 * @retval None
543 */
LL_EXTI_EnableEvent_0_31(uint32_t ExtiLine)544 __STATIC_INLINE void LL_EXTI_EnableEvent_0_31(uint32_t ExtiLine)
545 {
546 SET_BIT(EXTI->EMR1, ExtiLine);
547
548 }
549
550 /**
551 * @brief Enable ExtiLine Event request for Lines in range 32 to 63
552 * @rmtoll EMR2 EMx LL_EXTI_EnableEvent_32_63
553 * @param ExtiLine This parameter can be a combination of the following values:
554 * @arg @ref LL_EXTI_LINE_32 (*)
555 * @arg @ref LL_EXTI_LINE_33 (*)
556 * @arg @ref LL_EXTI_LINE_34
557 * @arg @ref LL_EXTI_LINE_35 (*)
558 * @arg @ref LL_EXTI_LINE_36
559 * @arg @ref LL_EXTI_LINE_37
560 * @arg @ref LL_EXTI_LINE_38
561 * @arg @ref LL_EXTI_LINE_39
562 * @arg @ref LL_EXTI_LINE_40
563 * @arg @ref LL_EXTI_LINE_41
564 * @arg @ref LL_EXTI_LINE_42(*)
565 * @arg @ref LL_EXTI_LINE_ALL_32_63
566 * @note (*): Available in some devices
567 * @retval None
568 */
LL_EXTI_EnableEvent_32_63(uint32_t ExtiLine)569 __STATIC_INLINE void LL_EXTI_EnableEvent_32_63(uint32_t ExtiLine)
570 {
571 SET_BIT(EXTI->EMR2, ExtiLine);
572 }
573
574 /**
575 * @brief Disable ExtiLine Event request for Lines in range 0 to 31
576 * @rmtoll EMR1 EMx LL_EXTI_DisableEvent_0_31
577 * @param ExtiLine This parameter can be one of the following values:
578 * @arg @ref LL_EXTI_LINE_0
579 * @arg @ref LL_EXTI_LINE_1
580 * @arg @ref LL_EXTI_LINE_2
581 * @arg @ref LL_EXTI_LINE_3
582 * @arg @ref LL_EXTI_LINE_4
583 * @arg @ref LL_EXTI_LINE_5
584 * @arg @ref LL_EXTI_LINE_6
585 * @arg @ref LL_EXTI_LINE_7
586 * @arg @ref LL_EXTI_LINE_8
587 * @arg @ref LL_EXTI_LINE_9
588 * @arg @ref LL_EXTI_LINE_10
589 * @arg @ref LL_EXTI_LINE_11
590 * @arg @ref LL_EXTI_LINE_12
591 * @arg @ref LL_EXTI_LINE_13
592 * @arg @ref LL_EXTI_LINE_14
593 * @arg @ref LL_EXTI_LINE_15
594 * @arg @ref LL_EXTI_LINE_16
595 * @arg @ref LL_EXTI_LINE_17
596 * @arg @ref LL_EXTI_LINE_18
597 * @arg @ref LL_EXTI_LINE_19
598 * @arg @ref LL_EXTI_LINE_20
599 * @arg @ref LL_EXTI_LINE_21
600 * @arg @ref LL_EXTI_LINE_22
601 * @arg @ref LL_EXTI_LINE_23
602 * @arg @ref LL_EXTI_LINE_24
603 * @arg @ref LL_EXTI_LINE_25
604 * @arg @ref LL_EXTI_LINE_26
605 * @arg @ref LL_EXTI_LINE_27
606 * @arg @ref LL_EXTI_LINE_28
607 * @arg @ref LL_EXTI_LINE_29
608 * @arg @ref LL_EXTI_LINE_30
609 * @arg @ref LL_EXTI_LINE_31 (*)
610 * @arg @ref LL_EXTI_LINE_ALL_0_31
611 * @note (*): Available in some devices
612 * @note Please check each device line mapping for EXTI Line availability
613 * @retval None
614 */
LL_EXTI_DisableEvent_0_31(uint32_t ExtiLine)615 __STATIC_INLINE void LL_EXTI_DisableEvent_0_31(uint32_t ExtiLine)
616 {
617 CLEAR_BIT(EXTI->EMR1, ExtiLine);
618 }
619
620 /**
621 * @brief Disable ExtiLine Event request for Lines in range 32 to 63
622 * @rmtoll EMR2 EMx LL_EXTI_DisableEvent_32_63
623 * @param ExtiLine This parameter can be a combination of the following values:
624 * @arg @ref LL_EXTI_LINE_32 (*)
625 * @arg @ref LL_EXTI_LINE_33 (*)
626 * @arg @ref LL_EXTI_LINE_34
627 * @arg @ref LL_EXTI_LINE_35 (*)
628 * @arg @ref LL_EXTI_LINE_36
629 * @arg @ref LL_EXTI_LINE_37
630 * @arg @ref LL_EXTI_LINE_38
631 * @arg @ref LL_EXTI_LINE_39
632 * @arg @ref LL_EXTI_LINE_40
633 * @arg @ref LL_EXTI_LINE_41
634 * @arg @ref LL_EXTI_LINE_42(*)
635 * @arg @ref LL_EXTI_LINE_ALL_32_63
636 * @note (*): Available in some devices
637 * @retval None
638 */
LL_EXTI_DisableEvent_32_63(uint32_t ExtiLine)639 __STATIC_INLINE void LL_EXTI_DisableEvent_32_63(uint32_t ExtiLine)
640 {
641 CLEAR_BIT(EXTI->EMR2, ExtiLine);
642 }
643
644 /**
645 * @brief Indicate if ExtiLine Event request is enabled for Lines in range 0 to 31
646 * @rmtoll EMR1 EMx LL_EXTI_IsEnabledEvent_0_31
647 * @param ExtiLine This parameter can be one of the following values:
648 * @arg @ref LL_EXTI_LINE_0
649 * @arg @ref LL_EXTI_LINE_1
650 * @arg @ref LL_EXTI_LINE_2
651 * @arg @ref LL_EXTI_LINE_3
652 * @arg @ref LL_EXTI_LINE_4
653 * @arg @ref LL_EXTI_LINE_5
654 * @arg @ref LL_EXTI_LINE_6
655 * @arg @ref LL_EXTI_LINE_7
656 * @arg @ref LL_EXTI_LINE_8
657 * @arg @ref LL_EXTI_LINE_9
658 * @arg @ref LL_EXTI_LINE_10
659 * @arg @ref LL_EXTI_LINE_11
660 * @arg @ref LL_EXTI_LINE_12
661 * @arg @ref LL_EXTI_LINE_13
662 * @arg @ref LL_EXTI_LINE_14
663 * @arg @ref LL_EXTI_LINE_15
664 * @arg @ref LL_EXTI_LINE_16
665 * @arg @ref LL_EXTI_LINE_17
666 * @arg @ref LL_EXTI_LINE_18
667 * @arg @ref LL_EXTI_LINE_19
668 * @arg @ref LL_EXTI_LINE_20
669 * @arg @ref LL_EXTI_LINE_21
670 * @arg @ref LL_EXTI_LINE_22
671 * @arg @ref LL_EXTI_LINE_23
672 * @arg @ref LL_EXTI_LINE_24
673 * @arg @ref LL_EXTI_LINE_25
674 * @arg @ref LL_EXTI_LINE_26
675 * @arg @ref LL_EXTI_LINE_27
676 * @arg @ref LL_EXTI_LINE_28
677 * @arg @ref LL_EXTI_LINE_29
678 * @arg @ref LL_EXTI_LINE_30
679 * @arg @ref LL_EXTI_LINE_31
680 * @arg @ref LL_EXTI_LINE_ALL_0_31 (*)
681 * @note (*): Available in some devices
682 * @note Please check each device line mapping for EXTI Line availability
683 * @retval State of bit (1 or 0).
684 */
LL_EXTI_IsEnabledEvent_0_31(uint32_t ExtiLine)685 __STATIC_INLINE uint32_t LL_EXTI_IsEnabledEvent_0_31(uint32_t ExtiLine)
686 {
687 return ((READ_BIT(EXTI->EMR1, ExtiLine) == (ExtiLine)) ? 1UL : 0UL);
688
689 }
690
691 /**
692 * @brief Indicate if ExtiLine Event request is enabled for Lines in range 32 to 63
693 * @rmtoll EMR2 EMx LL_EXTI_IsEnabledEvent_32_63
694 * @param ExtiLine This parameter can be a combination of the following values:
695 * @arg @ref LL_EXTI_LINE_32 (*)
696 * @arg @ref LL_EXTI_LINE_33 (*)
697 * @arg @ref LL_EXTI_LINE_34
698 * @arg @ref LL_EXTI_LINE_35 (*)
699 * @arg @ref LL_EXTI_LINE_36
700 * @arg @ref LL_EXTI_LINE_37
701 * @arg @ref LL_EXTI_LINE_38
702 * @arg @ref LL_EXTI_LINE_39
703 * @arg @ref LL_EXTI_LINE_40
704 * @arg @ref LL_EXTI_LINE_41
705 * @arg @ref LL_EXTI_LINE_42(*)
706 * @arg @ref LL_EXTI_LINE_ALL_32_63
707 * @note (*): Available in some devices
708 * @retval State of bit (1 or 0).
709 */
LL_EXTI_IsEnabledEvent_32_63(uint32_t ExtiLine)710 __STATIC_INLINE uint32_t LL_EXTI_IsEnabledEvent_32_63(uint32_t ExtiLine)
711 {
712 return ((READ_BIT(EXTI->EMR2, ExtiLine) == (ExtiLine)) ? 1UL : 0UL);
713 }
714
715 /**
716 * @}
717 */
718
719 /** @defgroup EXTI_LL_EF_Rising_Trigger_Management Rising_Trigger_Management
720 * @{
721 */
722
723 /**
724 * @brief Enable ExtiLine Rising Edge Trigger for Lines in range 0 to 31
725 * @note The configurable wakeup lines are edge-triggered. No glitch must be
726 * generated on these lines. If a rising edge on a configurable interrupt
727 * line occurs during a write operation in the EXTI_RTSR register, the
728 * pending bit is not set.
729 * Rising and falling edge triggers can be set for
730 * the same interrupt line. In this case, both generate a trigger
731 * condition.
732 * @rmtoll RTSR1 RTx LL_EXTI_EnableRisingTrig_0_31
733 * @param ExtiLine This parameter can be a combination of the following values:
734 * @arg @ref LL_EXTI_LINE_0
735 * @arg @ref LL_EXTI_LINE_1
736 * @arg @ref LL_EXTI_LINE_2
737 * @arg @ref LL_EXTI_LINE_3
738 * @arg @ref LL_EXTI_LINE_4
739 * @arg @ref LL_EXTI_LINE_5
740 * @arg @ref LL_EXTI_LINE_6
741 * @arg @ref LL_EXTI_LINE_7
742 * @arg @ref LL_EXTI_LINE_8
743 * @arg @ref LL_EXTI_LINE_9
744 * @arg @ref LL_EXTI_LINE_10
745 * @arg @ref LL_EXTI_LINE_11
746 * @arg @ref LL_EXTI_LINE_12
747 * @arg @ref LL_EXTI_LINE_13
748 * @arg @ref LL_EXTI_LINE_14
749 * @arg @ref LL_EXTI_LINE_15
750 * @arg @ref LL_EXTI_LINE_16
751 * @arg @ref LL_EXTI_LINE_18
752 * @arg @ref LL_EXTI_LINE_19
753 * @arg @ref LL_EXTI_LINE_20
754 * @arg @ref LL_EXTI_LINE_21
755 * @arg @ref LL_EXTI_LINE_22
756 * @arg @ref LL_EXTI_LINE_29
757 * @arg @ref LL_EXTI_LINE_30
758 * @arg @ref LL_EXTI_LINE_31 (*)
759 * @note (*): Available in some devices
760 * @note Please check each device line mapping for EXTI Line availability
761 * @retval None
762 */
LL_EXTI_EnableRisingTrig_0_31(uint32_t ExtiLine)763 __STATIC_INLINE void LL_EXTI_EnableRisingTrig_0_31(uint32_t ExtiLine)
764 {
765 SET_BIT(EXTI->RTSR1, ExtiLine);
766
767 }
768
769 /**
770 * @brief Enable ExtiLine Rising Edge Trigger for Lines in range 32 to 63
771 * @note The configurable wakeup lines are edge-triggered. No glitch must be
772 * generated on these lines. If a rising edge on a configurable interrupt
773 * line occurs during a write operation in the EXTI_RTSR register, the
774 * pending bit is not set.Rising and falling edge triggers can be set for
775 * the same interrupt line. In this case, both generate a trigger
776 * condition.
777 * @rmtoll RTSR2 RTx LL_EXTI_EnableRisingTrig_32_63
778 * @param ExtiLine This parameter can be a combination of the following values:
779 * @arg @ref LL_EXTI_LINE_32 (*)
780 * @arg @ref LL_EXTI_LINE_33 (*)
781 * @arg @ref LL_EXTI_LINE_38
782 * @arg @ref LL_EXTI_LINE_39
783 * @arg @ref LL_EXTI_LINE_40
784 * @arg @ref LL_EXTI_LINE_41
785 * @note (*): Available in some devices
786 * @retval None
787 */
LL_EXTI_EnableRisingTrig_32_63(uint32_t ExtiLine)788 __STATIC_INLINE void LL_EXTI_EnableRisingTrig_32_63(uint32_t ExtiLine)
789 {
790 SET_BIT(EXTI->RTSR2, ExtiLine);
791 }
792
793 /**
794 * @brief Disable ExtiLine Rising Edge Trigger for Lines in range 0 to 31
795 * @note The configurable wakeup lines are edge-triggered. No glitch must be
796 * generated on these lines. If a rising edge on a configurable interrupt
797 * line occurs during a write operation in the EXTI_RTSR register, the
798 * pending bit is not set.
799 * Rising and falling edge triggers can be set for
800 * the same interrupt line. In this case, both generate a trigger
801 * condition.
802 * @rmtoll RTSR1 RTx LL_EXTI_DisableRisingTrig_0_31
803 * @param ExtiLine This parameter can be a combination of the following values:
804 * @arg @ref LL_EXTI_LINE_0
805 * @arg @ref LL_EXTI_LINE_1
806 * @arg @ref LL_EXTI_LINE_2
807 * @arg @ref LL_EXTI_LINE_3
808 * @arg @ref LL_EXTI_LINE_4
809 * @arg @ref LL_EXTI_LINE_5
810 * @arg @ref LL_EXTI_LINE_6
811 * @arg @ref LL_EXTI_LINE_7
812 * @arg @ref LL_EXTI_LINE_8
813 * @arg @ref LL_EXTI_LINE_9
814 * @arg @ref LL_EXTI_LINE_10
815 * @arg @ref LL_EXTI_LINE_11
816 * @arg @ref LL_EXTI_LINE_12
817 * @arg @ref LL_EXTI_LINE_13
818 * @arg @ref LL_EXTI_LINE_14
819 * @arg @ref LL_EXTI_LINE_15
820 * @arg @ref LL_EXTI_LINE_16
821 * @arg @ref LL_EXTI_LINE_18
822 * @arg @ref LL_EXTI_LINE_19
823 * @arg @ref LL_EXTI_LINE_20
824 * @arg @ref LL_EXTI_LINE_21
825 * @arg @ref LL_EXTI_LINE_22
826 * @arg @ref LL_EXTI_LINE_29
827 * @arg @ref LL_EXTI_LINE_30
828 * @arg @ref LL_EXTI_LINE_31 (*)
829 * @note (*): Available in some devices
830 * @note Please check each device line mapping for EXTI Line availability
831 * @retval None
832 */
LL_EXTI_DisableRisingTrig_0_31(uint32_t ExtiLine)833 __STATIC_INLINE void LL_EXTI_DisableRisingTrig_0_31(uint32_t ExtiLine)
834 {
835 CLEAR_BIT(EXTI->RTSR1, ExtiLine);
836
837 }
838
839 /**
840 * @brief Disable ExtiLine Rising Edge Trigger for Lines in range 32 to 63
841 * @note The configurable wakeup lines are edge-triggered. No glitch must be
842 * generated on these lines. If a rising edge on a configurable interrupt
843 * line occurs during a write operation in the EXTI_RTSR register, the
844 * pending bit is not set.
845 * Rising and falling edge triggers can be set for
846 * the same interrupt line. In this case, both generate a trigger
847 * condition.
848 * @rmtoll RTSR2 RTx LL_EXTI_DisableRisingTrig_32_63
849 * @param ExtiLine This parameter can be a combination of the following values:
850 * @arg @ref LL_EXTI_LINE_32 (*)
851 * @arg @ref LL_EXTI_LINE_33 (*)
852 * @arg @ref LL_EXTI_LINE_38
853 * @arg @ref LL_EXTI_LINE_39
854 * @arg @ref LL_EXTI_LINE_40
855 * @arg @ref LL_EXTI_LINE_41
856 * @note (*): Available in some devices
857 * @retval None
858 */
LL_EXTI_DisableRisingTrig_32_63(uint32_t ExtiLine)859 __STATIC_INLINE void LL_EXTI_DisableRisingTrig_32_63(uint32_t ExtiLine)
860 {
861 CLEAR_BIT(EXTI->RTSR2, ExtiLine);
862 }
863
864 /**
865 * @brief Check if rising edge trigger is enabled for Lines in range 0 to 31
866 * @rmtoll RTSR1 RTx LL_EXTI_IsEnabledRisingTrig_0_31
867 * @param ExtiLine This parameter can be a combination of the following values:
868 * @arg @ref LL_EXTI_LINE_0
869 * @arg @ref LL_EXTI_LINE_1
870 * @arg @ref LL_EXTI_LINE_2
871 * @arg @ref LL_EXTI_LINE_3
872 * @arg @ref LL_EXTI_LINE_4
873 * @arg @ref LL_EXTI_LINE_5
874 * @arg @ref LL_EXTI_LINE_6
875 * @arg @ref LL_EXTI_LINE_7
876 * @arg @ref LL_EXTI_LINE_8
877 * @arg @ref LL_EXTI_LINE_9
878 * @arg @ref LL_EXTI_LINE_10
879 * @arg @ref LL_EXTI_LINE_11
880 * @arg @ref LL_EXTI_LINE_12
881 * @arg @ref LL_EXTI_LINE_13
882 * @arg @ref LL_EXTI_LINE_14
883 * @arg @ref LL_EXTI_LINE_15
884 * @arg @ref LL_EXTI_LINE_16
885 * @arg @ref LL_EXTI_LINE_18
886 * @arg @ref LL_EXTI_LINE_19
887 * @arg @ref LL_EXTI_LINE_20
888 * @arg @ref LL_EXTI_LINE_21
889 * @arg @ref LL_EXTI_LINE_22
890 * @arg @ref LL_EXTI_LINE_29
891 * @arg @ref LL_EXTI_LINE_30
892 * @arg @ref LL_EXTI_LINE_31 (*)
893 * @note (*): Available in some devices
894 * @note Please check each device line mapping for EXTI Line availability
895 * @retval State of bit (1 or 0).
896 */
LL_EXTI_IsEnabledRisingTrig_0_31(uint32_t ExtiLine)897 __STATIC_INLINE uint32_t LL_EXTI_IsEnabledRisingTrig_0_31(uint32_t ExtiLine)
898 {
899 return ((READ_BIT(EXTI->RTSR1, ExtiLine) == (ExtiLine)) ? 1UL : 0UL);
900 }
901
902 /**
903 * @brief Check if rising edge trigger is enabled for Lines in range 32 to 63
904 * @rmtoll RTSR2 RTx LL_EXTI_IsEnabledRisingTrig_32_63
905 * @param ExtiLine This parameter can be a combination of the following values:
906 * @arg @ref LL_EXTI_LINE_32 (*)
907 * @arg @ref LL_EXTI_LINE_33 (*)
908 * @arg @ref LL_EXTI_LINE_38
909 * @arg @ref LL_EXTI_LINE_39
910 * @arg @ref LL_EXTI_LINE_40
911 * @arg @ref LL_EXTI_LINE_41
912 * @note (*): Available in some devices
913 * @retval State of bit (1 or 0).
914 */
LL_EXTI_IsEnabledRisingTrig_32_63(uint32_t ExtiLine)915 __STATIC_INLINE uint32_t LL_EXTI_IsEnabledRisingTrig_32_63(uint32_t ExtiLine)
916 {
917 return ((READ_BIT(EXTI->RTSR2, ExtiLine) == (ExtiLine)) ? 1UL : 0UL);
918 }
919
920 /**
921 * @}
922 */
923
924 /** @defgroup EXTI_LL_EF_Falling_Trigger_Management Falling_Trigger_Management
925 * @{
926 */
927
928 /**
929 * @brief Enable ExtiLine Falling Edge Trigger for Lines in range 0 to 31
930 * @note The configurable wakeup lines are edge-triggered. No glitch must be
931 * generated on these lines. If a falling edge on a configurable interrupt
932 * line occurs during a write operation in the EXTI_FTSR register, the
933 * pending bit is not set.
934 * Rising and falling edge triggers can be set for
935 * the same interrupt line. In this case, both generate a trigger
936 * condition.
937 * @rmtoll FTSR1 FTx LL_EXTI_EnableFallingTrig_0_31
938 * @param ExtiLine This parameter can be a combination of the following values:
939 * @arg @ref LL_EXTI_LINE_0
940 * @arg @ref LL_EXTI_LINE_1
941 * @arg @ref LL_EXTI_LINE_2
942 * @arg @ref LL_EXTI_LINE_3
943 * @arg @ref LL_EXTI_LINE_4
944 * @arg @ref LL_EXTI_LINE_5
945 * @arg @ref LL_EXTI_LINE_6
946 * @arg @ref LL_EXTI_LINE_7
947 * @arg @ref LL_EXTI_LINE_8
948 * @arg @ref LL_EXTI_LINE_9
949 * @arg @ref LL_EXTI_LINE_10
950 * @arg @ref LL_EXTI_LINE_11
951 * @arg @ref LL_EXTI_LINE_12
952 * @arg @ref LL_EXTI_LINE_13
953 * @arg @ref LL_EXTI_LINE_14
954 * @arg @ref LL_EXTI_LINE_15
955 * @arg @ref LL_EXTI_LINE_16
956 * @arg @ref LL_EXTI_LINE_18
957 * @arg @ref LL_EXTI_LINE_19
958 * @arg @ref LL_EXTI_LINE_20
959 * @arg @ref LL_EXTI_LINE_21
960 * @arg @ref LL_EXTI_LINE_22
961 * @arg @ref LL_EXTI_LINE_29
962 * @arg @ref LL_EXTI_LINE_30
963 * @arg @ref LL_EXTI_LINE_31 (*)
964 * @note (*): Available in some devices
965 * @note Please check each device line mapping for EXTI Line availability
966 * @retval None
967 */
LL_EXTI_EnableFallingTrig_0_31(uint32_t ExtiLine)968 __STATIC_INLINE void LL_EXTI_EnableFallingTrig_0_31(uint32_t ExtiLine)
969 {
970 SET_BIT(EXTI->FTSR1, ExtiLine);
971 }
972
973 /**
974 * @brief Enable ExtiLine Falling Edge Trigger for Lines in range 32 to 63
975 * @note The configurable wakeup lines are edge-triggered. No glitch must be
976 * generated on these lines. If a Falling edge on a configurable interrupt
977 * line occurs during a write operation in the EXTI_FTSR register, the
978 * pending bit is not set.
979 * Rising and falling edge triggers can be set for
980 * the same interrupt line. In this case, both generate a trigger
981 * condition.
982 * @rmtoll FTSR2 FTx LL_EXTI_EnableFallingTrig_32_63
983 * @param ExtiLine This parameter can be a combination of the following values:
984 * @arg @ref LL_EXTI_LINE_32 (*)
985 * @arg @ref LL_EXTI_LINE_33 (*)
986 * @arg @ref LL_EXTI_LINE_38
987 * @arg @ref LL_EXTI_LINE_39
988 * @arg @ref LL_EXTI_LINE_40
989 * @arg @ref LL_EXTI_LINE_41
990 * @note (*): Available in some devices
991 * @retval None
992 */
LL_EXTI_EnableFallingTrig_32_63(uint32_t ExtiLine)993 __STATIC_INLINE void LL_EXTI_EnableFallingTrig_32_63(uint32_t ExtiLine)
994 {
995 SET_BIT(EXTI->FTSR2, ExtiLine);
996 }
997
998 /**
999 * @brief Disable ExtiLine Falling Edge Trigger for Lines in range 0 to 31
1000 * @note The configurable wakeup lines are edge-triggered. No glitch must be
1001 * generated on these lines. If a Falling edge on a configurable interrupt
1002 * line occurs during a write operation in the EXTI_FTSR register, the
1003 * pending bit is not set.
1004 * Rising and falling edge triggers can be set for the same interrupt line.
1005 * In this case, both generate a trigger condition.
1006 * @rmtoll FTSR1 FTx LL_EXTI_DisableFallingTrig_0_31
1007 * @param ExtiLine This parameter can be a combination of the following values:
1008 * @arg @ref LL_EXTI_LINE_0
1009 * @arg @ref LL_EXTI_LINE_1
1010 * @arg @ref LL_EXTI_LINE_2
1011 * @arg @ref LL_EXTI_LINE_3
1012 * @arg @ref LL_EXTI_LINE_4
1013 * @arg @ref LL_EXTI_LINE_5
1014 * @arg @ref LL_EXTI_LINE_6
1015 * @arg @ref LL_EXTI_LINE_7
1016 * @arg @ref LL_EXTI_LINE_8
1017 * @arg @ref LL_EXTI_LINE_9
1018 * @arg @ref LL_EXTI_LINE_10
1019 * @arg @ref LL_EXTI_LINE_11
1020 * @arg @ref LL_EXTI_LINE_12
1021 * @arg @ref LL_EXTI_LINE_13
1022 * @arg @ref LL_EXTI_LINE_14
1023 * @arg @ref LL_EXTI_LINE_15
1024 * @arg @ref LL_EXTI_LINE_16
1025 * @arg @ref LL_EXTI_LINE_18
1026 * @arg @ref LL_EXTI_LINE_19
1027 * @arg @ref LL_EXTI_LINE_20
1028 * @arg @ref LL_EXTI_LINE_21
1029 * @arg @ref LL_EXTI_LINE_22
1030 * @arg @ref LL_EXTI_LINE_29
1031 * @arg @ref LL_EXTI_LINE_30
1032 * @arg @ref LL_EXTI_LINE_31 (*)
1033 * @note (*): Available in some devices
1034 * @note Please check each device line mapping for EXTI Line availability
1035 * @retval None
1036 */
LL_EXTI_DisableFallingTrig_0_31(uint32_t ExtiLine)1037 __STATIC_INLINE void LL_EXTI_DisableFallingTrig_0_31(uint32_t ExtiLine)
1038 {
1039 CLEAR_BIT(EXTI->FTSR1, ExtiLine);
1040 }
1041
1042 /**
1043 * @brief Disable ExtiLine Falling Edge Trigger for Lines in range 32 to 63
1044 * @note The configurable wakeup lines are edge-triggered. No glitch must be
1045 * generated on these lines. If a Falling edge on a configurable interrupt
1046 * line occurs during a write operation in the EXTI_FTSR register, the
1047 * pending bit is not set.
1048 * Rising and falling edge triggers can be set for the same interrupt line.
1049 * In this case, both generate a trigger condition.
1050 * @rmtoll FTSR2 FTx LL_EXTI_DisableFallingTrig_32_63
1051 * @param ExtiLine This parameter can be a combination of the following values:
1052 * @arg @ref LL_EXTI_LINE_32 (*)
1053 * @arg @ref LL_EXTI_LINE_33 (*)
1054 * @arg @ref LL_EXTI_LINE_38
1055 * @arg @ref LL_EXTI_LINE_39
1056 * @arg @ref LL_EXTI_LINE_40
1057 * @arg @ref LL_EXTI_LINE_41
1058 * @note (*): Available in some devices
1059 * @retval None
1060 */
LL_EXTI_DisableFallingTrig_32_63(uint32_t ExtiLine)1061 __STATIC_INLINE void LL_EXTI_DisableFallingTrig_32_63(uint32_t ExtiLine)
1062 {
1063 CLEAR_BIT(EXTI->FTSR2, ExtiLine);
1064 }
1065
1066 /**
1067 * @brief Check if falling edge trigger is enabled for Lines in range 0 to 31
1068 * @rmtoll FTSR1 FTx LL_EXTI_IsEnabledFallingTrig_0_31
1069 * @param ExtiLine This parameter can be a combination of the following values:
1070 * @arg @ref LL_EXTI_LINE_0
1071 * @arg @ref LL_EXTI_LINE_1
1072 * @arg @ref LL_EXTI_LINE_2
1073 * @arg @ref LL_EXTI_LINE_3
1074 * @arg @ref LL_EXTI_LINE_4
1075 * @arg @ref LL_EXTI_LINE_5
1076 * @arg @ref LL_EXTI_LINE_6
1077 * @arg @ref LL_EXTI_LINE_7
1078 * @arg @ref LL_EXTI_LINE_8
1079 * @arg @ref LL_EXTI_LINE_9
1080 * @arg @ref LL_EXTI_LINE_10
1081 * @arg @ref LL_EXTI_LINE_11
1082 * @arg @ref LL_EXTI_LINE_12
1083 * @arg @ref LL_EXTI_LINE_13
1084 * @arg @ref LL_EXTI_LINE_14
1085 * @arg @ref LL_EXTI_LINE_15
1086 * @arg @ref LL_EXTI_LINE_16
1087 * @arg @ref LL_EXTI_LINE_18
1088 * @arg @ref LL_EXTI_LINE_19
1089 * @arg @ref LL_EXTI_LINE_20
1090 * @arg @ref LL_EXTI_LINE_21
1091 * @arg @ref LL_EXTI_LINE_22
1092 * @arg @ref LL_EXTI_LINE_29
1093 * @arg @ref LL_EXTI_LINE_30
1094 * @arg @ref LL_EXTI_LINE_31 (*)
1095 * @note (*): Available in some devices
1096 * @note Please check each device line mapping for EXTI Line availability
1097 * @retval State of bit (1 or 0).
1098 */
LL_EXTI_IsEnabledFallingTrig_0_31(uint32_t ExtiLine)1099 __STATIC_INLINE uint32_t LL_EXTI_IsEnabledFallingTrig_0_31(uint32_t ExtiLine)
1100 {
1101 return ((READ_BIT(EXTI->FTSR1, ExtiLine) == (ExtiLine)) ? 1UL : 0UL);
1102 }
1103
1104 /**
1105 * @brief Check if falling edge trigger is enabled for Lines in range 32 to 63
1106 * @rmtoll FTSR2 FTx LL_EXTI_IsEnabledFallingTrig_32_63
1107 * @param ExtiLine This parameter can be a combination of the following values:
1108 * @arg @ref LL_EXTI_LINE_32 (*)
1109 * @arg @ref LL_EXTI_LINE_33 (*)
1110 * @arg @ref LL_EXTI_LINE_38
1111 * @arg @ref LL_EXTI_LINE_39
1112 * @arg @ref LL_EXTI_LINE_40
1113 * @arg @ref LL_EXTI_LINE_41
1114 * @note (*): Available in some devices
1115 * @retval State of bit (1 or 0).
1116 */
LL_EXTI_IsEnabledFallingTrig_32_63(uint32_t ExtiLine)1117 __STATIC_INLINE uint32_t LL_EXTI_IsEnabledFallingTrig_32_63(uint32_t ExtiLine)
1118 {
1119 return ((READ_BIT(EXTI->FTSR2, ExtiLine) == (ExtiLine)) ? 1UL : 0UL);
1120 }
1121
1122 /**
1123 * @}
1124 */
1125
1126 /** @defgroup EXTI_LL_EF_Software_Interrupt_Management Software_Interrupt_Management
1127 * @{
1128 */
1129
1130 /**
1131 * @brief Generate a software Interrupt Event for Lines in range 0 to 31
1132 * @note If the interrupt is enabled on this line in the EXTI_IMR1, writing a 1 to
1133 * this bit when it is at '0' sets the corresponding pending bit in EXTI_PR1
1134 * resulting in an interrupt request generation.
1135 * This bit is cleared by clearing the corresponding bit in the EXTI_PR1
1136 * register (by writing a 1 into the bit)
1137 * @rmtoll SWIER1 SWIx LL_EXTI_GenerateSWI_0_31
1138 * @param ExtiLine This parameter can be a combination of the following values:
1139 * @arg @ref LL_EXTI_LINE_0
1140 * @arg @ref LL_EXTI_LINE_1
1141 * @arg @ref LL_EXTI_LINE_2
1142 * @arg @ref LL_EXTI_LINE_3
1143 * @arg @ref LL_EXTI_LINE_4
1144 * @arg @ref LL_EXTI_LINE_5
1145 * @arg @ref LL_EXTI_LINE_6
1146 * @arg @ref LL_EXTI_LINE_7
1147 * @arg @ref LL_EXTI_LINE_8
1148 * @arg @ref LL_EXTI_LINE_9
1149 * @arg @ref LL_EXTI_LINE_10
1150 * @arg @ref LL_EXTI_LINE_11
1151 * @arg @ref LL_EXTI_LINE_12
1152 * @arg @ref LL_EXTI_LINE_13
1153 * @arg @ref LL_EXTI_LINE_14
1154 * @arg @ref LL_EXTI_LINE_15
1155 * @arg @ref LL_EXTI_LINE_16
1156 * @arg @ref LL_EXTI_LINE_18
1157 * @arg @ref LL_EXTI_LINE_19
1158 * @arg @ref LL_EXTI_LINE_20
1159 * @arg @ref LL_EXTI_LINE_21
1160 * @arg @ref LL_EXTI_LINE_22
1161 * @arg @ref LL_EXTI_LINE_29
1162 * @arg @ref LL_EXTI_LINE_30
1163 * @arg @ref LL_EXTI_LINE_31 (*)
1164 * @note (*): Available in some devices
1165 * @note Please check each device line mapping for EXTI Line availability
1166 * @retval None
1167 */
LL_EXTI_GenerateSWI_0_31(uint32_t ExtiLine)1168 __STATIC_INLINE void LL_EXTI_GenerateSWI_0_31(uint32_t ExtiLine)
1169 {
1170 SET_BIT(EXTI->SWIER1, ExtiLine);
1171 }
1172
1173 /**
1174 * @brief Generate a software Interrupt Event for Lines in range 32 to 63
1175 * @note If the interrupt is enabled on this line in the EXTI_IMR2, writing a 1 to
1176 * this bit when it is at '0' sets the corresponding pending bit in EXTI_PR2
1177 * resulting in an interrupt request generation.
1178 * This bit is cleared by clearing the corresponding bit in the EXTI_PR2
1179 * register (by writing a 1 into the bit)
1180 * @rmtoll SWIER2 SWIx LL_EXTI_GenerateSWI_32_63
1181 * @param ExtiLine This parameter can be a combination of the following values:
1182 * @arg @ref LL_EXTI_LINE_32 (*)
1183 * @arg @ref LL_EXTI_LINE_33 (*)
1184 * @arg @ref LL_EXTI_LINE_38
1185 * @arg @ref LL_EXTI_LINE_39
1186 * @arg @ref LL_EXTI_LINE_40
1187 * @arg @ref LL_EXTI_LINE_41
1188 * @note (*): Available in some devices
1189 * @retval None
1190 */
LL_EXTI_GenerateSWI_32_63(uint32_t ExtiLine)1191 __STATIC_INLINE void LL_EXTI_GenerateSWI_32_63(uint32_t ExtiLine)
1192 {
1193 SET_BIT(EXTI->SWIER2, ExtiLine);
1194 }
1195
1196 /**
1197 * @}
1198 */
1199
1200 /** @defgroup EXTI_LL_EF_Flag_Management Flag_Management
1201 * @{
1202 */
1203
1204 /**
1205 * @brief Check if the ExtLine Flag is set or not for Lines in range 0 to 31
1206 * @note This bit is set when the selected edge event arrives on the interrupt
1207 * line. This bit is cleared by writing a 1 to the bit.
1208 * @rmtoll PR1 PIFx LL_EXTI_IsActiveFlag_0_31
1209 * @param ExtiLine This parameter can be a combination of the following values:
1210 * @arg @ref LL_EXTI_LINE_0
1211 * @arg @ref LL_EXTI_LINE_1
1212 * @arg @ref LL_EXTI_LINE_2
1213 * @arg @ref LL_EXTI_LINE_3
1214 * @arg @ref LL_EXTI_LINE_4
1215 * @arg @ref LL_EXTI_LINE_5
1216 * @arg @ref LL_EXTI_LINE_6
1217 * @arg @ref LL_EXTI_LINE_7
1218 * @arg @ref LL_EXTI_LINE_8
1219 * @arg @ref LL_EXTI_LINE_9
1220 * @arg @ref LL_EXTI_LINE_10
1221 * @arg @ref LL_EXTI_LINE_11
1222 * @arg @ref LL_EXTI_LINE_12
1223 * @arg @ref LL_EXTI_LINE_13
1224 * @arg @ref LL_EXTI_LINE_14
1225 * @arg @ref LL_EXTI_LINE_15
1226 * @arg @ref LL_EXTI_LINE_16
1227 * @arg @ref LL_EXTI_LINE_18
1228 * @arg @ref LL_EXTI_LINE_19
1229 * @arg @ref LL_EXTI_LINE_20
1230 * @arg @ref LL_EXTI_LINE_21
1231 * @arg @ref LL_EXTI_LINE_22
1232 * @arg @ref LL_EXTI_LINE_29
1233 * @arg @ref LL_EXTI_LINE_30
1234 * @arg @ref LL_EXTI_LINE_31 (*)
1235 * @note (*): Available in some devices
1236 * @note Please check each device line mapping for EXTI Line availability
1237 * @retval State of bit (1 or 0).
1238 */
LL_EXTI_IsActiveFlag_0_31(uint32_t ExtiLine)1239 __STATIC_INLINE uint32_t LL_EXTI_IsActiveFlag_0_31(uint32_t ExtiLine)
1240 {
1241 return ((READ_BIT(EXTI->PR1, ExtiLine) == (ExtiLine)) ? 1UL : 0UL);
1242 }
1243
1244 /**
1245 * @brief Check if the ExtLine Flag is set or not for Lines in range 32 to 63
1246 * @note This bit is set when the selected edge event arrives on the interrupt
1247 * line. This bit is cleared by writing a 1 to the bit.
1248 * @rmtoll PR2 PIFx LL_EXTI_IsActiveFlag_32_63
1249 * @param ExtiLine This parameter can be a combination of the following values:
1250 * @arg @ref LL_EXTI_LINE_32 (*)
1251 * @arg @ref LL_EXTI_LINE_33 (*)
1252 * @arg @ref LL_EXTI_LINE_38
1253 * @arg @ref LL_EXTI_LINE_39
1254 * @arg @ref LL_EXTI_LINE_40
1255 * @arg @ref LL_EXTI_LINE_41
1256 * @note (*): Available in some devices
1257 * @retval State of bit (1 or 0).
1258 */
LL_EXTI_IsActiveFlag_32_63(uint32_t ExtiLine)1259 __STATIC_INLINE uint32_t LL_EXTI_IsActiveFlag_32_63(uint32_t ExtiLine)
1260 {
1261 return ((READ_BIT(EXTI->PR2, ExtiLine) == (ExtiLine)) ? 1UL : 0UL);
1262 }
1263
1264 /**
1265 * @brief Read ExtLine Combination Flag for Lines in range 0 to 31
1266 * @note This bit is set when the selected edge event arrives on the interrupt
1267 * line. This bit is cleared by writing a 1 to the bit.
1268 * @rmtoll PR1 PIFx LL_EXTI_ReadFlag_0_31
1269 * @param ExtiLine This parameter can be a combination of the following values:
1270 * @arg @ref LL_EXTI_LINE_0
1271 * @arg @ref LL_EXTI_LINE_1
1272 * @arg @ref LL_EXTI_LINE_2
1273 * @arg @ref LL_EXTI_LINE_3
1274 * @arg @ref LL_EXTI_LINE_4
1275 * @arg @ref LL_EXTI_LINE_5
1276 * @arg @ref LL_EXTI_LINE_6
1277 * @arg @ref LL_EXTI_LINE_7
1278 * @arg @ref LL_EXTI_LINE_8
1279 * @arg @ref LL_EXTI_LINE_9
1280 * @arg @ref LL_EXTI_LINE_10
1281 * @arg @ref LL_EXTI_LINE_11
1282 * @arg @ref LL_EXTI_LINE_12
1283 * @arg @ref LL_EXTI_LINE_13
1284 * @arg @ref LL_EXTI_LINE_14
1285 * @arg @ref LL_EXTI_LINE_15
1286 * @arg @ref LL_EXTI_LINE_16
1287 * @arg @ref LL_EXTI_LINE_18
1288 * @arg @ref LL_EXTI_LINE_19
1289 * @arg @ref LL_EXTI_LINE_20
1290 * @arg @ref LL_EXTI_LINE_21
1291 * @arg @ref LL_EXTI_LINE_22
1292 * @arg @ref LL_EXTI_LINE_29
1293 * @arg @ref LL_EXTI_LINE_30
1294 * @arg @ref LL_EXTI_LINE_31 (*)
1295 * @note (*): Available in some devices
1296 * @note Please check each device line mapping for EXTI Line availability
1297 * @retval @note This bit is set when the selected edge event arrives on the interrupt
1298 */
LL_EXTI_ReadFlag_0_31(uint32_t ExtiLine)1299 __STATIC_INLINE uint32_t LL_EXTI_ReadFlag_0_31(uint32_t ExtiLine)
1300 {
1301 return (uint32_t)(READ_BIT(EXTI->PR1, ExtiLine));
1302 }
1303
1304 /**
1305 * @brief Read ExtLine Combination Flag for Lines in range 32 to 63
1306 * @note This bit is set when the selected edge event arrives on the interrupt
1307 * line. This bit is cleared by writing a 1 to the bit.
1308 * @rmtoll PR2 PIFx LL_EXTI_ReadFlag_32_63
1309 * @param ExtiLine This parameter can be a combination of the following values:
1310 * @arg @ref LL_EXTI_LINE_32 (*)
1311 * @arg @ref LL_EXTI_LINE_33 (*)
1312 * @arg @ref LL_EXTI_LINE_38
1313 * @arg @ref LL_EXTI_LINE_39
1314 * @arg @ref LL_EXTI_LINE_40
1315 * @arg @ref LL_EXTI_LINE_41
1316 * @note (*): Available in some devices
1317 * @retval @note This bit is set when the selected edge event arrives on the interrupt
1318 */
LL_EXTI_ReadFlag_32_63(uint32_t ExtiLine)1319 __STATIC_INLINE uint32_t LL_EXTI_ReadFlag_32_63(uint32_t ExtiLine)
1320 {
1321 return (uint32_t)(READ_BIT(EXTI->PR2, ExtiLine));
1322 }
1323
1324 /**
1325 * @brief Clear ExtLine Flags for Lines in range 0 to 31
1326 * @note This bit is set when the selected edge event arrives on the interrupt
1327 * line. This bit is cleared by writing a 1 to the bit.
1328 * @rmtoll PR1 PIFx LL_EXTI_ClearFlag_0_31
1329 * @param ExtiLine This parameter can be a combination of the following values:
1330 * @arg @ref LL_EXTI_LINE_0
1331 * @arg @ref LL_EXTI_LINE_1
1332 * @arg @ref LL_EXTI_LINE_2
1333 * @arg @ref LL_EXTI_LINE_3
1334 * @arg @ref LL_EXTI_LINE_4
1335 * @arg @ref LL_EXTI_LINE_5
1336 * @arg @ref LL_EXTI_LINE_6
1337 * @arg @ref LL_EXTI_LINE_7
1338 * @arg @ref LL_EXTI_LINE_8
1339 * @arg @ref LL_EXTI_LINE_9
1340 * @arg @ref LL_EXTI_LINE_10
1341 * @arg @ref LL_EXTI_LINE_11
1342 * @arg @ref LL_EXTI_LINE_12
1343 * @arg @ref LL_EXTI_LINE_13
1344 * @arg @ref LL_EXTI_LINE_14
1345 * @arg @ref LL_EXTI_LINE_15
1346 * @arg @ref LL_EXTI_LINE_16
1347 * @arg @ref LL_EXTI_LINE_18
1348 * @arg @ref LL_EXTI_LINE_19
1349 * @arg @ref LL_EXTI_LINE_20
1350 * @arg @ref LL_EXTI_LINE_21
1351 * @arg @ref LL_EXTI_LINE_22
1352 * @arg @ref LL_EXTI_LINE_29
1353 * @arg @ref LL_EXTI_LINE_30
1354 * @arg @ref LL_EXTI_LINE_31 (*)
1355 * @note (*): Available in some devices
1356 * @note Please check each device line mapping for EXTI Line availability
1357 * @retval None
1358 */
LL_EXTI_ClearFlag_0_31(uint32_t ExtiLine)1359 __STATIC_INLINE void LL_EXTI_ClearFlag_0_31(uint32_t ExtiLine)
1360 {
1361 WRITE_REG(EXTI->PR1, ExtiLine);
1362 }
1363
1364 /**
1365 * @brief Clear ExtLine Flags for Lines in range 32 to 63
1366 * @note This bit is set when the selected edge event arrives on the interrupt
1367 * line. This bit is cleared by writing a 1 to the bit.
1368 * @rmtoll PR2 PIFx LL_EXTI_ClearFlag_32_63
1369 * @param ExtiLine This parameter can be a combination of the following values:
1370 * @arg @ref LL_EXTI_LINE_32 (*)
1371 * @arg @ref LL_EXTI_LINE_33 (*)
1372 * @arg @ref LL_EXTI_LINE_38
1373 * @arg @ref LL_EXTI_LINE_39
1374 * @arg @ref LL_EXTI_LINE_40
1375 * @arg @ref LL_EXTI_LINE_41
1376 * @note (*): Available in some devices
1377 * @retval None
1378 */
LL_EXTI_ClearFlag_32_63(uint32_t ExtiLine)1379 __STATIC_INLINE void LL_EXTI_ClearFlag_32_63(uint32_t ExtiLine)
1380 {
1381 WRITE_REG(EXTI->PR2, ExtiLine);
1382 }
1383
1384 /**
1385 * @}
1386 */
1387
1388 #if defined(USE_FULL_LL_DRIVER)
1389 /** @defgroup EXTI_LL_EF_Init Initialization and de-initialization functions
1390 * @{
1391 */
1392
1393 uint32_t LL_EXTI_Init(LL_EXTI_InitTypeDef *EXTI_InitStruct);
1394 uint32_t LL_EXTI_DeInit(void);
1395 void LL_EXTI_StructInit(LL_EXTI_InitTypeDef *EXTI_InitStruct);
1396
1397
1398 /**
1399 * @}
1400 */
1401 #endif /* USE_FULL_LL_DRIVER */
1402
1403 /**
1404 * @}
1405 */
1406
1407 /**
1408 * @}
1409 */
1410
1411 #endif /* EXTI */
1412
1413 /**
1414 * @}
1415 */
1416
1417 #ifdef __cplusplus
1418 }
1419 #endif
1420
1421 #endif /* __STM32G4xx_LL_EXTI_H */
1422
1423
