1 /** 2 ****************************************************************************** 3 * @file stm32g4xx_hal_uart_ex.h 4 * @author MCD Application Team 5 * @brief Header file of UART HAL Extended module. 6 ****************************************************************************** 7 * @attention 8 * 9 * Copyright (c) 2019 STMicroelectronics. 10 * All rights reserved. 11 * 12 * This software is licensed under terms that can be found in the LICENSE file 13 * in the root directory of this software component. 14 * If no LICENSE file comes with this software, it is provided AS-IS. 15 * 16 ****************************************************************************** 17 */ 18 19 /* Define to prevent recursive inclusion -------------------------------------*/ 20 #ifndef STM32G4xx_HAL_UART_EX_H 21 #define STM32G4xx_HAL_UART_EX_H 22 23 #ifdef __cplusplus 24 extern "C" { 25 #endif 26 27 /* Includes ------------------------------------------------------------------*/ 28 #include "stm32g4xx_hal_def.h" 29 30 /** @addtogroup STM32G4xx_HAL_Driver 31 * @{ 32 */ 33 34 /** @addtogroup UARTEx 35 * @{ 36 */ 37 38 /* Exported types ------------------------------------------------------------*/ 39 /** @defgroup UARTEx_Exported_Types UARTEx Exported Types 40 * @{ 41 */ 42 43 /** 44 * @brief UART wake up from stop mode parameters 45 */ 46 typedef struct 47 { 48 uint32_t WakeUpEvent; /*!< Specifies which event will activate the Wakeup from Stop mode flag (WUF). 49 This parameter can be a value of @ref UART_WakeUp_from_Stop_Selection. 50 If set to UART_WAKEUP_ON_ADDRESS, the two other fields below must 51 be filled up. */ 52 53 uint16_t AddressLength; /*!< Specifies whether the address is 4 or 7-bit long. 54 This parameter can be a value of @ref UARTEx_WakeUp_Address_Length. */ 55 56 uint8_t Address; /*!< UART/USART node address (7-bit long max). */ 57 } UART_WakeUpTypeDef; 58 59 /** 60 * @} 61 */ 62 63 /* Exported constants --------------------------------------------------------*/ 64 /** @defgroup UARTEx_Exported_Constants UARTEx Exported Constants 65 * @{ 66 */ 67 68 /** @defgroup UARTEx_Word_Length UARTEx Word Length 69 * @{ 70 */ 71 #define UART_WORDLENGTH_7B USART_CR1_M1 /*!< 7-bit long UART frame */ 72 #define UART_WORDLENGTH_8B 0x00000000U /*!< 8-bit long UART frame */ 73 #define UART_WORDLENGTH_9B USART_CR1_M0 /*!< 9-bit long UART frame */ 74 /** 75 * @} 76 */ 77 78 /** @defgroup UARTEx_WakeUp_Address_Length UARTEx WakeUp Address Length 79 * @{ 80 */ 81 #define UART_ADDRESS_DETECT_4B 0x00000000U /*!< 4-bit long wake-up address */ 82 #define UART_ADDRESS_DETECT_7B USART_CR2_ADDM7 /*!< 7-bit long wake-up address */ 83 /** 84 * @} 85 */ 86 87 /** @defgroup UARTEx_FIFO_mode UARTEx FIFO mode 88 * @brief UART FIFO mode 89 * @{ 90 */ 91 #define UART_FIFOMODE_DISABLE 0x00000000U /*!< FIFO mode disable */ 92 #define UART_FIFOMODE_ENABLE USART_CR1_FIFOEN /*!< FIFO mode enable */ 93 /** 94 * @} 95 */ 96 97 /** @defgroup UARTEx_TXFIFO_threshold_level UARTEx TXFIFO threshold level 98 * @brief UART TXFIFO threshold level 99 * @{ 100 */ 101 #define UART_TXFIFO_THRESHOLD_1_8 0x00000000U /*!< TX FIFO reaches 1/8 of its depth */ 102 #define UART_TXFIFO_THRESHOLD_1_4 USART_CR3_TXFTCFG_0 /*!< TX FIFO reaches 1/4 of its depth */ 103 #define UART_TXFIFO_THRESHOLD_1_2 USART_CR3_TXFTCFG_1 /*!< TX FIFO reaches 1/2 of its depth */ 104 #define UART_TXFIFO_THRESHOLD_3_4 (USART_CR3_TXFTCFG_0|USART_CR3_TXFTCFG_1) /*!< TX FIFO reaches 3/4 of its depth */ 105 #define UART_TXFIFO_THRESHOLD_7_8 USART_CR3_TXFTCFG_2 /*!< TX FIFO reaches 7/8 of its depth */ 106 #define UART_TXFIFO_THRESHOLD_8_8 (USART_CR3_TXFTCFG_2|USART_CR3_TXFTCFG_0) /*!< TX FIFO becomes empty */ 107 /** 108 * @} 109 */ 110 111 /** @defgroup UARTEx_RXFIFO_threshold_level UARTEx RXFIFO threshold level 112 * @brief UART RXFIFO threshold level 113 * @{ 114 */ 115 #define UART_RXFIFO_THRESHOLD_1_8 0x00000000U /*!< RX FIFO reaches 1/8 of its depth */ 116 #define UART_RXFIFO_THRESHOLD_1_4 USART_CR3_RXFTCFG_0 /*!< RX FIFO reaches 1/4 of its depth */ 117 #define UART_RXFIFO_THRESHOLD_1_2 USART_CR3_RXFTCFG_1 /*!< RX FIFO reaches 1/2 of its depth */ 118 #define UART_RXFIFO_THRESHOLD_3_4 (USART_CR3_RXFTCFG_0|USART_CR3_RXFTCFG_1) /*!< RX FIFO reaches 3/4 of its depth */ 119 #define UART_RXFIFO_THRESHOLD_7_8 USART_CR3_RXFTCFG_2 /*!< RX FIFO reaches 7/8 of its depth */ 120 #define UART_RXFIFO_THRESHOLD_8_8 (USART_CR3_RXFTCFG_2|USART_CR3_RXFTCFG_0) /*!< RX FIFO becomes full */ 121 /** 122 * @} 123 */ 124 125 /** 126 * @} 127 */ 128 129 /* Exported macros -----------------------------------------------------------*/ 130 /* Exported functions --------------------------------------------------------*/ 131 /** @addtogroup UARTEx_Exported_Functions 132 * @{ 133 */ 134 135 /** @addtogroup UARTEx_Exported_Functions_Group1 136 * @{ 137 */ 138 139 /* Initialization and de-initialization functions ****************************/ 140 HAL_StatusTypeDef HAL_RS485Ex_Init(UART_HandleTypeDef *huart, uint32_t Polarity, uint32_t AssertionTime, 141 uint32_t DeassertionTime); 142 143 /** 144 * @} 145 */ 146 147 /** @addtogroup UARTEx_Exported_Functions_Group2 148 * @{ 149 */ 150 151 void HAL_UARTEx_WakeupCallback(UART_HandleTypeDef *huart); 152 153 void HAL_UARTEx_RxFifoFullCallback(UART_HandleTypeDef *huart); 154 void HAL_UARTEx_TxFifoEmptyCallback(UART_HandleTypeDef *huart); 155 156 /** 157 * @} 158 */ 159 160 /** @addtogroup UARTEx_Exported_Functions_Group3 161 * @{ 162 */ 163 164 /* Peripheral Control functions **********************************************/ 165 HAL_StatusTypeDef HAL_UARTEx_StopModeWakeUpSourceConfig(UART_HandleTypeDef *huart, UART_WakeUpTypeDef WakeUpSelection); 166 HAL_StatusTypeDef HAL_UARTEx_EnableStopMode(UART_HandleTypeDef *huart); 167 HAL_StatusTypeDef HAL_UARTEx_DisableStopMode(UART_HandleTypeDef *huart); 168 169 HAL_StatusTypeDef HAL_MultiProcessorEx_AddressLength_Set(UART_HandleTypeDef *huart, uint32_t AddressLength); 170 171 HAL_StatusTypeDef HAL_UARTEx_EnableFifoMode(UART_HandleTypeDef *huart); 172 HAL_StatusTypeDef HAL_UARTEx_DisableFifoMode(UART_HandleTypeDef *huart); 173 HAL_StatusTypeDef HAL_UARTEx_SetTxFifoThreshold(UART_HandleTypeDef *huart, uint32_t Threshold); 174 HAL_StatusTypeDef HAL_UARTEx_SetRxFifoThreshold(UART_HandleTypeDef *huart, uint32_t Threshold); 175 176 HAL_StatusTypeDef HAL_UARTEx_ReceiveToIdle(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size, uint16_t *RxLen, 177 uint32_t Timeout); 178 HAL_StatusTypeDef HAL_UARTEx_ReceiveToIdle_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size); 179 HAL_StatusTypeDef HAL_UARTEx_ReceiveToIdle_DMA(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size); 180 181 182 /** 183 * @} 184 */ 185 186 /** 187 * @} 188 */ 189 190 /* Private macros ------------------------------------------------------------*/ 191 /** @defgroup UARTEx_Private_Macros UARTEx Private Macros 192 * @{ 193 */ 194 195 /** @brief Report the UART clock source. 196 * @param __HANDLE__ specifies the UART Handle. 197 * @param __CLOCKSOURCE__ output variable. 198 * @retval UART clocking source, written in __CLOCKSOURCE__. 199 */ 200 #if defined(UART5) 201 #define UART_GETCLOCKSOURCE(__HANDLE__,__CLOCKSOURCE__) \ 202 do { \ 203 if((__HANDLE__)->Instance == USART1) \ 204 { \ 205 switch(__HAL_RCC_GET_USART1_SOURCE()) \ 206 { \ 207 case RCC_USART1CLKSOURCE_PCLK2: \ 208 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK2; \ 209 break; \ 210 case RCC_USART1CLKSOURCE_HSI: \ 211 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \ 212 break; \ 213 case RCC_USART1CLKSOURCE_SYSCLK: \ 214 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \ 215 break; \ 216 case RCC_USART1CLKSOURCE_LSE: \ 217 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \ 218 break; \ 219 default: \ 220 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ 221 break; \ 222 } \ 223 } \ 224 else if((__HANDLE__)->Instance == USART2) \ 225 { \ 226 switch(__HAL_RCC_GET_USART2_SOURCE()) \ 227 { \ 228 case RCC_USART2CLKSOURCE_PCLK1: \ 229 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \ 230 break; \ 231 case RCC_USART2CLKSOURCE_HSI: \ 232 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \ 233 break; \ 234 case RCC_USART2CLKSOURCE_SYSCLK: \ 235 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \ 236 break; \ 237 case RCC_USART2CLKSOURCE_LSE: \ 238 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \ 239 break; \ 240 default: \ 241 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ 242 break; \ 243 } \ 244 } \ 245 else if((__HANDLE__)->Instance == USART3) \ 246 { \ 247 switch(__HAL_RCC_GET_USART3_SOURCE()) \ 248 { \ 249 case RCC_USART3CLKSOURCE_PCLK1: \ 250 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \ 251 break; \ 252 case RCC_USART3CLKSOURCE_HSI: \ 253 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \ 254 break; \ 255 case RCC_USART3CLKSOURCE_SYSCLK: \ 256 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \ 257 break; \ 258 case RCC_USART3CLKSOURCE_LSE: \ 259 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \ 260 break; \ 261 default: \ 262 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ 263 break; \ 264 } \ 265 } \ 266 else if((__HANDLE__)->Instance == UART4) \ 267 { \ 268 switch(__HAL_RCC_GET_UART4_SOURCE()) \ 269 { \ 270 case RCC_UART4CLKSOURCE_PCLK1: \ 271 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \ 272 break; \ 273 case RCC_UART4CLKSOURCE_HSI: \ 274 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \ 275 break; \ 276 case RCC_UART4CLKSOURCE_SYSCLK: \ 277 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \ 278 break; \ 279 case RCC_UART4CLKSOURCE_LSE: \ 280 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \ 281 break; \ 282 default: \ 283 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ 284 break; \ 285 } \ 286 } \ 287 else if((__HANDLE__)->Instance == UART5) \ 288 { \ 289 switch(__HAL_RCC_GET_UART5_SOURCE()) \ 290 { \ 291 case RCC_UART5CLKSOURCE_PCLK1: \ 292 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \ 293 break; \ 294 case RCC_UART5CLKSOURCE_HSI: \ 295 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \ 296 break; \ 297 case RCC_UART5CLKSOURCE_SYSCLK: \ 298 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \ 299 break; \ 300 case RCC_UART5CLKSOURCE_LSE: \ 301 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \ 302 break; \ 303 default: \ 304 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ 305 break; \ 306 } \ 307 } \ 308 else if((__HANDLE__)->Instance == LPUART1) \ 309 { \ 310 switch(__HAL_RCC_GET_LPUART1_SOURCE()) \ 311 { \ 312 case RCC_LPUART1CLKSOURCE_PCLK1: \ 313 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \ 314 break; \ 315 case RCC_LPUART1CLKSOURCE_HSI: \ 316 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \ 317 break; \ 318 case RCC_LPUART1CLKSOURCE_SYSCLK: \ 319 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \ 320 break; \ 321 case RCC_LPUART1CLKSOURCE_LSE: \ 322 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \ 323 break; \ 324 default: \ 325 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ 326 break; \ 327 } \ 328 } \ 329 else \ 330 { \ 331 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ 332 } \ 333 } while(0U) 334 #elif defined(UART4) 335 #define UART_GETCLOCKSOURCE(__HANDLE__,__CLOCKSOURCE__) \ 336 do { \ 337 if((__HANDLE__)->Instance == USART1) \ 338 { \ 339 switch(__HAL_RCC_GET_USART1_SOURCE()) \ 340 { \ 341 case RCC_USART1CLKSOURCE_PCLK2: \ 342 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK2; \ 343 break; \ 344 case RCC_USART1CLKSOURCE_HSI: \ 345 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \ 346 break; \ 347 case RCC_USART1CLKSOURCE_SYSCLK: \ 348 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \ 349 break; \ 350 case RCC_USART1CLKSOURCE_LSE: \ 351 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \ 352 break; \ 353 default: \ 354 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ 355 break; \ 356 } \ 357 } \ 358 else if((__HANDLE__)->Instance == USART2) \ 359 { \ 360 switch(__HAL_RCC_GET_USART2_SOURCE()) \ 361 { \ 362 case RCC_USART2CLKSOURCE_PCLK1: \ 363 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \ 364 break; \ 365 case RCC_USART2CLKSOURCE_HSI: \ 366 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \ 367 break; \ 368 case RCC_USART2CLKSOURCE_SYSCLK: \ 369 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \ 370 break; \ 371 case RCC_USART2CLKSOURCE_LSE: \ 372 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \ 373 break; \ 374 default: \ 375 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ 376 break; \ 377 } \ 378 } \ 379 else if((__HANDLE__)->Instance == USART3) \ 380 { \ 381 switch(__HAL_RCC_GET_USART3_SOURCE()) \ 382 { \ 383 case RCC_USART3CLKSOURCE_PCLK1: \ 384 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \ 385 break; \ 386 case RCC_USART3CLKSOURCE_HSI: \ 387 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \ 388 break; \ 389 case RCC_USART3CLKSOURCE_SYSCLK: \ 390 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \ 391 break; \ 392 case RCC_USART3CLKSOURCE_LSE: \ 393 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \ 394 break; \ 395 default: \ 396 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ 397 break; \ 398 } \ 399 } \ 400 else if((__HANDLE__)->Instance == UART4) \ 401 { \ 402 switch(__HAL_RCC_GET_UART4_SOURCE()) \ 403 { \ 404 case RCC_UART4CLKSOURCE_PCLK1: \ 405 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \ 406 break; \ 407 case RCC_UART4CLKSOURCE_HSI: \ 408 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \ 409 break; \ 410 case RCC_UART4CLKSOURCE_SYSCLK: \ 411 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \ 412 break; \ 413 case RCC_UART4CLKSOURCE_LSE: \ 414 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \ 415 break; \ 416 default: \ 417 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ 418 break; \ 419 } \ 420 } \ 421 else if((__HANDLE__)->Instance == LPUART1) \ 422 { \ 423 switch(__HAL_RCC_GET_LPUART1_SOURCE()) \ 424 { \ 425 case RCC_LPUART1CLKSOURCE_PCLK1: \ 426 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \ 427 break; \ 428 case RCC_LPUART1CLKSOURCE_HSI: \ 429 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \ 430 break; \ 431 case RCC_LPUART1CLKSOURCE_SYSCLK: \ 432 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \ 433 break; \ 434 case RCC_LPUART1CLKSOURCE_LSE: \ 435 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \ 436 break; \ 437 default: \ 438 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ 439 break; \ 440 } \ 441 } \ 442 else \ 443 { \ 444 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ 445 } \ 446 } while(0U) 447 #else 448 #define UART_GETCLOCKSOURCE(__HANDLE__,__CLOCKSOURCE__) \ 449 do { \ 450 if((__HANDLE__)->Instance == USART1) \ 451 { \ 452 switch(__HAL_RCC_GET_USART1_SOURCE()) \ 453 { \ 454 case RCC_USART1CLKSOURCE_PCLK2: \ 455 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK2; \ 456 break; \ 457 case RCC_USART1CLKSOURCE_HSI: \ 458 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \ 459 break; \ 460 case RCC_USART1CLKSOURCE_SYSCLK: \ 461 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \ 462 break; \ 463 case RCC_USART1CLKSOURCE_LSE: \ 464 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \ 465 break; \ 466 default: \ 467 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ 468 break; \ 469 } \ 470 } \ 471 else if((__HANDLE__)->Instance == USART2) \ 472 { \ 473 switch(__HAL_RCC_GET_USART2_SOURCE()) \ 474 { \ 475 case RCC_USART2CLKSOURCE_PCLK1: \ 476 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \ 477 break; \ 478 case RCC_USART2CLKSOURCE_HSI: \ 479 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \ 480 break; \ 481 case RCC_USART2CLKSOURCE_SYSCLK: \ 482 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \ 483 break; \ 484 case RCC_USART2CLKSOURCE_LSE: \ 485 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \ 486 break; \ 487 default: \ 488 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ 489 break; \ 490 } \ 491 } \ 492 else if((__HANDLE__)->Instance == USART3) \ 493 { \ 494 switch(__HAL_RCC_GET_USART3_SOURCE()) \ 495 { \ 496 case RCC_USART3CLKSOURCE_PCLK1: \ 497 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \ 498 break; \ 499 case RCC_USART3CLKSOURCE_HSI: \ 500 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \ 501 break; \ 502 case RCC_USART3CLKSOURCE_SYSCLK: \ 503 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \ 504 break; \ 505 case RCC_USART3CLKSOURCE_LSE: \ 506 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \ 507 break; \ 508 default: \ 509 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ 510 break; \ 511 } \ 512 } \ 513 else if((__HANDLE__)->Instance == LPUART1) \ 514 { \ 515 switch(__HAL_RCC_GET_LPUART1_SOURCE()) \ 516 { \ 517 case RCC_LPUART1CLKSOURCE_PCLK1: \ 518 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \ 519 break; \ 520 case RCC_LPUART1CLKSOURCE_HSI: \ 521 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \ 522 break; \ 523 case RCC_LPUART1CLKSOURCE_SYSCLK: \ 524 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \ 525 break; \ 526 case RCC_LPUART1CLKSOURCE_LSE: \ 527 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \ 528 break; \ 529 default: \ 530 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ 531 break; \ 532 } \ 533 } \ 534 else \ 535 { \ 536 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ 537 } \ 538 } while(0U) 539 #endif /* UART5 */ 540 541 /** @brief Report the UART mask to apply to retrieve the received data 542 * according to the word length and to the parity bits activation. 543 * @note If PCE = 1, the parity bit is not included in the data extracted 544 * by the reception API(). 545 * This masking operation is not carried out in the case of 546 * DMA transfers. 547 * @param __HANDLE__ specifies the UART Handle. 548 * @retval None, the mask to apply to UART RDR register is stored in (__HANDLE__)->Mask field. 549 */ 550 #define UART_MASK_COMPUTATION(__HANDLE__) \ 551 do { \ 552 if ((__HANDLE__)->Init.WordLength == UART_WORDLENGTH_9B) \ 553 { \ 554 if ((__HANDLE__)->Init.Parity == UART_PARITY_NONE) \ 555 { \ 556 (__HANDLE__)->Mask = 0x01FFU ; \ 557 } \ 558 else \ 559 { \ 560 (__HANDLE__)->Mask = 0x00FFU ; \ 561 } \ 562 } \ 563 else if ((__HANDLE__)->Init.WordLength == UART_WORDLENGTH_8B) \ 564 { \ 565 if ((__HANDLE__)->Init.Parity == UART_PARITY_NONE) \ 566 { \ 567 (__HANDLE__)->Mask = 0x00FFU ; \ 568 } \ 569 else \ 570 { \ 571 (__HANDLE__)->Mask = 0x007FU ; \ 572 } \ 573 } \ 574 else if ((__HANDLE__)->Init.WordLength == UART_WORDLENGTH_7B) \ 575 { \ 576 if ((__HANDLE__)->Init.Parity == UART_PARITY_NONE) \ 577 { \ 578 (__HANDLE__)->Mask = 0x007FU ; \ 579 } \ 580 else \ 581 { \ 582 (__HANDLE__)->Mask = 0x003FU ; \ 583 } \ 584 } \ 585 else \ 586 { \ 587 (__HANDLE__)->Mask = 0x0000U; \ 588 } \ 589 } while(0U) 590 591 /** 592 * @brief Ensure that UART frame length is valid. 593 * @param __LENGTH__ UART frame length. 594 * @retval SET (__LENGTH__ is valid) or RESET (__LENGTH__ is invalid) 595 */ 596 #define IS_UART_WORD_LENGTH(__LENGTH__) (((__LENGTH__) == UART_WORDLENGTH_7B) || \ 597 ((__LENGTH__) == UART_WORDLENGTH_8B) || \ 598 ((__LENGTH__) == UART_WORDLENGTH_9B)) 599 600 /** 601 * @brief Ensure that UART wake-up address length is valid. 602 * @param __ADDRESS__ UART wake-up address length. 603 * @retval SET (__ADDRESS__ is valid) or RESET (__ADDRESS__ is invalid) 604 */ 605 #define IS_UART_ADDRESSLENGTH_DETECT(__ADDRESS__) (((__ADDRESS__) == UART_ADDRESS_DETECT_4B) || \ 606 ((__ADDRESS__) == UART_ADDRESS_DETECT_7B)) 607 608 /** 609 * @brief Ensure that UART TXFIFO threshold level is valid. 610 * @param __THRESHOLD__ UART TXFIFO threshold level. 611 * @retval SET (__THRESHOLD__ is valid) or RESET (__THRESHOLD__ is invalid) 612 */ 613 #define IS_UART_TXFIFO_THRESHOLD(__THRESHOLD__) (((__THRESHOLD__) == UART_TXFIFO_THRESHOLD_1_8) || \ 614 ((__THRESHOLD__) == UART_TXFIFO_THRESHOLD_1_4) || \ 615 ((__THRESHOLD__) == UART_TXFIFO_THRESHOLD_1_2) || \ 616 ((__THRESHOLD__) == UART_TXFIFO_THRESHOLD_3_4) || \ 617 ((__THRESHOLD__) == UART_TXFIFO_THRESHOLD_7_8) || \ 618 ((__THRESHOLD__) == UART_TXFIFO_THRESHOLD_8_8)) 619 620 /** 621 * @brief Ensure that UART RXFIFO threshold level is valid. 622 * @param __THRESHOLD__ UART RXFIFO threshold level. 623 * @retval SET (__THRESHOLD__ is valid) or RESET (__THRESHOLD__ is invalid) 624 */ 625 #define IS_UART_RXFIFO_THRESHOLD(__THRESHOLD__) (((__THRESHOLD__) == UART_RXFIFO_THRESHOLD_1_8) || \ 626 ((__THRESHOLD__) == UART_RXFIFO_THRESHOLD_1_4) || \ 627 ((__THRESHOLD__) == UART_RXFIFO_THRESHOLD_1_2) || \ 628 ((__THRESHOLD__) == UART_RXFIFO_THRESHOLD_3_4) || \ 629 ((__THRESHOLD__) == UART_RXFIFO_THRESHOLD_7_8) || \ 630 ((__THRESHOLD__) == UART_RXFIFO_THRESHOLD_8_8)) 631 632 /** 633 * @} 634 */ 635 636 /* Private functions ---------------------------------------------------------*/ 637 638 /** 639 * @} 640 */ 641 642 /** 643 * @} 644 */ 645 646 #ifdef __cplusplus 647 } 648 #endif 649 650 #endif /* STM32G4xx_HAL_UART_EX_H */ 651 652
