1 /** 2 ****************************************************************************** 3 * @file stm32g4xx_hal_uart.h 4 * @author MCD Application Team 5 * @brief Header file of UART HAL module. 6 ****************************************************************************** 7 * @attention 8 * 9 * Copyright (c) 2019 STMicroelectronics. 10 * All rights reserved. 11 * 12 * This software is licensed under terms that can be found in the LICENSE file 13 * in the root directory of this software component. 14 * If no LICENSE file comes with this software, it is provided AS-IS. 15 * 16 ****************************************************************************** 17 */ 18 19 /* Define to prevent recursive inclusion -------------------------------------*/ 20 #ifndef STM32G4xx_HAL_UART_H 21 #define STM32G4xx_HAL_UART_H 22 23 #ifdef __cplusplus 24 extern "C" { 25 #endif 26 27 /* Includes ------------------------------------------------------------------*/ 28 #include "stm32g4xx_hal_def.h" 29 30 /** @addtogroup STM32G4xx_HAL_Driver 31 * @{ 32 */ 33 34 /** @addtogroup UART 35 * @{ 36 */ 37 38 /* Exported types ------------------------------------------------------------*/ 39 /** @defgroup UART_Exported_Types UART Exported Types 40 * @{ 41 */ 42 43 /** 44 * @brief UART Init Structure definition 45 */ 46 typedef struct 47 { 48 uint32_t BaudRate; /*!< This member configures the UART communication baud rate. 49 The baud rate register is computed using the following formula: 50 LPUART: 51 ======= 52 Baud Rate Register = ((256 * lpuart_ker_ckpres) / ((huart->Init.BaudRate))) 53 where lpuart_ker_ck_pres is the UART input clock divided by a prescaler 54 UART: 55 ===== 56 - If oversampling is 16 or in LIN mode, 57 Baud Rate Register = ((uart_ker_ckpres) / ((huart->Init.BaudRate))) 58 - If oversampling is 8, 59 Baud Rate Register[15:4] = ((2 * uart_ker_ckpres) / 60 ((huart->Init.BaudRate)))[15:4] 61 Baud Rate Register[3] = 0 62 Baud Rate Register[2:0] = (((2 * uart_ker_ckpres) / 63 ((huart->Init.BaudRate)))[3:0]) >> 1 64 where uart_ker_ck_pres is the UART input clock divided by a prescaler */ 65 66 uint32_t WordLength; /*!< Specifies the number of data bits transmitted or received in a frame. 67 This parameter can be a value of @ref UARTEx_Word_Length. */ 68 69 uint32_t StopBits; /*!< Specifies the number of stop bits transmitted. 70 This parameter can be a value of @ref UART_Stop_Bits. */ 71 72 uint32_t Parity; /*!< Specifies the parity mode. 73 This parameter can be a value of @ref UART_Parity 74 @note When parity is enabled, the computed parity is inserted 75 at the MSB position of the transmitted data (9th bit when 76 the word length is set to 9 data bits; 8th bit when the 77 word length is set to 8 data bits). */ 78 79 uint32_t Mode; /*!< Specifies whether the Receive or Transmit mode is enabled or disabled. 80 This parameter can be a value of @ref UART_Mode. */ 81 82 uint32_t HwFlowCtl; /*!< Specifies whether the hardware flow control mode is enabled 83 or disabled. 84 This parameter can be a value of @ref UART_Hardware_Flow_Control. */ 85 86 uint32_t OverSampling; /*!< Specifies whether the Over sampling 8 is enabled or disabled, 87 to achieve higher speed (up to f_PCLK/8). 88 This parameter can be a value of @ref UART_Over_Sampling. */ 89 90 uint32_t OneBitSampling; /*!< Specifies whether a single sample or three samples' majority vote is selected. 91 Selecting the single sample method increases the receiver tolerance to clock 92 deviations. This parameter can be a value of @ref UART_OneBit_Sampling. */ 93 94 uint32_t ClockPrescaler; /*!< Specifies the prescaler value used to divide the UART clock source. 95 This parameter can be a value of @ref UART_ClockPrescaler. */ 96 97 } UART_InitTypeDef; 98 99 /** 100 * @brief UART Advanced Features initialization structure definition 101 */ 102 typedef struct 103 { 104 uint32_t AdvFeatureInit; /*!< Specifies which advanced UART features is initialized. Several 105 Advanced Features may be initialized at the same time . 106 This parameter can be a value of 107 @ref UART_Advanced_Features_Initialization_Type. */ 108 109 uint32_t TxPinLevelInvert; /*!< Specifies whether the TX pin active level is inverted. 110 This parameter can be a value of @ref UART_Tx_Inv. */ 111 112 uint32_t RxPinLevelInvert; /*!< Specifies whether the RX pin active level is inverted. 113 This parameter can be a value of @ref UART_Rx_Inv. */ 114 115 uint32_t DataInvert; /*!< Specifies whether data are inverted (positive/direct logic 116 vs negative/inverted logic). 117 This parameter can be a value of @ref UART_Data_Inv. */ 118 119 uint32_t Swap; /*!< Specifies whether TX and RX pins are swapped. 120 This parameter can be a value of @ref UART_Rx_Tx_Swap. */ 121 122 uint32_t OverrunDisable; /*!< Specifies whether the reception overrun detection is disabled. 123 This parameter can be a value of @ref UART_Overrun_Disable. */ 124 125 uint32_t DMADisableonRxError; /*!< Specifies whether the DMA is disabled in case of reception error. 126 This parameter can be a value of @ref UART_DMA_Disable_on_Rx_Error. */ 127 128 uint32_t AutoBaudRateEnable; /*!< Specifies whether auto Baud rate detection is enabled. 129 This parameter can be a value of @ref UART_AutoBaudRate_Enable. */ 130 131 uint32_t AutoBaudRateMode; /*!< If auto Baud rate detection is enabled, specifies how the rate 132 detection is carried out. 133 This parameter can be a value of @ref UART_AutoBaud_Rate_Mode. */ 134 135 uint32_t MSBFirst; /*!< Specifies whether MSB is sent first on UART line. 136 This parameter can be a value of @ref UART_MSB_First. */ 137 } UART_AdvFeatureInitTypeDef; 138 139 /** 140 * @brief HAL UART State definition 141 * @note HAL UART State value is a combination of 2 different substates: 142 * gState and RxState (see @ref UART_State_Definition). 143 * - gState contains UART state information related to global Handle management 144 * and also information related to Tx operations. 145 * gState value coding follow below described bitmap : 146 * b7-b6 Error information 147 * 00 : No Error 148 * 01 : (Not Used) 149 * 10 : Timeout 150 * 11 : Error 151 * b5 Peripheral initialization status 152 * 0 : Reset (Peripheral not initialized) 153 * 1 : Init done (Peripheral initialized. HAL UART Init function already called) 154 * b4-b3 (not used) 155 * xx : Should be set to 00 156 * b2 Intrinsic process state 157 * 0 : Ready 158 * 1 : Busy (Peripheral busy with some configuration or internal operations) 159 * b1 (not used) 160 * x : Should be set to 0 161 * b0 Tx state 162 * 0 : Ready (no Tx operation ongoing) 163 * 1 : Busy (Tx operation ongoing) 164 * - RxState contains information related to Rx operations. 165 * RxState value coding follow below described bitmap : 166 * b7-b6 (not used) 167 * xx : Should be set to 00 168 * b5 Peripheral initialization status 169 * 0 : Reset (Peripheral not initialized) 170 * 1 : Init done (Peripheral initialized) 171 * b4-b2 (not used) 172 * xxx : Should be set to 000 173 * b1 Rx state 174 * 0 : Ready (no Rx operation ongoing) 175 * 1 : Busy (Rx operation ongoing) 176 * b0 (not used) 177 * x : Should be set to 0. 178 */ 179 typedef uint32_t HAL_UART_StateTypeDef; 180 181 /** 182 * @brief UART clock sources definition 183 */ 184 typedef enum 185 { 186 UART_CLOCKSOURCE_PCLK1 = 0x00U, /*!< PCLK1 clock source */ 187 UART_CLOCKSOURCE_PCLK2 = 0x01U, /*!< PCLK2 clock source */ 188 UART_CLOCKSOURCE_HSI = 0x02U, /*!< HSI clock source */ 189 UART_CLOCKSOURCE_SYSCLK = 0x04U, /*!< SYSCLK clock source */ 190 UART_CLOCKSOURCE_LSE = 0x08U, /*!< LSE clock source */ 191 UART_CLOCKSOURCE_UNDEFINED = 0x10U /*!< Undefined clock source */ 192 } UART_ClockSourceTypeDef; 193 194 /** 195 * @brief HAL UART Reception type definition 196 * @note HAL UART Reception type value aims to identify which type of Reception is ongoing. 197 * It is expected to admit following values : 198 * HAL_UART_RECEPTION_STANDARD = 0x00U, 199 * HAL_UART_RECEPTION_TOIDLE = 0x01U, 200 * HAL_UART_RECEPTION_TORTO = 0x02U, 201 * HAL_UART_RECEPTION_TOCHARMATCH = 0x03U, 202 */ 203 typedef uint32_t HAL_UART_RxTypeTypeDef; 204 205 /** 206 * @brief UART handle Structure definition 207 */ 208 typedef struct __UART_HandleTypeDef 209 { 210 USART_TypeDef *Instance; /*!< UART registers base address */ 211 212 UART_InitTypeDef Init; /*!< UART communication parameters */ 213 214 UART_AdvFeatureInitTypeDef AdvancedInit; /*!< UART Advanced Features initialization parameters */ 215 216 const uint8_t *pTxBuffPtr; /*!< Pointer to UART Tx transfer Buffer */ 217 218 uint16_t TxXferSize; /*!< UART Tx Transfer size */ 219 220 __IO uint16_t TxXferCount; /*!< UART Tx Transfer Counter */ 221 222 uint8_t *pRxBuffPtr; /*!< Pointer to UART Rx transfer Buffer */ 223 224 uint16_t RxXferSize; /*!< UART Rx Transfer size */ 225 226 __IO uint16_t RxXferCount; /*!< UART Rx Transfer Counter */ 227 228 uint16_t Mask; /*!< UART Rx RDR register mask */ 229 230 uint32_t FifoMode; /*!< Specifies if the FIFO mode is being used. 231 This parameter can be a value of @ref UARTEx_FIFO_mode. */ 232 233 uint16_t NbRxDataToProcess; /*!< Number of data to process during RX ISR execution */ 234 235 uint16_t NbTxDataToProcess; /*!< Number of data to process during TX ISR execution */ 236 237 __IO HAL_UART_RxTypeTypeDef ReceptionType; /*!< Type of ongoing reception */ 238 239 void (*RxISR)(struct __UART_HandleTypeDef *huart); /*!< Function pointer on Rx IRQ handler */ 240 241 void (*TxISR)(struct __UART_HandleTypeDef *huart); /*!< Function pointer on Tx IRQ handler */ 242 243 DMA_HandleTypeDef *hdmatx; /*!< UART Tx DMA Handle parameters */ 244 245 DMA_HandleTypeDef *hdmarx; /*!< UART Rx DMA Handle parameters */ 246 247 HAL_LockTypeDef Lock; /*!< Locking object */ 248 249 __IO HAL_UART_StateTypeDef gState; /*!< UART state information related to global Handle management 250 and also related to Tx operations. This parameter 251 can be a value of @ref HAL_UART_StateTypeDef */ 252 253 __IO HAL_UART_StateTypeDef RxState; /*!< UART state information related to Rx operations. This 254 parameter can be a value of @ref HAL_UART_StateTypeDef */ 255 256 __IO uint32_t ErrorCode; /*!< UART Error code */ 257 258 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) 259 void (* TxHalfCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Tx Half Complete Callback */ 260 void (* TxCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Tx Complete Callback */ 261 void (* RxHalfCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Rx Half Complete Callback */ 262 void (* RxCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Rx Complete Callback */ 263 void (* ErrorCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Error Callback */ 264 void (* AbortCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Abort Complete Callback */ 265 void (* AbortTransmitCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Abort Transmit Complete Callback */ 266 void (* AbortReceiveCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Abort Receive Complete Callback */ 267 void (* WakeupCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Wakeup Callback */ 268 void (* RxFifoFullCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Rx Fifo Full Callback */ 269 void (* TxFifoEmptyCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Tx Fifo Empty Callback */ 270 void (* RxEventCallback)(struct __UART_HandleTypeDef *huart, uint16_t Pos); /*!< UART Reception Event Callback */ 271 272 void (* MspInitCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Msp Init callback */ 273 void (* MspDeInitCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Msp DeInit callback */ 274 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ 275 276 } UART_HandleTypeDef; 277 278 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) 279 /** 280 * @brief HAL UART Callback ID enumeration definition 281 */ 282 typedef enum 283 { 284 HAL_UART_TX_HALFCOMPLETE_CB_ID = 0x00U, /*!< UART Tx Half Complete Callback ID */ 285 HAL_UART_TX_COMPLETE_CB_ID = 0x01U, /*!< UART Tx Complete Callback ID */ 286 HAL_UART_RX_HALFCOMPLETE_CB_ID = 0x02U, /*!< UART Rx Half Complete Callback ID */ 287 HAL_UART_RX_COMPLETE_CB_ID = 0x03U, /*!< UART Rx Complete Callback ID */ 288 HAL_UART_ERROR_CB_ID = 0x04U, /*!< UART Error Callback ID */ 289 HAL_UART_ABORT_COMPLETE_CB_ID = 0x05U, /*!< UART Abort Complete Callback ID */ 290 HAL_UART_ABORT_TRANSMIT_COMPLETE_CB_ID = 0x06U, /*!< UART Abort Transmit Complete Callback ID */ 291 HAL_UART_ABORT_RECEIVE_COMPLETE_CB_ID = 0x07U, /*!< UART Abort Receive Complete Callback ID */ 292 HAL_UART_WAKEUP_CB_ID = 0x08U, /*!< UART Wakeup Callback ID */ 293 HAL_UART_RX_FIFO_FULL_CB_ID = 0x09U, /*!< UART Rx Fifo Full Callback ID */ 294 HAL_UART_TX_FIFO_EMPTY_CB_ID = 0x0AU, /*!< UART Tx Fifo Empty Callback ID */ 295 296 HAL_UART_MSPINIT_CB_ID = 0x0BU, /*!< UART MspInit callback ID */ 297 HAL_UART_MSPDEINIT_CB_ID = 0x0CU /*!< UART MspDeInit callback ID */ 298 299 } HAL_UART_CallbackIDTypeDef; 300 301 /** 302 * @brief HAL UART Callback pointer definition 303 */ 304 typedef void (*pUART_CallbackTypeDef)(UART_HandleTypeDef *huart); /*!< pointer to an UART callback function */ 305 typedef void (*pUART_RxEventCallbackTypeDef) 306 (struct __UART_HandleTypeDef *huart, uint16_t Pos); /*!< pointer to a UART Rx Event specific callback function */ 307 308 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ 309 310 /** 311 * @} 312 */ 313 314 /* Exported constants --------------------------------------------------------*/ 315 /** @defgroup UART_Exported_Constants UART Exported Constants 316 * @{ 317 */ 318 319 /** @defgroup UART_State_Definition UART State Code Definition 320 * @{ 321 */ 322 #define HAL_UART_STATE_RESET 0x00000000U /*!< Peripheral is not initialized 323 Value is allowed for gState and RxState */ 324 #define HAL_UART_STATE_READY 0x00000020U /*!< Peripheral Initialized and ready for use 325 Value is allowed for gState and RxState */ 326 #define HAL_UART_STATE_BUSY 0x00000024U /*!< an internal process is ongoing 327 Value is allowed for gState only */ 328 #define HAL_UART_STATE_BUSY_TX 0x00000021U /*!< Data Transmission process is ongoing 329 Value is allowed for gState only */ 330 #define HAL_UART_STATE_BUSY_RX 0x00000022U /*!< Data Reception process is ongoing 331 Value is allowed for RxState only */ 332 #define HAL_UART_STATE_BUSY_TX_RX 0x00000023U /*!< Data Transmission and Reception process is ongoing 333 Not to be used for neither gState nor RxState.Value is result 334 of combination (Or) between gState and RxState values */ 335 #define HAL_UART_STATE_TIMEOUT 0x000000A0U /*!< Timeout state 336 Value is allowed for gState only */ 337 #define HAL_UART_STATE_ERROR 0x000000E0U /*!< Error 338 Value is allowed for gState only */ 339 /** 340 * @} 341 */ 342 343 /** @defgroup UART_Error_Definition UART Error Definition 344 * @{ 345 */ 346 #define HAL_UART_ERROR_NONE (0x00000000U) /*!< No error */ 347 #define HAL_UART_ERROR_PE (0x00000001U) /*!< Parity error */ 348 #define HAL_UART_ERROR_NE (0x00000002U) /*!< Noise error */ 349 #define HAL_UART_ERROR_FE (0x00000004U) /*!< Frame error */ 350 #define HAL_UART_ERROR_ORE (0x00000008U) /*!< Overrun error */ 351 #define HAL_UART_ERROR_DMA (0x00000010U) /*!< DMA transfer error */ 352 #define HAL_UART_ERROR_RTO (0x00000020U) /*!< Receiver Timeout error */ 353 354 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) 355 #define HAL_UART_ERROR_INVALID_CALLBACK (0x00000040U) /*!< Invalid Callback error */ 356 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ 357 /** 358 * @} 359 */ 360 361 /** @defgroup UART_Stop_Bits UART Number of Stop Bits 362 * @{ 363 */ 364 #define UART_STOPBITS_0_5 USART_CR2_STOP_0 /*!< UART frame with 0.5 stop bit */ 365 #define UART_STOPBITS_1 0x00000000U /*!< UART frame with 1 stop bit */ 366 #define UART_STOPBITS_1_5 (USART_CR2_STOP_0 | USART_CR2_STOP_1) /*!< UART frame with 1.5 stop bits */ 367 #define UART_STOPBITS_2 USART_CR2_STOP_1 /*!< UART frame with 2 stop bits */ 368 /** 369 * @} 370 */ 371 372 /** @defgroup UART_Parity UART Parity 373 * @{ 374 */ 375 #define UART_PARITY_NONE 0x00000000U /*!< No parity */ 376 #define UART_PARITY_EVEN USART_CR1_PCE /*!< Even parity */ 377 #define UART_PARITY_ODD (USART_CR1_PCE | USART_CR1_PS) /*!< Odd parity */ 378 /** 379 * @} 380 */ 381 382 /** @defgroup UART_Hardware_Flow_Control UART Hardware Flow Control 383 * @{ 384 */ 385 #define UART_HWCONTROL_NONE 0x00000000U /*!< No hardware control */ 386 #define UART_HWCONTROL_RTS USART_CR3_RTSE /*!< Request To Send */ 387 #define UART_HWCONTROL_CTS USART_CR3_CTSE /*!< Clear To Send */ 388 #define UART_HWCONTROL_RTS_CTS (USART_CR3_RTSE | USART_CR3_CTSE) /*!< Request and Clear To Send */ 389 /** 390 * @} 391 */ 392 393 /** @defgroup UART_Mode UART Transfer Mode 394 * @{ 395 */ 396 #define UART_MODE_RX USART_CR1_RE /*!< RX mode */ 397 #define UART_MODE_TX USART_CR1_TE /*!< TX mode */ 398 #define UART_MODE_TX_RX (USART_CR1_TE |USART_CR1_RE) /*!< RX and TX mode */ 399 /** 400 * @} 401 */ 402 403 /** @defgroup UART_State UART State 404 * @{ 405 */ 406 #define UART_STATE_DISABLE 0x00000000U /*!< UART disabled */ 407 #define UART_STATE_ENABLE USART_CR1_UE /*!< UART enabled */ 408 /** 409 * @} 410 */ 411 412 /** @defgroup UART_Over_Sampling UART Over Sampling 413 * @{ 414 */ 415 #define UART_OVERSAMPLING_16 0x00000000U /*!< Oversampling by 16 */ 416 #define UART_OVERSAMPLING_8 USART_CR1_OVER8 /*!< Oversampling by 8 */ 417 /** 418 * @} 419 */ 420 421 /** @defgroup UART_OneBit_Sampling UART One Bit Sampling Method 422 * @{ 423 */ 424 #define UART_ONE_BIT_SAMPLE_DISABLE 0x00000000U /*!< One-bit sampling disable */ 425 #define UART_ONE_BIT_SAMPLE_ENABLE USART_CR3_ONEBIT /*!< One-bit sampling enable */ 426 /** 427 * @} 428 */ 429 430 /** @defgroup UART_ClockPrescaler UART Clock Prescaler 431 * @{ 432 */ 433 #define UART_PRESCALER_DIV1 0x00000000U /*!< fclk_pres = fclk */ 434 #define UART_PRESCALER_DIV2 0x00000001U /*!< fclk_pres = fclk/2 */ 435 #define UART_PRESCALER_DIV4 0x00000002U /*!< fclk_pres = fclk/4 */ 436 #define UART_PRESCALER_DIV6 0x00000003U /*!< fclk_pres = fclk/6 */ 437 #define UART_PRESCALER_DIV8 0x00000004U /*!< fclk_pres = fclk/8 */ 438 #define UART_PRESCALER_DIV10 0x00000005U /*!< fclk_pres = fclk/10 */ 439 #define UART_PRESCALER_DIV12 0x00000006U /*!< fclk_pres = fclk/12 */ 440 #define UART_PRESCALER_DIV16 0x00000007U /*!< fclk_pres = fclk/16 */ 441 #define UART_PRESCALER_DIV32 0x00000008U /*!< fclk_pres = fclk/32 */ 442 #define UART_PRESCALER_DIV64 0x00000009U /*!< fclk_pres = fclk/64 */ 443 #define UART_PRESCALER_DIV128 0x0000000AU /*!< fclk_pres = fclk/128 */ 444 #define UART_PRESCALER_DIV256 0x0000000BU /*!< fclk_pres = fclk/256 */ 445 /** 446 * @} 447 */ 448 449 /** @defgroup UART_AutoBaud_Rate_Mode UART Advanced Feature AutoBaud Rate Mode 450 * @{ 451 */ 452 #define UART_ADVFEATURE_AUTOBAUDRATE_ONSTARTBIT 0x00000000U /*!< Auto Baud rate detection 453 on start bit */ 454 #define UART_ADVFEATURE_AUTOBAUDRATE_ONFALLINGEDGE USART_CR2_ABRMODE_0 /*!< Auto Baud rate detection 455 on falling edge */ 456 #define UART_ADVFEATURE_AUTOBAUDRATE_ON0X7FFRAME USART_CR2_ABRMODE_1 /*!< Auto Baud rate detection 457 on 0x7F frame detection */ 458 #define UART_ADVFEATURE_AUTOBAUDRATE_ON0X55FRAME USART_CR2_ABRMODE /*!< Auto Baud rate detection 459 on 0x55 frame detection */ 460 /** 461 * @} 462 */ 463 464 /** @defgroup UART_Receiver_Timeout UART Receiver Timeout 465 * @{ 466 */ 467 #define UART_RECEIVER_TIMEOUT_DISABLE 0x00000000U /*!< UART Receiver Timeout disable */ 468 #define UART_RECEIVER_TIMEOUT_ENABLE USART_CR2_RTOEN /*!< UART Receiver Timeout enable */ 469 /** 470 * @} 471 */ 472 473 /** @defgroup UART_LIN UART Local Interconnection Network mode 474 * @{ 475 */ 476 #define UART_LIN_DISABLE 0x00000000U /*!< Local Interconnect Network disable */ 477 #define UART_LIN_ENABLE USART_CR2_LINEN /*!< Local Interconnect Network enable */ 478 /** 479 * @} 480 */ 481 482 /** @defgroup UART_LIN_Break_Detection UART LIN Break Detection 483 * @{ 484 */ 485 #define UART_LINBREAKDETECTLENGTH_10B 0x00000000U /*!< LIN 10-bit break detection length */ 486 #define UART_LINBREAKDETECTLENGTH_11B USART_CR2_LBDL /*!< LIN 11-bit break detection length */ 487 /** 488 * @} 489 */ 490 491 /** @defgroup UART_DMA_Tx UART DMA Tx 492 * @{ 493 */ 494 #define UART_DMA_TX_DISABLE 0x00000000U /*!< UART DMA TX disabled */ 495 #define UART_DMA_TX_ENABLE USART_CR3_DMAT /*!< UART DMA TX enabled */ 496 /** 497 * @} 498 */ 499 500 /** @defgroup UART_DMA_Rx UART DMA Rx 501 * @{ 502 */ 503 #define UART_DMA_RX_DISABLE 0x00000000U /*!< UART DMA RX disabled */ 504 #define UART_DMA_RX_ENABLE USART_CR3_DMAR /*!< UART DMA RX enabled */ 505 /** 506 * @} 507 */ 508 509 /** @defgroup UART_Half_Duplex_Selection UART Half Duplex Selection 510 * @{ 511 */ 512 #define UART_HALF_DUPLEX_DISABLE 0x00000000U /*!< UART half-duplex disabled */ 513 #define UART_HALF_DUPLEX_ENABLE USART_CR3_HDSEL /*!< UART half-duplex enabled */ 514 /** 515 * @} 516 */ 517 518 /** @defgroup UART_WakeUp_Methods UART WakeUp Methods 519 * @{ 520 */ 521 #define UART_WAKEUPMETHOD_IDLELINE 0x00000000U /*!< UART wake-up on idle line */ 522 #define UART_WAKEUPMETHOD_ADDRESSMARK USART_CR1_WAKE /*!< UART wake-up on address mark */ 523 /** 524 * @} 525 */ 526 527 /** @defgroup UART_Request_Parameters UART Request Parameters 528 * @{ 529 */ 530 #define UART_AUTOBAUD_REQUEST USART_RQR_ABRRQ /*!< Auto-Baud Rate Request */ 531 #define UART_SENDBREAK_REQUEST USART_RQR_SBKRQ /*!< Send Break Request */ 532 #define UART_MUTE_MODE_REQUEST USART_RQR_MMRQ /*!< Mute Mode Request */ 533 #define UART_RXDATA_FLUSH_REQUEST USART_RQR_RXFRQ /*!< Receive Data flush Request */ 534 #define UART_TXDATA_FLUSH_REQUEST USART_RQR_TXFRQ /*!< Transmit data flush Request */ 535 /** 536 * @} 537 */ 538 539 /** @defgroup UART_Advanced_Features_Initialization_Type UART Advanced Feature Initialization Type 540 * @{ 541 */ 542 #define UART_ADVFEATURE_NO_INIT 0x00000000U /*!< No advanced feature initialization */ 543 #define UART_ADVFEATURE_TXINVERT_INIT 0x00000001U /*!< TX pin active level inversion */ 544 #define UART_ADVFEATURE_RXINVERT_INIT 0x00000002U /*!< RX pin active level inversion */ 545 #define UART_ADVFEATURE_DATAINVERT_INIT 0x00000004U /*!< Binary data inversion */ 546 #define UART_ADVFEATURE_SWAP_INIT 0x00000008U /*!< TX/RX pins swap */ 547 #define UART_ADVFEATURE_RXOVERRUNDISABLE_INIT 0x00000010U /*!< RX overrun disable */ 548 #define UART_ADVFEATURE_DMADISABLEONERROR_INIT 0x00000020U /*!< DMA disable on Reception Error */ 549 #define UART_ADVFEATURE_AUTOBAUDRATE_INIT 0x00000040U /*!< Auto Baud rate detection initialization */ 550 #define UART_ADVFEATURE_MSBFIRST_INIT 0x00000080U /*!< Most significant bit sent/received first */ 551 /** 552 * @} 553 */ 554 555 /** @defgroup UART_Tx_Inv UART Advanced Feature TX Pin Active Level Inversion 556 * @{ 557 */ 558 #define UART_ADVFEATURE_TXINV_DISABLE 0x00000000U /*!< TX pin active level inversion disable */ 559 #define UART_ADVFEATURE_TXINV_ENABLE USART_CR2_TXINV /*!< TX pin active level inversion enable */ 560 /** 561 * @} 562 */ 563 564 /** @defgroup UART_Rx_Inv UART Advanced Feature RX Pin Active Level Inversion 565 * @{ 566 */ 567 #define UART_ADVFEATURE_RXINV_DISABLE 0x00000000U /*!< RX pin active level inversion disable */ 568 #define UART_ADVFEATURE_RXINV_ENABLE USART_CR2_RXINV /*!< RX pin active level inversion enable */ 569 /** 570 * @} 571 */ 572 573 /** @defgroup UART_Data_Inv UART Advanced Feature Binary Data Inversion 574 * @{ 575 */ 576 #define UART_ADVFEATURE_DATAINV_DISABLE 0x00000000U /*!< Binary data inversion disable */ 577 #define UART_ADVFEATURE_DATAINV_ENABLE USART_CR2_DATAINV /*!< Binary data inversion enable */ 578 /** 579 * @} 580 */ 581 582 /** @defgroup UART_Rx_Tx_Swap UART Advanced Feature RX TX Pins Swap 583 * @{ 584 */ 585 #define UART_ADVFEATURE_SWAP_DISABLE 0x00000000U /*!< TX/RX pins swap disable */ 586 #define UART_ADVFEATURE_SWAP_ENABLE USART_CR2_SWAP /*!< TX/RX pins swap enable */ 587 /** 588 * @} 589 */ 590 591 /** @defgroup UART_Overrun_Disable UART Advanced Feature Overrun Disable 592 * @{ 593 */ 594 #define UART_ADVFEATURE_OVERRUN_ENABLE 0x00000000U /*!< RX overrun enable */ 595 #define UART_ADVFEATURE_OVERRUN_DISABLE USART_CR3_OVRDIS /*!< RX overrun disable */ 596 /** 597 * @} 598 */ 599 600 /** @defgroup UART_AutoBaudRate_Enable UART Advanced Feature Auto BaudRate Enable 601 * @{ 602 */ 603 #define UART_ADVFEATURE_AUTOBAUDRATE_DISABLE 0x00000000U /*!< RX Auto Baud rate detection enable */ 604 #define UART_ADVFEATURE_AUTOBAUDRATE_ENABLE USART_CR2_ABREN /*!< RX Auto Baud rate detection disable */ 605 /** 606 * @} 607 */ 608 609 /** @defgroup UART_DMA_Disable_on_Rx_Error UART Advanced Feature DMA Disable On Rx Error 610 * @{ 611 */ 612 #define UART_ADVFEATURE_DMA_ENABLEONRXERROR 0x00000000U /*!< DMA enable on Reception Error */ 613 #define UART_ADVFEATURE_DMA_DISABLEONRXERROR USART_CR3_DDRE /*!< DMA disable on Reception Error */ 614 /** 615 * @} 616 */ 617 618 /** @defgroup UART_MSB_First UART Advanced Feature MSB First 619 * @{ 620 */ 621 #define UART_ADVFEATURE_MSBFIRST_DISABLE 0x00000000U /*!< Most significant bit sent/received 622 first disable */ 623 #define UART_ADVFEATURE_MSBFIRST_ENABLE USART_CR2_MSBFIRST /*!< Most significant bit sent/received 624 first enable */ 625 /** 626 * @} 627 */ 628 629 /** @defgroup UART_Stop_Mode_Enable UART Advanced Feature Stop Mode Enable 630 * @{ 631 */ 632 #define UART_ADVFEATURE_STOPMODE_DISABLE 0x00000000U /*!< UART stop mode disable */ 633 #define UART_ADVFEATURE_STOPMODE_ENABLE USART_CR1_UESM /*!< UART stop mode enable */ 634 /** 635 * @} 636 */ 637 638 /** @defgroup UART_Mute_Mode UART Advanced Feature Mute Mode Enable 639 * @{ 640 */ 641 #define UART_ADVFEATURE_MUTEMODE_DISABLE 0x00000000U /*!< UART mute mode disable */ 642 #define UART_ADVFEATURE_MUTEMODE_ENABLE USART_CR1_MME /*!< UART mute mode enable */ 643 /** 644 * @} 645 */ 646 647 /** @defgroup UART_CR2_ADDRESS_LSB_POS UART Address-matching LSB Position In CR2 Register 648 * @{ 649 */ 650 #define UART_CR2_ADDRESS_LSB_POS 24U /*!< UART address-matching LSB position in CR2 register */ 651 /** 652 * @} 653 */ 654 655 /** @defgroup UART_WakeUp_from_Stop_Selection UART WakeUp From Stop Selection 656 * @{ 657 */ 658 #define UART_WAKEUP_ON_ADDRESS 0x00000000U /*!< UART wake-up on address */ 659 #define UART_WAKEUP_ON_STARTBIT USART_CR3_WUS_1 /*!< UART wake-up on start bit */ 660 #define UART_WAKEUP_ON_READDATA_NONEMPTY USART_CR3_WUS /*!< UART wake-up on receive data register 661 not empty or RXFIFO is not empty */ 662 /** 663 * @} 664 */ 665 666 /** @defgroup UART_DriverEnable_Polarity UART DriverEnable Polarity 667 * @{ 668 */ 669 #define UART_DE_POLARITY_HIGH 0x00000000U /*!< Driver enable signal is active high */ 670 #define UART_DE_POLARITY_LOW USART_CR3_DEP /*!< Driver enable signal is active low */ 671 /** 672 * @} 673 */ 674 675 /** @defgroup UART_CR1_DEAT_ADDRESS_LSB_POS UART Driver Enable Assertion Time LSB Position In CR1 Register 676 * @{ 677 */ 678 #define UART_CR1_DEAT_ADDRESS_LSB_POS 21U /*!< UART Driver Enable assertion time LSB 679 position in CR1 register */ 680 /** 681 * @} 682 */ 683 684 /** @defgroup UART_CR1_DEDT_ADDRESS_LSB_POS UART Driver Enable DeAssertion Time LSB Position In CR1 Register 685 * @{ 686 */ 687 #define UART_CR1_DEDT_ADDRESS_LSB_POS 16U /*!< UART Driver Enable de-assertion time LSB 688 position in CR1 register */ 689 /** 690 * @} 691 */ 692 693 /** @defgroup UART_Interruption_Mask UART Interruptions Flag Mask 694 * @{ 695 */ 696 #define UART_IT_MASK 0x001FU /*!< UART interruptions flags mask */ 697 /** 698 * @} 699 */ 700 701 /** @defgroup UART_TimeOut_Value UART polling-based communications time-out value 702 * @{ 703 */ 704 #define HAL_UART_TIMEOUT_VALUE 0x1FFFFFFU /*!< UART polling-based communications time-out value */ 705 /** 706 * @} 707 */ 708 709 /** @defgroup UART_Flags UART Status Flags 710 * Elements values convention: 0xXXXX 711 * - 0xXXXX : Flag mask in the ISR register 712 * @{ 713 */ 714 #define UART_FLAG_TXFT USART_ISR_TXFT /*!< UART TXFIFO threshold flag */ 715 #define UART_FLAG_RXFT USART_ISR_RXFT /*!< UART RXFIFO threshold flag */ 716 #define UART_FLAG_RXFF USART_ISR_RXFF /*!< UART RXFIFO Full flag */ 717 #define UART_FLAG_TXFE USART_ISR_TXFE /*!< UART TXFIFO Empty flag */ 718 #define UART_FLAG_REACK USART_ISR_REACK /*!< UART receive enable acknowledge flag */ 719 #define UART_FLAG_TEACK USART_ISR_TEACK /*!< UART transmit enable acknowledge flag */ 720 #define UART_FLAG_WUF USART_ISR_WUF /*!< UART wake-up from stop mode flag */ 721 #define UART_FLAG_RWU USART_ISR_RWU /*!< UART receiver wake-up from mute mode flag */ 722 #define UART_FLAG_SBKF USART_ISR_SBKF /*!< UART send break flag */ 723 #define UART_FLAG_CMF USART_ISR_CMF /*!< UART character match flag */ 724 #define UART_FLAG_BUSY USART_ISR_BUSY /*!< UART busy flag */ 725 #define UART_FLAG_ABRF USART_ISR_ABRF /*!< UART auto Baud rate flag */ 726 #define UART_FLAG_ABRE USART_ISR_ABRE /*!< UART auto Baud rate error */ 727 #define UART_FLAG_RTOF USART_ISR_RTOF /*!< UART receiver timeout flag */ 728 #define UART_FLAG_CTS USART_ISR_CTS /*!< UART clear to send flag */ 729 #define UART_FLAG_CTSIF USART_ISR_CTSIF /*!< UART clear to send interrupt flag */ 730 #define UART_FLAG_LBDF USART_ISR_LBDF /*!< UART LIN break detection flag */ 731 #define UART_FLAG_TXE USART_ISR_TXE_TXFNF /*!< UART transmit data register empty */ 732 #define UART_FLAG_TXFNF USART_ISR_TXE_TXFNF /*!< UART TXFIFO not full */ 733 #define UART_FLAG_TC USART_ISR_TC /*!< UART transmission complete */ 734 #define UART_FLAG_RXNE USART_ISR_RXNE_RXFNE /*!< UART read data register not empty */ 735 #define UART_FLAG_RXFNE USART_ISR_RXNE_RXFNE /*!< UART RXFIFO not empty */ 736 #define UART_FLAG_IDLE USART_ISR_IDLE /*!< UART idle flag */ 737 #define UART_FLAG_ORE USART_ISR_ORE /*!< UART overrun error */ 738 #define UART_FLAG_NE USART_ISR_NE /*!< UART noise error */ 739 #define UART_FLAG_FE USART_ISR_FE /*!< UART frame error */ 740 #define UART_FLAG_PE USART_ISR_PE /*!< UART parity error */ 741 /** 742 * @} 743 */ 744 745 /** @defgroup UART_Interrupt_definition UART Interrupts Definition 746 * Elements values convention: 000ZZZZZ0XXYYYYYb 747 * - YYYYY : Interrupt source position in the XX register (5bits) 748 * - XX : Interrupt source register (2bits) 749 * - 01: CR1 register 750 * - 10: CR2 register 751 * - 11: CR3 register 752 * - ZZZZZ : Flag position in the ISR register(5bits) 753 * Elements values convention: 000000000XXYYYYYb 754 * - YYYYY : Interrupt source position in the XX register (5bits) 755 * - XX : Interrupt source register (2bits) 756 * - 01: CR1 register 757 * - 10: CR2 register 758 * - 11: CR3 register 759 * Elements values convention: 0000ZZZZ00000000b 760 * - ZZZZ : Flag position in the ISR register(4bits) 761 * @{ 762 */ 763 #define UART_IT_PE 0x0028U /*!< UART parity error interruption */ 764 #define UART_IT_TXE 0x0727U /*!< UART transmit data register empty interruption */ 765 #define UART_IT_TXFNF 0x0727U /*!< UART TX FIFO not full interruption */ 766 #define UART_IT_TC 0x0626U /*!< UART transmission complete interruption */ 767 #define UART_IT_RXNE 0x0525U /*!< UART read data register not empty interruption */ 768 #define UART_IT_RXFNE 0x0525U /*!< UART RXFIFO not empty interruption */ 769 #define UART_IT_IDLE 0x0424U /*!< UART idle interruption */ 770 #define UART_IT_LBD 0x0846U /*!< UART LIN break detection interruption */ 771 #define UART_IT_CTS 0x096AU /*!< UART CTS interruption */ 772 #define UART_IT_CM 0x112EU /*!< UART character match interruption */ 773 #define UART_IT_WUF 0x1476U /*!< UART wake-up from stop mode interruption */ 774 #define UART_IT_RXFF 0x183FU /*!< UART RXFIFO full interruption */ 775 #define UART_IT_TXFE 0x173EU /*!< UART TXFIFO empty interruption */ 776 #define UART_IT_RXFT 0x1A7CU /*!< UART RXFIFO threshold reached interruption */ 777 #define UART_IT_TXFT 0x1B77U /*!< UART TXFIFO threshold reached interruption */ 778 #define UART_IT_RTO 0x0B3AU /*!< UART receiver timeout interruption */ 779 780 #define UART_IT_ERR 0x0060U /*!< UART error interruption */ 781 782 #define UART_IT_ORE 0x0300U /*!< UART overrun error interruption */ 783 #define UART_IT_NE 0x0200U /*!< UART noise error interruption */ 784 #define UART_IT_FE 0x0100U /*!< UART frame error interruption */ 785 /** 786 * @} 787 */ 788 789 /** @defgroup UART_IT_CLEAR_Flags UART Interruption Clear Flags 790 * @{ 791 */ 792 #define UART_CLEAR_PEF USART_ICR_PECF /*!< Parity Error Clear Flag */ 793 #define UART_CLEAR_FEF USART_ICR_FECF /*!< Framing Error Clear Flag */ 794 #define UART_CLEAR_NEF USART_ICR_NECF /*!< Noise Error detected Clear Flag */ 795 #define UART_CLEAR_OREF USART_ICR_ORECF /*!< Overrun Error Clear Flag */ 796 #define UART_CLEAR_IDLEF USART_ICR_IDLECF /*!< IDLE line detected Clear Flag */ 797 #define UART_CLEAR_TXFECF USART_ICR_TXFECF /*!< TXFIFO empty clear flag */ 798 #define UART_CLEAR_TCF USART_ICR_TCCF /*!< Transmission Complete Clear Flag */ 799 #define UART_CLEAR_LBDF USART_ICR_LBDCF /*!< LIN Break Detection Clear Flag */ 800 #define UART_CLEAR_CTSF USART_ICR_CTSCF /*!< CTS Interrupt Clear Flag */ 801 #define UART_CLEAR_CMF USART_ICR_CMCF /*!< Character Match Clear Flag */ 802 #define UART_CLEAR_WUF USART_ICR_WUCF /*!< Wake Up from stop mode Clear Flag */ 803 #define UART_CLEAR_RTOF USART_ICR_RTOCF /*!< UART receiver timeout clear flag */ 804 /** 805 * @} 806 */ 807 808 /** @defgroup UART_RECEPTION_TYPE_Values UART Reception type values 809 * @{ 810 */ 811 #define HAL_UART_RECEPTION_STANDARD (0x00000000U) /*!< Standard reception */ 812 #define HAL_UART_RECEPTION_TOIDLE (0x00000001U) /*!< Reception till completion or IDLE event */ 813 #define HAL_UART_RECEPTION_TORTO (0x00000002U) /*!< Reception till completion or RTO event */ 814 #define HAL_UART_RECEPTION_TOCHARMATCH (0x00000003U) /*!< Reception till completion or CM event */ 815 /** 816 * @} 817 */ 818 819 /** 820 * @} 821 */ 822 823 /* Exported macros -----------------------------------------------------------*/ 824 /** @defgroup UART_Exported_Macros UART Exported Macros 825 * @{ 826 */ 827 828 /** @brief Reset UART handle states. 829 * @param __HANDLE__ UART handle. 830 * @retval None 831 */ 832 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) 833 #define __HAL_UART_RESET_HANDLE_STATE(__HANDLE__) do{ \ 834 (__HANDLE__)->gState = HAL_UART_STATE_RESET; \ 835 (__HANDLE__)->RxState = HAL_UART_STATE_RESET; \ 836 (__HANDLE__)->MspInitCallback = NULL; \ 837 (__HANDLE__)->MspDeInitCallback = NULL; \ 838 } while(0U) 839 #else 840 #define __HAL_UART_RESET_HANDLE_STATE(__HANDLE__) do{ \ 841 (__HANDLE__)->gState = HAL_UART_STATE_RESET; \ 842 (__HANDLE__)->RxState = HAL_UART_STATE_RESET; \ 843 } while(0U) 844 #endif /*USE_HAL_UART_REGISTER_CALLBACKS */ 845 846 /** @brief Flush the UART Data registers. 847 * @param __HANDLE__ specifies the UART Handle. 848 * @retval None 849 */ 850 #define __HAL_UART_FLUSH_DRREGISTER(__HANDLE__) \ 851 do{ \ 852 SET_BIT((__HANDLE__)->Instance->RQR, UART_RXDATA_FLUSH_REQUEST); \ 853 SET_BIT((__HANDLE__)->Instance->RQR, UART_TXDATA_FLUSH_REQUEST); \ 854 } while(0U) 855 856 /** @brief Clear the specified UART pending flag. 857 * @param __HANDLE__ specifies the UART Handle. 858 * @param __FLAG__ specifies the flag to check. 859 * This parameter can be any combination of the following values: 860 * @arg @ref UART_CLEAR_PEF Parity Error Clear Flag 861 * @arg @ref UART_CLEAR_FEF Framing Error Clear Flag 862 * @arg @ref UART_CLEAR_NEF Noise detected Clear Flag 863 * @arg @ref UART_CLEAR_OREF Overrun Error Clear Flag 864 * @arg @ref UART_CLEAR_IDLEF IDLE line detected Clear Flag 865 * @arg @ref UART_CLEAR_TXFECF TXFIFO empty clear Flag 866 * @arg @ref UART_CLEAR_TCF Transmission Complete Clear Flag 867 * @arg @ref UART_CLEAR_RTOF Receiver Timeout clear flag 868 * @arg @ref UART_CLEAR_LBDF LIN Break Detection Clear Flag 869 * @arg @ref UART_CLEAR_CTSF CTS Interrupt Clear Flag 870 * @arg @ref UART_CLEAR_CMF Character Match Clear Flag 871 * @arg @ref UART_CLEAR_WUF Wake Up from stop mode Clear Flag 872 * @retval None 873 */ 874 #define __HAL_UART_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->ICR = (__FLAG__)) 875 876 /** @brief Clear the UART PE pending flag. 877 * @param __HANDLE__ specifies the UART Handle. 878 * @retval None 879 */ 880 #define __HAL_UART_CLEAR_PEFLAG(__HANDLE__) __HAL_UART_CLEAR_FLAG((__HANDLE__), UART_CLEAR_PEF) 881 882 /** @brief Clear the UART FE pending flag. 883 * @param __HANDLE__ specifies the UART Handle. 884 * @retval None 885 */ 886 #define __HAL_UART_CLEAR_FEFLAG(__HANDLE__) __HAL_UART_CLEAR_FLAG((__HANDLE__), UART_CLEAR_FEF) 887 888 /** @brief Clear the UART NE pending flag. 889 * @param __HANDLE__ specifies the UART Handle. 890 * @retval None 891 */ 892 #define __HAL_UART_CLEAR_NEFLAG(__HANDLE__) __HAL_UART_CLEAR_FLAG((__HANDLE__), UART_CLEAR_NEF) 893 894 /** @brief Clear the UART ORE pending flag. 895 * @param __HANDLE__ specifies the UART Handle. 896 * @retval None 897 */ 898 #define __HAL_UART_CLEAR_OREFLAG(__HANDLE__) __HAL_UART_CLEAR_FLAG((__HANDLE__), UART_CLEAR_OREF) 899 900 /** @brief Clear the UART IDLE pending flag. 901 * @param __HANDLE__ specifies the UART Handle. 902 * @retval None 903 */ 904 #define __HAL_UART_CLEAR_IDLEFLAG(__HANDLE__) __HAL_UART_CLEAR_FLAG((__HANDLE__), UART_CLEAR_IDLEF) 905 906 /** @brief Clear the UART TX FIFO empty clear flag. 907 * @param __HANDLE__ specifies the UART Handle. 908 * @retval None 909 */ 910 #define __HAL_UART_CLEAR_TXFECF(__HANDLE__) __HAL_UART_CLEAR_FLAG((__HANDLE__), UART_CLEAR_TXFECF) 911 912 /** @brief Check whether the specified UART flag is set or not. 913 * @param __HANDLE__ specifies the UART Handle. 914 * @param __FLAG__ specifies the flag to check. 915 * This parameter can be one of the following values: 916 * @arg @ref UART_FLAG_TXFT TXFIFO threshold flag 917 * @arg @ref UART_FLAG_RXFT RXFIFO threshold flag 918 * @arg @ref UART_FLAG_RXFF RXFIFO Full flag 919 * @arg @ref UART_FLAG_TXFE TXFIFO Empty flag 920 * @arg @ref UART_FLAG_REACK Receive enable acknowledge flag 921 * @arg @ref UART_FLAG_TEACK Transmit enable acknowledge flag 922 * @arg @ref UART_FLAG_WUF Wake up from stop mode flag 923 * @arg @ref UART_FLAG_RWU Receiver wake up flag (if the UART in mute mode) 924 * @arg @ref UART_FLAG_SBKF Send Break flag 925 * @arg @ref UART_FLAG_CMF Character match flag 926 * @arg @ref UART_FLAG_BUSY Busy flag 927 * @arg @ref UART_FLAG_ABRF Auto Baud rate detection flag 928 * @arg @ref UART_FLAG_ABRE Auto Baud rate detection error flag 929 * @arg @ref UART_FLAG_CTS CTS Change flag 930 * @arg @ref UART_FLAG_LBDF LIN Break detection flag 931 * @arg @ref UART_FLAG_TXE Transmit data register empty flag 932 * @arg @ref UART_FLAG_TXFNF UART TXFIFO not full flag 933 * @arg @ref UART_FLAG_TC Transmission Complete flag 934 * @arg @ref UART_FLAG_RXNE Receive data register not empty flag 935 * @arg @ref UART_FLAG_RXFNE UART RXFIFO not empty flag 936 * @arg @ref UART_FLAG_RTOF Receiver Timeout flag 937 * @arg @ref UART_FLAG_IDLE Idle Line detection flag 938 * @arg @ref UART_FLAG_ORE Overrun Error flag 939 * @arg @ref UART_FLAG_NE Noise Error flag 940 * @arg @ref UART_FLAG_FE Framing Error flag 941 * @arg @ref UART_FLAG_PE Parity Error flag 942 * @retval The new state of __FLAG__ (TRUE or FALSE). 943 */ 944 #define __HAL_UART_GET_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->ISR & (__FLAG__)) == (__FLAG__)) 945 946 /** @brief Enable the specified UART interrupt. 947 * @param __HANDLE__ specifies the UART Handle. 948 * @param __INTERRUPT__ specifies the UART interrupt source to enable. 949 * This parameter can be one of the following values: 950 * @arg @ref UART_IT_RXFF RXFIFO Full interrupt 951 * @arg @ref UART_IT_TXFE TXFIFO Empty interrupt 952 * @arg @ref UART_IT_RXFT RXFIFO threshold interrupt 953 * @arg @ref UART_IT_TXFT TXFIFO threshold interrupt 954 * @arg @ref UART_IT_WUF Wakeup from stop mode interrupt 955 * @arg @ref UART_IT_CM Character match interrupt 956 * @arg @ref UART_IT_CTS CTS change interrupt 957 * @arg @ref UART_IT_LBD LIN Break detection interrupt 958 * @arg @ref UART_IT_TXE Transmit Data Register empty interrupt 959 * @arg @ref UART_IT_TXFNF TX FIFO not full interrupt 960 * @arg @ref UART_IT_TC Transmission complete interrupt 961 * @arg @ref UART_IT_RXNE Receive Data register not empty interrupt 962 * @arg @ref UART_IT_RXFNE RXFIFO not empty interrupt 963 * @arg @ref UART_IT_RTO Receive Timeout interrupt 964 * @arg @ref UART_IT_IDLE Idle line detection interrupt 965 * @arg @ref UART_IT_PE Parity Error interrupt 966 * @arg @ref UART_IT_ERR Error interrupt (frame error, noise error, overrun error) 967 * @retval None 968 */ 969 #define __HAL_UART_ENABLE_IT(__HANDLE__, __INTERRUPT__) (\ 970 ((((uint8_t)(__INTERRUPT__)) >> 5U) == 1U)?\ 971 ((__HANDLE__)->Instance->CR1 |= (1U <<\ 972 ((__INTERRUPT__) & UART_IT_MASK))): \ 973 ((((uint8_t)(__INTERRUPT__)) >> 5U) == 2U)?\ 974 ((__HANDLE__)->Instance->CR2 |= (1U <<\ 975 ((__INTERRUPT__) & UART_IT_MASK))): \ 976 ((__HANDLE__)->Instance->CR3 |= (1U <<\ 977 ((__INTERRUPT__) & UART_IT_MASK)))) 978 979 /** @brief Disable the specified UART interrupt. 980 * @param __HANDLE__ specifies the UART Handle. 981 * @param __INTERRUPT__ specifies the UART interrupt source to disable. 982 * This parameter can be one of the following values: 983 * @arg @ref UART_IT_RXFF RXFIFO Full interrupt 984 * @arg @ref UART_IT_TXFE TXFIFO Empty interrupt 985 * @arg @ref UART_IT_RXFT RXFIFO threshold interrupt 986 * @arg @ref UART_IT_TXFT TXFIFO threshold interrupt 987 * @arg @ref UART_IT_WUF Wakeup from stop mode interrupt 988 * @arg @ref UART_IT_CM Character match interrupt 989 * @arg @ref UART_IT_CTS CTS change interrupt 990 * @arg @ref UART_IT_LBD LIN Break detection interrupt 991 * @arg @ref UART_IT_TXE Transmit Data Register empty interrupt 992 * @arg @ref UART_IT_TXFNF TX FIFO not full interrupt 993 * @arg @ref UART_IT_TC Transmission complete interrupt 994 * @arg @ref UART_IT_RXNE Receive Data register not empty interrupt 995 * @arg @ref UART_IT_RXFNE RXFIFO not empty interrupt 996 * @arg @ref UART_IT_RTO Receive Timeout interrupt 997 * @arg @ref UART_IT_IDLE Idle line detection interrupt 998 * @arg @ref UART_IT_PE Parity Error interrupt 999 * @arg @ref UART_IT_ERR Error interrupt (Frame error, noise error, overrun error) 1000 * @retval None 1001 */ 1002 #define __HAL_UART_DISABLE_IT(__HANDLE__, __INTERRUPT__) (\ 1003 ((((uint8_t)(__INTERRUPT__)) >> 5U) == 1U)?\ 1004 ((__HANDLE__)->Instance->CR1 &= ~ (1U <<\ 1005 ((__INTERRUPT__) & UART_IT_MASK))): \ 1006 ((((uint8_t)(__INTERRUPT__)) >> 5U) == 2U)?\ 1007 ((__HANDLE__)->Instance->CR2 &= ~ (1U <<\ 1008 ((__INTERRUPT__) & UART_IT_MASK))): \ 1009 ((__HANDLE__)->Instance->CR3 &= ~ (1U <<\ 1010 ((__INTERRUPT__) & UART_IT_MASK)))) 1011 1012 /** @brief Check whether the specified UART interrupt has occurred or not. 1013 * @param __HANDLE__ specifies the UART Handle. 1014 * @param __INTERRUPT__ specifies the UART interrupt to check. 1015 * This parameter can be one of the following values: 1016 * @arg @ref UART_IT_RXFF RXFIFO Full interrupt 1017 * @arg @ref UART_IT_TXFE TXFIFO Empty interrupt 1018 * @arg @ref UART_IT_RXFT RXFIFO threshold interrupt 1019 * @arg @ref UART_IT_TXFT TXFIFO threshold interrupt 1020 * @arg @ref UART_IT_WUF Wakeup from stop mode interrupt 1021 * @arg @ref UART_IT_CM Character match interrupt 1022 * @arg @ref UART_IT_CTS CTS change interrupt 1023 * @arg @ref UART_IT_LBD LIN Break detection interrupt 1024 * @arg @ref UART_IT_TXE Transmit Data Register empty interrupt 1025 * @arg @ref UART_IT_TXFNF TX FIFO not full interrupt 1026 * @arg @ref UART_IT_TC Transmission complete interrupt 1027 * @arg @ref UART_IT_RXNE Receive Data register not empty interrupt 1028 * @arg @ref UART_IT_RXFNE RXFIFO not empty interrupt 1029 * @arg @ref UART_IT_RTO Receive Timeout interrupt 1030 * @arg @ref UART_IT_IDLE Idle line detection interrupt 1031 * @arg @ref UART_IT_PE Parity Error interrupt 1032 * @arg @ref UART_IT_ERR Error interrupt (Frame error, noise error, overrun error) 1033 * @retval The new state of __INTERRUPT__ (SET or RESET). 1034 */ 1035 #define __HAL_UART_GET_IT(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->ISR\ 1036 & (1U << ((__INTERRUPT__)>> 8U))) != RESET) ? SET : RESET) 1037 1038 /** @brief Check whether the specified UART interrupt source is enabled or not. 1039 * @param __HANDLE__ specifies the UART Handle. 1040 * @param __INTERRUPT__ specifies the UART interrupt source to check. 1041 * This parameter can be one of the following values: 1042 * @arg @ref UART_IT_RXFF RXFIFO Full interrupt 1043 * @arg @ref UART_IT_TXFE TXFIFO Empty interrupt 1044 * @arg @ref UART_IT_RXFT RXFIFO threshold interrupt 1045 * @arg @ref UART_IT_TXFT TXFIFO threshold interrupt 1046 * @arg @ref UART_IT_WUF Wakeup from stop mode interrupt 1047 * @arg @ref UART_IT_CM Character match interrupt 1048 * @arg @ref UART_IT_CTS CTS change interrupt 1049 * @arg @ref UART_IT_LBD LIN Break detection interrupt 1050 * @arg @ref UART_IT_TXE Transmit Data Register empty interrupt 1051 * @arg @ref UART_IT_TXFNF TX FIFO not full interrupt 1052 * @arg @ref UART_IT_TC Transmission complete interrupt 1053 * @arg @ref UART_IT_RXNE Receive Data register not empty interrupt 1054 * @arg @ref UART_IT_RXFNE RXFIFO not empty interrupt 1055 * @arg @ref UART_IT_RTO Receive Timeout interrupt 1056 * @arg @ref UART_IT_IDLE Idle line detection interrupt 1057 * @arg @ref UART_IT_PE Parity Error interrupt 1058 * @arg @ref UART_IT_ERR Error interrupt (Frame error, noise error, overrun error) 1059 * @retval The new state of __INTERRUPT__ (SET or RESET). 1060 */ 1061 #define __HAL_UART_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((((((uint8_t)(__INTERRUPT__)) >> 5U) == 1U) ?\ 1062 (__HANDLE__)->Instance->CR1 : \ 1063 (((((uint8_t)(__INTERRUPT__)) >> 5U) == 2U) ?\ 1064 (__HANDLE__)->Instance->CR2 : \ 1065 (__HANDLE__)->Instance->CR3)) & (1U <<\ 1066 (((uint16_t)(__INTERRUPT__)) &\ 1067 UART_IT_MASK))) != RESET) ? SET : RESET) 1068 1069 /** @brief Clear the specified UART ISR flag, in setting the proper ICR register flag. 1070 * @param __HANDLE__ specifies the UART Handle. 1071 * @param __IT_CLEAR__ specifies the interrupt clear register flag that needs to be set 1072 * to clear the corresponding interrupt 1073 * This parameter can be one of the following values: 1074 * @arg @ref UART_CLEAR_PEF Parity Error Clear Flag 1075 * @arg @ref UART_CLEAR_FEF Framing Error Clear Flag 1076 * @arg @ref UART_CLEAR_NEF Noise detected Clear Flag 1077 * @arg @ref UART_CLEAR_OREF Overrun Error Clear Flag 1078 * @arg @ref UART_CLEAR_IDLEF IDLE line detected Clear Flag 1079 * @arg @ref UART_CLEAR_RTOF Receiver timeout clear flag 1080 * @arg @ref UART_CLEAR_TXFECF TXFIFO empty Clear Flag 1081 * @arg @ref UART_CLEAR_TCF Transmission Complete Clear Flag 1082 * @arg @ref UART_CLEAR_LBDF LIN Break Detection Clear Flag 1083 * @arg @ref UART_CLEAR_CTSF CTS Interrupt Clear Flag 1084 * @arg @ref UART_CLEAR_CMF Character Match Clear Flag 1085 * @arg @ref UART_CLEAR_WUF Wake Up from stop mode Clear Flag 1086 * @retval None 1087 */ 1088 #define __HAL_UART_CLEAR_IT(__HANDLE__, __IT_CLEAR__) ((__HANDLE__)->Instance->ICR = (uint32_t)(__IT_CLEAR__)) 1089 1090 /** @brief Set a specific UART request flag. 1091 * @param __HANDLE__ specifies the UART Handle. 1092 * @param __REQ__ specifies the request flag to set 1093 * This parameter can be one of the following values: 1094 * @arg @ref UART_AUTOBAUD_REQUEST Auto-Baud Rate Request 1095 * @arg @ref UART_SENDBREAK_REQUEST Send Break Request 1096 * @arg @ref UART_MUTE_MODE_REQUEST Mute Mode Request 1097 * @arg @ref UART_RXDATA_FLUSH_REQUEST Receive Data flush Request 1098 * @arg @ref UART_TXDATA_FLUSH_REQUEST Transmit data flush Request 1099 * @retval None 1100 */ 1101 #define __HAL_UART_SEND_REQ(__HANDLE__, __REQ__) ((__HANDLE__)->Instance->RQR |= (uint16_t)(__REQ__)) 1102 1103 /** @brief Enable the UART one bit sample method. 1104 * @param __HANDLE__ specifies the UART Handle. 1105 * @retval None 1106 */ 1107 #define __HAL_UART_ONE_BIT_SAMPLE_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR3|= USART_CR3_ONEBIT) 1108 1109 /** @brief Disable the UART one bit sample method. 1110 * @param __HANDLE__ specifies the UART Handle. 1111 * @retval None 1112 */ 1113 #define __HAL_UART_ONE_BIT_SAMPLE_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR3 &= ~USART_CR3_ONEBIT) 1114 1115 /** @brief Enable UART. 1116 * @param __HANDLE__ specifies the UART Handle. 1117 * @retval None 1118 */ 1119 #define __HAL_UART_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 |= USART_CR1_UE) 1120 1121 /** @brief Disable UART. 1122 * @param __HANDLE__ specifies the UART Handle. 1123 * @retval None 1124 */ 1125 #define __HAL_UART_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 &= ~USART_CR1_UE) 1126 1127 /** @brief Enable CTS flow control. 1128 * @note This macro allows to enable CTS hardware flow control for a given UART instance, 1129 * without need to call HAL_UART_Init() function. 1130 * As involving direct access to UART registers, usage of this macro should be fully endorsed by user. 1131 * @note As macro is expected to be used for modifying CTS Hw flow control feature activation, without need 1132 * for USART instance Deinit/Init, following conditions for macro call should be fulfilled : 1133 * - UART instance should have already been initialised (through call of HAL_UART_Init() ) 1134 * - macro could only be called when corresponding UART instance is disabled 1135 * (i.e. __HAL_UART_DISABLE(__HANDLE__)) and should be followed by an Enable 1136 * macro (i.e. __HAL_UART_ENABLE(__HANDLE__)). 1137 * @param __HANDLE__ specifies the UART Handle. 1138 * @retval None 1139 */ 1140 #define __HAL_UART_HWCONTROL_CTS_ENABLE(__HANDLE__) \ 1141 do{ \ 1142 ATOMIC_SET_BIT((__HANDLE__)->Instance->CR3, USART_CR3_CTSE); \ 1143 (__HANDLE__)->Init.HwFlowCtl |= USART_CR3_CTSE; \ 1144 } while(0U) 1145 1146 /** @brief Disable CTS flow control. 1147 * @note This macro allows to disable CTS hardware flow control for a given UART instance, 1148 * without need to call HAL_UART_Init() function. 1149 * As involving direct access to UART registers, usage of this macro should be fully endorsed by user. 1150 * @note As macro is expected to be used for modifying CTS Hw flow control feature activation, without need 1151 * for USART instance Deinit/Init, following conditions for macro call should be fulfilled : 1152 * - UART instance should have already been initialised (through call of HAL_UART_Init() ) 1153 * - macro could only be called when corresponding UART instance is disabled 1154 * (i.e. __HAL_UART_DISABLE(__HANDLE__)) and should be followed by an Enable 1155 * macro (i.e. __HAL_UART_ENABLE(__HANDLE__)). 1156 * @param __HANDLE__ specifies the UART Handle. 1157 * @retval None 1158 */ 1159 #define __HAL_UART_HWCONTROL_CTS_DISABLE(__HANDLE__) \ 1160 do{ \ 1161 ATOMIC_CLEAR_BIT((__HANDLE__)->Instance->CR3, USART_CR3_CTSE); \ 1162 (__HANDLE__)->Init.HwFlowCtl &= ~(USART_CR3_CTSE); \ 1163 } while(0U) 1164 1165 /** @brief Enable RTS flow control. 1166 * @note This macro allows to enable RTS hardware flow control for a given UART instance, 1167 * without need to call HAL_UART_Init() function. 1168 * As involving direct access to UART registers, usage of this macro should be fully endorsed by user. 1169 * @note As macro is expected to be used for modifying RTS Hw flow control feature activation, without need 1170 * for USART instance Deinit/Init, following conditions for macro call should be fulfilled : 1171 * - UART instance should have already been initialised (through call of HAL_UART_Init() ) 1172 * - macro could only be called when corresponding UART instance is disabled 1173 * (i.e. __HAL_UART_DISABLE(__HANDLE__)) and should be followed by an Enable 1174 * macro (i.e. __HAL_UART_ENABLE(__HANDLE__)). 1175 * @param __HANDLE__ specifies the UART Handle. 1176 * @retval None 1177 */ 1178 #define __HAL_UART_HWCONTROL_RTS_ENABLE(__HANDLE__) \ 1179 do{ \ 1180 ATOMIC_SET_BIT((__HANDLE__)->Instance->CR3, USART_CR3_RTSE); \ 1181 (__HANDLE__)->Init.HwFlowCtl |= USART_CR3_RTSE; \ 1182 } while(0U) 1183 1184 /** @brief Disable RTS flow control. 1185 * @note This macro allows to disable RTS hardware flow control for a given UART instance, 1186 * without need to call HAL_UART_Init() function. 1187 * As involving direct access to UART registers, usage of this macro should be fully endorsed by user. 1188 * @note As macro is expected to be used for modifying RTS Hw flow control feature activation, without need 1189 * for USART instance Deinit/Init, following conditions for macro call should be fulfilled : 1190 * - UART instance should have already been initialised (through call of HAL_UART_Init() ) 1191 * - macro could only be called when corresponding UART instance is disabled 1192 * (i.e. __HAL_UART_DISABLE(__HANDLE__)) and should be followed by an Enable 1193 * macro (i.e. __HAL_UART_ENABLE(__HANDLE__)). 1194 * @param __HANDLE__ specifies the UART Handle. 1195 * @retval None 1196 */ 1197 #define __HAL_UART_HWCONTROL_RTS_DISABLE(__HANDLE__) \ 1198 do{ \ 1199 ATOMIC_CLEAR_BIT((__HANDLE__)->Instance->CR3, USART_CR3_RTSE);\ 1200 (__HANDLE__)->Init.HwFlowCtl &= ~(USART_CR3_RTSE); \ 1201 } while(0U) 1202 /** 1203 * @} 1204 */ 1205 1206 /* Private macros --------------------------------------------------------*/ 1207 /** @defgroup UART_Private_Macros UART Private Macros 1208 * @{ 1209 */ 1210 /** @brief Get UART clok division factor from clock prescaler value. 1211 * @param __CLOCKPRESCALER__ UART prescaler value. 1212 * @retval UART clock division factor 1213 */ 1214 #define UART_GET_DIV_FACTOR(__CLOCKPRESCALER__) \ 1215 (((__CLOCKPRESCALER__) == UART_PRESCALER_DIV1) ? 1U : \ 1216 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV2) ? 2U : \ 1217 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV4) ? 4U : \ 1218 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV6) ? 6U : \ 1219 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV8) ? 8U : \ 1220 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV10) ? 10U : \ 1221 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV12) ? 12U : \ 1222 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV16) ? 16U : \ 1223 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV32) ? 32U : \ 1224 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV64) ? 64U : \ 1225 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV128) ? 128U : \ 1226 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV256) ? 256U : 1U) 1227 1228 /** @brief BRR division operation to set BRR register with LPUART. 1229 * @param __PCLK__ LPUART clock. 1230 * @param __BAUD__ Baud rate set by the user. 1231 * @param __CLOCKPRESCALER__ UART prescaler value. 1232 * @retval Division result 1233 */ 1234 #define UART_DIV_LPUART(__PCLK__, __BAUD__, __CLOCKPRESCALER__) \ 1235 ((uint32_t)((((((uint64_t)(__PCLK__))/(UARTPrescTable[(__CLOCKPRESCALER__)]))*256U)+ \ 1236 (uint32_t)((__BAUD__)/2U)) / (__BAUD__)) \ 1237 ) 1238 1239 /** @brief BRR division operation to set BRR register in 8-bit oversampling mode. 1240 * @param __PCLK__ UART clock. 1241 * @param __BAUD__ Baud rate set by the user. 1242 * @param __CLOCKPRESCALER__ UART prescaler value. 1243 * @retval Division result 1244 */ 1245 #define UART_DIV_SAMPLING8(__PCLK__, __BAUD__, __CLOCKPRESCALER__) \ 1246 (((((__PCLK__)/UARTPrescTable[(__CLOCKPRESCALER__)])*2U) + ((__BAUD__)/2U)) / (__BAUD__)) 1247 1248 /** @brief BRR division operation to set BRR register in 16-bit oversampling mode. 1249 * @param __PCLK__ UART clock. 1250 * @param __BAUD__ Baud rate set by the user. 1251 * @param __CLOCKPRESCALER__ UART prescaler value. 1252 * @retval Division result 1253 */ 1254 #define UART_DIV_SAMPLING16(__PCLK__, __BAUD__, __CLOCKPRESCALER__) \ 1255 ((((__PCLK__)/UARTPrescTable[(__CLOCKPRESCALER__)]) + ((__BAUD__)/2U)) / (__BAUD__)) 1256 1257 /** @brief Check whether or not UART instance is Low Power UART. 1258 * @param __HANDLE__ specifies the UART Handle. 1259 * @retval SET (instance is LPUART) or RESET (instance isn't LPUART) 1260 */ 1261 #define UART_INSTANCE_LOWPOWER(__HANDLE__) (IS_LPUART_INSTANCE((__HANDLE__)->Instance)) 1262 1263 /** @brief Check UART Baud rate. 1264 * @param __BAUDRATE__ Baudrate specified by the user. 1265 * The maximum Baud Rate is derived from the maximum clock on G4 (i.e. 150 MHz) 1266 * divided by the smallest oversampling used on the USART (i.e. 8) 1267 * @retval SET (__BAUDRATE__ is valid) or RESET (__BAUDRATE__ is invalid) 1268 */ 1269 #define IS_UART_BAUDRATE(__BAUDRATE__) ((__BAUDRATE__) < 18750001U) 1270 1271 /** @brief Check UART assertion time. 1272 * @param __TIME__ 5-bit value assertion time. 1273 * @retval Test result (TRUE or FALSE). 1274 */ 1275 #define IS_UART_ASSERTIONTIME(__TIME__) ((__TIME__) <= 0x1FU) 1276 1277 /** @brief Check UART deassertion time. 1278 * @param __TIME__ 5-bit value deassertion time. 1279 * @retval Test result (TRUE or FALSE). 1280 */ 1281 #define IS_UART_DEASSERTIONTIME(__TIME__) ((__TIME__) <= 0x1FU) 1282 1283 /** 1284 * @brief Ensure that UART frame number of stop bits is valid. 1285 * @param __STOPBITS__ UART frame number of stop bits. 1286 * @retval SET (__STOPBITS__ is valid) or RESET (__STOPBITS__ is invalid) 1287 */ 1288 #define IS_UART_STOPBITS(__STOPBITS__) (((__STOPBITS__) == UART_STOPBITS_0_5) || \ 1289 ((__STOPBITS__) == UART_STOPBITS_1) || \ 1290 ((__STOPBITS__) == UART_STOPBITS_1_5) || \ 1291 ((__STOPBITS__) == UART_STOPBITS_2)) 1292 1293 /** 1294 * @brief Ensure that LPUART frame number of stop bits is valid. 1295 * @param __STOPBITS__ LPUART frame number of stop bits. 1296 * @retval SET (__STOPBITS__ is valid) or RESET (__STOPBITS__ is invalid) 1297 */ 1298 #define IS_LPUART_STOPBITS(__STOPBITS__) (((__STOPBITS__) == UART_STOPBITS_1) || \ 1299 ((__STOPBITS__) == UART_STOPBITS_2)) 1300 1301 /** 1302 * @brief Ensure that UART frame parity is valid. 1303 * @param __PARITY__ UART frame parity. 1304 * @retval SET (__PARITY__ is valid) or RESET (__PARITY__ is invalid) 1305 */ 1306 #define IS_UART_PARITY(__PARITY__) (((__PARITY__) == UART_PARITY_NONE) || \ 1307 ((__PARITY__) == UART_PARITY_EVEN) || \ 1308 ((__PARITY__) == UART_PARITY_ODD)) 1309 1310 /** 1311 * @brief Ensure that UART hardware flow control is valid. 1312 * @param __CONTROL__ UART hardware flow control. 1313 * @retval SET (__CONTROL__ is valid) or RESET (__CONTROL__ is invalid) 1314 */ 1315 #define IS_UART_HARDWARE_FLOW_CONTROL(__CONTROL__)\ 1316 (((__CONTROL__) == UART_HWCONTROL_NONE) || \ 1317 ((__CONTROL__) == UART_HWCONTROL_RTS) || \ 1318 ((__CONTROL__) == UART_HWCONTROL_CTS) || \ 1319 ((__CONTROL__) == UART_HWCONTROL_RTS_CTS)) 1320 1321 /** 1322 * @brief Ensure that UART communication mode is valid. 1323 * @param __MODE__ UART communication mode. 1324 * @retval SET (__MODE__ is valid) or RESET (__MODE__ is invalid) 1325 */ 1326 #define IS_UART_MODE(__MODE__) ((((__MODE__) & (~((uint32_t)(UART_MODE_TX_RX)))) == 0x00U) && ((__MODE__) != 0x00U)) 1327 1328 /** 1329 * @brief Ensure that UART state is valid. 1330 * @param __STATE__ UART state. 1331 * @retval SET (__STATE__ is valid) or RESET (__STATE__ is invalid) 1332 */ 1333 #define IS_UART_STATE(__STATE__) (((__STATE__) == UART_STATE_DISABLE) || \ 1334 ((__STATE__) == UART_STATE_ENABLE)) 1335 1336 /** 1337 * @brief Ensure that UART oversampling is valid. 1338 * @param __SAMPLING__ UART oversampling. 1339 * @retval SET (__SAMPLING__ is valid) or RESET (__SAMPLING__ is invalid) 1340 */ 1341 #define IS_UART_OVERSAMPLING(__SAMPLING__) (((__SAMPLING__) == UART_OVERSAMPLING_16) || \ 1342 ((__SAMPLING__) == UART_OVERSAMPLING_8)) 1343 1344 /** 1345 * @brief Ensure that UART frame sampling is valid. 1346 * @param __ONEBIT__ UART frame sampling. 1347 * @retval SET (__ONEBIT__ is valid) or RESET (__ONEBIT__ is invalid) 1348 */ 1349 #define IS_UART_ONE_BIT_SAMPLE(__ONEBIT__) (((__ONEBIT__) == UART_ONE_BIT_SAMPLE_DISABLE) || \ 1350 ((__ONEBIT__) == UART_ONE_BIT_SAMPLE_ENABLE)) 1351 1352 /** 1353 * @brief Ensure that UART auto Baud rate detection mode is valid. 1354 * @param __MODE__ UART auto Baud rate detection mode. 1355 * @retval SET (__MODE__ is valid) or RESET (__MODE__ is invalid) 1356 */ 1357 #define IS_UART_ADVFEATURE_AUTOBAUDRATEMODE(__MODE__) (((__MODE__) == UART_ADVFEATURE_AUTOBAUDRATE_ONSTARTBIT) || \ 1358 ((__MODE__) == UART_ADVFEATURE_AUTOBAUDRATE_ONFALLINGEDGE) || \ 1359 ((__MODE__) == UART_ADVFEATURE_AUTOBAUDRATE_ON0X7FFRAME) || \ 1360 ((__MODE__) == UART_ADVFEATURE_AUTOBAUDRATE_ON0X55FRAME)) 1361 1362 /** 1363 * @brief Ensure that UART receiver timeout setting is valid. 1364 * @param __TIMEOUT__ UART receiver timeout setting. 1365 * @retval SET (__TIMEOUT__ is valid) or RESET (__TIMEOUT__ is invalid) 1366 */ 1367 #define IS_UART_RECEIVER_TIMEOUT(__TIMEOUT__) (((__TIMEOUT__) == UART_RECEIVER_TIMEOUT_DISABLE) || \ 1368 ((__TIMEOUT__) == UART_RECEIVER_TIMEOUT_ENABLE)) 1369 1370 /** @brief Check the receiver timeout value. 1371 * @note The maximum UART receiver timeout value is 0xFFFFFF. 1372 * @param __TIMEOUTVALUE__ receiver timeout value. 1373 * @retval Test result (TRUE or FALSE) 1374 */ 1375 #define IS_UART_RECEIVER_TIMEOUT_VALUE(__TIMEOUTVALUE__) ((__TIMEOUTVALUE__) <= 0xFFFFFFU) 1376 1377 /** 1378 * @brief Ensure that UART LIN state is valid. 1379 * @param __LIN__ UART LIN state. 1380 * @retval SET (__LIN__ is valid) or RESET (__LIN__ is invalid) 1381 */ 1382 #define IS_UART_LIN(__LIN__) (((__LIN__) == UART_LIN_DISABLE) || \ 1383 ((__LIN__) == UART_LIN_ENABLE)) 1384 1385 /** 1386 * @brief Ensure that UART LIN break detection length is valid. 1387 * @param __LENGTH__ UART LIN break detection length. 1388 * @retval SET (__LENGTH__ is valid) or RESET (__LENGTH__ is invalid) 1389 */ 1390 #define IS_UART_LIN_BREAK_DETECT_LENGTH(__LENGTH__) (((__LENGTH__) == UART_LINBREAKDETECTLENGTH_10B) || \ 1391 ((__LENGTH__) == UART_LINBREAKDETECTLENGTH_11B)) 1392 1393 /** 1394 * @brief Ensure that UART DMA TX state is valid. 1395 * @param __DMATX__ UART DMA TX state. 1396 * @retval SET (__DMATX__ is valid) or RESET (__DMATX__ is invalid) 1397 */ 1398 #define IS_UART_DMA_TX(__DMATX__) (((__DMATX__) == UART_DMA_TX_DISABLE) || \ 1399 ((__DMATX__) == UART_DMA_TX_ENABLE)) 1400 1401 /** 1402 * @brief Ensure that UART DMA RX state is valid. 1403 * @param __DMARX__ UART DMA RX state. 1404 * @retval SET (__DMARX__ is valid) or RESET (__DMARX__ is invalid) 1405 */ 1406 #define IS_UART_DMA_RX(__DMARX__) (((__DMARX__) == UART_DMA_RX_DISABLE) || \ 1407 ((__DMARX__) == UART_DMA_RX_ENABLE)) 1408 1409 /** 1410 * @brief Ensure that UART half-duplex state is valid. 1411 * @param __HDSEL__ UART half-duplex state. 1412 * @retval SET (__HDSEL__ is valid) or RESET (__HDSEL__ is invalid) 1413 */ 1414 #define IS_UART_HALF_DUPLEX(__HDSEL__) (((__HDSEL__) == UART_HALF_DUPLEX_DISABLE) || \ 1415 ((__HDSEL__) == UART_HALF_DUPLEX_ENABLE)) 1416 1417 /** 1418 * @brief Ensure that UART wake-up method is valid. 1419 * @param __WAKEUP__ UART wake-up method . 1420 * @retval SET (__WAKEUP__ is valid) or RESET (__WAKEUP__ is invalid) 1421 */ 1422 #define IS_UART_WAKEUPMETHOD(__WAKEUP__) (((__WAKEUP__) == UART_WAKEUPMETHOD_IDLELINE) || \ 1423 ((__WAKEUP__) == UART_WAKEUPMETHOD_ADDRESSMARK)) 1424 1425 /** 1426 * @brief Ensure that UART request parameter is valid. 1427 * @param __PARAM__ UART request parameter. 1428 * @retval SET (__PARAM__ is valid) or RESET (__PARAM__ is invalid) 1429 */ 1430 #define IS_UART_REQUEST_PARAMETER(__PARAM__) (((__PARAM__) == UART_AUTOBAUD_REQUEST) || \ 1431 ((__PARAM__) == UART_SENDBREAK_REQUEST) || \ 1432 ((__PARAM__) == UART_MUTE_MODE_REQUEST) || \ 1433 ((__PARAM__) == UART_RXDATA_FLUSH_REQUEST) || \ 1434 ((__PARAM__) == UART_TXDATA_FLUSH_REQUEST)) 1435 1436 /** 1437 * @brief Ensure that UART advanced features initialization is valid. 1438 * @param __INIT__ UART advanced features initialization. 1439 * @retval SET (__INIT__ is valid) or RESET (__INIT__ is invalid) 1440 */ 1441 #define IS_UART_ADVFEATURE_INIT(__INIT__) ((__INIT__) <= (UART_ADVFEATURE_NO_INIT | \ 1442 UART_ADVFEATURE_TXINVERT_INIT | \ 1443 UART_ADVFEATURE_RXINVERT_INIT | \ 1444 UART_ADVFEATURE_DATAINVERT_INIT | \ 1445 UART_ADVFEATURE_SWAP_INIT | \ 1446 UART_ADVFEATURE_RXOVERRUNDISABLE_INIT | \ 1447 UART_ADVFEATURE_DMADISABLEONERROR_INIT | \ 1448 UART_ADVFEATURE_AUTOBAUDRATE_INIT | \ 1449 UART_ADVFEATURE_MSBFIRST_INIT)) 1450 1451 /** 1452 * @brief Ensure that UART frame TX inversion setting is valid. 1453 * @param __TXINV__ UART frame TX inversion setting. 1454 * @retval SET (__TXINV__ is valid) or RESET (__TXINV__ is invalid) 1455 */ 1456 #define IS_UART_ADVFEATURE_TXINV(__TXINV__) (((__TXINV__) == UART_ADVFEATURE_TXINV_DISABLE) || \ 1457 ((__TXINV__) == UART_ADVFEATURE_TXINV_ENABLE)) 1458 1459 /** 1460 * @brief Ensure that UART frame RX inversion setting is valid. 1461 * @param __RXINV__ UART frame RX inversion setting. 1462 * @retval SET (__RXINV__ is valid) or RESET (__RXINV__ is invalid) 1463 */ 1464 #define IS_UART_ADVFEATURE_RXINV(__RXINV__) (((__RXINV__) == UART_ADVFEATURE_RXINV_DISABLE) || \ 1465 ((__RXINV__) == UART_ADVFEATURE_RXINV_ENABLE)) 1466 1467 /** 1468 * @brief Ensure that UART frame data inversion setting is valid. 1469 * @param __DATAINV__ UART frame data inversion setting. 1470 * @retval SET (__DATAINV__ is valid) or RESET (__DATAINV__ is invalid) 1471 */ 1472 #define IS_UART_ADVFEATURE_DATAINV(__DATAINV__) (((__DATAINV__) == UART_ADVFEATURE_DATAINV_DISABLE) || \ 1473 ((__DATAINV__) == UART_ADVFEATURE_DATAINV_ENABLE)) 1474 1475 /** 1476 * @brief Ensure that UART frame RX/TX pins swap setting is valid. 1477 * @param __SWAP__ UART frame RX/TX pins swap setting. 1478 * @retval SET (__SWAP__ is valid) or RESET (__SWAP__ is invalid) 1479 */ 1480 #define IS_UART_ADVFEATURE_SWAP(__SWAP__) (((__SWAP__) == UART_ADVFEATURE_SWAP_DISABLE) || \ 1481 ((__SWAP__) == UART_ADVFEATURE_SWAP_ENABLE)) 1482 1483 /** 1484 * @brief Ensure that UART frame overrun setting is valid. 1485 * @param __OVERRUN__ UART frame overrun setting. 1486 * @retval SET (__OVERRUN__ is valid) or RESET (__OVERRUN__ is invalid) 1487 */ 1488 #define IS_UART_OVERRUN(__OVERRUN__) (((__OVERRUN__) == UART_ADVFEATURE_OVERRUN_ENABLE) || \ 1489 ((__OVERRUN__) == UART_ADVFEATURE_OVERRUN_DISABLE)) 1490 1491 /** 1492 * @brief Ensure that UART auto Baud rate state is valid. 1493 * @param __AUTOBAUDRATE__ UART auto Baud rate state. 1494 * @retval SET (__AUTOBAUDRATE__ is valid) or RESET (__AUTOBAUDRATE__ is invalid) 1495 */ 1496 #define IS_UART_ADVFEATURE_AUTOBAUDRATE(__AUTOBAUDRATE__) (((__AUTOBAUDRATE__) == \ 1497 UART_ADVFEATURE_AUTOBAUDRATE_DISABLE) || \ 1498 ((__AUTOBAUDRATE__) == UART_ADVFEATURE_AUTOBAUDRATE_ENABLE)) 1499 1500 /** 1501 * @brief Ensure that UART DMA enabling or disabling on error setting is valid. 1502 * @param __DMA__ UART DMA enabling or disabling on error setting. 1503 * @retval SET (__DMA__ is valid) or RESET (__DMA__ is invalid) 1504 */ 1505 #define IS_UART_ADVFEATURE_DMAONRXERROR(__DMA__) (((__DMA__) == UART_ADVFEATURE_DMA_ENABLEONRXERROR) || \ 1506 ((__DMA__) == UART_ADVFEATURE_DMA_DISABLEONRXERROR)) 1507 1508 /** 1509 * @brief Ensure that UART frame MSB first setting is valid. 1510 * @param __MSBFIRST__ UART frame MSB first setting. 1511 * @retval SET (__MSBFIRST__ is valid) or RESET (__MSBFIRST__ is invalid) 1512 */ 1513 #define IS_UART_ADVFEATURE_MSBFIRST(__MSBFIRST__) (((__MSBFIRST__) == UART_ADVFEATURE_MSBFIRST_DISABLE) || \ 1514 ((__MSBFIRST__) == UART_ADVFEATURE_MSBFIRST_ENABLE)) 1515 1516 /** 1517 * @brief Ensure that UART stop mode state is valid. 1518 * @param __STOPMODE__ UART stop mode state. 1519 * @retval SET (__STOPMODE__ is valid) or RESET (__STOPMODE__ is invalid) 1520 */ 1521 #define IS_UART_ADVFEATURE_STOPMODE(__STOPMODE__) (((__STOPMODE__) == UART_ADVFEATURE_STOPMODE_DISABLE) || \ 1522 ((__STOPMODE__) == UART_ADVFEATURE_STOPMODE_ENABLE)) 1523 1524 /** 1525 * @brief Ensure that UART mute mode state is valid. 1526 * @param __MUTE__ UART mute mode state. 1527 * @retval SET (__MUTE__ is valid) or RESET (__MUTE__ is invalid) 1528 */ 1529 #define IS_UART_MUTE_MODE(__MUTE__) (((__MUTE__) == UART_ADVFEATURE_MUTEMODE_DISABLE) || \ 1530 ((__MUTE__) == UART_ADVFEATURE_MUTEMODE_ENABLE)) 1531 1532 /** 1533 * @brief Ensure that UART wake-up selection is valid. 1534 * @param __WAKE__ UART wake-up selection. 1535 * @retval SET (__WAKE__ is valid) or RESET (__WAKE__ is invalid) 1536 */ 1537 #define IS_UART_WAKEUP_SELECTION(__WAKE__) (((__WAKE__) == UART_WAKEUP_ON_ADDRESS) || \ 1538 ((__WAKE__) == UART_WAKEUP_ON_STARTBIT) || \ 1539 ((__WAKE__) == UART_WAKEUP_ON_READDATA_NONEMPTY)) 1540 1541 /** 1542 * @brief Ensure that UART driver enable polarity is valid. 1543 * @param __POLARITY__ UART driver enable polarity. 1544 * @retval SET (__POLARITY__ is valid) or RESET (__POLARITY__ is invalid) 1545 */ 1546 #define IS_UART_DE_POLARITY(__POLARITY__) (((__POLARITY__) == UART_DE_POLARITY_HIGH) || \ 1547 ((__POLARITY__) == UART_DE_POLARITY_LOW)) 1548 1549 /** 1550 * @brief Ensure that UART Prescaler is valid. 1551 * @param __CLOCKPRESCALER__ UART Prescaler value. 1552 * @retval SET (__CLOCKPRESCALER__ is valid) or RESET (__CLOCKPRESCALER__ is invalid) 1553 */ 1554 #define IS_UART_PRESCALER(__CLOCKPRESCALER__) (((__CLOCKPRESCALER__) == UART_PRESCALER_DIV1) || \ 1555 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV2) || \ 1556 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV4) || \ 1557 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV6) || \ 1558 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV8) || \ 1559 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV10) || \ 1560 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV12) || \ 1561 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV16) || \ 1562 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV32) || \ 1563 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV64) || \ 1564 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV128) || \ 1565 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV256)) 1566 1567 /** 1568 * @} 1569 */ 1570 1571 /* Include UART HAL Extended module */ 1572 #include "stm32g4xx_hal_uart_ex.h" 1573 1574 /* Exported functions --------------------------------------------------------*/ 1575 /** @addtogroup UART_Exported_Functions UART Exported Functions 1576 * @{ 1577 */ 1578 1579 /** @addtogroup UART_Exported_Functions_Group1 Initialization and de-initialization functions 1580 * @{ 1581 */ 1582 1583 /* Initialization and de-initialization functions ****************************/ 1584 HAL_StatusTypeDef HAL_UART_Init(UART_HandleTypeDef *huart); 1585 HAL_StatusTypeDef HAL_HalfDuplex_Init(UART_HandleTypeDef *huart); 1586 HAL_StatusTypeDef HAL_LIN_Init(UART_HandleTypeDef *huart, uint32_t BreakDetectLength); 1587 HAL_StatusTypeDef HAL_MultiProcessor_Init(UART_HandleTypeDef *huart, uint8_t Address, uint32_t WakeUpMethod); 1588 HAL_StatusTypeDef HAL_UART_DeInit(UART_HandleTypeDef *huart); 1589 void HAL_UART_MspInit(UART_HandleTypeDef *huart); 1590 void HAL_UART_MspDeInit(UART_HandleTypeDef *huart); 1591 1592 /* Callbacks Register/UnRegister functions ***********************************/ 1593 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) 1594 HAL_StatusTypeDef HAL_UART_RegisterCallback(UART_HandleTypeDef *huart, HAL_UART_CallbackIDTypeDef CallbackID, 1595 pUART_CallbackTypeDef pCallback); 1596 HAL_StatusTypeDef HAL_UART_UnRegisterCallback(UART_HandleTypeDef *huart, HAL_UART_CallbackIDTypeDef CallbackID); 1597 1598 HAL_StatusTypeDef HAL_UART_RegisterRxEventCallback(UART_HandleTypeDef *huart, pUART_RxEventCallbackTypeDef pCallback); 1599 HAL_StatusTypeDef HAL_UART_UnRegisterRxEventCallback(UART_HandleTypeDef *huart); 1600 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ 1601 1602 /** 1603 * @} 1604 */ 1605 1606 /** @addtogroup UART_Exported_Functions_Group2 IO operation functions 1607 * @{ 1608 */ 1609 1610 /* IO operation functions *****************************************************/ 1611 HAL_StatusTypeDef HAL_UART_Transmit(UART_HandleTypeDef *huart, const uint8_t *pData, uint16_t Size, uint32_t Timeout); 1612 HAL_StatusTypeDef HAL_UART_Receive(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size, uint32_t Timeout); 1613 HAL_StatusTypeDef HAL_UART_Transmit_IT(UART_HandleTypeDef *huart, const uint8_t *pData, uint16_t Size); 1614 HAL_StatusTypeDef HAL_UART_Receive_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size); 1615 HAL_StatusTypeDef HAL_UART_Transmit_DMA(UART_HandleTypeDef *huart, const uint8_t *pData, uint16_t Size); 1616 HAL_StatusTypeDef HAL_UART_Receive_DMA(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size); 1617 HAL_StatusTypeDef HAL_UART_DMAPause(UART_HandleTypeDef *huart); 1618 HAL_StatusTypeDef HAL_UART_DMAResume(UART_HandleTypeDef *huart); 1619 HAL_StatusTypeDef HAL_UART_DMAStop(UART_HandleTypeDef *huart); 1620 /* Transfer Abort functions */ 1621 HAL_StatusTypeDef HAL_UART_Abort(UART_HandleTypeDef *huart); 1622 HAL_StatusTypeDef HAL_UART_AbortTransmit(UART_HandleTypeDef *huart); 1623 HAL_StatusTypeDef HAL_UART_AbortReceive(UART_HandleTypeDef *huart); 1624 HAL_StatusTypeDef HAL_UART_Abort_IT(UART_HandleTypeDef *huart); 1625 HAL_StatusTypeDef HAL_UART_AbortTransmit_IT(UART_HandleTypeDef *huart); 1626 HAL_StatusTypeDef HAL_UART_AbortReceive_IT(UART_HandleTypeDef *huart); 1627 1628 void HAL_UART_IRQHandler(UART_HandleTypeDef *huart); 1629 void HAL_UART_TxHalfCpltCallback(UART_HandleTypeDef *huart); 1630 void HAL_UART_TxCpltCallback(UART_HandleTypeDef *huart); 1631 void HAL_UART_RxHalfCpltCallback(UART_HandleTypeDef *huart); 1632 void HAL_UART_RxCpltCallback(UART_HandleTypeDef *huart); 1633 void HAL_UART_ErrorCallback(UART_HandleTypeDef *huart); 1634 void HAL_UART_AbortCpltCallback(UART_HandleTypeDef *huart); 1635 void HAL_UART_AbortTransmitCpltCallback(UART_HandleTypeDef *huart); 1636 void HAL_UART_AbortReceiveCpltCallback(UART_HandleTypeDef *huart); 1637 1638 void HAL_UARTEx_RxEventCallback(UART_HandleTypeDef *huart, uint16_t Size); 1639 1640 /** 1641 * @} 1642 */ 1643 1644 /** @addtogroup UART_Exported_Functions_Group3 Peripheral Control functions 1645 * @{ 1646 */ 1647 1648 /* Peripheral Control functions ************************************************/ 1649 void HAL_UART_ReceiverTimeout_Config(UART_HandleTypeDef *huart, uint32_t TimeoutValue); 1650 HAL_StatusTypeDef HAL_UART_EnableReceiverTimeout(UART_HandleTypeDef *huart); 1651 HAL_StatusTypeDef HAL_UART_DisableReceiverTimeout(UART_HandleTypeDef *huart); 1652 1653 HAL_StatusTypeDef HAL_LIN_SendBreak(UART_HandleTypeDef *huart); 1654 HAL_StatusTypeDef HAL_MultiProcessor_EnableMuteMode(UART_HandleTypeDef *huart); 1655 HAL_StatusTypeDef HAL_MultiProcessor_DisableMuteMode(UART_HandleTypeDef *huart); 1656 void HAL_MultiProcessor_EnterMuteMode(UART_HandleTypeDef *huart); 1657 HAL_StatusTypeDef HAL_HalfDuplex_EnableTransmitter(UART_HandleTypeDef *huart); 1658 HAL_StatusTypeDef HAL_HalfDuplex_EnableReceiver(UART_HandleTypeDef *huart); 1659 1660 /** 1661 * @} 1662 */ 1663 1664 /** @addtogroup UART_Exported_Functions_Group4 Peripheral State and Error functions 1665 * @{ 1666 */ 1667 1668 /* Peripheral State and Errors functions **************************************************/ 1669 HAL_UART_StateTypeDef HAL_UART_GetState(UART_HandleTypeDef *huart); 1670 uint32_t HAL_UART_GetError(UART_HandleTypeDef *huart); 1671 1672 /** 1673 * @} 1674 */ 1675 1676 /** 1677 * @} 1678 */ 1679 1680 /* Private functions -----------------------------------------------------------*/ 1681 /** @addtogroup UART_Private_Functions UART Private Functions 1682 * @{ 1683 */ 1684 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) 1685 void UART_InitCallbacksToDefault(UART_HandleTypeDef *huart); 1686 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ 1687 HAL_StatusTypeDef UART_SetConfig(UART_HandleTypeDef *huart); 1688 HAL_StatusTypeDef UART_CheckIdleState(UART_HandleTypeDef *huart); 1689 HAL_StatusTypeDef UART_WaitOnFlagUntilTimeout(UART_HandleTypeDef *huart, uint32_t Flag, FlagStatus Status, 1690 uint32_t Tickstart, uint32_t Timeout); 1691 void UART_AdvFeatureConfig(UART_HandleTypeDef *huart); 1692 HAL_StatusTypeDef UART_Start_Receive_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size); 1693 HAL_StatusTypeDef UART_Start_Receive_DMA(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size); 1694 1695 /** 1696 * @} 1697 */ 1698 1699 /* Private variables -----------------------------------------------------------*/ 1700 /** @defgroup UART_Private_variables UART Private variables 1701 * @{ 1702 */ 1703 /* Prescaler Table used in BRR computation macros. 1704 Declared as extern here to allow use of private UART macros, outside of HAL UART functions */ 1705 extern const uint16_t UARTPrescTable[12]; 1706 /** 1707 * @} 1708 */ 1709 1710 /** 1711 * @} 1712 */ 1713 1714 /** 1715 * @} 1716 */ 1717 1718 #ifdef __cplusplus 1719 } 1720 #endif 1721 1722 #endif /* STM32G4xx_HAL_UART_H */ 1723 1724
