1 /** 2 ****************************************************************************** 3 * @file stm32g4xx_hal_sai.h 4 * @author MCD Application Team 5 * @brief Header file of SAI HAL module. 6 ****************************************************************************** 7 * @attention 8 * 9 * Copyright (c) 2019 STMicroelectronics. 10 * All rights reserved. 11 * 12 * This software is licensed under terms that can be found in the LICENSE file 13 * in the root directory of this software component. 14 * If no LICENSE file comes with this software, it is provided AS-IS. 15 * 16 ****************************************************************************** 17 */ 18 19 /* Define to prevent recursive inclusion -------------------------------------*/ 20 #ifndef STM32G4xx_HAL_SAI_H 21 #define STM32G4xx_HAL_SAI_H 22 23 #ifdef __cplusplus 24 extern "C" { 25 #endif 26 27 /* Includes ------------------------------------------------------------------*/ 28 #include "stm32g4xx_hal_def.h" 29 30 /** @addtogroup STM32G4xx_HAL_Driver 31 * @{ 32 */ 33 34 /** @addtogroup SAI 35 * @{ 36 */ 37 38 /* Exported types ------------------------------------------------------------*/ 39 /** @defgroup SAI_Exported_Types SAI Exported Types 40 * @{ 41 */ 42 43 /** 44 * @brief HAL State structures definition 45 */ 46 typedef enum 47 { 48 HAL_SAI_STATE_RESET = 0x00U, /*!< SAI not yet initialized or disabled */ 49 HAL_SAI_STATE_READY = 0x01U, /*!< SAI initialized and ready for use */ 50 HAL_SAI_STATE_BUSY = 0x02U, /*!< SAI internal process is ongoing */ 51 HAL_SAI_STATE_BUSY_TX = 0x12U, /*!< Data transmission process is ongoing */ 52 HAL_SAI_STATE_BUSY_RX = 0x22U, /*!< Data reception process is ongoing */ 53 } HAL_SAI_StateTypeDef; 54 55 /** 56 * @brief SAI Callback prototype 57 */ 58 typedef void (*SAIcallback)(void); 59 60 /** @defgroup SAI_PDM_Structure_definition SAI PDM Structure definition 61 * @brief SAI PDM Init structure definition 62 * @{ 63 */ 64 typedef struct 65 { 66 FunctionalState Activation; /*!< Enable/disable PDM interface */ 67 uint32_t MicPairsNbr; /*!< Specifies the number of microphone pairs used. 68 This parameter must be a number between Min_Data = 1 and Max_Data = 3. */ 69 uint32_t ClockEnable; /*!< Specifies which clock must be enabled. 70 This parameter can be a values combination of @ref SAI_PDM_ClockEnable */ 71 } SAI_PdmInitTypeDef; 72 /** 73 * @} 74 */ 75 76 /** @defgroup SAI_Init_Structure_definition SAI Init Structure definition 77 * @brief SAI Init Structure definition 78 * @{ 79 */ 80 typedef struct 81 { 82 uint32_t AudioMode; /*!< Specifies the SAI Block audio Mode. 83 This parameter can be a value of @ref SAI_Block_Mode */ 84 85 uint32_t Synchro; /*!< Specifies SAI Block synchronization 86 This parameter can be a value of @ref SAI_Block_Synchronization */ 87 88 uint32_t SynchroExt; /*!< Specifies SAI external output synchronization, this setup is common 89 for BlockA and BlockB 90 This parameter can be a value of @ref SAI_Block_SyncExt 91 @note If both audio blocks of same SAI are used, this parameter has 92 to be set to the same value for each audio block */ 93 94 uint32_t MckOutput; /*!< Specifies whether master clock output will be generated or not. 95 This parameter can be a value of @ref SAI_Block_MckOutput */ 96 97 uint32_t OutputDrive; /*!< Specifies when SAI Block outputs are driven. 98 This parameter can be a value of @ref SAI_Block_Output_Drive 99 @note This value has to be set before enabling the audio block 100 but after the audio block configuration. */ 101 102 uint32_t NoDivider; /*!< Specifies whether master clock will be divided or not. 103 This parameter can be a value of @ref SAI_Block_NoDivider 104 @note If bit NODIV in the SAI_xCR1 register is cleared, the frame length 105 should be aligned to a number equal to a power of 2, from 8 to 256. 106 If bit NODIV in the SAI_xCR1 register is set, the frame length can 107 take any of the values from 8 to 256. */ 108 109 uint32_t FIFOThreshold; /*!< Specifies SAI Block FIFO threshold. 110 This parameter can be a value of @ref SAI_Block_Fifo_Threshold */ 111 112 uint32_t AudioFrequency; /*!< Specifies the audio frequency sampling. 113 This parameter can be a value of @ref SAI_Audio_Frequency */ 114 115 uint32_t Mckdiv; /*!< Specifies the master clock divider. 116 This parameter must be a number between Min_Data = 0 and Max_Data = 63. 117 @note This parameter is used only if AudioFrequency is set to 118 SAI_AUDIO_FREQUENCY_MCKDIV otherwise it is internally computed. */ 119 120 uint32_t MckOverSampling; /*!< Specifies the master clock oversampling. 121 This parameter can be a value of @ref SAI_Block_Mck_OverSampling */ 122 123 uint32_t MonoStereoMode; /*!< Specifies if the mono or stereo mode is selected. 124 This parameter can be a value of @ref SAI_Mono_Stereo_Mode */ 125 126 uint32_t CompandingMode; /*!< Specifies the companding mode type. 127 This parameter can be a value of @ref SAI_Block_Companding_Mode */ 128 129 uint32_t TriState; /*!< Specifies the companding mode type. 130 This parameter can be a value of @ref SAI_TRIState_Management */ 131 132 SAI_PdmInitTypeDef PdmInit; /*!< Specifies the PDM configuration. */ 133 134 /* This part of the structure is automatically filled if your are using the high level initialisation 135 function HAL_SAI_InitProtocol */ 136 137 uint32_t Protocol; /*!< Specifies the SAI Block protocol. 138 This parameter can be a value of @ref SAI_Block_Protocol */ 139 140 uint32_t DataSize; /*!< Specifies the SAI Block data size. 141 This parameter can be a value of @ref SAI_Block_Data_Size */ 142 143 uint32_t FirstBit; /*!< Specifies whether data transfers start from MSB or LSB bit. 144 This parameter can be a value of @ref SAI_Block_MSB_LSB_transmission */ 145 146 uint32_t ClockStrobing; /*!< Specifies the SAI Block clock strobing edge sensitivity. 147 This parameter can be a value of @ref SAI_Block_Clock_Strobing */ 148 } SAI_InitTypeDef; 149 /** 150 * @} 151 */ 152 153 /** @defgroup SAI_Frame_Structure_definition SAI Frame Structure definition 154 * @brief SAI Frame Init structure definition 155 * @note For SPDIF and AC97 protocol, these parameters are not used (set by hardware). 156 * @{ 157 */ 158 typedef struct 159 { 160 161 uint32_t FrameLength; /*!< Specifies the Frame length, the number of SCK clocks for each audio frame. 162 This parameter must be a number between Min_Data = 8 and Max_Data = 256. 163 @note If master clock MCLK_x pin is declared as an output, the frame length 164 should be aligned to a number equal to power of 2 in order to keep 165 in an audio frame, an integer number of MCLK pulses by bit Clock. */ 166 167 uint32_t ActiveFrameLength; /*!< Specifies the Frame synchronization active level length. 168 This Parameter specifies the length in number of bit clock (SCK + 1) 169 of the active level of FS signal in audio frame. 170 This parameter must be a number between Min_Data = 1 and Max_Data = 128 */ 171 172 uint32_t FSDefinition; /*!< Specifies the Frame synchronization definition. 173 This parameter can be a value of @ref SAI_Block_FS_Definition */ 174 175 uint32_t FSPolarity; /*!< Specifies the Frame synchronization Polarity. 176 This parameter can be a value of @ref SAI_Block_FS_Polarity */ 177 178 uint32_t FSOffset; /*!< Specifies the Frame synchronization Offset. 179 This parameter can be a value of @ref SAI_Block_FS_Offset */ 180 181 } SAI_FrameInitTypeDef; 182 /** 183 * @} 184 */ 185 186 /** @defgroup SAI_Slot_Structure_definition SAI Slot Structure definition 187 * @brief SAI Block Slot Init Structure definition 188 * @note For SPDIF protocol, these parameters are not used (set by hardware). 189 * @note For AC97 protocol, only SlotActive parameter is used (the others are set by hardware). 190 * @{ 191 */ 192 typedef struct 193 { 194 uint32_t FirstBitOffset; /*!< Specifies the position of first data transfer bit in the slot. 195 This parameter must be a number between Min_Data = 0 and Max_Data = 24 */ 196 197 uint32_t SlotSize; /*!< Specifies the Slot Size. 198 This parameter can be a value of @ref SAI_Block_Slot_Size */ 199 200 uint32_t SlotNumber; /*!< Specifies the number of slot in the audio frame. 201 This parameter must be a number between Min_Data = 1 and Max_Data = 16 */ 202 203 uint32_t SlotActive; /*!< Specifies the slots in audio frame that will be activated. 204 This parameter can be a value of @ref SAI_Block_Slot_Active */ 205 } SAI_SlotInitTypeDef; 206 /** 207 * @} 208 */ 209 210 /** @defgroup SAI_Handle_Structure_definition SAI Handle Structure definition 211 * @brief SAI handle Structure definition 212 * @{ 213 */ 214 typedef struct __SAI_HandleTypeDef 215 { 216 SAI_Block_TypeDef *Instance; /*!< SAI Blockx registers base address */ 217 218 SAI_InitTypeDef Init; /*!< SAI communication parameters */ 219 220 SAI_FrameInitTypeDef FrameInit; /*!< SAI Frame configuration parameters */ 221 222 SAI_SlotInitTypeDef SlotInit; /*!< SAI Slot configuration parameters */ 223 224 uint8_t *pBuffPtr; /*!< Pointer to SAI transfer Buffer */ 225 226 uint16_t XferSize; /*!< SAI transfer size */ 227 228 uint16_t XferCount; /*!< SAI transfer counter */ 229 230 DMA_HandleTypeDef *hdmatx; /*!< SAI Tx DMA handle parameters */ 231 232 DMA_HandleTypeDef *hdmarx; /*!< SAI Rx DMA handle parameters */ 233 234 SAIcallback mutecallback; /*!< SAI mute callback */ 235 236 void (*InterruptServiceRoutine)(struct __SAI_HandleTypeDef *hsai); /* function pointer for IRQ handler */ 237 238 HAL_LockTypeDef Lock; /*!< SAI locking object */ 239 240 __IO HAL_SAI_StateTypeDef State; /*!< SAI communication state */ 241 242 __IO uint32_t ErrorCode; /*!< SAI Error code */ 243 244 #if (USE_HAL_SAI_REGISTER_CALLBACKS == 1) 245 void (*RxCpltCallback)(struct __SAI_HandleTypeDef *hsai); /*!< SAI receive complete callback */ 246 void (*RxHalfCpltCallback)(struct __SAI_HandleTypeDef *hsai); /*!< SAI receive half complete callback */ 247 void (*TxCpltCallback)(struct __SAI_HandleTypeDef *hsai); /*!< SAI transmit complete callback */ 248 void (*TxHalfCpltCallback)(struct __SAI_HandleTypeDef *hsai); /*!< SAI transmit half complete callback */ 249 void (*ErrorCallback)(struct __SAI_HandleTypeDef *hsai); /*!< SAI error callback */ 250 void (*MspInitCallback)(struct __SAI_HandleTypeDef *hsai); /*!< SAI MSP init callback */ 251 void (*MspDeInitCallback)(struct __SAI_HandleTypeDef *hsai); /*!< SAI MSP de-init callback */ 252 #endif /* USE_HAL_SAI_REGISTER_CALLBACKS */ 253 } SAI_HandleTypeDef; 254 /** 255 * @} 256 */ 257 258 #if (USE_HAL_SAI_REGISTER_CALLBACKS == 1) 259 /** 260 * @brief SAI callback ID enumeration definition 261 */ 262 typedef enum 263 { 264 HAL_SAI_RX_COMPLETE_CB_ID = 0x00U, /*!< SAI receive complete callback ID */ 265 HAL_SAI_RX_HALFCOMPLETE_CB_ID = 0x01U, /*!< SAI receive half complete callback ID */ 266 HAL_SAI_TX_COMPLETE_CB_ID = 0x02U, /*!< SAI transmit complete callback ID */ 267 HAL_SAI_TX_HALFCOMPLETE_CB_ID = 0x03U, /*!< SAI transmit half complete callback ID */ 268 HAL_SAI_ERROR_CB_ID = 0x04U, /*!< SAI error callback ID */ 269 HAL_SAI_MSPINIT_CB_ID = 0x05U, /*!< SAI MSP init callback ID */ 270 HAL_SAI_MSPDEINIT_CB_ID = 0x06U /*!< SAI MSP de-init callback ID */ 271 } HAL_SAI_CallbackIDTypeDef; 272 273 /** 274 * @brief SAI callback pointer definition 275 */ 276 typedef void (*pSAI_CallbackTypeDef)(SAI_HandleTypeDef *hsai); 277 #endif /* USE_HAL_SAI_REGISTER_CALLBACKS */ 278 279 /** 280 * @} 281 */ 282 283 /* Exported constants --------------------------------------------------------*/ 284 /** @defgroup SAI_Exported_Constants SAI Exported Constants 285 * @{ 286 */ 287 288 /** @defgroup SAI_Error_Code SAI Error Code 289 * @{ 290 */ 291 #define HAL_SAI_ERROR_NONE 0x00000000U /*!< No error */ 292 #define HAL_SAI_ERROR_OVR 0x00000001U /*!< Overrun Error */ 293 #define HAL_SAI_ERROR_UDR 0x00000002U /*!< Underrun error */ 294 #define HAL_SAI_ERROR_AFSDET 0x00000004U /*!< Anticipated Frame synchronisation detection */ 295 #define HAL_SAI_ERROR_LFSDET 0x00000008U /*!< Late Frame synchronisation detection */ 296 #define HAL_SAI_ERROR_CNREADY 0x00000010U /*!< codec not ready */ 297 #define HAL_SAI_ERROR_WCKCFG 0x00000020U /*!< Wrong clock configuration */ 298 #define HAL_SAI_ERROR_TIMEOUT 0x00000040U /*!< Timeout error */ 299 #define HAL_SAI_ERROR_DMA 0x00000080U /*!< DMA error */ 300 #if (USE_HAL_SAI_REGISTER_CALLBACKS == 1) 301 #define HAL_SAI_ERROR_INVALID_CALLBACK 0x00000100U /*!< Invalid callback error */ 302 #endif /* USE_HAL_SAI_REGISTER_CALLBACKS */ 303 /** 304 * @} 305 */ 306 307 /** @defgroup SAI_Block_SyncExt SAI External synchronisation 308 * @{ 309 */ 310 #define SAI_SYNCEXT_DISABLE 0U 311 #define SAI_SYNCEXT_OUTBLOCKA_ENABLE 1U 312 #define SAI_SYNCEXT_OUTBLOCKB_ENABLE 2U 313 /** 314 * @} 315 */ 316 317 /** @defgroup SAI_Block_MckOutput SAI Block Master Clock Output 318 * @{ 319 */ 320 #define SAI_MCK_OUTPUT_DISABLE 0x00000000U 321 #define SAI_MCK_OUTPUT_ENABLE SAI_xCR1_MCKEN 322 /** 323 * @} 324 */ 325 326 /** @defgroup SAI_Protocol SAI Supported protocol 327 * @{ 328 */ 329 #define SAI_I2S_STANDARD 0U 330 #define SAI_I2S_MSBJUSTIFIED 1U 331 #define SAI_I2S_LSBJUSTIFIED 2U 332 #define SAI_PCM_LONG 3U 333 #define SAI_PCM_SHORT 4U 334 /** 335 * @} 336 */ 337 338 /** @defgroup SAI_Protocol_DataSize SAI protocol data size 339 * @{ 340 */ 341 #define SAI_PROTOCOL_DATASIZE_16BIT 0U 342 #define SAI_PROTOCOL_DATASIZE_16BITEXTENDED 1U 343 #define SAI_PROTOCOL_DATASIZE_24BIT 2U 344 #define SAI_PROTOCOL_DATASIZE_32BIT 3U 345 /** 346 * @} 347 */ 348 349 /** @defgroup SAI_Audio_Frequency SAI Audio Frequency 350 * @{ 351 */ 352 #define SAI_AUDIO_FREQUENCY_192K 192000U 353 #define SAI_AUDIO_FREQUENCY_96K 96000U 354 #define SAI_AUDIO_FREQUENCY_48K 48000U 355 #define SAI_AUDIO_FREQUENCY_44K 44100U 356 #define SAI_AUDIO_FREQUENCY_32K 32000U 357 #define SAI_AUDIO_FREQUENCY_22K 22050U 358 #define SAI_AUDIO_FREQUENCY_16K 16000U 359 #define SAI_AUDIO_FREQUENCY_11K 11025U 360 #define SAI_AUDIO_FREQUENCY_8K 8000U 361 #define SAI_AUDIO_FREQUENCY_MCKDIV 0U 362 /** 363 * @} 364 */ 365 366 /** @defgroup SAI_Block_Mck_OverSampling SAI Block Master Clock OverSampling 367 * @{ 368 */ 369 #define SAI_MCK_OVERSAMPLING_DISABLE 0x00000000U 370 #define SAI_MCK_OVERSAMPLING_ENABLE SAI_xCR1_OSR 371 /** 372 * @} 373 */ 374 375 /** @defgroup SAI_PDM_ClockEnable SAI PDM Clock Enable 376 * @{ 377 */ 378 #define SAI_PDM_CLOCK1_ENABLE SAI_PDMCR_CKEN1 379 #define SAI_PDM_CLOCK2_ENABLE SAI_PDMCR_CKEN2 380 /** 381 * @} 382 */ 383 384 /** @defgroup SAI_Block_Mode SAI Block Mode 385 * @{ 386 */ 387 #define SAI_MODEMASTER_TX 0x00000000U 388 #define SAI_MODEMASTER_RX SAI_xCR1_MODE_0 389 #define SAI_MODESLAVE_TX SAI_xCR1_MODE_1 390 #define SAI_MODESLAVE_RX (SAI_xCR1_MODE_1 | SAI_xCR1_MODE_0) 391 392 /** 393 * @} 394 */ 395 396 /** @defgroup SAI_Block_Protocol SAI Block Protocol 397 * @{ 398 */ 399 #define SAI_FREE_PROTOCOL 0x00000000U 400 #define SAI_SPDIF_PROTOCOL SAI_xCR1_PRTCFG_0 401 #define SAI_AC97_PROTOCOL SAI_xCR1_PRTCFG_1 402 /** 403 * @} 404 */ 405 406 /** @defgroup SAI_Block_Data_Size SAI Block Data Size 407 * @{ 408 */ 409 #define SAI_DATASIZE_8 SAI_xCR1_DS_1 410 #define SAI_DATASIZE_10 (SAI_xCR1_DS_1 | SAI_xCR1_DS_0) 411 #define SAI_DATASIZE_16 SAI_xCR1_DS_2 412 #define SAI_DATASIZE_20 (SAI_xCR1_DS_2 | SAI_xCR1_DS_0) 413 #define SAI_DATASIZE_24 (SAI_xCR1_DS_2 | SAI_xCR1_DS_1) 414 #define SAI_DATASIZE_32 (SAI_xCR1_DS_2 | SAI_xCR1_DS_1 | SAI_xCR1_DS_0) 415 /** 416 * @} 417 */ 418 419 /** @defgroup SAI_Block_MSB_LSB_transmission SAI Block MSB LSB transmission 420 * @{ 421 */ 422 #define SAI_FIRSTBIT_MSB 0x00000000U 423 #define SAI_FIRSTBIT_LSB SAI_xCR1_LSBFIRST 424 /** 425 * @} 426 */ 427 428 /** @defgroup SAI_Block_Clock_Strobing SAI Block Clock Strobing 429 * @{ 430 */ 431 #define SAI_CLOCKSTROBING_FALLINGEDGE 0U 432 #define SAI_CLOCKSTROBING_RISINGEDGE 1U 433 /** 434 * @} 435 */ 436 437 /** @defgroup SAI_Block_Synchronization SAI Block Synchronization 438 * @{ 439 */ 440 #define SAI_ASYNCHRONOUS 0U /*!< Asynchronous */ 441 #define SAI_SYNCHRONOUS 1U /*!< Synchronous with other block of same SAI */ 442 #define SAI_SYNCHRONOUS_EXT_SAI1 2U /*!< Synchronous with other SAI, SAI1 */ 443 #define SAI_SYNCHRONOUS_EXT_SAI2 3U /*!< Synchronous with other SAI, SAI2 */ 444 /** 445 * @} 446 */ 447 448 /** @defgroup SAI_Block_Output_Drive SAI Block Output Drive 449 * @{ 450 */ 451 #define SAI_OUTPUTDRIVE_DISABLE 0x00000000U 452 #define SAI_OUTPUTDRIVE_ENABLE SAI_xCR1_OUTDRIV 453 /** 454 * @} 455 */ 456 457 /** @defgroup SAI_Block_NoDivider SAI Block NoDivider 458 * @{ 459 */ 460 #define SAI_MASTERDIVIDER_ENABLE 0x00000000U 461 #define SAI_MASTERDIVIDER_DISABLE SAI_xCR1_NODIV 462 /** 463 * @} 464 */ 465 466 /** @defgroup SAI_Block_FS_Definition SAI Block FS Definition 467 * @{ 468 */ 469 #define SAI_FS_STARTFRAME 0x00000000U 470 #define SAI_FS_CHANNEL_IDENTIFICATION SAI_xFRCR_FSDEF 471 /** 472 * @} 473 */ 474 475 /** @defgroup SAI_Block_FS_Polarity SAI Block FS Polarity 476 * @{ 477 */ 478 #define SAI_FS_ACTIVE_LOW 0x00000000U 479 #define SAI_FS_ACTIVE_HIGH SAI_xFRCR_FSPOL 480 /** 481 * @} 482 */ 483 484 /** @defgroup SAI_Block_FS_Offset SAI Block FS Offset 485 * @{ 486 */ 487 #define SAI_FS_FIRSTBIT 0x00000000U 488 #define SAI_FS_BEFOREFIRSTBIT SAI_xFRCR_FSOFF 489 /** 490 * @} 491 */ 492 493 /** @defgroup SAI_Block_Slot_Size SAI Block Slot Size 494 * @{ 495 */ 496 #define SAI_SLOTSIZE_DATASIZE 0x00000000U 497 #define SAI_SLOTSIZE_16B SAI_xSLOTR_SLOTSZ_0 498 #define SAI_SLOTSIZE_32B SAI_xSLOTR_SLOTSZ_1 499 /** 500 * @} 501 */ 502 503 /** @defgroup SAI_Block_Slot_Active SAI Block Slot Active 504 * @{ 505 */ 506 #define SAI_SLOT_NOTACTIVE 0x00000000U 507 #define SAI_SLOTACTIVE_0 0x00000001U 508 #define SAI_SLOTACTIVE_1 0x00000002U 509 #define SAI_SLOTACTIVE_2 0x00000004U 510 #define SAI_SLOTACTIVE_3 0x00000008U 511 #define SAI_SLOTACTIVE_4 0x00000010U 512 #define SAI_SLOTACTIVE_5 0x00000020U 513 #define SAI_SLOTACTIVE_6 0x00000040U 514 #define SAI_SLOTACTIVE_7 0x00000080U 515 #define SAI_SLOTACTIVE_8 0x00000100U 516 #define SAI_SLOTACTIVE_9 0x00000200U 517 #define SAI_SLOTACTIVE_10 0x00000400U 518 #define SAI_SLOTACTIVE_11 0x00000800U 519 #define SAI_SLOTACTIVE_12 0x00001000U 520 #define SAI_SLOTACTIVE_13 0x00002000U 521 #define SAI_SLOTACTIVE_14 0x00004000U 522 #define SAI_SLOTACTIVE_15 0x00008000U 523 #define SAI_SLOTACTIVE_ALL 0x0000FFFFU 524 /** 525 * @} 526 */ 527 528 /** @defgroup SAI_Mono_Stereo_Mode SAI Mono Stereo Mode 529 * @{ 530 */ 531 #define SAI_STEREOMODE 0x00000000U 532 #define SAI_MONOMODE SAI_xCR1_MONO 533 /** 534 * @} 535 */ 536 537 /** @defgroup SAI_TRIState_Management SAI TRIState Management 538 * @{ 539 */ 540 #define SAI_OUTPUT_NOTRELEASED 0x00000000U 541 #define SAI_OUTPUT_RELEASED SAI_xCR2_TRIS 542 /** 543 * @} 544 */ 545 546 /** @defgroup SAI_Block_Fifo_Threshold SAI Block Fifo Threshold 547 * @{ 548 */ 549 #define SAI_FIFOTHRESHOLD_EMPTY 0x00000000U 550 #define SAI_FIFOTHRESHOLD_1QF SAI_xCR2_FTH_0 551 #define SAI_FIFOTHRESHOLD_HF SAI_xCR2_FTH_1 552 #define SAI_FIFOTHRESHOLD_3QF (SAI_xCR2_FTH_1 | SAI_xCR2_FTH_0) 553 #define SAI_FIFOTHRESHOLD_FULL SAI_xCR2_FTH_2 554 /** 555 * @} 556 */ 557 558 /** @defgroup SAI_Block_Companding_Mode SAI Block Companding Mode 559 * @{ 560 */ 561 #define SAI_NOCOMPANDING 0x00000000U 562 #define SAI_ULAW_1CPL_COMPANDING SAI_xCR2_COMP_1 563 #define SAI_ALAW_1CPL_COMPANDING (SAI_xCR2_COMP_1 | SAI_xCR2_COMP_0) 564 #define SAI_ULAW_2CPL_COMPANDING (SAI_xCR2_COMP_1 | SAI_xCR2_CPL) 565 #define SAI_ALAW_2CPL_COMPANDING (SAI_xCR2_COMP_1 | SAI_xCR2_COMP_0 | SAI_xCR2_CPL) 566 /** 567 * @} 568 */ 569 570 /** @defgroup SAI_Block_Mute_Value SAI Block Mute Value 571 * @{ 572 */ 573 #define SAI_ZERO_VALUE 0x00000000U 574 #define SAI_LAST_SENT_VALUE SAI_xCR2_MUTEVAL 575 /** 576 * @} 577 */ 578 579 /** @defgroup SAI_Block_Interrupts_Definition SAI Block Interrupts Definition 580 * @{ 581 */ 582 #define SAI_IT_OVRUDR SAI_xIMR_OVRUDRIE 583 #define SAI_IT_MUTEDET SAI_xIMR_MUTEDETIE 584 #define SAI_IT_WCKCFG SAI_xIMR_WCKCFGIE 585 #define SAI_IT_FREQ SAI_xIMR_FREQIE 586 #define SAI_IT_CNRDY SAI_xIMR_CNRDYIE 587 #define SAI_IT_AFSDET SAI_xIMR_AFSDETIE 588 #define SAI_IT_LFSDET SAI_xIMR_LFSDETIE 589 /** 590 * @} 591 */ 592 593 /** @defgroup SAI_Block_Flags_Definition SAI Block Flags Definition 594 * @{ 595 */ 596 #define SAI_FLAG_OVRUDR SAI_xSR_OVRUDR 597 #define SAI_FLAG_MUTEDET SAI_xSR_MUTEDET 598 #define SAI_FLAG_WCKCFG SAI_xSR_WCKCFG 599 #define SAI_FLAG_FREQ SAI_xSR_FREQ 600 #define SAI_FLAG_CNRDY SAI_xSR_CNRDY 601 #define SAI_FLAG_AFSDET SAI_xSR_AFSDET 602 #define SAI_FLAG_LFSDET SAI_xSR_LFSDET 603 /** 604 * @} 605 */ 606 607 /** @defgroup SAI_Block_Fifo_Status_Level SAI Block Fifo Status Level 608 * @{ 609 */ 610 #define SAI_FIFOSTATUS_EMPTY 0x00000000U 611 #define SAI_FIFOSTATUS_LESS1QUARTERFULL 0x00010000U 612 #define SAI_FIFOSTATUS_1QUARTERFULL 0x00020000U 613 #define SAI_FIFOSTATUS_HALFFULL 0x00030000U 614 #define SAI_FIFOSTATUS_3QUARTERFULL 0x00040000U 615 #define SAI_FIFOSTATUS_FULL 0x00050000U 616 /** 617 * @} 618 */ 619 620 /** 621 * @} 622 */ 623 624 /* Exported macro ------------------------------------------------------------*/ 625 /** @defgroup SAI_Exported_Macros SAI Exported Macros 626 * @brief macros to handle interrupts and specific configurations 627 * @{ 628 */ 629 630 /** @brief Reset SAI handle state. 631 * @param __HANDLE__ specifies the SAI Handle. 632 * @retval None 633 */ 634 #if (USE_HAL_SAI_REGISTER_CALLBACKS == 1) 635 #define __HAL_SAI_RESET_HANDLE_STATE(__HANDLE__) do{ \ 636 (__HANDLE__)->State = HAL_SAI_STATE_RESET; \ 637 (__HANDLE__)->MspInitCallback = NULL; \ 638 (__HANDLE__)->MspDeInitCallback = NULL; \ 639 } while(0) 640 #else 641 #define __HAL_SAI_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_SAI_STATE_RESET) 642 #endif /* USE_HAL_SAI_REGISTER_CALLBACKS */ 643 644 /** @brief Enable the specified SAI interrupts. 645 * @param __HANDLE__ specifies the SAI Handle. 646 * @param __INTERRUPT__ specifies the interrupt source to enable or disable. 647 * This parameter can be one of the following values: 648 * @arg SAI_IT_OVRUDR: Overrun underrun interrupt enable 649 * @arg SAI_IT_MUTEDET: Mute detection interrupt enable 650 * @arg SAI_IT_WCKCFG: Wrong Clock Configuration interrupt enable 651 * @arg SAI_IT_FREQ: FIFO request interrupt enable 652 * @arg SAI_IT_CNRDY: Codec not ready interrupt enable 653 * @arg SAI_IT_AFSDET: Anticipated frame synchronization detection interrupt enable 654 * @arg SAI_IT_LFSDET: Late frame synchronization detection interrupt enable 655 * @retval None 656 */ 657 #define __HAL_SAI_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->IMR |= (__INTERRUPT__)) 658 659 /** @brief Disable the specified SAI interrupts. 660 * @param __HANDLE__ specifies the SAI Handle. 661 * @param __INTERRUPT__ specifies the interrupt source to enable or disable. 662 * This parameter can be one of the following values: 663 * @arg SAI_IT_OVRUDR: Overrun underrun interrupt enable 664 * @arg SAI_IT_MUTEDET: Mute detection interrupt enable 665 * @arg SAI_IT_WCKCFG: Wrong Clock Configuration interrupt enable 666 * @arg SAI_IT_FREQ: FIFO request interrupt enable 667 * @arg SAI_IT_CNRDY: Codec not ready interrupt enable 668 * @arg SAI_IT_AFSDET: Anticipated frame synchronization detection interrupt enable 669 * @arg SAI_IT_LFSDET: Late frame synchronization detection interrupt enable 670 * @retval None 671 */ 672 #define __HAL_SAI_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->IMR &= (~(__INTERRUPT__))) 673 674 /** @brief Check whether the specified SAI interrupt source is enabled or not. 675 * @param __HANDLE__ specifies the SAI Handle. 676 * @param __INTERRUPT__ specifies the SAI interrupt source to check. 677 * This parameter can be one of the following values: 678 * @arg SAI_IT_OVRUDR: Overrun underrun interrupt enable 679 * @arg SAI_IT_MUTEDET: Mute detection interrupt enable 680 * @arg SAI_IT_WCKCFG: Wrong Clock Configuration interrupt enable 681 * @arg SAI_IT_FREQ: FIFO request interrupt enable 682 * @arg SAI_IT_CNRDY: Codec not ready interrupt enable 683 * @arg SAI_IT_AFSDET: Anticipated frame synchronization detection interrupt enable 684 * @arg SAI_IT_LFSDET: Late frame synchronization detection interrupt enable 685 * @retval The new state of __INTERRUPT__ (TRUE or FALSE). 686 */ 687 #define __HAL_SAI_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->IMR\ 688 & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET) 689 690 /** @brief Check whether the specified SAI flag is set or not. 691 * @param __HANDLE__ specifies the SAI Handle. 692 * @param __FLAG__ specifies the flag to check. 693 * This parameter can be one of the following values: 694 * @arg SAI_FLAG_OVRUDR: Overrun underrun flag. 695 * @arg SAI_FLAG_MUTEDET: Mute detection flag. 696 * @arg SAI_FLAG_WCKCFG: Wrong Clock Configuration flag. 697 * @arg SAI_FLAG_FREQ: FIFO request flag. 698 * @arg SAI_FLAG_CNRDY: Codec not ready flag. 699 * @arg SAI_FLAG_AFSDET: Anticipated frame synchronization detection flag. 700 * @arg SAI_FLAG_LFSDET: Late frame synchronization detection flag. 701 * @retval The new state of __FLAG__ (TRUE or FALSE). 702 */ 703 #define __HAL_SAI_GET_FLAG(__HANDLE__, __FLAG__) ((((__HANDLE__)->Instance->SR) & (__FLAG__)) == (__FLAG__)) 704 705 /** @brief Clear the specified SAI pending flag. 706 * @param __HANDLE__ specifies the SAI Handle. 707 * @param __FLAG__ specifies the flag to check. 708 * This parameter can be any combination of the following values: 709 * @arg SAI_FLAG_OVRUDR: Clear Overrun underrun 710 * @arg SAI_FLAG_MUTEDET: Clear Mute detection 711 * @arg SAI_FLAG_WCKCFG: Clear Wrong Clock Configuration 712 * @arg SAI_FLAG_FREQ: Clear FIFO request 713 * @arg SAI_FLAG_CNRDY: Clear Codec not ready 714 * @arg SAI_FLAG_AFSDET: Clear Anticipated frame synchronization detection 715 * @arg SAI_FLAG_LFSDET: Clear Late frame synchronization detection 716 * 717 * @retval None 718 */ 719 #define __HAL_SAI_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->CLRFR = (__FLAG__)) 720 721 /** @brief Enable SAI. 722 * @param __HANDLE__ specifies the SAI Handle. 723 * @retval None 724 */ 725 #define __HAL_SAI_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 |= SAI_xCR1_SAIEN) 726 727 /** @brief Disable SAI. 728 * @param __HANDLE__ specifies the SAI Handle. 729 * @retval None 730 */ 731 #define __HAL_SAI_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 &= ~SAI_xCR1_SAIEN) 732 733 /** 734 * @} 735 */ 736 737 /* Include SAI HAL Extension module */ 738 #include "stm32g4xx_hal_sai_ex.h" 739 740 /* Exported functions --------------------------------------------------------*/ 741 /** @addtogroup SAI_Exported_Functions 742 * @{ 743 */ 744 745 /* Initialization/de-initialization functions ********************************/ 746 /** @addtogroup SAI_Exported_Functions_Group1 747 * @{ 748 */ 749 HAL_StatusTypeDef HAL_SAI_InitProtocol(SAI_HandleTypeDef *hsai, uint32_t protocol, uint32_t datasize, uint32_t nbslot); 750 HAL_StatusTypeDef HAL_SAI_Init(SAI_HandleTypeDef *hsai); 751 HAL_StatusTypeDef HAL_SAI_DeInit(SAI_HandleTypeDef *hsai); 752 void HAL_SAI_MspInit(SAI_HandleTypeDef *hsai); 753 void HAL_SAI_MspDeInit(SAI_HandleTypeDef *hsai); 754 755 #if (USE_HAL_SAI_REGISTER_CALLBACKS == 1) 756 /* SAI callbacks register/unregister functions ********************************/ 757 HAL_StatusTypeDef HAL_SAI_RegisterCallback(SAI_HandleTypeDef *hsai, 758 HAL_SAI_CallbackIDTypeDef CallbackID, 759 pSAI_CallbackTypeDef pCallback); 760 HAL_StatusTypeDef HAL_SAI_UnRegisterCallback(SAI_HandleTypeDef *hsai, 761 HAL_SAI_CallbackIDTypeDef CallbackID); 762 #endif /* USE_HAL_SAI_REGISTER_CALLBACKS */ 763 /** 764 * @} 765 */ 766 767 /* I/O operation functions ***************************************************/ 768 /** @addtogroup SAI_Exported_Functions_Group2 769 * @{ 770 */ 771 /* Blocking mode: Polling */ 772 HAL_StatusTypeDef HAL_SAI_Transmit(SAI_HandleTypeDef *hsai, uint8_t *pData, uint16_t Size, uint32_t Timeout); 773 HAL_StatusTypeDef HAL_SAI_Receive(SAI_HandleTypeDef *hsai, uint8_t *pData, uint16_t Size, uint32_t Timeout); 774 775 /* Non-Blocking mode: Interrupt */ 776 HAL_StatusTypeDef HAL_SAI_Transmit_IT(SAI_HandleTypeDef *hsai, uint8_t *pData, uint16_t Size); 777 HAL_StatusTypeDef HAL_SAI_Receive_IT(SAI_HandleTypeDef *hsai, uint8_t *pData, uint16_t Size); 778 779 /* Non-Blocking mode: DMA */ 780 HAL_StatusTypeDef HAL_SAI_Transmit_DMA(SAI_HandleTypeDef *hsai, uint8_t *pData, uint16_t Size); 781 HAL_StatusTypeDef HAL_SAI_Receive_DMA(SAI_HandleTypeDef *hsai, uint8_t *pData, uint16_t Size); 782 HAL_StatusTypeDef HAL_SAI_DMAPause(SAI_HandleTypeDef *hsai); 783 HAL_StatusTypeDef HAL_SAI_DMAResume(SAI_HandleTypeDef *hsai); 784 HAL_StatusTypeDef HAL_SAI_DMAStop(SAI_HandleTypeDef *hsai); 785 786 /* Abort function */ 787 HAL_StatusTypeDef HAL_SAI_Abort(SAI_HandleTypeDef *hsai); 788 789 /* Mute management */ 790 HAL_StatusTypeDef HAL_SAI_EnableTxMuteMode(SAI_HandleTypeDef *hsai, uint16_t val); 791 HAL_StatusTypeDef HAL_SAI_DisableTxMuteMode(SAI_HandleTypeDef *hsai); 792 HAL_StatusTypeDef HAL_SAI_EnableRxMuteMode(SAI_HandleTypeDef *hsai, SAIcallback callback, uint16_t counter); 793 HAL_StatusTypeDef HAL_SAI_DisableRxMuteMode(SAI_HandleTypeDef *hsai); 794 795 /* SAI IRQHandler and Callbacks used in non blocking modes (Interrupt and DMA) */ 796 void HAL_SAI_IRQHandler(SAI_HandleTypeDef *hsai); 797 void HAL_SAI_TxHalfCpltCallback(SAI_HandleTypeDef *hsai); 798 void HAL_SAI_TxCpltCallback(SAI_HandleTypeDef *hsai); 799 void HAL_SAI_RxHalfCpltCallback(SAI_HandleTypeDef *hsai); 800 void HAL_SAI_RxCpltCallback(SAI_HandleTypeDef *hsai); 801 void HAL_SAI_ErrorCallback(SAI_HandleTypeDef *hsai); 802 /** 803 * @} 804 */ 805 806 /** @addtogroup SAI_Exported_Functions_Group3 807 * @{ 808 */ 809 /* Peripheral State functions ************************************************/ 810 HAL_SAI_StateTypeDef HAL_SAI_GetState(SAI_HandleTypeDef *hsai); 811 uint32_t HAL_SAI_GetError(SAI_HandleTypeDef *hsai); 812 /** 813 * @} 814 */ 815 816 /** 817 * @} 818 */ 819 820 /* Private macros ------------------------------------------------------------*/ 821 /** @defgroup SAI_Private_Macros SAI Private Macros 822 * @{ 823 */ 824 #define IS_SAI_BLOCK_SYNCEXT(STATE) (((STATE) == SAI_SYNCEXT_DISABLE) ||\ 825 ((STATE) == SAI_SYNCEXT_OUTBLOCKA_ENABLE) ||\ 826 ((STATE) == SAI_SYNCEXT_OUTBLOCKB_ENABLE)) 827 828 #define IS_SAI_SUPPORTED_PROTOCOL(PROTOCOL) (((PROTOCOL) == SAI_I2S_STANDARD) ||\ 829 ((PROTOCOL) == SAI_I2S_MSBJUSTIFIED) ||\ 830 ((PROTOCOL) == SAI_I2S_LSBJUSTIFIED) ||\ 831 ((PROTOCOL) == SAI_PCM_LONG) ||\ 832 ((PROTOCOL) == SAI_PCM_SHORT)) 833 834 #define IS_SAI_PROTOCOL_DATASIZE(DATASIZE) (((DATASIZE) == SAI_PROTOCOL_DATASIZE_16BIT) ||\ 835 ((DATASIZE) == SAI_PROTOCOL_DATASIZE_16BITEXTENDED) ||\ 836 ((DATASIZE) == SAI_PROTOCOL_DATASIZE_24BIT) ||\ 837 ((DATASIZE) == SAI_PROTOCOL_DATASIZE_32BIT)) 838 839 #define IS_SAI_AUDIO_FREQUENCY(AUDIO) (((AUDIO) == SAI_AUDIO_FREQUENCY_192K) || ((AUDIO) == SAI_AUDIO_FREQUENCY_96K) || \ 840 ((AUDIO) == SAI_AUDIO_FREQUENCY_48K) || ((AUDIO) == SAI_AUDIO_FREQUENCY_44K) || \ 841 ((AUDIO) == SAI_AUDIO_FREQUENCY_32K) || ((AUDIO) == SAI_AUDIO_FREQUENCY_22K) || \ 842 ((AUDIO) == SAI_AUDIO_FREQUENCY_16K) || ((AUDIO) == SAI_AUDIO_FREQUENCY_11K) || \ 843 ((AUDIO) == SAI_AUDIO_FREQUENCY_8K) || ((AUDIO) == SAI_AUDIO_FREQUENCY_MCKDIV)) 844 845 #define IS_SAI_BLOCK_MCK_OVERSAMPLING(VALUE) (((VALUE) == SAI_MCK_OVERSAMPLING_DISABLE) || \ 846 ((VALUE) == SAI_MCK_OVERSAMPLING_ENABLE)) 847 848 #define IS_SAI_PDM_MIC_PAIRS_NUMBER(VALUE) ((1U <= (VALUE)) && ((VALUE) <= 3U)) 849 850 #define IS_SAI_PDM_CLOCK_ENABLE(CLOCK) (((CLOCK) != 0U) && \ 851 (((CLOCK) & ~(SAI_PDM_CLOCK1_ENABLE | SAI_PDM_CLOCK2_ENABLE)) == 0U)) 852 853 #define IS_SAI_BLOCK_MODE(MODE) (((MODE) == SAI_MODEMASTER_TX) || \ 854 ((MODE) == SAI_MODEMASTER_RX) || \ 855 ((MODE) == SAI_MODESLAVE_TX) || \ 856 ((MODE) == SAI_MODESLAVE_RX)) 857 858 #define IS_SAI_BLOCK_PROTOCOL(PROTOCOL) (((PROTOCOL) == SAI_FREE_PROTOCOL) || \ 859 ((PROTOCOL) == SAI_AC97_PROTOCOL) || \ 860 ((PROTOCOL) == SAI_SPDIF_PROTOCOL)) 861 862 #define IS_SAI_BLOCK_DATASIZE(DATASIZE) (((DATASIZE) == SAI_DATASIZE_8) || \ 863 ((DATASIZE) == SAI_DATASIZE_10) || \ 864 ((DATASIZE) == SAI_DATASIZE_16) || \ 865 ((DATASIZE) == SAI_DATASIZE_20) || \ 866 ((DATASIZE) == SAI_DATASIZE_24) || \ 867 ((DATASIZE) == SAI_DATASIZE_32)) 868 869 #define IS_SAI_BLOCK_FIRST_BIT(BIT) (((BIT) == SAI_FIRSTBIT_MSB) || \ 870 ((BIT) == SAI_FIRSTBIT_LSB)) 871 872 #define IS_SAI_BLOCK_CLOCK_STROBING(CLOCK) (((CLOCK) == SAI_CLOCKSTROBING_FALLINGEDGE) || \ 873 ((CLOCK) == SAI_CLOCKSTROBING_RISINGEDGE)) 874 875 #define IS_SAI_BLOCK_SYNCHRO(SYNCHRO) (((SYNCHRO) == SAI_ASYNCHRONOUS) || \ 876 ((SYNCHRO) == SAI_SYNCHRONOUS) || \ 877 ((SYNCHRO) == SAI_SYNCHRONOUS_EXT_SAI1) || \ 878 ((SYNCHRO) == SAI_SYNCHRONOUS_EXT_SAI2)) 879 880 #define IS_SAI_BLOCK_MCK_OUTPUT(VALUE) (((VALUE) == SAI_MCK_OUTPUT_ENABLE) || \ 881 ((VALUE) == SAI_MCK_OUTPUT_DISABLE)) 882 883 #define IS_SAI_BLOCK_OUTPUT_DRIVE(DRIVE) (((DRIVE) == SAI_OUTPUTDRIVE_DISABLE) || \ 884 ((DRIVE) == SAI_OUTPUTDRIVE_ENABLE)) 885 886 #define IS_SAI_BLOCK_NODIVIDER(NODIVIDER) (((NODIVIDER) == SAI_MASTERDIVIDER_ENABLE) || \ 887 ((NODIVIDER) == SAI_MASTERDIVIDER_DISABLE)) 888 889 #define IS_SAI_BLOCK_MUTE_COUNTER(COUNTER) ((COUNTER) <= 63U) 890 891 #define IS_SAI_BLOCK_MUTE_VALUE(VALUE) (((VALUE) == SAI_ZERO_VALUE) || \ 892 ((VALUE) == SAI_LAST_SENT_VALUE)) 893 894 #define IS_SAI_BLOCK_COMPANDING_MODE(MODE) (((MODE) == SAI_NOCOMPANDING) || \ 895 ((MODE) == SAI_ULAW_1CPL_COMPANDING) || \ 896 ((MODE) == SAI_ALAW_1CPL_COMPANDING) || \ 897 ((MODE) == SAI_ULAW_2CPL_COMPANDING) || \ 898 ((MODE) == SAI_ALAW_2CPL_COMPANDING)) 899 900 #define IS_SAI_BLOCK_FIFO_THRESHOLD(THRESHOLD) (((THRESHOLD) == SAI_FIFOTHRESHOLD_EMPTY) || \ 901 ((THRESHOLD) == SAI_FIFOTHRESHOLD_1QF) || \ 902 ((THRESHOLD) == SAI_FIFOTHRESHOLD_HF) || \ 903 ((THRESHOLD) == SAI_FIFOTHRESHOLD_3QF) || \ 904 ((THRESHOLD) == SAI_FIFOTHRESHOLD_FULL)) 905 906 #define IS_SAI_BLOCK_TRISTATE_MANAGEMENT(STATE) (((STATE) == SAI_OUTPUT_NOTRELEASED) ||\ 907 ((STATE) == SAI_OUTPUT_RELEASED)) 908 909 #define IS_SAI_MONO_STEREO_MODE(MODE) (((MODE) == SAI_MONOMODE) ||\ 910 ((MODE) == SAI_STEREOMODE)) 911 912 #define IS_SAI_SLOT_ACTIVE(ACTIVE) ((ACTIVE) <= SAI_SLOTACTIVE_ALL) 913 914 #define IS_SAI_BLOCK_SLOT_NUMBER(NUMBER) ((1U <= (NUMBER)) && ((NUMBER) <= 16U)) 915 916 #define IS_SAI_BLOCK_SLOT_SIZE(SIZE) (((SIZE) == SAI_SLOTSIZE_DATASIZE) || \ 917 ((SIZE) == SAI_SLOTSIZE_16B) || \ 918 ((SIZE) == SAI_SLOTSIZE_32B)) 919 920 #define IS_SAI_BLOCK_FIRSTBIT_OFFSET(OFFSET) ((OFFSET) <= 24U) 921 922 #define IS_SAI_BLOCK_FS_OFFSET(OFFSET) (((OFFSET) == SAI_FS_FIRSTBIT) || \ 923 ((OFFSET) == SAI_FS_BEFOREFIRSTBIT)) 924 925 #define IS_SAI_BLOCK_FS_POLARITY(POLARITY) (((POLARITY) == SAI_FS_ACTIVE_LOW) || \ 926 ((POLARITY) == SAI_FS_ACTIVE_HIGH)) 927 928 #define IS_SAI_BLOCK_FS_DEFINITION(DEFINITION) (((DEFINITION) == SAI_FS_STARTFRAME) || \ 929 ((DEFINITION) == SAI_FS_CHANNEL_IDENTIFICATION)) 930 931 #define IS_SAI_BLOCK_MASTER_DIVIDER(DIVIDER) ((DIVIDER) <= 63U) 932 933 #define IS_SAI_BLOCK_FRAME_LENGTH(LENGTH) ((8U <= (LENGTH)) && ((LENGTH) <= 256U)) 934 935 #define IS_SAI_BLOCK_ACTIVE_FRAME(LENGTH) ((1U <= (LENGTH)) && ((LENGTH) <= 128U)) 936 937 /** 938 * @} 939 */ 940 941 /* Private functions ---------------------------------------------------------*/ 942 /** @defgroup SAI_Private_Functions SAI Private Functions 943 * @{ 944 */ 945 946 /** 947 * @} 948 */ 949 950 /** 951 * @} 952 */ 953 954 /** 955 * @} 956 */ 957 958 #ifdef __cplusplus 959 } 960 #endif 961 962 #endif /* STM32G4xx_HAL_SAI_H */ 963 964
