1 /** 2 ****************************************************************************** 3 * @file stm32g4xx_hal_pcd.h 4 * @author MCD Application Team 5 * @brief Header file of PCD HAL module. 6 ****************************************************************************** 7 * @attention 8 * 9 * Copyright (c) 2019 STMicroelectronics. 10 * All rights reserved. 11 * 12 * This software is licensed under terms that can be found in the LICENSE file 13 * in the root directory of this software component. 14 * If no LICENSE file comes with this software, it is provided AS-IS. 15 * 16 ****************************************************************************** 17 */ 18 19 /* Define to prevent recursive inclusion -------------------------------------*/ 20 #ifndef STM32G4xx_HAL_PCD_H 21 #define STM32G4xx_HAL_PCD_H 22 23 #ifdef __cplusplus 24 extern "C" { 25 #endif 26 27 /* Includes ------------------------------------------------------------------*/ 28 #include "stm32g4xx_ll_usb.h" 29 30 #if defined (USB) 31 32 /** @addtogroup STM32G4xx_HAL_Driver 33 * @{ 34 */ 35 36 /** @addtogroup PCD 37 * @{ 38 */ 39 40 /* Exported types ------------------------------------------------------------*/ 41 /** @defgroup PCD_Exported_Types PCD Exported Types 42 * @{ 43 */ 44 45 /** 46 * @brief PCD State structure definition 47 */ 48 typedef enum 49 { 50 HAL_PCD_STATE_RESET = 0x00, 51 HAL_PCD_STATE_READY = 0x01, 52 HAL_PCD_STATE_ERROR = 0x02, 53 HAL_PCD_STATE_BUSY = 0x03, 54 HAL_PCD_STATE_TIMEOUT = 0x04 55 } PCD_StateTypeDef; 56 57 /* Device LPM suspend state */ 58 typedef enum 59 { 60 LPM_L0 = 0x00, /* on */ 61 LPM_L1 = 0x01, /* LPM L1 sleep */ 62 LPM_L2 = 0x02, /* suspend */ 63 LPM_L3 = 0x03, /* off */ 64 } PCD_LPM_StateTypeDef; 65 66 typedef enum 67 { 68 PCD_LPM_L0_ACTIVE = 0x00, /* on */ 69 PCD_LPM_L1_ACTIVE = 0x01, /* LPM L1 sleep */ 70 } PCD_LPM_MsgTypeDef; 71 72 typedef enum 73 { 74 PCD_BCD_ERROR = 0xFF, 75 PCD_BCD_CONTACT_DETECTION = 0xFE, 76 PCD_BCD_STD_DOWNSTREAM_PORT = 0xFD, 77 PCD_BCD_CHARGING_DOWNSTREAM_PORT = 0xFC, 78 PCD_BCD_DEDICATED_CHARGING_PORT = 0xFB, 79 PCD_BCD_DISCOVERY_COMPLETED = 0x00, 80 81 } PCD_BCD_MsgTypeDef; 82 83 84 85 86 87 typedef USB_TypeDef PCD_TypeDef; 88 typedef USB_CfgTypeDef PCD_InitTypeDef; 89 typedef USB_EPTypeDef PCD_EPTypeDef; 90 91 92 /** 93 * @brief PCD Handle Structure definition 94 */ 95 #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) 96 typedef struct __PCD_HandleTypeDef 97 #else 98 typedef struct 99 #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ 100 { 101 PCD_TypeDef *Instance; /*!< Register base address */ 102 PCD_InitTypeDef Init; /*!< PCD required parameters */ 103 __IO uint8_t USB_Address; /*!< USB Address */ 104 PCD_EPTypeDef IN_ep[8]; /*!< IN endpoint parameters */ 105 PCD_EPTypeDef OUT_ep[8]; /*!< OUT endpoint parameters */ 106 HAL_LockTypeDef Lock; /*!< PCD peripheral status */ 107 __IO PCD_StateTypeDef State; /*!< PCD communication state */ 108 __IO uint32_t ErrorCode; /*!< PCD Error code */ 109 uint32_t Setup[12]; /*!< Setup packet buffer */ 110 PCD_LPM_StateTypeDef LPM_State; /*!< LPM State */ 111 uint32_t BESL; 112 113 114 uint32_t lpm_active; /*!< Enable or disable the Link Power Management . 115 This parameter can be set to ENABLE or DISABLE */ 116 117 uint32_t battery_charging_active; /*!< Enable or disable Battery charging. 118 This parameter can be set to ENABLE or DISABLE */ 119 void *pData; /*!< Pointer to upper stack Handler */ 120 121 #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) 122 void (* SOFCallback)(struct __PCD_HandleTypeDef *hpcd); /*!< USB OTG PCD SOF callback */ 123 void (* SetupStageCallback)(struct __PCD_HandleTypeDef *hpcd); /*!< USB OTG PCD Setup Stage callback */ 124 void (* ResetCallback)(struct __PCD_HandleTypeDef *hpcd); /*!< USB OTG PCD Reset callback */ 125 void (* SuspendCallback)(struct __PCD_HandleTypeDef *hpcd); /*!< USB OTG PCD Suspend callback */ 126 void (* ResumeCallback)(struct __PCD_HandleTypeDef *hpcd); /*!< USB OTG PCD Resume callback */ 127 void (* ConnectCallback)(struct __PCD_HandleTypeDef *hpcd); /*!< USB OTG PCD Connect callback */ 128 void (* DisconnectCallback)(struct __PCD_HandleTypeDef *hpcd); /*!< USB OTG PCD Disconnect callback */ 129 130 void (* DataOutStageCallback)(struct __PCD_HandleTypeDef *hpcd, uint8_t epnum); /*!< USB OTG PCD Data OUT Stage callback */ 131 void (* DataInStageCallback)(struct __PCD_HandleTypeDef *hpcd, uint8_t epnum); /*!< USB OTG PCD Data IN Stage callback */ 132 void (* ISOOUTIncompleteCallback)(struct __PCD_HandleTypeDef *hpcd, uint8_t epnum); /*!< USB OTG PCD ISO OUT Incomplete callback */ 133 void (* ISOINIncompleteCallback)(struct __PCD_HandleTypeDef *hpcd, uint8_t epnum); /*!< USB OTG PCD ISO IN Incomplete callback */ 134 void (* BCDCallback)(struct __PCD_HandleTypeDef *hpcd, PCD_BCD_MsgTypeDef msg); /*!< USB OTG PCD BCD callback */ 135 void (* LPMCallback)(struct __PCD_HandleTypeDef *hpcd, PCD_LPM_MsgTypeDef msg); /*!< USB OTG PCD LPM callback */ 136 137 void (* MspInitCallback)(struct __PCD_HandleTypeDef *hpcd); /*!< USB OTG PCD Msp Init callback */ 138 void (* MspDeInitCallback)(struct __PCD_HandleTypeDef *hpcd); /*!< USB OTG PCD Msp DeInit callback */ 139 #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ 140 } PCD_HandleTypeDef; 141 142 /** 143 * @} 144 */ 145 146 /* Include PCD HAL Extended module */ 147 #include "stm32g4xx_hal_pcd_ex.h" 148 149 /* Exported constants --------------------------------------------------------*/ 150 /** @defgroup PCD_Exported_Constants PCD Exported Constants 151 * @{ 152 */ 153 154 /** @defgroup PCD_Speed PCD Speed 155 * @{ 156 */ 157 #define PCD_SPEED_FULL USBD_FS_SPEED 158 /** 159 * @} 160 */ 161 162 /** @defgroup PCD_PHY_Module PCD PHY Module 163 * @{ 164 */ 165 #define PCD_PHY_ULPI 1U 166 #define PCD_PHY_EMBEDDED 2U 167 #define PCD_PHY_UTMI 3U 168 /** 169 * @} 170 */ 171 172 /** @defgroup PCD_Error_Code_definition PCD Error Code definition 173 * @brief PCD Error Code definition 174 * @{ 175 */ 176 #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) 177 #define HAL_PCD_ERROR_INVALID_CALLBACK (0x00000010U) /*!< Invalid Callback error */ 178 #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ 179 180 /** 181 * @} 182 */ 183 184 /** 185 * @} 186 */ 187 188 /* Exported macros -----------------------------------------------------------*/ 189 /** @defgroup PCD_Exported_Macros PCD Exported Macros 190 * @brief macros to handle interrupts and specific clock configurations 191 * @{ 192 */ 193 194 195 #define __HAL_PCD_ENABLE(__HANDLE__) (void)USB_EnableGlobalInt ((__HANDLE__)->Instance) 196 #define __HAL_PCD_DISABLE(__HANDLE__) (void)USB_DisableGlobalInt ((__HANDLE__)->Instance) 197 #define __HAL_PCD_GET_FLAG(__HANDLE__, __INTERRUPT__) ((USB_ReadInterrupts((__HANDLE__)->Instance)\ 198 & (__INTERRUPT__)) == (__INTERRUPT__)) 199 200 #define __HAL_PCD_CLEAR_FLAG(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->ISTR)\ 201 &= (uint16_t)(~(__INTERRUPT__))) 202 203 #define __HAL_USB_WAKEUP_EXTI_ENABLE_IT() EXTI->IMR1 |= USB_WAKEUP_EXTI_LINE 204 #define __HAL_USB_WAKEUP_EXTI_DISABLE_IT() EXTI->IMR1 &= ~(USB_WAKEUP_EXTI_LINE) 205 206 207 /** 208 * @} 209 */ 210 211 /* Exported functions --------------------------------------------------------*/ 212 /** @addtogroup PCD_Exported_Functions PCD Exported Functions 213 * @{ 214 */ 215 216 /* Initialization/de-initialization functions ********************************/ 217 /** @addtogroup PCD_Exported_Functions_Group1 Initialization and de-initialization functions 218 * @{ 219 */ 220 HAL_StatusTypeDef HAL_PCD_Init(PCD_HandleTypeDef *hpcd); 221 HAL_StatusTypeDef HAL_PCD_DeInit(PCD_HandleTypeDef *hpcd); 222 void HAL_PCD_MspInit(PCD_HandleTypeDef *hpcd); 223 void HAL_PCD_MspDeInit(PCD_HandleTypeDef *hpcd); 224 225 #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) 226 /** @defgroup HAL_PCD_Callback_ID_enumeration_definition HAL USB OTG PCD Callback ID enumeration definition 227 * @brief HAL USB OTG PCD Callback ID enumeration definition 228 * @{ 229 */ 230 typedef enum 231 { 232 HAL_PCD_SOF_CB_ID = 0x01, /*!< USB PCD SOF callback ID */ 233 HAL_PCD_SETUPSTAGE_CB_ID = 0x02, /*!< USB PCD Setup Stage callback ID */ 234 HAL_PCD_RESET_CB_ID = 0x03, /*!< USB PCD Reset callback ID */ 235 HAL_PCD_SUSPEND_CB_ID = 0x04, /*!< USB PCD Suspend callback ID */ 236 HAL_PCD_RESUME_CB_ID = 0x05, /*!< USB PCD Resume callback ID */ 237 HAL_PCD_CONNECT_CB_ID = 0x06, /*!< USB PCD Connect callback ID */ 238 HAL_PCD_DISCONNECT_CB_ID = 0x07, /*!< USB PCD Disconnect callback ID */ 239 240 HAL_PCD_MSPINIT_CB_ID = 0x08, /*!< USB PCD MspInit callback ID */ 241 HAL_PCD_MSPDEINIT_CB_ID = 0x09 /*!< USB PCD MspDeInit callback ID */ 242 243 } HAL_PCD_CallbackIDTypeDef; 244 /** 245 * @} 246 */ 247 248 /** @defgroup HAL_PCD_Callback_pointer_definition HAL USB OTG PCD Callback pointer definition 249 * @brief HAL USB OTG PCD Callback pointer definition 250 * @{ 251 */ 252 253 typedef void (*pPCD_CallbackTypeDef)(PCD_HandleTypeDef *hpcd); /*!< pointer to a common USB OTG PCD callback function */ 254 typedef void (*pPCD_DataOutStageCallbackTypeDef)(PCD_HandleTypeDef *hpcd, uint8_t epnum); /*!< pointer to USB OTG PCD Data OUT Stage callback */ 255 typedef void (*pPCD_DataInStageCallbackTypeDef)(PCD_HandleTypeDef *hpcd, uint8_t epnum); /*!< pointer to USB OTG PCD Data IN Stage callback */ 256 typedef void (*pPCD_IsoOutIncpltCallbackTypeDef)(PCD_HandleTypeDef *hpcd, uint8_t epnum); /*!< pointer to USB OTG PCD ISO OUT Incomplete callback */ 257 typedef void (*pPCD_IsoInIncpltCallbackTypeDef)(PCD_HandleTypeDef *hpcd, uint8_t epnum); /*!< pointer to USB OTG PCD ISO IN Incomplete callback */ 258 typedef void (*pPCD_LpmCallbackTypeDef)(PCD_HandleTypeDef *hpcd, PCD_LPM_MsgTypeDef msg); /*!< pointer to USB OTG PCD LPM callback */ 259 typedef void (*pPCD_BcdCallbackTypeDef)(PCD_HandleTypeDef *hpcd, PCD_BCD_MsgTypeDef msg); /*!< pointer to USB OTG PCD BCD callback */ 260 261 /** 262 * @} 263 */ 264 265 HAL_StatusTypeDef HAL_PCD_RegisterCallback(PCD_HandleTypeDef *hpcd, 266 HAL_PCD_CallbackIDTypeDef CallbackID, 267 pPCD_CallbackTypeDef pCallback); 268 269 HAL_StatusTypeDef HAL_PCD_UnRegisterCallback(PCD_HandleTypeDef *hpcd, 270 HAL_PCD_CallbackIDTypeDef CallbackID); 271 272 HAL_StatusTypeDef HAL_PCD_RegisterDataOutStageCallback(PCD_HandleTypeDef *hpcd, 273 pPCD_DataOutStageCallbackTypeDef pCallback); 274 275 HAL_StatusTypeDef HAL_PCD_UnRegisterDataOutStageCallback(PCD_HandleTypeDef *hpcd); 276 277 HAL_StatusTypeDef HAL_PCD_RegisterDataInStageCallback(PCD_HandleTypeDef *hpcd, 278 pPCD_DataInStageCallbackTypeDef pCallback); 279 280 HAL_StatusTypeDef HAL_PCD_UnRegisterDataInStageCallback(PCD_HandleTypeDef *hpcd); 281 282 HAL_StatusTypeDef HAL_PCD_RegisterIsoOutIncpltCallback(PCD_HandleTypeDef *hpcd, 283 pPCD_IsoOutIncpltCallbackTypeDef pCallback); 284 285 HAL_StatusTypeDef HAL_PCD_UnRegisterIsoOutIncpltCallback(PCD_HandleTypeDef *hpcd); 286 287 HAL_StatusTypeDef HAL_PCD_RegisterIsoInIncpltCallback(PCD_HandleTypeDef *hpcd, 288 pPCD_IsoInIncpltCallbackTypeDef pCallback); 289 290 HAL_StatusTypeDef HAL_PCD_UnRegisterIsoInIncpltCallback(PCD_HandleTypeDef *hpcd); 291 292 HAL_StatusTypeDef HAL_PCD_RegisterBcdCallback(PCD_HandleTypeDef *hpcd, 293 pPCD_BcdCallbackTypeDef pCallback); 294 295 HAL_StatusTypeDef HAL_PCD_UnRegisterBcdCallback(PCD_HandleTypeDef *hpcd); 296 297 HAL_StatusTypeDef HAL_PCD_RegisterLpmCallback(PCD_HandleTypeDef *hpcd, 298 pPCD_LpmCallbackTypeDef pCallback); 299 300 HAL_StatusTypeDef HAL_PCD_UnRegisterLpmCallback(PCD_HandleTypeDef *hpcd); 301 #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ 302 /** 303 * @} 304 */ 305 306 /* I/O operation functions ***************************************************/ 307 /* Non-Blocking mode: Interrupt */ 308 /** @addtogroup PCD_Exported_Functions_Group2 Input and Output operation functions 309 * @{ 310 */ 311 HAL_StatusTypeDef HAL_PCD_Start(PCD_HandleTypeDef *hpcd); 312 HAL_StatusTypeDef HAL_PCD_Stop(PCD_HandleTypeDef *hpcd); 313 void HAL_PCD_IRQHandler(PCD_HandleTypeDef *hpcd); 314 315 void HAL_PCD_SOFCallback(PCD_HandleTypeDef *hpcd); 316 void HAL_PCD_SetupStageCallback(PCD_HandleTypeDef *hpcd); 317 void HAL_PCD_ResetCallback(PCD_HandleTypeDef *hpcd); 318 void HAL_PCD_SuspendCallback(PCD_HandleTypeDef *hpcd); 319 void HAL_PCD_ResumeCallback(PCD_HandleTypeDef *hpcd); 320 void HAL_PCD_ConnectCallback(PCD_HandleTypeDef *hpcd); 321 void HAL_PCD_DisconnectCallback(PCD_HandleTypeDef *hpcd); 322 323 void HAL_PCD_DataOutStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum); 324 void HAL_PCD_DataInStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum); 325 void HAL_PCD_ISOOUTIncompleteCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum); 326 void HAL_PCD_ISOINIncompleteCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum); 327 /** 328 * @} 329 */ 330 331 /* Peripheral Control functions **********************************************/ 332 /** @addtogroup PCD_Exported_Functions_Group3 Peripheral Control functions 333 * @{ 334 */ 335 HAL_StatusTypeDef HAL_PCD_DevConnect(PCD_HandleTypeDef *hpcd); 336 HAL_StatusTypeDef HAL_PCD_DevDisconnect(PCD_HandleTypeDef *hpcd); 337 HAL_StatusTypeDef HAL_PCD_SetAddress(PCD_HandleTypeDef *hpcd, uint8_t address); 338 HAL_StatusTypeDef HAL_PCD_EP_Open(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, 339 uint16_t ep_mps, uint8_t ep_type); 340 341 HAL_StatusTypeDef HAL_PCD_EP_Close(PCD_HandleTypeDef *hpcd, uint8_t ep_addr); 342 HAL_StatusTypeDef HAL_PCD_EP_Receive(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, 343 uint8_t *pBuf, uint32_t len); 344 345 HAL_StatusTypeDef HAL_PCD_EP_Transmit(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, 346 uint8_t *pBuf, uint32_t len); 347 348 HAL_StatusTypeDef HAL_PCD_EP_SetStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr); 349 HAL_StatusTypeDef HAL_PCD_EP_ClrStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr); 350 HAL_StatusTypeDef HAL_PCD_EP_Flush(PCD_HandleTypeDef *hpcd, uint8_t ep_addr); 351 HAL_StatusTypeDef HAL_PCD_ActivateRemoteWakeup(PCD_HandleTypeDef *hpcd); 352 HAL_StatusTypeDef HAL_PCD_DeActivateRemoteWakeup(PCD_HandleTypeDef *hpcd); 353 uint32_t HAL_PCD_EP_GetRxCount(PCD_HandleTypeDef *hpcd, uint8_t ep_addr); 354 /** 355 * @} 356 */ 357 358 /* Peripheral State functions ************************************************/ 359 /** @addtogroup PCD_Exported_Functions_Group4 Peripheral State functions 360 * @{ 361 */ 362 PCD_StateTypeDef HAL_PCD_GetState(PCD_HandleTypeDef *hpcd); 363 /** 364 * @} 365 */ 366 367 /** 368 * @} 369 */ 370 371 /* Private constants ---------------------------------------------------------*/ 372 /** @defgroup PCD_Private_Constants PCD Private Constants 373 * @{ 374 */ 375 /** @defgroup USB_EXTI_Line_Interrupt USB EXTI line interrupt 376 * @{ 377 */ 378 379 380 #define USB_WAKEUP_EXTI_LINE (0x1U << 18) /*!< USB FS EXTI Line WakeUp Interrupt */ 381 382 383 /** 384 * @} 385 */ 386 387 /** @defgroup PCD_EP0_MPS PCD EP0 MPS 388 * @{ 389 */ 390 #define PCD_EP0MPS_64 EP_MPS_64 391 #define PCD_EP0MPS_32 EP_MPS_32 392 #define PCD_EP0MPS_16 EP_MPS_16 393 #define PCD_EP0MPS_08 EP_MPS_8 394 /** 395 * @} 396 */ 397 398 /** @defgroup PCD_ENDP PCD ENDP 399 * @{ 400 */ 401 #define PCD_ENDP0 0U 402 #define PCD_ENDP1 1U 403 #define PCD_ENDP2 2U 404 #define PCD_ENDP3 3U 405 #define PCD_ENDP4 4U 406 #define PCD_ENDP5 5U 407 #define PCD_ENDP6 6U 408 #define PCD_ENDP7 7U 409 /** 410 * @} 411 */ 412 413 /** @defgroup PCD_ENDP_Kind PCD Endpoint Kind 414 * @{ 415 */ 416 #define PCD_SNG_BUF 0U 417 #define PCD_DBL_BUF 1U 418 /** 419 * @} 420 */ 421 422 /** 423 * @} 424 */ 425 426 /* Private macros ------------------------------------------------------------*/ 427 /** @defgroup PCD_Private_Macros PCD Private Macros 428 * @{ 429 */ 430 431 /******************** Bit definition for USB_COUNTn_RX register *************/ 432 #define USB_CNTRX_NBLK_MSK (0x1FU << 10) 433 #define USB_CNTRX_BLSIZE (0x1U << 15) 434 435 /* SetENDPOINT */ 436 #define PCD_SET_ENDPOINT(USBx, bEpNum, wRegValue) (*(__IO uint16_t *)\ 437 (&(USBx)->EP0R + ((bEpNum) * 2U)) = (uint16_t)(wRegValue)) 438 439 /* GetENDPOINT */ 440 #define PCD_GET_ENDPOINT(USBx, bEpNum) (*(__IO uint16_t *)(&(USBx)->EP0R + ((bEpNum) * 2U))) 441 442 /* ENDPOINT transfer */ 443 #define USB_EP0StartXfer USB_EPStartXfer 444 445 /** 446 * @brief sets the type in the endpoint register(bits EP_TYPE[1:0]) 447 * @param USBx USB peripheral instance register address. 448 * @param bEpNum Endpoint Number. 449 * @param wType Endpoint Type. 450 * @retval None 451 */ 452 #define PCD_SET_EPTYPE(USBx, bEpNum, wType) (PCD_SET_ENDPOINT((USBx), (bEpNum), ((PCD_GET_ENDPOINT((USBx), (bEpNum))\ 453 & USB_EP_T_MASK) | (wType) | USB_EP_CTR_TX | USB_EP_CTR_RX))) 454 455 456 /** 457 * @brief gets the type in the endpoint register(bits EP_TYPE[1:0]) 458 * @param USBx USB peripheral instance register address. 459 * @param bEpNum Endpoint Number. 460 * @retval Endpoint Type 461 */ 462 #define PCD_GET_EPTYPE(USBx, bEpNum) (PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EP_T_FIELD) 463 464 /** 465 * @brief free buffer used from the application realizing it to the line 466 * toggles bit SW_BUF in the double buffered endpoint register 467 * @param USBx USB device. 468 * @param bEpNum, bDir 469 * @retval None 470 */ 471 #define PCD_FREE_USER_BUFFER(USBx, bEpNum, bDir) \ 472 do { \ 473 if ((bDir) == 0U) \ 474 { \ 475 /* OUT double buffered endpoint */ \ 476 PCD_TX_DTOG((USBx), (bEpNum)); \ 477 } \ 478 else if ((bDir) == 1U) \ 479 { \ 480 /* IN double buffered endpoint */ \ 481 PCD_RX_DTOG((USBx), (bEpNum)); \ 482 } \ 483 } while(0) 484 485 /** 486 * @brief sets the status for tx transfer (bits STAT_TX[1:0]). 487 * @param USBx USB peripheral instance register address. 488 * @param bEpNum Endpoint Number. 489 * @param wState new state 490 * @retval None 491 */ 492 #define PCD_SET_EP_TX_STATUS(USBx, bEpNum, wState) \ 493 do { \ 494 uint16_t _wRegVal; \ 495 \ 496 _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPTX_DTOGMASK; \ 497 /* toggle first bit ? */ \ 498 if ((USB_EPTX_DTOG1 & (wState))!= 0U) \ 499 { \ 500 _wRegVal ^= USB_EPTX_DTOG1; \ 501 } \ 502 /* toggle second bit ? */ \ 503 if ((USB_EPTX_DTOG2 & (wState))!= 0U) \ 504 { \ 505 _wRegVal ^= USB_EPTX_DTOG2; \ 506 } \ 507 PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX | USB_EP_CTR_TX)); \ 508 } while(0) /* PCD_SET_EP_TX_STATUS */ 509 510 /** 511 * @brief sets the status for rx transfer (bits STAT_TX[1:0]) 512 * @param USBx USB peripheral instance register address. 513 * @param bEpNum Endpoint Number. 514 * @param wState new state 515 * @retval None 516 */ 517 #define PCD_SET_EP_RX_STATUS(USBx, bEpNum,wState) \ 518 do { \ 519 uint16_t _wRegVal; \ 520 \ 521 _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPRX_DTOGMASK; \ 522 /* toggle first bit ? */ \ 523 if ((USB_EPRX_DTOG1 & (wState))!= 0U) \ 524 { \ 525 _wRegVal ^= USB_EPRX_DTOG1; \ 526 } \ 527 /* toggle second bit ? */ \ 528 if ((USB_EPRX_DTOG2 & (wState))!= 0U) \ 529 { \ 530 _wRegVal ^= USB_EPRX_DTOG2; \ 531 } \ 532 PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX | USB_EP_CTR_TX)); \ 533 } while(0) /* PCD_SET_EP_RX_STATUS */ 534 535 /** 536 * @brief sets the status for rx & tx (bits STAT_TX[1:0] & STAT_RX[1:0]) 537 * @param USBx USB peripheral instance register address. 538 * @param bEpNum Endpoint Number. 539 * @param wStaterx new state. 540 * @param wStatetx new state. 541 * @retval None 542 */ 543 #define PCD_SET_EP_TXRX_STATUS(USBx, bEpNum, wStaterx, wStatetx) \ 544 do { \ 545 uint16_t _wRegVal; \ 546 \ 547 _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & (USB_EPRX_DTOGMASK | USB_EPTX_STAT); \ 548 /* toggle first bit ? */ \ 549 if ((USB_EPRX_DTOG1 & (wStaterx))!= 0U) \ 550 { \ 551 _wRegVal ^= USB_EPRX_DTOG1; \ 552 } \ 553 /* toggle second bit ? */ \ 554 if ((USB_EPRX_DTOG2 & (wStaterx))!= 0U) \ 555 { \ 556 _wRegVal ^= USB_EPRX_DTOG2; \ 557 } \ 558 /* toggle first bit ? */ \ 559 if ((USB_EPTX_DTOG1 & (wStatetx))!= 0U) \ 560 { \ 561 _wRegVal ^= USB_EPTX_DTOG1; \ 562 } \ 563 /* toggle second bit ? */ \ 564 if ((USB_EPTX_DTOG2 & (wStatetx))!= 0U) \ 565 { \ 566 _wRegVal ^= USB_EPTX_DTOG2; \ 567 } \ 568 \ 569 PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX | USB_EP_CTR_TX)); \ 570 } while(0) /* PCD_SET_EP_TXRX_STATUS */ 571 572 /** 573 * @brief gets the status for tx/rx transfer (bits STAT_TX[1:0] 574 * /STAT_RX[1:0]) 575 * @param USBx USB peripheral instance register address. 576 * @param bEpNum Endpoint Number. 577 * @retval status 578 */ 579 #define PCD_GET_EP_TX_STATUS(USBx, bEpNum) ((uint16_t)PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPTX_STAT) 580 #define PCD_GET_EP_RX_STATUS(USBx, bEpNum) ((uint16_t)PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPRX_STAT) 581 582 /** 583 * @brief sets directly the VALID tx/rx-status into the endpoint register 584 * @param USBx USB peripheral instance register address. 585 * @param bEpNum Endpoint Number. 586 * @retval None 587 */ 588 #define PCD_SET_EP_TX_VALID(USBx, bEpNum) (PCD_SET_EP_TX_STATUS((USBx), (bEpNum), USB_EP_TX_VALID)) 589 #define PCD_SET_EP_RX_VALID(USBx, bEpNum) (PCD_SET_EP_RX_STATUS((USBx), (bEpNum), USB_EP_RX_VALID)) 590 591 /** 592 * @brief checks stall condition in an endpoint. 593 * @param USBx USB peripheral instance register address. 594 * @param bEpNum Endpoint Number. 595 * @retval TRUE = endpoint in stall condition. 596 */ 597 #define PCD_GET_EP_TX_STALL_STATUS(USBx, bEpNum) (PCD_GET_EP_TX_STATUS((USBx), (bEpNum)) == USB_EP_TX_STALL) 598 #define PCD_GET_EP_RX_STALL_STATUS(USBx, bEpNum) (PCD_GET_EP_RX_STATUS((USBx), (bEpNum)) == USB_EP_RX_STALL) 599 600 /** 601 * @brief set & clear EP_KIND bit. 602 * @param USBx USB peripheral instance register address. 603 * @param bEpNum Endpoint Number. 604 * @retval None 605 */ 606 #define PCD_SET_EP_KIND(USBx, bEpNum) \ 607 do { \ 608 uint16_t _wRegVal; \ 609 \ 610 _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPREG_MASK; \ 611 \ 612 PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX | USB_EP_CTR_TX | USB_EP_KIND)); \ 613 } while(0) /* PCD_SET_EP_KIND */ 614 615 #define PCD_CLEAR_EP_KIND(USBx, bEpNum) \ 616 do { \ 617 uint16_t _wRegVal; \ 618 \ 619 _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPKIND_MASK; \ 620 \ 621 PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX | USB_EP_CTR_TX)); \ 622 } while(0) /* PCD_CLEAR_EP_KIND */ 623 624 /** 625 * @brief Sets/clears directly STATUS_OUT bit in the endpoint register. 626 * @param USBx USB peripheral instance register address. 627 * @param bEpNum Endpoint Number. 628 * @retval None 629 */ 630 #define PCD_SET_OUT_STATUS(USBx, bEpNum) PCD_SET_EP_KIND((USBx), (bEpNum)) 631 #define PCD_CLEAR_OUT_STATUS(USBx, bEpNum) PCD_CLEAR_EP_KIND((USBx), (bEpNum)) 632 633 /** 634 * @brief Sets/clears directly EP_KIND bit in the endpoint register. 635 * @param USBx USB peripheral instance register address. 636 * @param bEpNum Endpoint Number. 637 * @retval None 638 */ 639 #define PCD_SET_BULK_EP_DBUF(USBx, bEpNum) PCD_SET_EP_KIND((USBx), (bEpNum)) 640 #define PCD_CLEAR_BULK_EP_DBUF(USBx, bEpNum) PCD_CLEAR_EP_KIND((USBx), (bEpNum)) 641 642 /** 643 * @brief Clears bit CTR_RX / CTR_TX in the endpoint register. 644 * @param USBx USB peripheral instance register address. 645 * @param bEpNum Endpoint Number. 646 * @retval None 647 */ 648 #define PCD_CLEAR_RX_EP_CTR(USBx, bEpNum) \ 649 do { \ 650 uint16_t _wRegVal; \ 651 \ 652 _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & (0x7FFFU & USB_EPREG_MASK); \ 653 \ 654 PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_TX)); \ 655 } while(0) /* PCD_CLEAR_RX_EP_CTR */ 656 657 #define PCD_CLEAR_TX_EP_CTR(USBx, bEpNum) \ 658 do { \ 659 uint16_t _wRegVal; \ 660 \ 661 _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & (0xFF7FU & USB_EPREG_MASK); \ 662 \ 663 PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX)); \ 664 } while(0) /* PCD_CLEAR_TX_EP_CTR */ 665 666 /** 667 * @brief Toggles DTOG_RX / DTOG_TX bit in the endpoint register. 668 * @param USBx USB peripheral instance register address. 669 * @param bEpNum Endpoint Number. 670 * @retval None 671 */ 672 #define PCD_RX_DTOG(USBx, bEpNum) \ 673 do { \ 674 uint16_t _wEPVal; \ 675 \ 676 _wEPVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPREG_MASK; \ 677 \ 678 PCD_SET_ENDPOINT((USBx), (bEpNum), (_wEPVal | USB_EP_CTR_RX | USB_EP_CTR_TX | USB_EP_DTOG_RX)); \ 679 } while(0) /* PCD_RX_DTOG */ 680 681 #define PCD_TX_DTOG(USBx, bEpNum) \ 682 do { \ 683 uint16_t _wEPVal; \ 684 \ 685 _wEPVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPREG_MASK; \ 686 \ 687 PCD_SET_ENDPOINT((USBx), (bEpNum), (_wEPVal | USB_EP_CTR_RX | USB_EP_CTR_TX | USB_EP_DTOG_TX)); \ 688 } while(0) /* PCD_TX_DTOG */ 689 /** 690 * @brief Clears DTOG_RX / DTOG_TX bit in the endpoint register. 691 * @param USBx USB peripheral instance register address. 692 * @param bEpNum Endpoint Number. 693 * @retval None 694 */ 695 #define PCD_CLEAR_RX_DTOG(USBx, bEpNum) \ 696 do { \ 697 uint16_t _wRegVal; \ 698 \ 699 _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)); \ 700 \ 701 if ((_wRegVal & USB_EP_DTOG_RX) != 0U)\ 702 { \ 703 PCD_RX_DTOG((USBx), (bEpNum)); \ 704 } \ 705 } while(0) /* PCD_CLEAR_RX_DTOG */ 706 707 #define PCD_CLEAR_TX_DTOG(USBx, bEpNum) \ 708 do { \ 709 uint16_t _wRegVal; \ 710 \ 711 _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)); \ 712 \ 713 if ((_wRegVal & USB_EP_DTOG_TX) != 0U)\ 714 { \ 715 PCD_TX_DTOG((USBx), (bEpNum)); \ 716 } \ 717 } while(0) /* PCD_CLEAR_TX_DTOG */ 718 719 /** 720 * @brief Sets address in an endpoint register. 721 * @param USBx USB peripheral instance register address. 722 * @param bEpNum Endpoint Number. 723 * @param bAddr Address. 724 * @retval None 725 */ 726 #define PCD_SET_EP_ADDRESS(USBx, bEpNum, bAddr) \ 727 do { \ 728 uint16_t _wRegVal; \ 729 \ 730 _wRegVal = (PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPREG_MASK) | (bAddr); \ 731 \ 732 PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX | USB_EP_CTR_TX)); \ 733 } while(0) /* PCD_SET_EP_ADDRESS */ 734 735 /** 736 * @brief Gets address in an endpoint register. 737 * @param USBx USB peripheral instance register address. 738 * @param bEpNum Endpoint Number. 739 * @retval None 740 */ 741 #define PCD_GET_EP_ADDRESS(USBx, bEpNum) ((uint8_t)(PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPADDR_FIELD)) 742 743 #define PCD_EP_TX_CNT(USBx, bEpNum) ((uint16_t *)((((uint32_t)(USBx)->BTABLE\ 744 + ((uint32_t)(bEpNum) * 8U) + 2U) * PMA_ACCESS) + ((uint32_t)(USBx) + 0x400U))) 745 746 #define PCD_EP_RX_CNT(USBx, bEpNum) ((uint16_t *)((((uint32_t)(USBx)->BTABLE\ 747 + ((uint32_t)(bEpNum) * 8U) + 6U) * PMA_ACCESS) + ((uint32_t)(USBx) + 0x400U))) 748 749 750 /** 751 * @brief sets address of the tx/rx buffer. 752 * @param USBx USB peripheral instance register address. 753 * @param bEpNum Endpoint Number. 754 * @param wAddr address to be set (must be word aligned). 755 * @retval None 756 */ 757 #define PCD_SET_EP_TX_ADDRESS(USBx, bEpNum, wAddr) \ 758 do { \ 759 __IO uint16_t *_wRegVal; \ 760 uint32_t _wRegBase = (uint32_t)USBx; \ 761 \ 762 _wRegBase += (uint32_t)(USBx)->BTABLE; \ 763 _wRegVal = (__IO uint16_t *)(_wRegBase + 0x400U + (((uint32_t)(bEpNum) * 8U) * PMA_ACCESS)); \ 764 *_wRegVal = ((wAddr) >> 1) << 1; \ 765 } while(0) /* PCD_SET_EP_TX_ADDRESS */ 766 767 #define PCD_SET_EP_RX_ADDRESS(USBx, bEpNum, wAddr) \ 768 do { \ 769 __IO uint16_t *_wRegVal; \ 770 uint32_t _wRegBase = (uint32_t)USBx; \ 771 \ 772 _wRegBase += (uint32_t)(USBx)->BTABLE; \ 773 _wRegVal = (__IO uint16_t *)(_wRegBase + 0x400U + ((((uint32_t)(bEpNum) * 8U) + 4U) * PMA_ACCESS)); \ 774 *_wRegVal = ((wAddr) >> 1) << 1; \ 775 } while(0) /* PCD_SET_EP_RX_ADDRESS */ 776 777 /** 778 * @brief Gets address of the tx/rx buffer. 779 * @param USBx USB peripheral instance register address. 780 * @param bEpNum Endpoint Number. 781 * @retval address of the buffer. 782 */ 783 #define PCD_GET_EP_TX_ADDRESS(USBx, bEpNum) ((uint16_t)*PCD_EP_TX_ADDRESS((USBx), (bEpNum))) 784 #define PCD_GET_EP_RX_ADDRESS(USBx, bEpNum) ((uint16_t)*PCD_EP_RX_ADDRESS((USBx), (bEpNum))) 785 786 /** 787 * @brief Sets counter of rx buffer with no. of blocks. 788 * @param pdwReg Register pointer 789 * @param wCount Counter. 790 * @param wNBlocks no. of Blocks. 791 * @retval None 792 */ 793 #define PCD_CALC_BLK32(pdwReg, wCount, wNBlocks) \ 794 do { \ 795 (wNBlocks) = (wCount) >> 5; \ 796 if (((wCount) & 0x1fU) == 0U) \ 797 { \ 798 (wNBlocks)--; \ 799 } \ 800 *(pdwReg) = (uint16_t)(((wNBlocks) << 10) | USB_CNTRX_BLSIZE); \ 801 } while(0) /* PCD_CALC_BLK32 */ 802 803 #define PCD_CALC_BLK2(pdwReg, wCount, wNBlocks) \ 804 do { \ 805 (wNBlocks) = (wCount) >> 1; \ 806 if (((wCount) & 0x1U) != 0U) \ 807 { \ 808 (wNBlocks)++; \ 809 } \ 810 *(pdwReg) = (uint16_t)((wNBlocks) << 10); \ 811 } while(0) /* PCD_CALC_BLK2 */ 812 813 #define PCD_SET_EP_CNT_RX_REG(pdwReg, wCount) \ 814 do { \ 815 uint32_t wNBlocks; \ 816 \ 817 if ((wCount) > 62U) \ 818 { \ 819 PCD_CALC_BLK32((pdwReg), (wCount), wNBlocks); \ 820 } \ 821 else \ 822 { \ 823 if ((wCount) == 0U) \ 824 { \ 825 *(pdwReg) &= (uint16_t)~USB_CNTRX_NBLK_MSK; \ 826 *(pdwReg) |= USB_CNTRX_BLSIZE; \ 827 } \ 828 else \ 829 { \ 830 PCD_CALC_BLK2((pdwReg), (wCount), wNBlocks); \ 831 } \ 832 } \ 833 } while(0) /* PCD_SET_EP_CNT_RX_REG */ 834 835 #define PCD_SET_EP_RX_DBUF0_CNT(USBx, bEpNum, wCount) \ 836 do { \ 837 uint32_t _wRegBase = (uint32_t)(USBx); \ 838 __IO uint16_t *pdwReg; \ 839 \ 840 _wRegBase += (uint32_t)(USBx)->BTABLE; \ 841 pdwReg = (__IO uint16_t *)(_wRegBase + 0x400U + ((((uint32_t)(bEpNum) * 8U) + 2U) * PMA_ACCESS)); \ 842 PCD_SET_EP_CNT_RX_REG(pdwReg, (wCount)); \ 843 } while(0) 844 845 /** 846 * @brief sets counter for the tx/rx buffer. 847 * @param USBx USB peripheral instance register address. 848 * @param bEpNum Endpoint Number. 849 * @param wCount Counter value. 850 * @retval None 851 */ 852 #define PCD_SET_EP_TX_CNT(USBx, bEpNum, wCount) \ 853 do { \ 854 uint32_t _wRegBase = (uint32_t)(USBx); \ 855 __IO uint16_t *_wRegVal; \ 856 \ 857 _wRegBase += (uint32_t)(USBx)->BTABLE; \ 858 _wRegVal = (__IO uint16_t *)(_wRegBase + 0x400U + ((((uint32_t)(bEpNum) * 8U) + 2U) * PMA_ACCESS)); \ 859 *_wRegVal = (uint16_t)(wCount); \ 860 } while(0) 861 862 #define PCD_SET_EP_RX_CNT(USBx, bEpNum, wCount) \ 863 do { \ 864 uint32_t _wRegBase = (uint32_t)(USBx); \ 865 __IO uint16_t *_wRegVal; \ 866 \ 867 _wRegBase += (uint32_t)(USBx)->BTABLE; \ 868 _wRegVal = (__IO uint16_t *)(_wRegBase + 0x400U + ((((uint32_t)(bEpNum) * 8U) + 6U) * PMA_ACCESS)); \ 869 PCD_SET_EP_CNT_RX_REG(_wRegVal, (wCount)); \ 870 } while(0) 871 872 /** 873 * @brief gets counter of the tx buffer. 874 * @param USBx USB peripheral instance register address. 875 * @param bEpNum Endpoint Number. 876 * @retval Counter value 877 */ 878 #define PCD_GET_EP_TX_CNT(USBx, bEpNum) ((uint32_t)(*PCD_EP_TX_CNT((USBx), (bEpNum))) & 0x3ffU) 879 #define PCD_GET_EP_RX_CNT(USBx, bEpNum) ((uint32_t)(*PCD_EP_RX_CNT((USBx), (bEpNum))) & 0x3ffU) 880 881 /** 882 * @brief Sets buffer 0/1 address in a double buffer endpoint. 883 * @param USBx USB peripheral instance register address. 884 * @param bEpNum Endpoint Number. 885 * @param wBuf0Addr buffer 0 address. 886 * @retval Counter value 887 */ 888 #define PCD_SET_EP_DBUF0_ADDR(USBx, bEpNum, wBuf0Addr) \ 889 do { \ 890 PCD_SET_EP_TX_ADDRESS((USBx), (bEpNum), (wBuf0Addr)); \ 891 } while(0) /* PCD_SET_EP_DBUF0_ADDR */ 892 893 #define PCD_SET_EP_DBUF1_ADDR(USBx, bEpNum, wBuf1Addr) \ 894 do { \ 895 PCD_SET_EP_RX_ADDRESS((USBx), (bEpNum), (wBuf1Addr)); \ 896 } while(0) /* PCD_SET_EP_DBUF1_ADDR */ 897 898 /** 899 * @brief Sets addresses in a double buffer endpoint. 900 * @param USBx USB peripheral instance register address. 901 * @param bEpNum Endpoint Number. 902 * @param wBuf0Addr: buffer 0 address. 903 * @param wBuf1Addr = buffer 1 address. 904 * @retval None 905 */ 906 #define PCD_SET_EP_DBUF_ADDR(USBx, bEpNum, wBuf0Addr, wBuf1Addr) \ 907 do { \ 908 PCD_SET_EP_DBUF0_ADDR((USBx), (bEpNum), (wBuf0Addr)); \ 909 PCD_SET_EP_DBUF1_ADDR((USBx), (bEpNum), (wBuf1Addr)); \ 910 } while(0) /* PCD_SET_EP_DBUF_ADDR */ 911 912 /** 913 * @brief Gets buffer 0/1 address of a double buffer endpoint. 914 * @param USBx USB peripheral instance register address. 915 * @param bEpNum Endpoint Number. 916 * @retval None 917 */ 918 #define PCD_GET_EP_DBUF0_ADDR(USBx, bEpNum) (PCD_GET_EP_TX_ADDRESS((USBx), (bEpNum))) 919 #define PCD_GET_EP_DBUF1_ADDR(USBx, bEpNum) (PCD_GET_EP_RX_ADDRESS((USBx), (bEpNum))) 920 921 /** 922 * @brief Gets buffer 0/1 address of a double buffer endpoint. 923 * @param USBx USB peripheral instance register address. 924 * @param bEpNum Endpoint Number. 925 * @param bDir endpoint dir EP_DBUF_OUT = OUT 926 * EP_DBUF_IN = IN 927 * @param wCount: Counter value 928 * @retval None 929 */ 930 #define PCD_SET_EP_DBUF0_CNT(USBx, bEpNum, bDir, wCount) \ 931 do { \ 932 if ((bDir) == 0U) \ 933 /* OUT endpoint */ \ 934 { \ 935 PCD_SET_EP_RX_DBUF0_CNT((USBx), (bEpNum), (wCount)); \ 936 } \ 937 else \ 938 { \ 939 if ((bDir) == 1U) \ 940 { \ 941 /* IN endpoint */ \ 942 PCD_SET_EP_TX_CNT((USBx), (bEpNum), (wCount)); \ 943 } \ 944 } \ 945 } while(0) /* SetEPDblBuf0Count*/ 946 947 #define PCD_SET_EP_DBUF1_CNT(USBx, bEpNum, bDir, wCount) \ 948 do { \ 949 uint32_t _wBase = (uint32_t)(USBx); \ 950 __IO uint16_t *_wEPRegVal; \ 951 \ 952 if ((bDir) == 0U) \ 953 { \ 954 /* OUT endpoint */ \ 955 PCD_SET_EP_RX_CNT((USBx), (bEpNum), (wCount)); \ 956 } \ 957 else \ 958 { \ 959 if ((bDir) == 1U) \ 960 { \ 961 /* IN endpoint */ \ 962 _wBase += (uint32_t)(USBx)->BTABLE; \ 963 _wEPRegVal = (__IO uint16_t *)(_wBase + 0x400U + ((((uint32_t)(bEpNum) * 8U) + 6U) * PMA_ACCESS)); \ 964 *_wEPRegVal = (uint16_t)(wCount); \ 965 } \ 966 } \ 967 } while(0) /* SetEPDblBuf1Count */ 968 969 #define PCD_SET_EP_DBUF_CNT(USBx, bEpNum, bDir, wCount) \ 970 do { \ 971 PCD_SET_EP_DBUF0_CNT((USBx), (bEpNum), (bDir), (wCount)); \ 972 PCD_SET_EP_DBUF1_CNT((USBx), (bEpNum), (bDir), (wCount)); \ 973 } while(0) /* PCD_SET_EP_DBUF_CNT */ 974 975 /** 976 * @brief Gets buffer 0/1 rx/tx counter for double buffering. 977 * @param USBx USB peripheral instance register address. 978 * @param bEpNum Endpoint Number. 979 * @retval None 980 */ 981 #define PCD_GET_EP_DBUF0_CNT(USBx, bEpNum) (PCD_GET_EP_TX_CNT((USBx), (bEpNum))) 982 #define PCD_GET_EP_DBUF1_CNT(USBx, bEpNum) (PCD_GET_EP_RX_CNT((USBx), (bEpNum))) 983 984 985 986 /** 987 * @} 988 */ 989 990 /** 991 * @} 992 */ 993 994 /** 995 * @} 996 */ 997 #endif /* defined (USB) */ 998 999 #ifdef __cplusplus 1000 } 1001 #endif 1002 1003 #endif /* STM32G4xx_HAL_PCD_H */ 1004
