1 /**
2 ******************************************************************************
3 * @file stm32g0xx_ll_usart.c
4 * @author MCD Application Team
5 * @brief USART LL module driver.
6 ******************************************************************************
7 * @attention
8 *
9 * Copyright (c) 2018 STMicroelectronics.
10 * All rights reserved.
11 *
12 * This software is licensed under terms that can be found in the LICENSE file
13 * in the root directory of this software component.
14 * If no LICENSE file comes with this software, it is provided AS-IS.
15 *
16 ******************************************************************************
17 */
18 #if defined(USE_FULL_LL_DRIVER)
19
20 /* Includes ------------------------------------------------------------------*/
21 #include "stm32g0xx_ll_usart.h"
22 #include "stm32g0xx_ll_rcc.h"
23 #include "stm32g0xx_ll_bus.h"
24 #ifdef USE_FULL_ASSERT
25 #include "stm32_assert.h"
26 #else
27 #define assert_param(expr) ((void)0U)
28 #endif /* USE_FULL_ASSERT */
29
30 /** @addtogroup STM32G0xx_LL_Driver
31 * @{
32 */
33
34 #if defined (USART1) || defined (USART2) || defined (USART3) || defined (USART4) || defined (USART5) || defined (USART6)
35
36 /** @addtogroup USART_LL
37 * @{
38 */
39
40 /* Private types -------------------------------------------------------------*/
41 /* Private variables ---------------------------------------------------------*/
42 /* Private constants ---------------------------------------------------------*/
43 /* Private macros ------------------------------------------------------------*/
44 /** @addtogroup USART_LL_Private_Macros
45 * @{
46 */
47
48 #define IS_LL_USART_PRESCALER(__VALUE__) (((__VALUE__) == LL_USART_PRESCALER_DIV1) \
49 || ((__VALUE__) == LL_USART_PRESCALER_DIV2) \
50 || ((__VALUE__) == LL_USART_PRESCALER_DIV4) \
51 || ((__VALUE__) == LL_USART_PRESCALER_DIV6) \
52 || ((__VALUE__) == LL_USART_PRESCALER_DIV8) \
53 || ((__VALUE__) == LL_USART_PRESCALER_DIV10) \
54 || ((__VALUE__) == LL_USART_PRESCALER_DIV12) \
55 || ((__VALUE__) == LL_USART_PRESCALER_DIV16) \
56 || ((__VALUE__) == LL_USART_PRESCALER_DIV32) \
57 || ((__VALUE__) == LL_USART_PRESCALER_DIV64) \
58 || ((__VALUE__) == LL_USART_PRESCALER_DIV128) \
59 || ((__VALUE__) == LL_USART_PRESCALER_DIV256))
60
61 /* __BAUDRATE__ The maximum Baud Rate is derived from the maximum clock available
62 * divided by the smallest oversampling used on the USART (i.e. 8) */
63 #define IS_LL_USART_BAUDRATE(__BAUDRATE__) ((__BAUDRATE__) <= 8000000U)
64
65 /* __VALUE__ In case of oversampling by 16 and 8, BRR content must be greater than or equal to 16d. */
66 #define IS_LL_USART_BRR_MIN(__VALUE__) ((__VALUE__) >= 16U)
67
68 #define IS_LL_USART_DIRECTION(__VALUE__) (((__VALUE__) == LL_USART_DIRECTION_NONE) \
69 || ((__VALUE__) == LL_USART_DIRECTION_RX) \
70 || ((__VALUE__) == LL_USART_DIRECTION_TX) \
71 || ((__VALUE__) == LL_USART_DIRECTION_TX_RX))
72
73 #define IS_LL_USART_PARITY(__VALUE__) (((__VALUE__) == LL_USART_PARITY_NONE) \
74 || ((__VALUE__) == LL_USART_PARITY_EVEN) \
75 || ((__VALUE__) == LL_USART_PARITY_ODD))
76
77 #define IS_LL_USART_DATAWIDTH(__VALUE__) (((__VALUE__) == LL_USART_DATAWIDTH_7B) \
78 || ((__VALUE__) == LL_USART_DATAWIDTH_8B) \
79 || ((__VALUE__) == LL_USART_DATAWIDTH_9B))
80
81 #define IS_LL_USART_OVERSAMPLING(__VALUE__) (((__VALUE__) == LL_USART_OVERSAMPLING_16) \
82 || ((__VALUE__) == LL_USART_OVERSAMPLING_8))
83
84 #define IS_LL_USART_LASTBITCLKOUTPUT(__VALUE__) (((__VALUE__) == LL_USART_LASTCLKPULSE_NO_OUTPUT) \
85 || ((__VALUE__) == LL_USART_LASTCLKPULSE_OUTPUT))
86
87 #define IS_LL_USART_CLOCKPHASE(__VALUE__) (((__VALUE__) == LL_USART_PHASE_1EDGE) \
88 || ((__VALUE__) == LL_USART_PHASE_2EDGE))
89
90 #define IS_LL_USART_CLOCKPOLARITY(__VALUE__) (((__VALUE__) == LL_USART_POLARITY_LOW) \
91 || ((__VALUE__) == LL_USART_POLARITY_HIGH))
92
93 #define IS_LL_USART_CLOCKOUTPUT(__VALUE__) (((__VALUE__) == LL_USART_CLOCK_DISABLE) \
94 || ((__VALUE__) == LL_USART_CLOCK_ENABLE))
95
96 #define IS_LL_USART_STOPBITS(__VALUE__) (((__VALUE__) == LL_USART_STOPBITS_0_5) \
97 || ((__VALUE__) == LL_USART_STOPBITS_1) \
98 || ((__VALUE__) == LL_USART_STOPBITS_1_5) \
99 || ((__VALUE__) == LL_USART_STOPBITS_2))
100
101 #define IS_LL_USART_HWCONTROL(__VALUE__) (((__VALUE__) == LL_USART_HWCONTROL_NONE) \
102 || ((__VALUE__) == LL_USART_HWCONTROL_RTS) \
103 || ((__VALUE__) == LL_USART_HWCONTROL_CTS) \
104 || ((__VALUE__) == LL_USART_HWCONTROL_RTS_CTS))
105
106 /**
107 * @}
108 */
109
110 /* Private function prototypes -----------------------------------------------*/
111
112 /* Exported functions --------------------------------------------------------*/
113 /** @addtogroup USART_LL_Exported_Functions
114 * @{
115 */
116
117 /** @addtogroup USART_LL_EF_Init
118 * @{
119 */
120
121 /**
122 * @brief De-initialize USART registers (Registers restored to their default values).
123 * @param USARTx USART Instance
124 * @retval An ErrorStatus enumeration value:
125 * - SUCCESS: USART registers are de-initialized
126 * - ERROR: USART registers are not de-initialized
127 */
LL_USART_DeInit(const USART_TypeDef * USARTx)128 ErrorStatus LL_USART_DeInit(const USART_TypeDef *USARTx)
129 {
130 ErrorStatus status = SUCCESS;
131
132 /* Check the parameters */
133 assert_param(IS_UART_INSTANCE(USARTx));
134
135 if (USARTx == USART1)
136 {
137 /* Force reset of USART clock */
138 LL_APB2_GRP1_ForceReset(LL_APB2_GRP1_PERIPH_USART1);
139
140 /* Release reset of USART clock */
141 LL_APB2_GRP1_ReleaseReset(LL_APB2_GRP1_PERIPH_USART1);
142 }
143 else if (USARTx == USART2)
144 {
145 /* Force reset of USART clock */
146 LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_USART2);
147
148 /* Release reset of USART clock */
149 LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_USART2);
150 }
151 #if defined(USART3)
152 else if (USARTx == USART3)
153 {
154 /* Force reset of USART clock */
155 LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_USART3);
156
157 /* Release reset of USART clock */
158 LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_USART3);
159 }
160 #endif /* USART3 */
161 #if defined(USART4)
162 else if (USARTx == USART4)
163 {
164 /* Force reset of USART clock */
165 LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_USART4);
166
167 /* Release reset of USART clock */
168 LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_USART4);
169 }
170 #endif /* USART4 */
171 #if defined(USART5)
172 else if (USARTx == USART5)
173 {
174 /* Force reset of USART clock */
175 LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_USART5);
176
177 /* Release reset of USART clock */
178 LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_USART5);
179 }
180 #endif /* USART5 */
181 #if defined(USART6)
182 else if (USARTx == USART6)
183 {
184 /* Force reset of USART clock */
185 LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_USART6);
186
187 /* Release reset of USART clock */
188 LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_USART6);
189 }
190 #endif /* USART6 */
191 else
192 {
193 status = ERROR;
194 }
195
196 return (status);
197 }
198
199 /**
200 * @brief Initialize USART registers according to the specified
201 * parameters in USART_InitStruct.
202 * @note As some bits in USART configuration registers can only be written when
203 * the USART is disabled (USART_CR1_UE bit =0), USART Peripheral should be in disabled state prior calling
204 * this function. Otherwise, ERROR result will be returned.
205 * @note Baud rate value stored in USART_InitStruct BaudRate field, should be valid (different from 0).
206 * @param USARTx USART Instance
207 * @param USART_InitStruct pointer to a LL_USART_InitTypeDef structure
208 * that contains the configuration information for the specified USART peripheral.
209 * @retval An ErrorStatus enumeration value:
210 * - SUCCESS: USART registers are initialized according to USART_InitStruct content
211 * - ERROR: Problem occurred during USART Registers initialization
212 */
LL_USART_Init(USART_TypeDef * USARTx,const LL_USART_InitTypeDef * USART_InitStruct)213 ErrorStatus LL_USART_Init(USART_TypeDef *USARTx, const LL_USART_InitTypeDef *USART_InitStruct)
214 {
215 ErrorStatus status = ERROR;
216 uint32_t periphclk = LL_RCC_PERIPH_FREQUENCY_NO;
217 #if !defined(RCC_CCIPR_USART3SEL)&&!defined(RCC_CCIPR_USART4SEL)||(!defined(RCC_CCIPR_USART2SEL))||!defined(RCC_CCIPR_USART5SEL)||!defined(RCC_CCIPR_USART6SEL)
218 LL_RCC_ClocksTypeDef RCC_Clocks;
219 #endif /* USART clock selection flags */
220
221 /* Check the parameters */
222 assert_param(IS_UART_INSTANCE(USARTx));
223 assert_param(IS_LL_USART_PRESCALER(USART_InitStruct->PrescalerValue));
224 assert_param(IS_LL_USART_BAUDRATE(USART_InitStruct->BaudRate));
225 assert_param(IS_LL_USART_DATAWIDTH(USART_InitStruct->DataWidth));
226 assert_param(IS_LL_USART_STOPBITS(USART_InitStruct->StopBits));
227 assert_param(IS_LL_USART_PARITY(USART_InitStruct->Parity));
228 assert_param(IS_LL_USART_DIRECTION(USART_InitStruct->TransferDirection));
229 assert_param(IS_LL_USART_HWCONTROL(USART_InitStruct->HardwareFlowControl));
230 assert_param(IS_LL_USART_OVERSAMPLING(USART_InitStruct->OverSampling));
231
232 /* USART needs to be in disabled state, in order to be able to configure some bits in
233 CRx registers */
234 if (LL_USART_IsEnabled(USARTx) == 0U)
235 {
236 /*---------------------------- USART CR1 Configuration ---------------------
237 * Configure USARTx CR1 (USART Word Length, Parity, Mode and Oversampling bits) with parameters:
238 * - DataWidth: USART_CR1_M bits according to USART_InitStruct->DataWidth value
239 * - Parity: USART_CR1_PCE, USART_CR1_PS bits according to USART_InitStruct->Parity value
240 * - TransferDirection: USART_CR1_TE, USART_CR1_RE bits according to USART_InitStruct->TransferDirection value
241 * - Oversampling: USART_CR1_OVER8 bit according to USART_InitStruct->OverSampling value.
242 */
243 MODIFY_REG(USARTx->CR1,
244 (USART_CR1_M | USART_CR1_PCE | USART_CR1_PS |
245 USART_CR1_TE | USART_CR1_RE | USART_CR1_OVER8),
246 (USART_InitStruct->DataWidth | USART_InitStruct->Parity |
247 USART_InitStruct->TransferDirection | USART_InitStruct->OverSampling));
248
249 /*---------------------------- USART CR2 Configuration ---------------------
250 * Configure USARTx CR2 (Stop bits) with parameters:
251 * - Stop Bits: USART_CR2_STOP bits according to USART_InitStruct->StopBits value.
252 * - CLKEN, CPOL, CPHA and LBCL bits are to be configured using LL_USART_ClockInit().
253 */
254 LL_USART_SetStopBitsLength(USARTx, USART_InitStruct->StopBits);
255
256 /*---------------------------- USART CR3 Configuration ---------------------
257 * Configure USARTx CR3 (Hardware Flow Control) with parameters:
258 * - HardwareFlowControl: USART_CR3_RTSE, USART_CR3_CTSE bits according to
259 * USART_InitStruct->HardwareFlowControl value.
260 */
261 LL_USART_SetHWFlowCtrl(USARTx, USART_InitStruct->HardwareFlowControl);
262
263 /*---------------------------- USART BRR Configuration ---------------------
264 * Retrieve Clock frequency used for USART Peripheral
265 */
266 if (USARTx == USART1)
267 {
268 periphclk = LL_RCC_GetUSARTClockFreq(LL_RCC_USART1_CLKSOURCE);
269 }
270 else if (USARTx == USART2)
271 {
272 #if defined(RCC_CCIPR_USART2SEL)
273 periphclk = LL_RCC_GetUSARTClockFreq(LL_RCC_USART2_CLKSOURCE);
274 #else
275 /* USART2 clock is PCLK */
276 LL_RCC_GetSystemClocksFreq(&RCC_Clocks);
277 periphclk = RCC_Clocks.PCLK1_Frequency;
278 #endif /* USART2 Clock selector flag */
279 }
280 #if defined(USART3)
281 else if (USARTx == USART3)
282 {
283 #if defined(RCC_CCIPR_USART3SEL)
284 periphclk = LL_RCC_GetUSARTClockFreq(LL_RCC_USART3_CLKSOURCE);
285 #else
286 /* USART3 clock is PCLK */
287 LL_RCC_GetSystemClocksFreq(&RCC_Clocks);
288 periphclk = RCC_Clocks.PCLK1_Frequency;
289 #endif /* USART3 Clock selector flag */
290 }
291 #endif /* USART3 */
292 #if defined(USART4)
293 else if (USARTx == USART4)
294 {
295 #if defined(RCC_CCIPR_USART4SEL)
296 periphclk = LL_RCC_GetUSARTClockFreq(LL_RCC_USART4_CLKSOURCE);
297 #else
298 /* USART4 clock is PCLK1 */
299 LL_RCC_GetSystemClocksFreq(&RCC_Clocks);
300 periphclk = RCC_Clocks.PCLK1_Frequency;
301 #endif /* RCC_CCIPR_USART4SEL */
302 }
303 #endif /* USART4 */
304 #if defined(USART5)
305 else if (USARTx == USART5)
306 {
307 /* USART5 clock is PCLK1 */
308 LL_RCC_GetSystemClocksFreq(&RCC_Clocks);
309 periphclk = RCC_Clocks.PCLK1_Frequency;
310 }
311 #endif /* USART5 */
312 #if defined(USART6)
313 else if (USARTx == USART6)
314 {
315 /* USART6 clock is PCLK1 */
316 LL_RCC_GetSystemClocksFreq(&RCC_Clocks);
317 periphclk = RCC_Clocks.PCLK1_Frequency;
318 }
319 #endif /* USART6 */
320 else
321 {
322 /* Nothing to do, as error code is already assigned to ERROR value */
323 }
324
325 /* Configure the USART Baud Rate :
326 - prescaler value is required
327 - valid baud rate value (different from 0) is required
328 - Peripheral clock as returned by RCC service, should be valid (different from 0).
329 */
330 if ((periphclk != LL_RCC_PERIPH_FREQUENCY_NO)
331 && (USART_InitStruct->BaudRate != 0U))
332 {
333 status = SUCCESS;
334 LL_USART_SetBaudRate(USARTx,
335 periphclk,
336 USART_InitStruct->PrescalerValue,
337 USART_InitStruct->OverSampling,
338 USART_InitStruct->BaudRate);
339
340 /* Check BRR is greater than or equal to 16d */
341 assert_param(IS_LL_USART_BRR_MIN(USARTx->BRR));
342 }
343
344 /*---------------------------- USART PRESC Configuration -----------------------
345 * Configure USARTx PRESC (Prescaler) with parameters:
346 * - PrescalerValue: USART_PRESC_PRESCALER bits according to USART_InitStruct->PrescalerValue value.
347 */
348 LL_USART_SetPrescaler(USARTx, USART_InitStruct->PrescalerValue);
349 }
350 /* Endif (=> USART not in Disabled state => return ERROR) */
351
352 return (status);
353 }
354
355 /**
356 * @brief Set each @ref LL_USART_InitTypeDef field to default value.
357 * @param USART_InitStruct pointer to a @ref LL_USART_InitTypeDef structure
358 * whose fields will be set to default values.
359 * @retval None
360 */
361
LL_USART_StructInit(LL_USART_InitTypeDef * USART_InitStruct)362 void LL_USART_StructInit(LL_USART_InitTypeDef *USART_InitStruct)
363 {
364 /* Set USART_InitStruct fields to default values */
365 USART_InitStruct->PrescalerValue = LL_USART_PRESCALER_DIV1;
366 USART_InitStruct->BaudRate = 9600U;
367 USART_InitStruct->DataWidth = LL_USART_DATAWIDTH_8B;
368 USART_InitStruct->StopBits = LL_USART_STOPBITS_1;
369 USART_InitStruct->Parity = LL_USART_PARITY_NONE ;
370 USART_InitStruct->TransferDirection = LL_USART_DIRECTION_TX_RX;
371 USART_InitStruct->HardwareFlowControl = LL_USART_HWCONTROL_NONE;
372 USART_InitStruct->OverSampling = LL_USART_OVERSAMPLING_16;
373 }
374
375 /**
376 * @brief Initialize USART Clock related settings according to the
377 * specified parameters in the USART_ClockInitStruct.
378 * @note As some bits in USART configuration registers can only be written when
379 * the USART is disabled (USART_CR1_UE bit =0), USART Peripheral should be in disabled state prior calling
380 * this function. Otherwise, ERROR result will be returned.
381 * @param USARTx USART Instance
382 * @param USART_ClockInitStruct pointer to a @ref LL_USART_ClockInitTypeDef structure
383 * that contains the Clock configuration information for the specified USART peripheral.
384 * @retval An ErrorStatus enumeration value:
385 * - SUCCESS: USART registers related to Clock settings are initialized according
386 * to USART_ClockInitStruct content
387 * - ERROR: Problem occurred during USART Registers initialization
388 */
LL_USART_ClockInit(USART_TypeDef * USARTx,const LL_USART_ClockInitTypeDef * USART_ClockInitStruct)389 ErrorStatus LL_USART_ClockInit(USART_TypeDef *USARTx, const LL_USART_ClockInitTypeDef *USART_ClockInitStruct)
390 {
391 ErrorStatus status = SUCCESS;
392
393 /* Check USART Instance and Clock signal output parameters */
394 assert_param(IS_UART_INSTANCE(USARTx));
395 assert_param(IS_LL_USART_CLOCKOUTPUT(USART_ClockInitStruct->ClockOutput));
396
397 /* USART needs to be in disabled state, in order to be able to configure some bits in
398 CRx registers */
399 if (LL_USART_IsEnabled(USARTx) == 0U)
400 {
401 /* Ensure USART instance is USART capable */
402 assert_param(IS_USART_INSTANCE(USARTx));
403
404 /* Check clock related parameters */
405 assert_param(IS_LL_USART_CLOCKPOLARITY(USART_ClockInitStruct->ClockPolarity));
406 assert_param(IS_LL_USART_CLOCKPHASE(USART_ClockInitStruct->ClockPhase));
407 assert_param(IS_LL_USART_LASTBITCLKOUTPUT(USART_ClockInitStruct->LastBitClockPulse));
408
409 /*---------------------------- USART CR2 Configuration -----------------------
410 * Configure USARTx CR2 (Clock signal related bits) with parameters:
411 * - Clock Output: USART_CR2_CLKEN bit according to USART_ClockInitStruct->ClockOutput value
412 * - Clock Polarity: USART_CR2_CPOL bit according to USART_ClockInitStruct->ClockPolarity value
413 * - Clock Phase: USART_CR2_CPHA bit according to USART_ClockInitStruct->ClockPhase value
414 * - Last Bit Clock Pulse Output: USART_CR2_LBCL bit according to USART_ClockInitStruct->LastBitClockPulse value.
415 */
416 MODIFY_REG(USARTx->CR2,
417 USART_CR2_CLKEN | USART_CR2_CPHA | USART_CR2_CPOL | USART_CR2_LBCL,
418 USART_ClockInitStruct->ClockOutput | USART_ClockInitStruct->ClockPolarity |
419 USART_ClockInitStruct->ClockPhase | USART_ClockInitStruct->LastBitClockPulse);
420 }
421 /* Else (USART not in Disabled state => return ERROR */
422 else
423 {
424 status = ERROR;
425 }
426
427 return (status);
428 }
429
430 /**
431 * @brief Set each field of a @ref LL_USART_ClockInitTypeDef type structure to default value.
432 * @param USART_ClockInitStruct pointer to a @ref LL_USART_ClockInitTypeDef structure
433 * whose fields will be set to default values.
434 * @retval None
435 */
LL_USART_ClockStructInit(LL_USART_ClockInitTypeDef * USART_ClockInitStruct)436 void LL_USART_ClockStructInit(LL_USART_ClockInitTypeDef *USART_ClockInitStruct)
437 {
438 /* Set LL_USART_ClockInitStruct fields with default values */
439 USART_ClockInitStruct->ClockOutput = LL_USART_CLOCK_DISABLE;
440 USART_ClockInitStruct->ClockPolarity = LL_USART_POLARITY_LOW; /* Not relevant when ClockOutput =
441 LL_USART_CLOCK_DISABLE */
442 USART_ClockInitStruct->ClockPhase = LL_USART_PHASE_1EDGE; /* Not relevant when ClockOutput =
443 LL_USART_CLOCK_DISABLE */
444 USART_ClockInitStruct->LastBitClockPulse = LL_USART_LASTCLKPULSE_NO_OUTPUT; /* Not relevant when ClockOutput =
445 LL_USART_CLOCK_DISABLE */
446 }
447
448 /**
449 * @}
450 */
451
452 /**
453 * @}
454 */
455
456 /**
457 * @}
458 */
459
460 #endif /* USART1 || USART2 || USART3 || USART4 || USART5 || USART6 */
461
462 /**
463 * @}
464 */
465
466 #endif /* USE_FULL_LL_DRIVER */
467
468
