1 /**
2 ******************************************************************************
3 * @file stm32g0xx_hal_tim_ex.c
4 * @author MCD Application Team
5 * @brief TIM HAL module driver.
6 * This file provides firmware functions to manage the following
7 * functionalities of the Timer Extended peripheral:
8 * + Time Hall Sensor Interface Initialization
9 * + Time Hall Sensor Interface Start
10 * + Time Complementary signal break and dead time configuration
11 * + Time Master and Slave synchronization configuration
12 * + Time Output Compare/PWM Channel Configuration (for channels 5 and 6)
13 * + Time OCRef clear configuration
14 * + Timer remapping capabilities configuration
15 ******************************************************************************
16 * @attention
17 *
18 * Copyright (c) 2018 STMicroelectronics.
19 * All rights reserved.
20 *
21 * This software is licensed under terms that can be found in the LICENSE file
22 * in the root directory of this software component.
23 * If no LICENSE file comes with this software, it is provided AS-IS.
24 *
25 ******************************************************************************
26 @verbatim
27 ==============================================================================
28 ##### TIMER Extended features #####
29 ==============================================================================
30 [..]
31 The Timer Extended features include:
32 (#) Complementary outputs with programmable dead-time for :
33 (++) Output Compare
34 (++) PWM generation (Edge and Center-aligned Mode)
35 (++) One-pulse mode output
36 (#) Synchronization circuit to control the timer with external signals and to
37 interconnect several timers together.
38 (#) Break input to put the timer output signals in reset state or in a known state.
39 (#) Supports incremental (quadrature) encoder and hall-sensor circuitry for
40 positioning purposes
41
42 ##### How to use this driver #####
43 ==============================================================================
44 [..]
45 (#) Initialize the TIM low level resources by implementing the following functions
46 depending on the selected feature:
47 (++) Hall Sensor output : HAL_TIMEx_HallSensor_MspInit()
48
49 (#) Initialize the TIM low level resources :
50 (##) Enable the TIM interface clock using __HAL_RCC_TIMx_CLK_ENABLE();
51 (##) TIM pins configuration
52 (+++) Enable the clock for the TIM GPIOs using the following function:
53 __HAL_RCC_GPIOx_CLK_ENABLE();
54 (+++) Configure these TIM pins in Alternate function mode using HAL_GPIO_Init();
55
56 (#) The external Clock can be configured, if needed (the default clock is the
57 internal clock from the APBx), using the following function:
58 HAL_TIM_ConfigClockSource, the clock configuration should be done before
59 any start function.
60
61 (#) Configure the TIM in the desired functioning mode using one of the
62 initialization function of this driver:
63 (++) HAL_TIMEx_HallSensor_Init() and HAL_TIMEx_ConfigCommutEvent(): to use the
64 Timer Hall Sensor Interface and the commutation event with the corresponding
65 Interrupt and DMA request if needed (Note that One Timer is used to interface
66 with the Hall sensor Interface and another Timer should be used to use
67 the commutation event).
68
69 (#) Activate the TIM peripheral using one of the start functions:
70 (++) Complementary Output Compare : HAL_TIMEx_OCN_Start(), HAL_TIMEx_OCN_Start_DMA(),
71 HAL_TIMEx_OCN_Start_IT()
72 (++) Complementary PWM generation : HAL_TIMEx_PWMN_Start(), HAL_TIMEx_PWMN_Start_DMA(),
73 HAL_TIMEx_PWMN_Start_IT()
74 (++) Complementary One-pulse mode output : HAL_TIMEx_OnePulseN_Start(), HAL_TIMEx_OnePulseN_Start_IT()
75 (++) Hall Sensor output : HAL_TIMEx_HallSensor_Start(), HAL_TIMEx_HallSensor_Start_DMA(),
76 HAL_TIMEx_HallSensor_Start_IT().
77
78 @endverbatim
79 ******************************************************************************
80 */
81
82 /* Includes ------------------------------------------------------------------*/
83 #include "stm32g0xx_hal.h"
84
85 /** @addtogroup STM32G0xx_HAL_Driver
86 * @{
87 */
88
89 /** @defgroup TIMEx TIMEx
90 * @brief TIM Extended HAL module driver
91 * @{
92 */
93
94 #ifdef HAL_TIM_MODULE_ENABLED
95
96 /* Private typedef -----------------------------------------------------------*/
97 /* Private define ------------------------------------------------------------*/
98 /* Private constants ---------------------------------------------------------*/
99 /** @defgroup TIMEx_Private_Constants TIM Extended Private Constants
100 * @{
101 */
102 /* Timeout for break input rearm */
103 #define TIM_BREAKINPUT_REARM_TIMEOUT 5UL /* 5 milliseconds */
104 /**
105 * @}
106 */
107 /* End of private constants --------------------------------------------------*/
108
109 /* Private macros ------------------------------------------------------------*/
110 /* Private variables ---------------------------------------------------------*/
111 /* Private function prototypes -----------------------------------------------*/
112 static void TIM_DMADelayPulseNCplt(DMA_HandleTypeDef *hdma);
113 static void TIM_DMAErrorCCxN(DMA_HandleTypeDef *hdma);
114 static void TIM_CCxNChannelCmd(TIM_TypeDef *TIMx, uint32_t Channel, uint32_t ChannelNState);
115
116 /* Exported functions --------------------------------------------------------*/
117 /** @defgroup TIMEx_Exported_Functions TIM Extended Exported Functions
118 * @{
119 */
120
121 /** @defgroup TIMEx_Exported_Functions_Group1 Extended Timer Hall Sensor functions
122 * @brief Timer Hall Sensor functions
123 *
124 @verbatim
125 ==============================================================================
126 ##### Timer Hall Sensor functions #####
127 ==============================================================================
128 [..]
129 This section provides functions allowing to:
130 (+) Initialize and configure TIM HAL Sensor.
131 (+) De-initialize TIM HAL Sensor.
132 (+) Start the Hall Sensor Interface.
133 (+) Stop the Hall Sensor Interface.
134 (+) Start the Hall Sensor Interface and enable interrupts.
135 (+) Stop the Hall Sensor Interface and disable interrupts.
136 (+) Start the Hall Sensor Interface and enable DMA transfers.
137 (+) Stop the Hall Sensor Interface and disable DMA transfers.
138
139 @endverbatim
140 * @{
141 */
142 /**
143 * @brief Initializes the TIM Hall Sensor Interface and initialize the associated handle.
144 * @note When the timer instance is initialized in Hall Sensor Interface mode,
145 * timer channels 1 and channel 2 are reserved and cannot be used for
146 * other purpose.
147 * @param htim TIM Hall Sensor Interface handle
148 * @param sConfig TIM Hall Sensor configuration structure
149 * @retval HAL status
150 */
HAL_TIMEx_HallSensor_Init(TIM_HandleTypeDef * htim,const TIM_HallSensor_InitTypeDef * sConfig)151 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Init(TIM_HandleTypeDef *htim, const TIM_HallSensor_InitTypeDef *sConfig)
152 {
153 TIM_OC_InitTypeDef OC_Config;
154
155 /* Check the TIM handle allocation */
156 if (htim == NULL)
157 {
158 return HAL_ERROR;
159 }
160
161 /* Check the parameters */
162 assert_param(IS_TIM_HALL_SENSOR_INTERFACE_INSTANCE(htim->Instance));
163 assert_param(IS_TIM_COUNTER_MODE(htim->Init.CounterMode));
164 assert_param(IS_TIM_CLOCKDIVISION_DIV(htim->Init.ClockDivision));
165 assert_param(IS_TIM_AUTORELOAD_PRELOAD(htim->Init.AutoReloadPreload));
166 assert_param(IS_TIM_IC_POLARITY(sConfig->IC1Polarity));
167 assert_param(IS_TIM_PERIOD(htim, htim->Init.Period));
168 assert_param(IS_TIM_IC_PRESCALER(sConfig->IC1Prescaler));
169 assert_param(IS_TIM_IC_FILTER(sConfig->IC1Filter));
170
171 if (htim->State == HAL_TIM_STATE_RESET)
172 {
173 /* Allocate lock resource and initialize it */
174 htim->Lock = HAL_UNLOCKED;
175
176 #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
177 /* Reset interrupt callbacks to legacy week callbacks */
178 TIM_ResetCallback(htim);
179
180 if (htim->HallSensor_MspInitCallback == NULL)
181 {
182 htim->HallSensor_MspInitCallback = HAL_TIMEx_HallSensor_MspInit;
183 }
184 /* Init the low level hardware : GPIO, CLOCK, NVIC */
185 htim->HallSensor_MspInitCallback(htim);
186 #else
187 /* Init the low level hardware : GPIO, CLOCK, NVIC and DMA */
188 HAL_TIMEx_HallSensor_MspInit(htim);
189 #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
190 }
191
192 /* Set the TIM state */
193 htim->State = HAL_TIM_STATE_BUSY;
194
195 /* Configure the Time base in the Encoder Mode */
196 TIM_Base_SetConfig(htim->Instance, &htim->Init);
197
198 /* Configure the Channel 1 as Input Channel to interface with the three Outputs of the Hall sensor */
199 TIM_TI1_SetConfig(htim->Instance, sConfig->IC1Polarity, TIM_ICSELECTION_TRC, sConfig->IC1Filter);
200
201 /* Reset the IC1PSC Bits */
202 htim->Instance->CCMR1 &= ~TIM_CCMR1_IC1PSC;
203 /* Set the IC1PSC value */
204 htim->Instance->CCMR1 |= sConfig->IC1Prescaler;
205
206 /* Enable the Hall sensor interface (XOR function of the three inputs) */
207 htim->Instance->CR2 |= TIM_CR2_TI1S;
208
209 /* Select the TIM_TS_TI1F_ED signal as Input trigger for the TIM */
210 htim->Instance->SMCR &= ~TIM_SMCR_TS;
211 htim->Instance->SMCR |= TIM_TS_TI1F_ED;
212
213 /* Use the TIM_TS_TI1F_ED signal to reset the TIM counter each edge detection */
214 htim->Instance->SMCR &= ~TIM_SMCR_SMS;
215 htim->Instance->SMCR |= TIM_SLAVEMODE_RESET;
216
217 /* Program channel 2 in PWM 2 mode with the desired Commutation_Delay*/
218 OC_Config.OCFastMode = TIM_OCFAST_DISABLE;
219 OC_Config.OCIdleState = TIM_OCIDLESTATE_RESET;
220 OC_Config.OCMode = TIM_OCMODE_PWM2;
221 OC_Config.OCNIdleState = TIM_OCNIDLESTATE_RESET;
222 OC_Config.OCNPolarity = TIM_OCNPOLARITY_HIGH;
223 OC_Config.OCPolarity = TIM_OCPOLARITY_HIGH;
224 OC_Config.Pulse = sConfig->Commutation_Delay;
225
226 TIM_OC2_SetConfig(htim->Instance, &OC_Config);
227
228 /* Select OC2REF as trigger output on TRGO: write the MMS bits in the TIMx_CR2
229 register to 101 */
230 htim->Instance->CR2 &= ~TIM_CR2_MMS;
231 htim->Instance->CR2 |= TIM_TRGO_OC2REF;
232
233 /* Initialize the DMA burst operation state */
234 htim->DMABurstState = HAL_DMA_BURST_STATE_READY;
235
236 /* Initialize the TIM channels state */
237 TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY);
238 TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY);
239 TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY);
240 TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY);
241
242 /* Initialize the TIM state*/
243 htim->State = HAL_TIM_STATE_READY;
244
245 return HAL_OK;
246 }
247
248 /**
249 * @brief DeInitializes the TIM Hall Sensor interface
250 * @param htim TIM Hall Sensor Interface handle
251 * @retval HAL status
252 */
HAL_TIMEx_HallSensor_DeInit(TIM_HandleTypeDef * htim)253 HAL_StatusTypeDef HAL_TIMEx_HallSensor_DeInit(TIM_HandleTypeDef *htim)
254 {
255 /* Check the parameters */
256 assert_param(IS_TIM_INSTANCE(htim->Instance));
257
258 htim->State = HAL_TIM_STATE_BUSY;
259
260 /* Disable the TIM Peripheral Clock */
261 __HAL_TIM_DISABLE(htim);
262
263 #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
264 if (htim->HallSensor_MspDeInitCallback == NULL)
265 {
266 htim->HallSensor_MspDeInitCallback = HAL_TIMEx_HallSensor_MspDeInit;
267 }
268 /* DeInit the low level hardware */
269 htim->HallSensor_MspDeInitCallback(htim);
270 #else
271 /* DeInit the low level hardware: GPIO, CLOCK, NVIC */
272 HAL_TIMEx_HallSensor_MspDeInit(htim);
273 #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
274
275 /* Change the DMA burst operation state */
276 htim->DMABurstState = HAL_DMA_BURST_STATE_RESET;
277
278 /* Change the TIM channels state */
279 TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_RESET);
280 TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_RESET);
281 TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_RESET);
282 TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_RESET);
283
284 /* Change TIM state */
285 htim->State = HAL_TIM_STATE_RESET;
286
287 /* Release Lock */
288 __HAL_UNLOCK(htim);
289
290 return HAL_OK;
291 }
292
293 /**
294 * @brief Initializes the TIM Hall Sensor MSP.
295 * @param htim TIM Hall Sensor Interface handle
296 * @retval None
297 */
HAL_TIMEx_HallSensor_MspInit(TIM_HandleTypeDef * htim)298 __weak void HAL_TIMEx_HallSensor_MspInit(TIM_HandleTypeDef *htim)
299 {
300 /* Prevent unused argument(s) compilation warning */
301 UNUSED(htim);
302
303 /* NOTE : This function should not be modified, when the callback is needed,
304 the HAL_TIMEx_HallSensor_MspInit could be implemented in the user file
305 */
306 }
307
308 /**
309 * @brief DeInitializes TIM Hall Sensor MSP.
310 * @param htim TIM Hall Sensor Interface handle
311 * @retval None
312 */
HAL_TIMEx_HallSensor_MspDeInit(TIM_HandleTypeDef * htim)313 __weak void HAL_TIMEx_HallSensor_MspDeInit(TIM_HandleTypeDef *htim)
314 {
315 /* Prevent unused argument(s) compilation warning */
316 UNUSED(htim);
317
318 /* NOTE : This function should not be modified, when the callback is needed,
319 the HAL_TIMEx_HallSensor_MspDeInit could be implemented in the user file
320 */
321 }
322
323 /**
324 * @brief Starts the TIM Hall Sensor Interface.
325 * @param htim TIM Hall Sensor Interface handle
326 * @retval HAL status
327 */
HAL_TIMEx_HallSensor_Start(TIM_HandleTypeDef * htim)328 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start(TIM_HandleTypeDef *htim)
329 {
330 uint32_t tmpsmcr;
331 HAL_TIM_ChannelStateTypeDef channel_1_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_1);
332 HAL_TIM_ChannelStateTypeDef channel_2_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_2);
333 HAL_TIM_ChannelStateTypeDef complementary_channel_1_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHANNEL_1);
334 HAL_TIM_ChannelStateTypeDef complementary_channel_2_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHANNEL_2);
335
336 /* Check the parameters */
337 assert_param(IS_TIM_HALL_SENSOR_INTERFACE_INSTANCE(htim->Instance));
338
339 /* Check the TIM channels state */
340 if ((channel_1_state != HAL_TIM_CHANNEL_STATE_READY)
341 || (channel_2_state != HAL_TIM_CHANNEL_STATE_READY)
342 || (complementary_channel_1_state != HAL_TIM_CHANNEL_STATE_READY)
343 || (complementary_channel_2_state != HAL_TIM_CHANNEL_STATE_READY))
344 {
345 return HAL_ERROR;
346 }
347
348 /* Set the TIM channels state */
349 TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY);
350 TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY);
351 TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY);
352 TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY);
353
354 /* Enable the Input Capture channel 1
355 (in the Hall Sensor Interface the three possible channels that can be used are TIM_CHANNEL_1,
356 TIM_CHANNEL_2 and TIM_CHANNEL_3) */
357 TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_ENABLE);
358
359 /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */
360 if (IS_TIM_SLAVE_INSTANCE(htim->Instance))
361 {
362 tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS;
363 if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr))
364 {
365 __HAL_TIM_ENABLE(htim);
366 }
367 }
368 else
369 {
370 __HAL_TIM_ENABLE(htim);
371 }
372
373 /* Return function status */
374 return HAL_OK;
375 }
376
377 /**
378 * @brief Stops the TIM Hall sensor Interface.
379 * @param htim TIM Hall Sensor Interface handle
380 * @retval HAL status
381 */
HAL_TIMEx_HallSensor_Stop(TIM_HandleTypeDef * htim)382 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop(TIM_HandleTypeDef *htim)
383 {
384 /* Check the parameters */
385 assert_param(IS_TIM_HALL_SENSOR_INTERFACE_INSTANCE(htim->Instance));
386
387 /* Disable the Input Capture channels 1, 2 and 3
388 (in the Hall Sensor Interface the three possible channels that can be used are TIM_CHANNEL_1,
389 TIM_CHANNEL_2 and TIM_CHANNEL_3) */
390 TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_DISABLE);
391
392 /* Disable the Peripheral */
393 __HAL_TIM_DISABLE(htim);
394
395 /* Set the TIM channels state */
396 TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY);
397 TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY);
398 TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY);
399 TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY);
400
401 /* Return function status */
402 return HAL_OK;
403 }
404
405 /**
406 * @brief Starts the TIM Hall Sensor Interface in interrupt mode.
407 * @param htim TIM Hall Sensor Interface handle
408 * @retval HAL status
409 */
HAL_TIMEx_HallSensor_Start_IT(TIM_HandleTypeDef * htim)410 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start_IT(TIM_HandleTypeDef *htim)
411 {
412 uint32_t tmpsmcr;
413 HAL_TIM_ChannelStateTypeDef channel_1_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_1);
414 HAL_TIM_ChannelStateTypeDef channel_2_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_2);
415 HAL_TIM_ChannelStateTypeDef complementary_channel_1_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHANNEL_1);
416 HAL_TIM_ChannelStateTypeDef complementary_channel_2_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHANNEL_2);
417
418 /* Check the parameters */
419 assert_param(IS_TIM_HALL_SENSOR_INTERFACE_INSTANCE(htim->Instance));
420
421 /* Check the TIM channels state */
422 if ((channel_1_state != HAL_TIM_CHANNEL_STATE_READY)
423 || (channel_2_state != HAL_TIM_CHANNEL_STATE_READY)
424 || (complementary_channel_1_state != HAL_TIM_CHANNEL_STATE_READY)
425 || (complementary_channel_2_state != HAL_TIM_CHANNEL_STATE_READY))
426 {
427 return HAL_ERROR;
428 }
429
430 /* Set the TIM channels state */
431 TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY);
432 TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY);
433 TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY);
434 TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY);
435
436 /* Enable the capture compare Interrupts 1 event */
437 __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC1);
438
439 /* Enable the Input Capture channel 1
440 (in the Hall Sensor Interface the three possible channels that can be used are TIM_CHANNEL_1,
441 TIM_CHANNEL_2 and TIM_CHANNEL_3) */
442 TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_ENABLE);
443
444 /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */
445 if (IS_TIM_SLAVE_INSTANCE(htim->Instance))
446 {
447 tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS;
448 if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr))
449 {
450 __HAL_TIM_ENABLE(htim);
451 }
452 }
453 else
454 {
455 __HAL_TIM_ENABLE(htim);
456 }
457
458 /* Return function status */
459 return HAL_OK;
460 }
461
462 /**
463 * @brief Stops the TIM Hall Sensor Interface in interrupt mode.
464 * @param htim TIM Hall Sensor Interface handle
465 * @retval HAL status
466 */
HAL_TIMEx_HallSensor_Stop_IT(TIM_HandleTypeDef * htim)467 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop_IT(TIM_HandleTypeDef *htim)
468 {
469 /* Check the parameters */
470 assert_param(IS_TIM_HALL_SENSOR_INTERFACE_INSTANCE(htim->Instance));
471
472 /* Disable the Input Capture channel 1
473 (in the Hall Sensor Interface the three possible channels that can be used are TIM_CHANNEL_1,
474 TIM_CHANNEL_2 and TIM_CHANNEL_3) */
475 TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_DISABLE);
476
477 /* Disable the capture compare Interrupts event */
478 __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC1);
479
480 /* Disable the Peripheral */
481 __HAL_TIM_DISABLE(htim);
482
483 /* Set the TIM channels state */
484 TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY);
485 TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY);
486 TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY);
487 TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY);
488
489 /* Return function status */
490 return HAL_OK;
491 }
492
493 /**
494 * @brief Starts the TIM Hall Sensor Interface in DMA mode.
495 * @param htim TIM Hall Sensor Interface handle
496 * @param pData The destination Buffer address.
497 * @param Length The length of data to be transferred from TIM peripheral to memory.
498 * @retval HAL status
499 */
HAL_TIMEx_HallSensor_Start_DMA(TIM_HandleTypeDef * htim,uint32_t * pData,uint16_t Length)500 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start_DMA(TIM_HandleTypeDef *htim, uint32_t *pData, uint16_t Length)
501 {
502 uint32_t tmpsmcr;
503 HAL_TIM_ChannelStateTypeDef channel_1_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_1);
504 HAL_TIM_ChannelStateTypeDef complementary_channel_1_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHANNEL_1);
505
506 /* Check the parameters */
507 assert_param(IS_TIM_HALL_SENSOR_INTERFACE_INSTANCE(htim->Instance));
508
509 /* Set the TIM channel state */
510 if ((channel_1_state == HAL_TIM_CHANNEL_STATE_BUSY)
511 || (complementary_channel_1_state == HAL_TIM_CHANNEL_STATE_BUSY))
512 {
513 return HAL_BUSY;
514 }
515 else if ((channel_1_state == HAL_TIM_CHANNEL_STATE_READY)
516 && (complementary_channel_1_state == HAL_TIM_CHANNEL_STATE_READY))
517 {
518 if ((pData == NULL) || (Length == 0U))
519 {
520 return HAL_ERROR;
521 }
522 else
523 {
524 TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY);
525 TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY);
526 }
527 }
528 else
529 {
530 return HAL_ERROR;
531 }
532
533 /* Enable the Input Capture channel 1
534 (in the Hall Sensor Interface the three possible channels that can be used are TIM_CHANNEL_1,
535 TIM_CHANNEL_2 and TIM_CHANNEL_3) */
536 TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_ENABLE);
537
538 /* Set the DMA Input Capture 1 Callbacks */
539 htim->hdma[TIM_DMA_ID_CC1]->XferCpltCallback = TIM_DMACaptureCplt;
540 htim->hdma[TIM_DMA_ID_CC1]->XferHalfCpltCallback = TIM_DMACaptureHalfCplt;
541 /* Set the DMA error callback */
542 htim->hdma[TIM_DMA_ID_CC1]->XferErrorCallback = TIM_DMAError ;
543
544 /* Enable the DMA channel for Capture 1*/
545 if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC1], (uint32_t)&htim->Instance->CCR1, (uint32_t)pData, Length) != HAL_OK)
546 {
547 /* Return error status */
548 return HAL_ERROR;
549 }
550 /* Enable the capture compare 1 Interrupt */
551 __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC1);
552
553 /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */
554 if (IS_TIM_SLAVE_INSTANCE(htim->Instance))
555 {
556 tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS;
557 if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr))
558 {
559 __HAL_TIM_ENABLE(htim);
560 }
561 }
562 else
563 {
564 __HAL_TIM_ENABLE(htim);
565 }
566
567 /* Return function status */
568 return HAL_OK;
569 }
570
571 /**
572 * @brief Stops the TIM Hall Sensor Interface in DMA mode.
573 * @param htim TIM Hall Sensor Interface handle
574 * @retval HAL status
575 */
HAL_TIMEx_HallSensor_Stop_DMA(TIM_HandleTypeDef * htim)576 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop_DMA(TIM_HandleTypeDef *htim)
577 {
578 /* Check the parameters */
579 assert_param(IS_TIM_HALL_SENSOR_INTERFACE_INSTANCE(htim->Instance));
580
581 /* Disable the Input Capture channel 1
582 (in the Hall Sensor Interface the three possible channels that can be used are TIM_CHANNEL_1,
583 TIM_CHANNEL_2 and TIM_CHANNEL_3) */
584 TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_DISABLE);
585
586
587 /* Disable the capture compare Interrupts 1 event */
588 __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC1);
589
590 (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC1]);
591
592 /* Disable the Peripheral */
593 __HAL_TIM_DISABLE(htim);
594
595 /* Set the TIM channel state */
596 TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY);
597 TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY);
598
599 /* Return function status */
600 return HAL_OK;
601 }
602
603 /**
604 * @}
605 */
606
607 /** @defgroup TIMEx_Exported_Functions_Group2 Extended Timer Complementary Output Compare functions
608 * @brief Timer Complementary Output Compare functions
609 *
610 @verbatim
611 ==============================================================================
612 ##### Timer Complementary Output Compare functions #####
613 ==============================================================================
614 [..]
615 This section provides functions allowing to:
616 (+) Start the Complementary Output Compare/PWM.
617 (+) Stop the Complementary Output Compare/PWM.
618 (+) Start the Complementary Output Compare/PWM and enable interrupts.
619 (+) Stop the Complementary Output Compare/PWM and disable interrupts.
620 (+) Start the Complementary Output Compare/PWM and enable DMA transfers.
621 (+) Stop the Complementary Output Compare/PWM and disable DMA transfers.
622
623 @endverbatim
624 * @{
625 */
626
627 /**
628 * @brief Starts the TIM Output Compare signal generation on the complementary
629 * output.
630 * @param htim TIM Output Compare handle
631 * @param Channel TIM Channel to be enabled
632 * This parameter can be one of the following values:
633 * @arg TIM_CHANNEL_1: TIM Channel 1 selected
634 * @arg TIM_CHANNEL_2: TIM Channel 2 selected
635 * @arg TIM_CHANNEL_3: TIM Channel 3 selected
636 * @retval HAL status
637 */
HAL_TIMEx_OCN_Start(TIM_HandleTypeDef * htim,uint32_t Channel)638 HAL_StatusTypeDef HAL_TIMEx_OCN_Start(TIM_HandleTypeDef *htim, uint32_t Channel)
639 {
640 uint32_t tmpsmcr;
641
642 /* Check the parameters */
643 assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
644
645 /* Check the TIM complementary channel state */
646 if (TIM_CHANNEL_N_STATE_GET(htim, Channel) != HAL_TIM_CHANNEL_STATE_READY)
647 {
648 return HAL_ERROR;
649 }
650
651 /* Set the TIM complementary channel state */
652 TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_BUSY);
653
654 /* Enable the Capture compare channel N */
655 TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE);
656
657 /* Enable the Main Output */
658 __HAL_TIM_MOE_ENABLE(htim);
659
660 /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */
661 if (IS_TIM_SLAVE_INSTANCE(htim->Instance))
662 {
663 tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS;
664 if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr))
665 {
666 __HAL_TIM_ENABLE(htim);
667 }
668 }
669 else
670 {
671 __HAL_TIM_ENABLE(htim);
672 }
673
674 /* Return function status */
675 return HAL_OK;
676 }
677
678 /**
679 * @brief Stops the TIM Output Compare signal generation on the complementary
680 * output.
681 * @param htim TIM handle
682 * @param Channel TIM Channel to be disabled
683 * This parameter can be one of the following values:
684 * @arg TIM_CHANNEL_1: TIM Channel 1 selected
685 * @arg TIM_CHANNEL_2: TIM Channel 2 selected
686 * @arg TIM_CHANNEL_3: TIM Channel 3 selected
687 * @retval HAL status
688 */
HAL_TIMEx_OCN_Stop(TIM_HandleTypeDef * htim,uint32_t Channel)689 HAL_StatusTypeDef HAL_TIMEx_OCN_Stop(TIM_HandleTypeDef *htim, uint32_t Channel)
690 {
691 /* Check the parameters */
692 assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
693
694 /* Disable the Capture compare channel N */
695 TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE);
696
697 /* Disable the Main Output */
698 __HAL_TIM_MOE_DISABLE(htim);
699
700 /* Disable the Peripheral */
701 __HAL_TIM_DISABLE(htim);
702
703 /* Set the TIM complementary channel state */
704 TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY);
705
706 /* Return function status */
707 return HAL_OK;
708 }
709
710 /**
711 * @brief Starts the TIM Output Compare signal generation in interrupt mode
712 * on the complementary output.
713 * @param htim TIM OC handle
714 * @param Channel TIM Channel to be enabled
715 * This parameter can be one of the following values:
716 * @arg TIM_CHANNEL_1: TIM Channel 1 selected
717 * @arg TIM_CHANNEL_2: TIM Channel 2 selected
718 * @arg TIM_CHANNEL_3: TIM Channel 3 selected
719 * @retval HAL status
720 */
HAL_TIMEx_OCN_Start_IT(TIM_HandleTypeDef * htim,uint32_t Channel)721 HAL_StatusTypeDef HAL_TIMEx_OCN_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel)
722 {
723 HAL_StatusTypeDef status = HAL_OK;
724 uint32_t tmpsmcr;
725
726 /* Check the parameters */
727 assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
728
729 /* Check the TIM complementary channel state */
730 if (TIM_CHANNEL_N_STATE_GET(htim, Channel) != HAL_TIM_CHANNEL_STATE_READY)
731 {
732 return HAL_ERROR;
733 }
734
735 /* Set the TIM complementary channel state */
736 TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_BUSY);
737
738 switch (Channel)
739 {
740 case TIM_CHANNEL_1:
741 {
742 /* Enable the TIM Output Compare interrupt */
743 __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC1);
744 break;
745 }
746
747 case TIM_CHANNEL_2:
748 {
749 /* Enable the TIM Output Compare interrupt */
750 __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC2);
751 break;
752 }
753
754 case TIM_CHANNEL_3:
755 {
756 /* Enable the TIM Output Compare interrupt */
757 __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC3);
758 break;
759 }
760
761
762 default:
763 status = HAL_ERROR;
764 break;
765 }
766
767 if (status == HAL_OK)
768 {
769 /* Enable the TIM Break interrupt */
770 __HAL_TIM_ENABLE_IT(htim, TIM_IT_BREAK);
771
772 /* Enable the Capture compare channel N */
773 TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE);
774
775 /* Enable the Main Output */
776 __HAL_TIM_MOE_ENABLE(htim);
777
778 /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */
779 if (IS_TIM_SLAVE_INSTANCE(htim->Instance))
780 {
781 tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS;
782 if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr))
783 {
784 __HAL_TIM_ENABLE(htim);
785 }
786 }
787 else
788 {
789 __HAL_TIM_ENABLE(htim);
790 }
791 }
792
793 /* Return function status */
794 return status;
795 }
796
797 /**
798 * @brief Stops the TIM Output Compare signal generation in interrupt mode
799 * on the complementary output.
800 * @param htim TIM Output Compare handle
801 * @param Channel TIM Channel to be disabled
802 * This parameter can be one of the following values:
803 * @arg TIM_CHANNEL_1: TIM Channel 1 selected
804 * @arg TIM_CHANNEL_2: TIM Channel 2 selected
805 * @arg TIM_CHANNEL_3: TIM Channel 3 selected
806 * @retval HAL status
807 */
HAL_TIMEx_OCN_Stop_IT(TIM_HandleTypeDef * htim,uint32_t Channel)808 HAL_StatusTypeDef HAL_TIMEx_OCN_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel)
809 {
810 HAL_StatusTypeDef status = HAL_OK;
811 uint32_t tmpccer;
812
813 /* Check the parameters */
814 assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
815
816 switch (Channel)
817 {
818 case TIM_CHANNEL_1:
819 {
820 /* Disable the TIM Output Compare interrupt */
821 __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC1);
822 break;
823 }
824
825 case TIM_CHANNEL_2:
826 {
827 /* Disable the TIM Output Compare interrupt */
828 __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC2);
829 break;
830 }
831
832 case TIM_CHANNEL_3:
833 {
834 /* Disable the TIM Output Compare interrupt */
835 __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC3);
836 break;
837 }
838
839 default:
840 status = HAL_ERROR;
841 break;
842 }
843
844 if (status == HAL_OK)
845 {
846 /* Disable the Capture compare channel N */
847 TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE);
848
849 /* Disable the TIM Break interrupt (only if no more channel is active) */
850 tmpccer = htim->Instance->CCER;
851 if ((tmpccer & (TIM_CCER_CC1NE | TIM_CCER_CC2NE | TIM_CCER_CC3NE)) == (uint32_t)RESET)
852 {
853 __HAL_TIM_DISABLE_IT(htim, TIM_IT_BREAK);
854 }
855
856 /* Disable the Main Output */
857 __HAL_TIM_MOE_DISABLE(htim);
858
859 /* Disable the Peripheral */
860 __HAL_TIM_DISABLE(htim);
861
862 /* Set the TIM complementary channel state */
863 TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY);
864 }
865
866 /* Return function status */
867 return status;
868 }
869
870 /**
871 * @brief Starts the TIM Output Compare signal generation in DMA mode
872 * on the complementary output.
873 * @param htim TIM Output Compare handle
874 * @param Channel TIM Channel to be enabled
875 * This parameter can be one of the following values:
876 * @arg TIM_CHANNEL_1: TIM Channel 1 selected
877 * @arg TIM_CHANNEL_2: TIM Channel 2 selected
878 * @arg TIM_CHANNEL_3: TIM Channel 3 selected
879 * @param pData The source Buffer address.
880 * @param Length The length of data to be transferred from memory to TIM peripheral
881 * @retval HAL status
882 */
HAL_TIMEx_OCN_Start_DMA(TIM_HandleTypeDef * htim,uint32_t Channel,const uint32_t * pData,uint16_t Length)883 HAL_StatusTypeDef HAL_TIMEx_OCN_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel, const uint32_t *pData,
884 uint16_t Length)
885 {
886 HAL_StatusTypeDef status = HAL_OK;
887 uint32_t tmpsmcr;
888
889 /* Check the parameters */
890 assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
891
892 /* Set the TIM complementary channel state */
893 if (TIM_CHANNEL_N_STATE_GET(htim, Channel) == HAL_TIM_CHANNEL_STATE_BUSY)
894 {
895 return HAL_BUSY;
896 }
897 else if (TIM_CHANNEL_N_STATE_GET(htim, Channel) == HAL_TIM_CHANNEL_STATE_READY)
898 {
899 if ((pData == NULL) || (Length == 0U))
900 {
901 return HAL_ERROR;
902 }
903 else
904 {
905 TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_BUSY);
906 }
907 }
908 else
909 {
910 return HAL_ERROR;
911 }
912
913 switch (Channel)
914 {
915 case TIM_CHANNEL_1:
916 {
917 /* Set the DMA compare callbacks */
918 htim->hdma[TIM_DMA_ID_CC1]->XferCpltCallback = TIM_DMADelayPulseNCplt;
919 htim->hdma[TIM_DMA_ID_CC1]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt;
920
921 /* Set the DMA error callback */
922 htim->hdma[TIM_DMA_ID_CC1]->XferErrorCallback = TIM_DMAErrorCCxN ;
923
924 /* Enable the DMA channel */
925 if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC1], (uint32_t)pData, (uint32_t)&htim->Instance->CCR1,
926 Length) != HAL_OK)
927 {
928 /* Return error status */
929 return HAL_ERROR;
930 }
931 /* Enable the TIM Output Compare DMA request */
932 __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC1);
933 break;
934 }
935
936 case TIM_CHANNEL_2:
937 {
938 /* Set the DMA compare callbacks */
939 htim->hdma[TIM_DMA_ID_CC2]->XferCpltCallback = TIM_DMADelayPulseNCplt;
940 htim->hdma[TIM_DMA_ID_CC2]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt;
941
942 /* Set the DMA error callback */
943 htim->hdma[TIM_DMA_ID_CC2]->XferErrorCallback = TIM_DMAErrorCCxN ;
944
945 /* Enable the DMA channel */
946 if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC2], (uint32_t)pData, (uint32_t)&htim->Instance->CCR2,
947 Length) != HAL_OK)
948 {
949 /* Return error status */
950 return HAL_ERROR;
951 }
952 /* Enable the TIM Output Compare DMA request */
953 __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC2);
954 break;
955 }
956
957 case TIM_CHANNEL_3:
958 {
959 /* Set the DMA compare callbacks */
960 htim->hdma[TIM_DMA_ID_CC3]->XferCpltCallback = TIM_DMADelayPulseNCplt;
961 htim->hdma[TIM_DMA_ID_CC3]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt;
962
963 /* Set the DMA error callback */
964 htim->hdma[TIM_DMA_ID_CC3]->XferErrorCallback = TIM_DMAErrorCCxN ;
965
966 /* Enable the DMA channel */
967 if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC3], (uint32_t)pData, (uint32_t)&htim->Instance->CCR3,
968 Length) != HAL_OK)
969 {
970 /* Return error status */
971 return HAL_ERROR;
972 }
973 /* Enable the TIM Output Compare DMA request */
974 __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC3);
975 break;
976 }
977
978 default:
979 status = HAL_ERROR;
980 break;
981 }
982
983 if (status == HAL_OK)
984 {
985 /* Enable the Capture compare channel N */
986 TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE);
987
988 /* Enable the Main Output */
989 __HAL_TIM_MOE_ENABLE(htim);
990
991 /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */
992 if (IS_TIM_SLAVE_INSTANCE(htim->Instance))
993 {
994 tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS;
995 if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr))
996 {
997 __HAL_TIM_ENABLE(htim);
998 }
999 }
1000 else
1001 {
1002 __HAL_TIM_ENABLE(htim);
1003 }
1004 }
1005
1006 /* Return function status */
1007 return status;
1008 }
1009
1010 /**
1011 * @brief Stops the TIM Output Compare signal generation in DMA mode
1012 * on the complementary output.
1013 * @param htim TIM Output Compare handle
1014 * @param Channel TIM Channel to be disabled
1015 * This parameter can be one of the following values:
1016 * @arg TIM_CHANNEL_1: TIM Channel 1 selected
1017 * @arg TIM_CHANNEL_2: TIM Channel 2 selected
1018 * @arg TIM_CHANNEL_3: TIM Channel 3 selected
1019 * @retval HAL status
1020 */
HAL_TIMEx_OCN_Stop_DMA(TIM_HandleTypeDef * htim,uint32_t Channel)1021 HAL_StatusTypeDef HAL_TIMEx_OCN_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel)
1022 {
1023 HAL_StatusTypeDef status = HAL_OK;
1024
1025 /* Check the parameters */
1026 assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
1027
1028 switch (Channel)
1029 {
1030 case TIM_CHANNEL_1:
1031 {
1032 /* Disable the TIM Output Compare DMA request */
1033 __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC1);
1034 (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC1]);
1035 break;
1036 }
1037
1038 case TIM_CHANNEL_2:
1039 {
1040 /* Disable the TIM Output Compare DMA request */
1041 __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC2);
1042 (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC2]);
1043 break;
1044 }
1045
1046 case TIM_CHANNEL_3:
1047 {
1048 /* Disable the TIM Output Compare DMA request */
1049 __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC3);
1050 (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC3]);
1051 break;
1052 }
1053
1054 default:
1055 status = HAL_ERROR;
1056 break;
1057 }
1058
1059 if (status == HAL_OK)
1060 {
1061 /* Disable the Capture compare channel N */
1062 TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE);
1063
1064 /* Disable the Main Output */
1065 __HAL_TIM_MOE_DISABLE(htim);
1066
1067 /* Disable the Peripheral */
1068 __HAL_TIM_DISABLE(htim);
1069
1070 /* Set the TIM complementary channel state */
1071 TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY);
1072 }
1073
1074 /* Return function status */
1075 return status;
1076 }
1077
1078 /**
1079 * @}
1080 */
1081
1082 /** @defgroup TIMEx_Exported_Functions_Group3 Extended Timer Complementary PWM functions
1083 * @brief Timer Complementary PWM functions
1084 *
1085 @verbatim
1086 ==============================================================================
1087 ##### Timer Complementary PWM functions #####
1088 ==============================================================================
1089 [..]
1090 This section provides functions allowing to:
1091 (+) Start the Complementary PWM.
1092 (+) Stop the Complementary PWM.
1093 (+) Start the Complementary PWM and enable interrupts.
1094 (+) Stop the Complementary PWM and disable interrupts.
1095 (+) Start the Complementary PWM and enable DMA transfers.
1096 (+) Stop the Complementary PWM and disable DMA transfers.
1097 (+) Start the Complementary Input Capture measurement.
1098 (+) Stop the Complementary Input Capture.
1099 (+) Start the Complementary Input Capture and enable interrupts.
1100 (+) Stop the Complementary Input Capture and disable interrupts.
1101 (+) Start the Complementary Input Capture and enable DMA transfers.
1102 (+) Stop the Complementary Input Capture and disable DMA transfers.
1103 (+) Start the Complementary One Pulse generation.
1104 (+) Stop the Complementary One Pulse.
1105 (+) Start the Complementary One Pulse and enable interrupts.
1106 (+) Stop the Complementary One Pulse and disable interrupts.
1107
1108 @endverbatim
1109 * @{
1110 */
1111
1112 /**
1113 * @brief Starts the PWM signal generation on the complementary output.
1114 * @param htim TIM handle
1115 * @param Channel TIM Channel to be enabled
1116 * This parameter can be one of the following values:
1117 * @arg TIM_CHANNEL_1: TIM Channel 1 selected
1118 * @arg TIM_CHANNEL_2: TIM Channel 2 selected
1119 * @arg TIM_CHANNEL_3: TIM Channel 3 selected
1120 * @retval HAL status
1121 */
HAL_TIMEx_PWMN_Start(TIM_HandleTypeDef * htim,uint32_t Channel)1122 HAL_StatusTypeDef HAL_TIMEx_PWMN_Start(TIM_HandleTypeDef *htim, uint32_t Channel)
1123 {
1124 uint32_t tmpsmcr;
1125
1126 /* Check the parameters */
1127 assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
1128
1129 /* Check the TIM complementary channel state */
1130 if (TIM_CHANNEL_N_STATE_GET(htim, Channel) != HAL_TIM_CHANNEL_STATE_READY)
1131 {
1132 return HAL_ERROR;
1133 }
1134
1135 /* Set the TIM complementary channel state */
1136 TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_BUSY);
1137
1138 /* Enable the complementary PWM output */
1139 TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE);
1140
1141 /* Enable the Main Output */
1142 __HAL_TIM_MOE_ENABLE(htim);
1143
1144 /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */
1145 if (IS_TIM_SLAVE_INSTANCE(htim->Instance))
1146 {
1147 tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS;
1148 if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr))
1149 {
1150 __HAL_TIM_ENABLE(htim);
1151 }
1152 }
1153 else
1154 {
1155 __HAL_TIM_ENABLE(htim);
1156 }
1157
1158 /* Return function status */
1159 return HAL_OK;
1160 }
1161
1162 /**
1163 * @brief Stops the PWM signal generation on the complementary output.
1164 * @param htim TIM handle
1165 * @param Channel TIM Channel to be disabled
1166 * This parameter can be one of the following values:
1167 * @arg TIM_CHANNEL_1: TIM Channel 1 selected
1168 * @arg TIM_CHANNEL_2: TIM Channel 2 selected
1169 * @arg TIM_CHANNEL_3: TIM Channel 3 selected
1170 * @retval HAL status
1171 */
HAL_TIMEx_PWMN_Stop(TIM_HandleTypeDef * htim,uint32_t Channel)1172 HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop(TIM_HandleTypeDef *htim, uint32_t Channel)
1173 {
1174 /* Check the parameters */
1175 assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
1176
1177 /* Disable the complementary PWM output */
1178 TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE);
1179
1180 /* Disable the Main Output */
1181 __HAL_TIM_MOE_DISABLE(htim);
1182
1183 /* Disable the Peripheral */
1184 __HAL_TIM_DISABLE(htim);
1185
1186 /* Set the TIM complementary channel state */
1187 TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY);
1188
1189 /* Return function status */
1190 return HAL_OK;
1191 }
1192
1193 /**
1194 * @brief Starts the PWM signal generation in interrupt mode on the
1195 * complementary output.
1196 * @param htim TIM handle
1197 * @param Channel TIM Channel to be disabled
1198 * This parameter can be one of the following values:
1199 * @arg TIM_CHANNEL_1: TIM Channel 1 selected
1200 * @arg TIM_CHANNEL_2: TIM Channel 2 selected
1201 * @arg TIM_CHANNEL_3: TIM Channel 3 selected
1202 * @retval HAL status
1203 */
HAL_TIMEx_PWMN_Start_IT(TIM_HandleTypeDef * htim,uint32_t Channel)1204 HAL_StatusTypeDef HAL_TIMEx_PWMN_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel)
1205 {
1206 HAL_StatusTypeDef status = HAL_OK;
1207 uint32_t tmpsmcr;
1208
1209 /* Check the parameters */
1210 assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
1211
1212 /* Check the TIM complementary channel state */
1213 if (TIM_CHANNEL_N_STATE_GET(htim, Channel) != HAL_TIM_CHANNEL_STATE_READY)
1214 {
1215 return HAL_ERROR;
1216 }
1217
1218 /* Set the TIM complementary channel state */
1219 TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_BUSY);
1220
1221 switch (Channel)
1222 {
1223 case TIM_CHANNEL_1:
1224 {
1225 /* Enable the TIM Capture/Compare 1 interrupt */
1226 __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC1);
1227 break;
1228 }
1229
1230 case TIM_CHANNEL_2:
1231 {
1232 /* Enable the TIM Capture/Compare 2 interrupt */
1233 __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC2);
1234 break;
1235 }
1236
1237 case TIM_CHANNEL_3:
1238 {
1239 /* Enable the TIM Capture/Compare 3 interrupt */
1240 __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC3);
1241 break;
1242 }
1243
1244 default:
1245 status = HAL_ERROR;
1246 break;
1247 }
1248
1249 if (status == HAL_OK)
1250 {
1251 /* Enable the TIM Break interrupt */
1252 __HAL_TIM_ENABLE_IT(htim, TIM_IT_BREAK);
1253
1254 /* Enable the complementary PWM output */
1255 TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE);
1256
1257 /* Enable the Main Output */
1258 __HAL_TIM_MOE_ENABLE(htim);
1259
1260 /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */
1261 if (IS_TIM_SLAVE_INSTANCE(htim->Instance))
1262 {
1263 tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS;
1264 if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr))
1265 {
1266 __HAL_TIM_ENABLE(htim);
1267 }
1268 }
1269 else
1270 {
1271 __HAL_TIM_ENABLE(htim);
1272 }
1273 }
1274
1275 /* Return function status */
1276 return status;
1277 }
1278
1279 /**
1280 * @brief Stops the PWM signal generation in interrupt mode on the
1281 * complementary output.
1282 * @param htim TIM handle
1283 * @param Channel TIM Channel to be disabled
1284 * This parameter can be one of the following values:
1285 * @arg TIM_CHANNEL_1: TIM Channel 1 selected
1286 * @arg TIM_CHANNEL_2: TIM Channel 2 selected
1287 * @arg TIM_CHANNEL_3: TIM Channel 3 selected
1288 * @retval HAL status
1289 */
HAL_TIMEx_PWMN_Stop_IT(TIM_HandleTypeDef * htim,uint32_t Channel)1290 HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel)
1291 {
1292 HAL_StatusTypeDef status = HAL_OK;
1293 uint32_t tmpccer;
1294
1295 /* Check the parameters */
1296 assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
1297
1298 switch (Channel)
1299 {
1300 case TIM_CHANNEL_1:
1301 {
1302 /* Disable the TIM Capture/Compare 1 interrupt */
1303 __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC1);
1304 break;
1305 }
1306
1307 case TIM_CHANNEL_2:
1308 {
1309 /* Disable the TIM Capture/Compare 2 interrupt */
1310 __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC2);
1311 break;
1312 }
1313
1314 case TIM_CHANNEL_3:
1315 {
1316 /* Disable the TIM Capture/Compare 3 interrupt */
1317 __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC3);
1318 break;
1319 }
1320
1321 default:
1322 status = HAL_ERROR;
1323 break;
1324 }
1325
1326 if (status == HAL_OK)
1327 {
1328 /* Disable the complementary PWM output */
1329 TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE);
1330
1331 /* Disable the TIM Break interrupt (only if no more channel is active) */
1332 tmpccer = htim->Instance->CCER;
1333 if ((tmpccer & (TIM_CCER_CC1NE | TIM_CCER_CC2NE | TIM_CCER_CC3NE)) == (uint32_t)RESET)
1334 {
1335 __HAL_TIM_DISABLE_IT(htim, TIM_IT_BREAK);
1336 }
1337
1338 /* Disable the Main Output */
1339 __HAL_TIM_MOE_DISABLE(htim);
1340
1341 /* Disable the Peripheral */
1342 __HAL_TIM_DISABLE(htim);
1343
1344 /* Set the TIM complementary channel state */
1345 TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY);
1346 }
1347
1348 /* Return function status */
1349 return status;
1350 }
1351
1352 /**
1353 * @brief Starts the TIM PWM signal generation in DMA mode on the
1354 * complementary output
1355 * @param htim TIM handle
1356 * @param Channel TIM Channel to be enabled
1357 * This parameter can be one of the following values:
1358 * @arg TIM_CHANNEL_1: TIM Channel 1 selected
1359 * @arg TIM_CHANNEL_2: TIM Channel 2 selected
1360 * @arg TIM_CHANNEL_3: TIM Channel 3 selected
1361 * @param pData The source Buffer address.
1362 * @param Length The length of data to be transferred from memory to TIM peripheral
1363 * @retval HAL status
1364 */
HAL_TIMEx_PWMN_Start_DMA(TIM_HandleTypeDef * htim,uint32_t Channel,const uint32_t * pData,uint16_t Length)1365 HAL_StatusTypeDef HAL_TIMEx_PWMN_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel, const uint32_t *pData,
1366 uint16_t Length)
1367 {
1368 HAL_StatusTypeDef status = HAL_OK;
1369 uint32_t tmpsmcr;
1370
1371 /* Check the parameters */
1372 assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
1373
1374 /* Set the TIM complementary channel state */
1375 if (TIM_CHANNEL_N_STATE_GET(htim, Channel) == HAL_TIM_CHANNEL_STATE_BUSY)
1376 {
1377 return HAL_BUSY;
1378 }
1379 else if (TIM_CHANNEL_N_STATE_GET(htim, Channel) == HAL_TIM_CHANNEL_STATE_READY)
1380 {
1381 if ((pData == NULL) || (Length == 0U))
1382 {
1383 return HAL_ERROR;
1384 }
1385 else
1386 {
1387 TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_BUSY);
1388 }
1389 }
1390 else
1391 {
1392 return HAL_ERROR;
1393 }
1394
1395 switch (Channel)
1396 {
1397 case TIM_CHANNEL_1:
1398 {
1399 /* Set the DMA compare callbacks */
1400 htim->hdma[TIM_DMA_ID_CC1]->XferCpltCallback = TIM_DMADelayPulseNCplt;
1401 htim->hdma[TIM_DMA_ID_CC1]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt;
1402
1403 /* Set the DMA error callback */
1404 htim->hdma[TIM_DMA_ID_CC1]->XferErrorCallback = TIM_DMAErrorCCxN ;
1405
1406 /* Enable the DMA channel */
1407 if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC1], (uint32_t)pData, (uint32_t)&htim->Instance->CCR1,
1408 Length) != HAL_OK)
1409 {
1410 /* Return error status */
1411 return HAL_ERROR;
1412 }
1413 /* Enable the TIM Capture/Compare 1 DMA request */
1414 __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC1);
1415 break;
1416 }
1417
1418 case TIM_CHANNEL_2:
1419 {
1420 /* Set the DMA compare callbacks */
1421 htim->hdma[TIM_DMA_ID_CC2]->XferCpltCallback = TIM_DMADelayPulseNCplt;
1422 htim->hdma[TIM_DMA_ID_CC2]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt;
1423
1424 /* Set the DMA error callback */
1425 htim->hdma[TIM_DMA_ID_CC2]->XferErrorCallback = TIM_DMAErrorCCxN ;
1426
1427 /* Enable the DMA channel */
1428 if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC2], (uint32_t)pData, (uint32_t)&htim->Instance->CCR2,
1429 Length) != HAL_OK)
1430 {
1431 /* Return error status */
1432 return HAL_ERROR;
1433 }
1434 /* Enable the TIM Capture/Compare 2 DMA request */
1435 __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC2);
1436 break;
1437 }
1438
1439 case TIM_CHANNEL_3:
1440 {
1441 /* Set the DMA compare callbacks */
1442 htim->hdma[TIM_DMA_ID_CC3]->XferCpltCallback = TIM_DMADelayPulseNCplt;
1443 htim->hdma[TIM_DMA_ID_CC3]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt;
1444
1445 /* Set the DMA error callback */
1446 htim->hdma[TIM_DMA_ID_CC3]->XferErrorCallback = TIM_DMAErrorCCxN ;
1447
1448 /* Enable the DMA channel */
1449 if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC3], (uint32_t)pData, (uint32_t)&htim->Instance->CCR3,
1450 Length) != HAL_OK)
1451 {
1452 /* Return error status */
1453 return HAL_ERROR;
1454 }
1455 /* Enable the TIM Capture/Compare 3 DMA request */
1456 __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC3);
1457 break;
1458 }
1459
1460 default:
1461 status = HAL_ERROR;
1462 break;
1463 }
1464
1465 if (status == HAL_OK)
1466 {
1467 /* Enable the complementary PWM output */
1468 TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE);
1469
1470 /* Enable the Main Output */
1471 __HAL_TIM_MOE_ENABLE(htim);
1472
1473 /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */
1474 if (IS_TIM_SLAVE_INSTANCE(htim->Instance))
1475 {
1476 tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS;
1477 if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr))
1478 {
1479 __HAL_TIM_ENABLE(htim);
1480 }
1481 }
1482 else
1483 {
1484 __HAL_TIM_ENABLE(htim);
1485 }
1486 }
1487
1488 /* Return function status */
1489 return status;
1490 }
1491
1492 /**
1493 * @brief Stops the TIM PWM signal generation in DMA mode on the complementary
1494 * output
1495 * @param htim TIM handle
1496 * @param Channel TIM Channel to be disabled
1497 * This parameter can be one of the following values:
1498 * @arg TIM_CHANNEL_1: TIM Channel 1 selected
1499 * @arg TIM_CHANNEL_2: TIM Channel 2 selected
1500 * @arg TIM_CHANNEL_3: TIM Channel 3 selected
1501 * @retval HAL status
1502 */
HAL_TIMEx_PWMN_Stop_DMA(TIM_HandleTypeDef * htim,uint32_t Channel)1503 HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel)
1504 {
1505 HAL_StatusTypeDef status = HAL_OK;
1506
1507 /* Check the parameters */
1508 assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
1509
1510 switch (Channel)
1511 {
1512 case TIM_CHANNEL_1:
1513 {
1514 /* Disable the TIM Capture/Compare 1 DMA request */
1515 __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC1);
1516 (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC1]);
1517 break;
1518 }
1519
1520 case TIM_CHANNEL_2:
1521 {
1522 /* Disable the TIM Capture/Compare 2 DMA request */
1523 __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC2);
1524 (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC2]);
1525 break;
1526 }
1527
1528 case TIM_CHANNEL_3:
1529 {
1530 /* Disable the TIM Capture/Compare 3 DMA request */
1531 __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC3);
1532 (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC3]);
1533 break;
1534 }
1535
1536 default:
1537 status = HAL_ERROR;
1538 break;
1539 }
1540
1541 if (status == HAL_OK)
1542 {
1543 /* Disable the complementary PWM output */
1544 TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE);
1545
1546 /* Disable the Main Output */
1547 __HAL_TIM_MOE_DISABLE(htim);
1548
1549 /* Disable the Peripheral */
1550 __HAL_TIM_DISABLE(htim);
1551
1552 /* Set the TIM complementary channel state */
1553 TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY);
1554 }
1555
1556 /* Return function status */
1557 return status;
1558 }
1559
1560 /**
1561 * @}
1562 */
1563
1564 /** @defgroup TIMEx_Exported_Functions_Group4 Extended Timer Complementary One Pulse functions
1565 * @brief Timer Complementary One Pulse functions
1566 *
1567 @verbatim
1568 ==============================================================================
1569 ##### Timer Complementary One Pulse functions #####
1570 ==============================================================================
1571 [..]
1572 This section provides functions allowing to:
1573 (+) Start the Complementary One Pulse generation.
1574 (+) Stop the Complementary One Pulse.
1575 (+) Start the Complementary One Pulse and enable interrupts.
1576 (+) Stop the Complementary One Pulse and disable interrupts.
1577
1578 @endverbatim
1579 * @{
1580 */
1581
1582 /**
1583 * @brief Starts the TIM One Pulse signal generation on the complementary
1584 * output.
1585 * @note OutputChannel must match the pulse output channel chosen when calling
1586 * @ref HAL_TIM_OnePulse_ConfigChannel().
1587 * @param htim TIM One Pulse handle
1588 * @param OutputChannel pulse output channel to enable
1589 * This parameter can be one of the following values:
1590 * @arg TIM_CHANNEL_1: TIM Channel 1 selected
1591 * @arg TIM_CHANNEL_2: TIM Channel 2 selected
1592 * @retval HAL status
1593 */
HAL_TIMEx_OnePulseN_Start(TIM_HandleTypeDef * htim,uint32_t OutputChannel)1594 HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Start(TIM_HandleTypeDef *htim, uint32_t OutputChannel)
1595 {
1596 uint32_t input_channel = (OutputChannel == TIM_CHANNEL_1) ? TIM_CHANNEL_2 : TIM_CHANNEL_1;
1597 HAL_TIM_ChannelStateTypeDef channel_1_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_1);
1598 HAL_TIM_ChannelStateTypeDef channel_2_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_2);
1599 HAL_TIM_ChannelStateTypeDef complementary_channel_1_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHANNEL_1);
1600 HAL_TIM_ChannelStateTypeDef complementary_channel_2_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHANNEL_2);
1601
1602 /* Check the parameters */
1603 assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, OutputChannel));
1604
1605 /* Check the TIM channels state */
1606 if ((channel_1_state != HAL_TIM_CHANNEL_STATE_READY)
1607 || (channel_2_state != HAL_TIM_CHANNEL_STATE_READY)
1608 || (complementary_channel_1_state != HAL_TIM_CHANNEL_STATE_READY)
1609 || (complementary_channel_2_state != HAL_TIM_CHANNEL_STATE_READY))
1610 {
1611 return HAL_ERROR;
1612 }
1613
1614 /* Set the TIM channels state */
1615 TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY);
1616 TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY);
1617 TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY);
1618 TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY);
1619
1620 /* Enable the complementary One Pulse output channel and the Input Capture channel */
1621 TIM_CCxNChannelCmd(htim->Instance, OutputChannel, TIM_CCxN_ENABLE);
1622 TIM_CCxChannelCmd(htim->Instance, input_channel, TIM_CCx_ENABLE);
1623
1624 /* Enable the Main Output */
1625 __HAL_TIM_MOE_ENABLE(htim);
1626
1627 /* Return function status */
1628 return HAL_OK;
1629 }
1630
1631 /**
1632 * @brief Stops the TIM One Pulse signal generation on the complementary
1633 * output.
1634 * @note OutputChannel must match the pulse output channel chosen when calling
1635 * @ref HAL_TIM_OnePulse_ConfigChannel().
1636 * @param htim TIM One Pulse handle
1637 * @param OutputChannel pulse output channel to disable
1638 * This parameter can be one of the following values:
1639 * @arg TIM_CHANNEL_1: TIM Channel 1 selected
1640 * @arg TIM_CHANNEL_2: TIM Channel 2 selected
1641 * @retval HAL status
1642 */
HAL_TIMEx_OnePulseN_Stop(TIM_HandleTypeDef * htim,uint32_t OutputChannel)1643 HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Stop(TIM_HandleTypeDef *htim, uint32_t OutputChannel)
1644 {
1645 uint32_t input_channel = (OutputChannel == TIM_CHANNEL_1) ? TIM_CHANNEL_2 : TIM_CHANNEL_1;
1646
1647 /* Check the parameters */
1648 assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, OutputChannel));
1649
1650 /* Disable the complementary One Pulse output channel and the Input Capture channel */
1651 TIM_CCxNChannelCmd(htim->Instance, OutputChannel, TIM_CCxN_DISABLE);
1652 TIM_CCxChannelCmd(htim->Instance, input_channel, TIM_CCx_DISABLE);
1653
1654 /* Disable the Main Output */
1655 __HAL_TIM_MOE_DISABLE(htim);
1656
1657 /* Disable the Peripheral */
1658 __HAL_TIM_DISABLE(htim);
1659
1660 /* Set the TIM channels state */
1661 TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY);
1662 TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY);
1663 TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY);
1664 TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY);
1665
1666 /* Return function status */
1667 return HAL_OK;
1668 }
1669
1670 /**
1671 * @brief Starts the TIM One Pulse signal generation in interrupt mode on the
1672 * complementary channel.
1673 * @note OutputChannel must match the pulse output channel chosen when calling
1674 * @ref HAL_TIM_OnePulse_ConfigChannel().
1675 * @param htim TIM One Pulse handle
1676 * @param OutputChannel pulse output channel to enable
1677 * This parameter can be one of the following values:
1678 * @arg TIM_CHANNEL_1: TIM Channel 1 selected
1679 * @arg TIM_CHANNEL_2: TIM Channel 2 selected
1680 * @retval HAL status
1681 */
HAL_TIMEx_OnePulseN_Start_IT(TIM_HandleTypeDef * htim,uint32_t OutputChannel)1682 HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Start_IT(TIM_HandleTypeDef *htim, uint32_t OutputChannel)
1683 {
1684 uint32_t input_channel = (OutputChannel == TIM_CHANNEL_1) ? TIM_CHANNEL_2 : TIM_CHANNEL_1;
1685 HAL_TIM_ChannelStateTypeDef channel_1_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_1);
1686 HAL_TIM_ChannelStateTypeDef channel_2_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_2);
1687 HAL_TIM_ChannelStateTypeDef complementary_channel_1_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHANNEL_1);
1688 HAL_TIM_ChannelStateTypeDef complementary_channel_2_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHANNEL_2);
1689
1690 /* Check the parameters */
1691 assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, OutputChannel));
1692
1693 /* Check the TIM channels state */
1694 if ((channel_1_state != HAL_TIM_CHANNEL_STATE_READY)
1695 || (channel_2_state != HAL_TIM_CHANNEL_STATE_READY)
1696 || (complementary_channel_1_state != HAL_TIM_CHANNEL_STATE_READY)
1697 || (complementary_channel_2_state != HAL_TIM_CHANNEL_STATE_READY))
1698 {
1699 return HAL_ERROR;
1700 }
1701
1702 /* Set the TIM channels state */
1703 TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY);
1704 TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY);
1705 TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY);
1706 TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY);
1707
1708 /* Enable the TIM Capture/Compare 1 interrupt */
1709 __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC1);
1710
1711 /* Enable the TIM Capture/Compare 2 interrupt */
1712 __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC2);
1713
1714 /* Enable the complementary One Pulse output channel and the Input Capture channel */
1715 TIM_CCxNChannelCmd(htim->Instance, OutputChannel, TIM_CCxN_ENABLE);
1716 TIM_CCxChannelCmd(htim->Instance, input_channel, TIM_CCx_ENABLE);
1717
1718 /* Enable the Main Output */
1719 __HAL_TIM_MOE_ENABLE(htim);
1720
1721 /* Return function status */
1722 return HAL_OK;
1723 }
1724
1725 /**
1726 * @brief Stops the TIM One Pulse signal generation in interrupt mode on the
1727 * complementary channel.
1728 * @note OutputChannel must match the pulse output channel chosen when calling
1729 * @ref HAL_TIM_OnePulse_ConfigChannel().
1730 * @param htim TIM One Pulse handle
1731 * @param OutputChannel pulse output channel to disable
1732 * This parameter can be one of the following values:
1733 * @arg TIM_CHANNEL_1: TIM Channel 1 selected
1734 * @arg TIM_CHANNEL_2: TIM Channel 2 selected
1735 * @retval HAL status
1736 */
HAL_TIMEx_OnePulseN_Stop_IT(TIM_HandleTypeDef * htim,uint32_t OutputChannel)1737 HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Stop_IT(TIM_HandleTypeDef *htim, uint32_t OutputChannel)
1738 {
1739 uint32_t input_channel = (OutputChannel == TIM_CHANNEL_1) ? TIM_CHANNEL_2 : TIM_CHANNEL_1;
1740
1741 /* Check the parameters */
1742 assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, OutputChannel));
1743
1744 /* Disable the TIM Capture/Compare 1 interrupt */
1745 __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC1);
1746
1747 /* Disable the TIM Capture/Compare 2 interrupt */
1748 __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC2);
1749
1750 /* Disable the complementary One Pulse output channel and the Input Capture channel */
1751 TIM_CCxNChannelCmd(htim->Instance, OutputChannel, TIM_CCxN_DISABLE);
1752 TIM_CCxChannelCmd(htim->Instance, input_channel, TIM_CCx_DISABLE);
1753
1754 /* Disable the Main Output */
1755 __HAL_TIM_MOE_DISABLE(htim);
1756
1757 /* Disable the Peripheral */
1758 __HAL_TIM_DISABLE(htim);
1759
1760 /* Set the TIM channels state */
1761 TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY);
1762 TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY);
1763 TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY);
1764 TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY);
1765
1766 /* Return function status */
1767 return HAL_OK;
1768 }
1769
1770 /**
1771 * @}
1772 */
1773
1774 /** @defgroup TIMEx_Exported_Functions_Group5 Extended Peripheral Control functions
1775 * @brief Peripheral Control functions
1776 *
1777 @verbatim
1778 ==============================================================================
1779 ##### Peripheral Control functions #####
1780 ==============================================================================
1781 [..]
1782 This section provides functions allowing to:
1783 (+) Configure the commutation event in case of use of the Hall sensor interface.
1784 (+) Configure Output channels for OC and PWM mode.
1785
1786 (+) Configure Complementary channels, break features and dead time.
1787 (+) Configure Master synchronization.
1788 (+) Configure timer remapping capabilities.
1789 (+) Select timer input source.
1790 (+) Enable or disable channel grouping.
1791
1792 @endverbatim
1793 * @{
1794 */
1795
1796 /**
1797 * @brief Configure the TIM commutation event sequence.
1798 * @note This function is mandatory to use the commutation event in order to
1799 * update the configuration at each commutation detection on the TRGI input of the Timer,
1800 * the typical use of this feature is with the use of another Timer(interface Timer)
1801 * configured in Hall sensor interface, this interface Timer will generate the
1802 * commutation at its TRGO output (connected to Timer used in this function) each time
1803 * the TI1 of the Interface Timer detect a commutation at its input TI1.
1804 * @param htim TIM handle
1805 * @param InputTrigger the Internal trigger corresponding to the Timer Interfacing with the Hall sensor
1806 * This parameter can be one of the following values:
1807 * @arg TIM_TS_ITR0: Internal trigger 0 selected
1808 * @arg TIM_TS_ITR1: Internal trigger 1 selected
1809 * @arg TIM_TS_ITR2: Internal trigger 2 selected
1810 * @arg TIM_TS_ITR3: Internal trigger 3 selected
1811 * @arg TIM_TS_NONE: No trigger is needed
1812 * @param CommutationSource the Commutation Event source
1813 * This parameter can be one of the following values:
1814 * @arg TIM_COMMUTATION_TRGI: Commutation source is the TRGI of the Interface Timer
1815 * @arg TIM_COMMUTATION_SOFTWARE: Commutation source is set by software using the COMG bit
1816 * @retval HAL status
1817 */
HAL_TIMEx_ConfigCommutEvent(TIM_HandleTypeDef * htim,uint32_t InputTrigger,uint32_t CommutationSource)1818 HAL_StatusTypeDef HAL_TIMEx_ConfigCommutEvent(TIM_HandleTypeDef *htim, uint32_t InputTrigger,
1819 uint32_t CommutationSource)
1820 {
1821 /* Check the parameters */
1822 assert_param(IS_TIM_COMMUTATION_EVENT_INSTANCE(htim->Instance));
1823 assert_param(IS_TIM_INTERNAL_TRIGGEREVENT_SELECTION(InputTrigger));
1824
1825 __HAL_LOCK(htim);
1826
1827 if ((InputTrigger == TIM_TS_ITR0) || (InputTrigger == TIM_TS_ITR1) ||
1828 (InputTrigger == TIM_TS_ITR2) || (InputTrigger == TIM_TS_ITR3))
1829 {
1830 /* Select the Input trigger */
1831 htim->Instance->SMCR &= ~TIM_SMCR_TS;
1832 htim->Instance->SMCR |= InputTrigger;
1833 }
1834
1835 /* Select the Capture Compare preload feature */
1836 htim->Instance->CR2 |= TIM_CR2_CCPC;
1837 /* Select the Commutation event source */
1838 htim->Instance->CR2 &= ~TIM_CR2_CCUS;
1839 htim->Instance->CR2 |= CommutationSource;
1840
1841 /* Disable Commutation Interrupt */
1842 __HAL_TIM_DISABLE_IT(htim, TIM_IT_COM);
1843
1844 /* Disable Commutation DMA request */
1845 __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_COM);
1846
1847 __HAL_UNLOCK(htim);
1848
1849 return HAL_OK;
1850 }
1851
1852 /**
1853 * @brief Configure the TIM commutation event sequence with interrupt.
1854 * @note This function is mandatory to use the commutation event in order to
1855 * update the configuration at each commutation detection on the TRGI input of the Timer,
1856 * the typical use of this feature is with the use of another Timer(interface Timer)
1857 * configured in Hall sensor interface, this interface Timer will generate the
1858 * commutation at its TRGO output (connected to Timer used in this function) each time
1859 * the TI1 of the Interface Timer detect a commutation at its input TI1.
1860 * @param htim TIM handle
1861 * @param InputTrigger the Internal trigger corresponding to the Timer Interfacing with the Hall sensor
1862 * This parameter can be one of the following values:
1863 * @arg TIM_TS_ITR0: Internal trigger 0 selected
1864 * @arg TIM_TS_ITR1: Internal trigger 1 selected
1865 * @arg TIM_TS_ITR2: Internal trigger 2 selected
1866 * @arg TIM_TS_ITR3: Internal trigger 3 selected
1867 * @arg TIM_TS_NONE: No trigger is needed
1868 * @param CommutationSource the Commutation Event source
1869 * This parameter can be one of the following values:
1870 * @arg TIM_COMMUTATION_TRGI: Commutation source is the TRGI of the Interface Timer
1871 * @arg TIM_COMMUTATION_SOFTWARE: Commutation source is set by software using the COMG bit
1872 * @retval HAL status
1873 */
HAL_TIMEx_ConfigCommutEvent_IT(TIM_HandleTypeDef * htim,uint32_t InputTrigger,uint32_t CommutationSource)1874 HAL_StatusTypeDef HAL_TIMEx_ConfigCommutEvent_IT(TIM_HandleTypeDef *htim, uint32_t InputTrigger,
1875 uint32_t CommutationSource)
1876 {
1877 /* Check the parameters */
1878 assert_param(IS_TIM_COMMUTATION_EVENT_INSTANCE(htim->Instance));
1879 assert_param(IS_TIM_INTERNAL_TRIGGEREVENT_SELECTION(InputTrigger));
1880
1881 __HAL_LOCK(htim);
1882
1883 if ((InputTrigger == TIM_TS_ITR0) || (InputTrigger == TIM_TS_ITR1) ||
1884 (InputTrigger == TIM_TS_ITR2) || (InputTrigger == TIM_TS_ITR3))
1885 {
1886 /* Select the Input trigger */
1887 htim->Instance->SMCR &= ~TIM_SMCR_TS;
1888 htim->Instance->SMCR |= InputTrigger;
1889 }
1890
1891 /* Select the Capture Compare preload feature */
1892 htim->Instance->CR2 |= TIM_CR2_CCPC;
1893 /* Select the Commutation event source */
1894 htim->Instance->CR2 &= ~TIM_CR2_CCUS;
1895 htim->Instance->CR2 |= CommutationSource;
1896
1897 /* Disable Commutation DMA request */
1898 __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_COM);
1899
1900 /* Enable the Commutation Interrupt */
1901 __HAL_TIM_ENABLE_IT(htim, TIM_IT_COM);
1902
1903 __HAL_UNLOCK(htim);
1904
1905 return HAL_OK;
1906 }
1907
1908 /**
1909 * @brief Configure the TIM commutation event sequence with DMA.
1910 * @note This function is mandatory to use the commutation event in order to
1911 * update the configuration at each commutation detection on the TRGI input of the Timer,
1912 * the typical use of this feature is with the use of another Timer(interface Timer)
1913 * configured in Hall sensor interface, this interface Timer will generate the
1914 * commutation at its TRGO output (connected to Timer used in this function) each time
1915 * the TI1 of the Interface Timer detect a commutation at its input TI1.
1916 * @note The user should configure the DMA in his own software, in This function only the COMDE bit is set
1917 * @param htim TIM handle
1918 * @param InputTrigger the Internal trigger corresponding to the Timer Interfacing with the Hall sensor
1919 * This parameter can be one of the following values:
1920 * @arg TIM_TS_ITR0: Internal trigger 0 selected
1921 * @arg TIM_TS_ITR1: Internal trigger 1 selected
1922 * @arg TIM_TS_ITR2: Internal trigger 2 selected
1923 * @arg TIM_TS_ITR3: Internal trigger 3 selected
1924 * @arg TIM_TS_NONE: No trigger is needed
1925 * @param CommutationSource the Commutation Event source
1926 * This parameter can be one of the following values:
1927 * @arg TIM_COMMUTATION_TRGI: Commutation source is the TRGI of the Interface Timer
1928 * @arg TIM_COMMUTATION_SOFTWARE: Commutation source is set by software using the COMG bit
1929 * @retval HAL status
1930 */
HAL_TIMEx_ConfigCommutEvent_DMA(TIM_HandleTypeDef * htim,uint32_t InputTrigger,uint32_t CommutationSource)1931 HAL_StatusTypeDef HAL_TIMEx_ConfigCommutEvent_DMA(TIM_HandleTypeDef *htim, uint32_t InputTrigger,
1932 uint32_t CommutationSource)
1933 {
1934 /* Check the parameters */
1935 assert_param(IS_TIM_COMMUTATION_EVENT_INSTANCE(htim->Instance));
1936 assert_param(IS_TIM_INTERNAL_TRIGGEREVENT_SELECTION(InputTrigger));
1937
1938 __HAL_LOCK(htim);
1939
1940 if ((InputTrigger == TIM_TS_ITR0) || (InputTrigger == TIM_TS_ITR1) ||
1941 (InputTrigger == TIM_TS_ITR2) || (InputTrigger == TIM_TS_ITR3))
1942 {
1943 /* Select the Input trigger */
1944 htim->Instance->SMCR &= ~TIM_SMCR_TS;
1945 htim->Instance->SMCR |= InputTrigger;
1946 }
1947
1948 /* Select the Capture Compare preload feature */
1949 htim->Instance->CR2 |= TIM_CR2_CCPC;
1950 /* Select the Commutation event source */
1951 htim->Instance->CR2 &= ~TIM_CR2_CCUS;
1952 htim->Instance->CR2 |= CommutationSource;
1953
1954 /* Enable the Commutation DMA Request */
1955 /* Set the DMA Commutation Callback */
1956 htim->hdma[TIM_DMA_ID_COMMUTATION]->XferCpltCallback = TIMEx_DMACommutationCplt;
1957 htim->hdma[TIM_DMA_ID_COMMUTATION]->XferHalfCpltCallback = TIMEx_DMACommutationHalfCplt;
1958 /* Set the DMA error callback */
1959 htim->hdma[TIM_DMA_ID_COMMUTATION]->XferErrorCallback = TIM_DMAError;
1960
1961 /* Disable Commutation Interrupt */
1962 __HAL_TIM_DISABLE_IT(htim, TIM_IT_COM);
1963
1964 /* Enable the Commutation DMA Request */
1965 __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_COM);
1966
1967 __HAL_UNLOCK(htim);
1968
1969 return HAL_OK;
1970 }
1971
1972 /**
1973 * @brief Configures the TIM in master mode.
1974 * @param htim TIM handle.
1975 * @param sMasterConfig pointer to a TIM_MasterConfigTypeDef structure that
1976 * contains the selected trigger output (TRGO) and the Master/Slave
1977 * mode.
1978 * @retval HAL status
1979 */
HAL_TIMEx_MasterConfigSynchronization(TIM_HandleTypeDef * htim,const TIM_MasterConfigTypeDef * sMasterConfig)1980 HAL_StatusTypeDef HAL_TIMEx_MasterConfigSynchronization(TIM_HandleTypeDef *htim,
1981 const TIM_MasterConfigTypeDef *sMasterConfig)
1982 {
1983 uint32_t tmpcr2;
1984 uint32_t tmpsmcr;
1985
1986 /* Check the parameters */
1987 assert_param(IS_TIM_MASTER_INSTANCE(htim->Instance));
1988 assert_param(IS_TIM_TRGO_SOURCE(sMasterConfig->MasterOutputTrigger));
1989 assert_param(IS_TIM_MSM_STATE(sMasterConfig->MasterSlaveMode));
1990
1991 /* Check input state */
1992 __HAL_LOCK(htim);
1993
1994 /* Change the handler state */
1995 htim->State = HAL_TIM_STATE_BUSY;
1996
1997 /* Get the TIMx CR2 register value */
1998 tmpcr2 = htim->Instance->CR2;
1999
2000 /* Get the TIMx SMCR register value */
2001 tmpsmcr = htim->Instance->SMCR;
2002
2003 /* If the timer supports ADC synchronization through TRGO2, set the master mode selection 2 */
2004 if (IS_TIM_TRGO2_INSTANCE(htim->Instance))
2005 {
2006 /* Check the parameters */
2007 assert_param(IS_TIM_TRGO2_SOURCE(sMasterConfig->MasterOutputTrigger2));
2008
2009 /* Clear the MMS2 bits */
2010 tmpcr2 &= ~TIM_CR2_MMS2;
2011 /* Select the TRGO2 source*/
2012 tmpcr2 |= sMasterConfig->MasterOutputTrigger2;
2013 }
2014
2015 /* Reset the MMS Bits */
2016 tmpcr2 &= ~TIM_CR2_MMS;
2017 /* Select the TRGO source */
2018 tmpcr2 |= sMasterConfig->MasterOutputTrigger;
2019
2020 /* Update TIMx CR2 */
2021 htim->Instance->CR2 = tmpcr2;
2022
2023 if (IS_TIM_SLAVE_INSTANCE(htim->Instance))
2024 {
2025 /* Reset the MSM Bit */
2026 tmpsmcr &= ~TIM_SMCR_MSM;
2027 /* Set master mode */
2028 tmpsmcr |= sMasterConfig->MasterSlaveMode;
2029
2030 /* Update TIMx SMCR */
2031 htim->Instance->SMCR = tmpsmcr;
2032 }
2033
2034 /* Change the htim state */
2035 htim->State = HAL_TIM_STATE_READY;
2036
2037 __HAL_UNLOCK(htim);
2038
2039 return HAL_OK;
2040 }
2041
2042 /**
2043 * @brief Configures the Break feature, dead time, Lock level, OSSI/OSSR State
2044 * and the AOE(automatic output enable).
2045 * @param htim TIM handle
2046 * @param sBreakDeadTimeConfig pointer to a TIM_ConfigBreakDeadConfigTypeDef structure that
2047 * contains the BDTR Register configuration information for the TIM peripheral.
2048 * @note Interrupts can be generated when an active level is detected on the
2049 * break input, the break 2 input or the system break input. Break
2050 * interrupt can be enabled by calling the @ref __HAL_TIM_ENABLE_IT macro.
2051 * @retval HAL status
2052 */
HAL_TIMEx_ConfigBreakDeadTime(TIM_HandleTypeDef * htim,const TIM_BreakDeadTimeConfigTypeDef * sBreakDeadTimeConfig)2053 HAL_StatusTypeDef HAL_TIMEx_ConfigBreakDeadTime(TIM_HandleTypeDef *htim,
2054 const TIM_BreakDeadTimeConfigTypeDef *sBreakDeadTimeConfig)
2055 {
2056 /* Keep this variable initialized to 0 as it is used to configure BDTR register */
2057 uint32_t tmpbdtr = 0U;
2058
2059 /* Check the parameters */
2060 assert_param(IS_TIM_BREAK_INSTANCE(htim->Instance));
2061 assert_param(IS_TIM_OSSR_STATE(sBreakDeadTimeConfig->OffStateRunMode));
2062 assert_param(IS_TIM_OSSI_STATE(sBreakDeadTimeConfig->OffStateIDLEMode));
2063 assert_param(IS_TIM_LOCK_LEVEL(sBreakDeadTimeConfig->LockLevel));
2064 assert_param(IS_TIM_DEADTIME(sBreakDeadTimeConfig->DeadTime));
2065 assert_param(IS_TIM_BREAK_STATE(sBreakDeadTimeConfig->BreakState));
2066 assert_param(IS_TIM_BREAK_POLARITY(sBreakDeadTimeConfig->BreakPolarity));
2067 assert_param(IS_TIM_BREAK_FILTER(sBreakDeadTimeConfig->BreakFilter));
2068 assert_param(IS_TIM_AUTOMATIC_OUTPUT_STATE(sBreakDeadTimeConfig->AutomaticOutput));
2069
2070 /* Check input state */
2071 __HAL_LOCK(htim);
2072
2073 /* Set the Lock level, the Break enable Bit and the Polarity, the OSSR State,
2074 the OSSI State, the dead time value and the Automatic Output Enable Bit */
2075
2076 /* Set the BDTR bits */
2077 MODIFY_REG(tmpbdtr, TIM_BDTR_DTG, sBreakDeadTimeConfig->DeadTime);
2078 MODIFY_REG(tmpbdtr, TIM_BDTR_LOCK, sBreakDeadTimeConfig->LockLevel);
2079 MODIFY_REG(tmpbdtr, TIM_BDTR_OSSI, sBreakDeadTimeConfig->OffStateIDLEMode);
2080 MODIFY_REG(tmpbdtr, TIM_BDTR_OSSR, sBreakDeadTimeConfig->OffStateRunMode);
2081 MODIFY_REG(tmpbdtr, TIM_BDTR_BKE, sBreakDeadTimeConfig->BreakState);
2082 MODIFY_REG(tmpbdtr, TIM_BDTR_BKP, sBreakDeadTimeConfig->BreakPolarity);
2083 MODIFY_REG(tmpbdtr, TIM_BDTR_AOE, sBreakDeadTimeConfig->AutomaticOutput);
2084 MODIFY_REG(tmpbdtr, TIM_BDTR_BKF, (sBreakDeadTimeConfig->BreakFilter << TIM_BDTR_BKF_Pos));
2085
2086 if (IS_TIM_ADVANCED_INSTANCE(htim->Instance))
2087 {
2088 /* Check the parameters */
2089 assert_param(IS_TIM_BREAK_AFMODE(sBreakDeadTimeConfig->BreakAFMode));
2090
2091 /* Set BREAK AF mode */
2092 MODIFY_REG(tmpbdtr, TIM_BDTR_BKBID, sBreakDeadTimeConfig->BreakAFMode);
2093 }
2094
2095 if (IS_TIM_BKIN2_INSTANCE(htim->Instance))
2096 {
2097 /* Check the parameters */
2098 assert_param(IS_TIM_BREAK2_STATE(sBreakDeadTimeConfig->Break2State));
2099 assert_param(IS_TIM_BREAK2_POLARITY(sBreakDeadTimeConfig->Break2Polarity));
2100 assert_param(IS_TIM_BREAK_FILTER(sBreakDeadTimeConfig->Break2Filter));
2101
2102 /* Set the BREAK2 input related BDTR bits */
2103 MODIFY_REG(tmpbdtr, TIM_BDTR_BK2F, (sBreakDeadTimeConfig->Break2Filter << TIM_BDTR_BK2F_Pos));
2104 MODIFY_REG(tmpbdtr, TIM_BDTR_BK2E, sBreakDeadTimeConfig->Break2State);
2105 MODIFY_REG(tmpbdtr, TIM_BDTR_BK2P, sBreakDeadTimeConfig->Break2Polarity);
2106
2107 if (IS_TIM_ADVANCED_INSTANCE(htim->Instance))
2108 {
2109 /* Check the parameters */
2110 assert_param(IS_TIM_BREAK2_AFMODE(sBreakDeadTimeConfig->Break2AFMode));
2111
2112 /* Set BREAK2 AF mode */
2113 MODIFY_REG(tmpbdtr, TIM_BDTR_BK2BID, sBreakDeadTimeConfig->Break2AFMode);
2114 }
2115 }
2116
2117 /* Set TIMx_BDTR */
2118 htim->Instance->BDTR = tmpbdtr;
2119
2120 __HAL_UNLOCK(htim);
2121
2122 return HAL_OK;
2123 }
2124
2125 /**
2126 * @brief Configures the break input source.
2127 * @param htim TIM handle.
2128 * @param BreakInput Break input to configure
2129 * This parameter can be one of the following values:
2130 * @arg TIM_BREAKINPUT_BRK: Timer break input
2131 * @arg TIM_BREAKINPUT_BRK2: Timer break 2 input
2132 * @param sBreakInputConfig Break input source configuration
2133 * @retval HAL status
2134 */
HAL_TIMEx_ConfigBreakInput(TIM_HandleTypeDef * htim,uint32_t BreakInput,const TIMEx_BreakInputConfigTypeDef * sBreakInputConfig)2135 HAL_StatusTypeDef HAL_TIMEx_ConfigBreakInput(TIM_HandleTypeDef *htim,
2136 uint32_t BreakInput,
2137 const TIMEx_BreakInputConfigTypeDef *sBreakInputConfig)
2138
2139 {
2140 HAL_StatusTypeDef status = HAL_OK;
2141 uint32_t tmporx;
2142 uint32_t bkin_enable_mask;
2143 uint32_t bkin_polarity_mask;
2144 uint32_t bkin_enable_bitpos;
2145 uint32_t bkin_polarity_bitpos;
2146
2147 /* Check the parameters */
2148 assert_param(IS_TIM_BREAK_INSTANCE(htim->Instance));
2149 assert_param(IS_TIM_BREAKINPUT(BreakInput));
2150 assert_param(IS_TIM_BREAKINPUTSOURCE(sBreakInputConfig->Source));
2151 assert_param(IS_TIM_BREAKINPUTSOURCE_STATE(sBreakInputConfig->Enable));
2152 assert_param(IS_TIM_BREAKINPUTSOURCE_POLARITY(sBreakInputConfig->Polarity));
2153
2154 /* Check input state */
2155 __HAL_LOCK(htim);
2156
2157 switch (sBreakInputConfig->Source)
2158 {
2159 case TIM_BREAKINPUTSOURCE_BKIN:
2160 {
2161 bkin_enable_mask = TIM1_AF1_BKINE;
2162 bkin_enable_bitpos = TIM1_AF1_BKINE_Pos;
2163 bkin_polarity_mask = TIM1_AF1_BKINP;
2164 bkin_polarity_bitpos = TIM1_AF1_BKINP_Pos;
2165 break;
2166 }
2167 #if defined(COMP1) && defined(COMP2)
2168 case TIM_BREAKINPUTSOURCE_COMP1:
2169 {
2170 bkin_enable_mask = TIM1_AF1_BKCMP1E;
2171 bkin_enable_bitpos = TIM1_AF1_BKCMP1E_Pos;
2172 bkin_polarity_mask = TIM1_AF1_BKCMP1P;
2173 bkin_polarity_bitpos = TIM1_AF1_BKCMP1P_Pos;
2174 break;
2175 }
2176 case TIM_BREAKINPUTSOURCE_COMP2:
2177 {
2178 bkin_enable_mask = TIM1_AF1_BKCMP2E;
2179 bkin_enable_bitpos = TIM1_AF1_BKCMP2E_Pos;
2180 bkin_polarity_mask = TIM1_AF1_BKCMP2P;
2181 bkin_polarity_bitpos = TIM1_AF1_BKCMP2P_Pos;
2182 break;
2183 }
2184 #endif /* COMP1 && COMP2 */
2185 #if defined(COMP3)
2186 case TIM_BREAKINPUTSOURCE_COMP3:
2187 {
2188 bkin_enable_mask = TIM1_AF1_BKCMP3E;
2189 bkin_enable_bitpos = TIM1_AF1_BKCMP3E_Pos;
2190 bkin_polarity_mask = TIM1_AF1_BKCMP3P;
2191 bkin_polarity_bitpos = TIM1_AF1_BKCMP3P_Pos;
2192 break;
2193 }
2194 #endif /* COMP3 */
2195
2196 default:
2197 {
2198 bkin_enable_mask = 0U;
2199 bkin_polarity_mask = 0U;
2200 bkin_enable_bitpos = 0U;
2201 bkin_polarity_bitpos = 0U;
2202 break;
2203 }
2204 }
2205
2206 switch (BreakInput)
2207 {
2208 case TIM_BREAKINPUT_BRK:
2209 {
2210 /* Get the TIMx_AF1 register value */
2211 tmporx = htim->Instance->AF1;
2212
2213 /* Enable the break input */
2214 tmporx &= ~bkin_enable_mask;
2215 tmporx |= (sBreakInputConfig->Enable << bkin_enable_bitpos) & bkin_enable_mask;
2216
2217 /* Set the break input polarity */
2218 tmporx &= ~bkin_polarity_mask;
2219 tmporx |= (sBreakInputConfig->Polarity << bkin_polarity_bitpos) & bkin_polarity_mask;
2220
2221 /* Set TIMx_AF1 */
2222 htim->Instance->AF1 = tmporx;
2223 break;
2224 }
2225 case TIM_BREAKINPUT_BRK2:
2226 {
2227 /* Get the TIMx_AF2 register value */
2228 tmporx = htim->Instance->AF2;
2229
2230 /* Enable the break input */
2231 tmporx &= ~bkin_enable_mask;
2232 tmporx |= (sBreakInputConfig->Enable << bkin_enable_bitpos) & bkin_enable_mask;
2233
2234 /* Set the break input polarity */
2235 tmporx &= ~bkin_polarity_mask;
2236 tmporx |= (sBreakInputConfig->Polarity << bkin_polarity_bitpos) & bkin_polarity_mask;
2237
2238 /* Set TIMx_AF2 */
2239 htim->Instance->AF2 = tmporx;
2240 break;
2241 }
2242 default:
2243 status = HAL_ERROR;
2244 break;
2245 }
2246
2247 __HAL_UNLOCK(htim);
2248
2249 return status;
2250 }
2251
2252 /**
2253 * @brief Configures the TIMx Remapping input capabilities.
2254 * @param htim TIM handle.
2255 * @param Remap specifies the TIM remapping source.
2256 * For TIM1, the parameter can take one of the following values:
2257 * @arg TIM_TIM1_ETR_GPIO: TIM1 ETR is is connected to GPIO
2258 * @arg TIM_TIM1_ETR_COMP1: TIM1 ETR is connected to COMP1 output
2259 * @arg TIM_TIM1_ETR_COMP2: TIM1 ETR is connected to COMP2 output
2260 * @arg TIM_TIM1_ETR_COMP3: TIM1 ETR is connected to COMP3 output (**)
2261 * @arg TIM_TIM1_ETR_ADC1_AWD1: TIM1 ETR is connected to ADC1 AWD1
2262 * @arg TIM_TIM1_ETR_ADC1_AWD2: TIM1 ETR is connected to ADC1 AWD2
2263 * @arg TIM_TIM1_ETR_ADC1_AWD3: TIM1 ETR is connected to ADC1 AWD3
2264 *
2265 * For TIM2, the parameter can take one of the following values: (*)
2266 * @arg TIM_TIM2_ETR_GPIO: TIM2_ETR is connected to GPIO
2267 * @arg TIM_TIM2_ETR_COMP1: TIM2_ETR is connected to COMP1 output
2268 * @arg TIM_TIM2_ETR_COMP2: TIM2_ETR is connected to COMP2 output
2269 * @arg TIM_TIM2_ETR_COMP3: TIM2_ETR is connected to COMP3 output (**)
2270 * @arg TIM_TIM2_ETR_LSE: TIM2_ETR is connected to LSE
2271 * @arg TIM_TIM2_ETR_MCO: TIM2_ETR is connected to MCO (**)
2272 * @arg TIM_TIM2_ETR_MCO2: TIM2_ETR is connected to MCO2 (**)
2273 *
2274 * For TIM3, the parameter can take one of the following values:
2275 * @arg TIM_TIM3_ETR_GPIO TIM3_ETR is connected to GPIO
2276 * @arg TIM_TIM3_ETR_COMP1 TIM3_ETR is connected to COMP1 output
2277 * @arg TIM_TIM3_ETR_COMP2 TIM3_ETR is connected to COMP2 output
2278 * @arg TIM_TIM3_ETR_COMP3 TIM3_ETR is connected to COMP3 output (**)
2279 *
2280 * For TIM4, the parameter can take one of the following values:(*)
2281 * @arg TIM_TIM4_ETR_GPIO TIM4_ETR is connected to GPIO
2282 * @arg TIM_TIM4_ETR_COMP1 TIM4_ETR is connected to COMP1 output
2283 * @arg TIM_TIM4_ETR_COMP2 TIM4_ETR is connected to COMP2 output
2284 * @arg TIM_TIM4_ETR_COMP3 TIM4_ETR is connected to COMP3 output (**)
2285 *
2286 * (*) Timer instance not available on all devices \n
2287 * (**) Value not defined in all devices. \n
2288 *
2289 * @retval HAL status
2290 */
HAL_TIMEx_RemapConfig(TIM_HandleTypeDef * htim,uint32_t Remap)2291 HAL_StatusTypeDef HAL_TIMEx_RemapConfig(TIM_HandleTypeDef *htim, uint32_t Remap)
2292 {
2293 /* Check parameters */
2294 assert_param(IS_TIM_REMAP_INSTANCE(htim->Instance));
2295 assert_param(IS_TIM_REMAP(Remap));
2296
2297 __HAL_LOCK(htim);
2298
2299 MODIFY_REG(htim->Instance->AF1, TIM1_AF1_ETRSEL_Msk, Remap);
2300
2301 __HAL_UNLOCK(htim);
2302
2303 return HAL_OK;
2304 }
2305
2306 /**
2307 * @brief Select the timer input source
2308 * @param htim TIM handle.
2309 * @param Channel specifies the TIM Channel
2310 * This parameter can be one of the following values:
2311 * @arg TIM_CHANNEL_1: TI1 input channel
2312 * @arg TIM_CHANNEL_2: TI2 input channel
2313 * @arg TIM_CHANNEL_3: TI3 input channel
2314 * @param TISelection specifies the timer input source
2315 *
2316 * For TIM1 this parameter can be one of the following values:
2317 * @arg TIM_TIM1_TI1_GPIO: TIM1 TI1 is connected to GPIO
2318 * @arg TIM_TIM1_TI1_COMP1: TIM1 TI1 is connected to COMP1 output
2319 * @arg TIM_TIM1_TI2_GPIO: TIM1 TI2 is connected to GPIO
2320 * @arg TIM_TIM1_TI2_COMP2: TIM1 TI2 is connected to COMP2 output
2321 * @arg TIM_TIM1_TI3_GPIO: TIM1 TI3 is connected to GPIO
2322 * @arg TIM_TIM1_TI3_COMP3: TIM1 TI3 is connected to COMP3 output (**)
2323 *
2324 * For TIM2, the parameter is one of the following values: (*)
2325 * @arg TIM_TIM2_TI1_GPIO: TIM2 TI1 is connected to GPIO
2326 * @arg TIM_TIM2_TI1_COMP1: TIM2 TI1 is connected to COMP1 output
2327 * @arg TIM_TIM2_TI2_GPIO: TIM2 TI2 is connected to GPIO
2328 * @arg TIM_TIM2_TI2_COMP2: TIM2 TI2 is connected to COMP2 output
2329 * @arg TIM_TIM2_TI3_GPIO: TIM2 TI3 is connected to GPIO
2330 * @arg TIM_TIM2_TI3_COMP3: TIM2 TI3 is connected to COMP3 output (**)
2331 *
2332 * For TIM3, the parameter is one of the following values:
2333 * @arg TIM_TIM3_TI1_GPIO: TIM3 TI1 is connected to GPIO
2334 * @arg TIM_TIM3_TI1_COMP1: TIM3 TI1 is connected to COMP1 output
2335 * @arg TIM_TIM3_TI2_GPIO: TIM3 TI2 is connected to GPIO
2336 * @arg TIM_TIM3_TI2_COMP2: TIM3 TI2 is connected to COMP2 output
2337 * @arg TIM_TIM3_TI3_GPIO: TIM3 TI3 is connected to GPIO
2338 * @arg TIM_TIM3_TI3_COMP3: TIM3 TI3 is connected to COMP3 output (**)
2339 *
2340 * For TIM4, the parameter is one of the following values: (*)
2341 * @arg TIM_TIM4_TI1_GPIO: TIM4 TI1 is connected to GPIO
2342 * @arg TIM_TIM4_TI1_COMP1: TIM4 TI1 is connected to COMP1 output
2343 * @arg TIM_TIM4_TI2_GPIO: TIM4 TI2 is connected to GPIO
2344 * @arg TIM_TIM4_TI2_COMP2: TIM4 TI2 is connected to COMP2 output
2345 * @arg TIM_TIM4_TI3_GPIO: TIM4 TI3 is connected to GPIO
2346 * @arg TIM_TIM4_TI3_COMP3: TIM4 TI3 is connected to COMP3 output
2347 *
2348 * For TIM14, the parameter is one of the following values:
2349 * @arg TIM_TIM14_TI1_GPIO: TIM14 TI1 is connected to GPIO
2350 * @arg TIM_TIM14_TI1_RTC: TIM14 TI1 is connected to RTC clock
2351 * @arg TIM_TIM14_TI1_HSE_32: TIM14 TI1 is connected to HSE div 32
2352 * @arg TIM_TIM14_TI1_MCO: TIM14 TI1 is connected to MCO
2353 * @arg TIM_TIM14_TI1_MCO2: TIM14 TI1 is connected to MCO2 (**)
2354 *
2355 * For TIM15, the parameter is one of the following values:
2356 * @arg TIM_TIM15_TI1_GPIO: TIM15 TI1 is connected to GPIO
2357 * @arg TIM_TIM15_TI1_TIM2_CH1: TIM15 TI1 is connected to TIM2 CH1
2358 * @arg TIM_TIM15_TI1_TIM3_CH1: TIM15 TI1 is connected to TIM3 CH1
2359 * @arg TIM_TIM15_TI2_GPIO: TIM15 TI2 is connected to GPIO
2360 * @arg TIM_TIM15_TI2_TIM2_CH2: TIM15 TI2 is connected to TIM2 CH2
2361 * @arg TIM_TIM15_TI2_TIM3_CH2: TIM15 TI2 is connected to TIM3 CH2
2362 *
2363 * For TIM16, the parameter can have the following values:
2364 * @arg TIM_TIM16_TI1_GPIO: TIM16 TI1 is connected to GPIO
2365 * @arg TIM_TIM16_TI1_LSI: TIM16 TI1 is connected to LSI
2366 * @arg TIM_TIM16_TI1_LSE: TIM16 TI1 is connected to LSE
2367 * @arg TIM_TIM16_TI1_RTC_WAKEUP: TIM16 TI1 is connected to TRC wakeup interrupt
2368 * @arg TIM_TIM16_TI1_MCO2: TIM16 TI1 is connected to MCO2 (**)
2369 *
2370 * For TIM17, the parameter can have the following values:
2371 * @arg TIM_TIM17_TI1_GPIO: TIM17 TI1 is connected to GPIO
2372 * @arg TIM_TIM14_TI1_HSI: TIM17 TI1 is connected to HSI (**)
2373 * @arg TIM_TIM17_TI1_HSE_32: TIM17 TI1 is connected to HSE div 32
2374 * @arg TIM_TIM17_TI1_MCO: TIM17 TI1 is connected to MCO
2375 * @arg TIM_TIM17_TI1_MCO2: TIM17 TI1 is connected to MCO2 (**)
2376 *
2377 * (*) Timer instance not available on all devices \n
2378 * (**) Value not defined in all devices. \n
2379 *
2380 * @retval HAL status
2381 */
HAL_TIMEx_TISelection(TIM_HandleTypeDef * htim,uint32_t TISelection,uint32_t Channel)2382 HAL_StatusTypeDef HAL_TIMEx_TISelection(TIM_HandleTypeDef *htim, uint32_t TISelection, uint32_t Channel)
2383 {
2384 HAL_StatusTypeDef status = HAL_OK;
2385
2386 /* Check parameters */
2387 assert_param(IS_TIM_TISEL_INSTANCE(htim->Instance));
2388 assert_param(IS_TIM_TISEL(TISelection));
2389
2390 __HAL_LOCK(htim);
2391
2392 switch (Channel)
2393 {
2394 case TIM_CHANNEL_1:
2395 MODIFY_REG(htim->Instance->TISEL, TIM_TISEL_TI1SEL, TISelection);
2396 break;
2397 case TIM_CHANNEL_2:
2398 MODIFY_REG(htim->Instance->TISEL, TIM_TISEL_TI2SEL, TISelection);
2399 break;
2400 case TIM_CHANNEL_3:
2401 MODIFY_REG(htim->Instance->TISEL, TIM_TISEL_TI3SEL, TISelection);
2402 break;
2403 default:
2404 status = HAL_ERROR;
2405 break;
2406 }
2407
2408 __HAL_UNLOCK(htim);
2409
2410 return status;
2411 }
2412
2413 /**
2414 * @brief Group channel 5 and channel 1, 2 or 3
2415 * @param htim TIM handle.
2416 * @param Channels specifies the reference signal(s) the OC5REF is combined with.
2417 * This parameter can be any combination of the following values:
2418 * TIM_GROUPCH5_NONE: No effect of OC5REF on OC1REFC, OC2REFC and OC3REFC
2419 * TIM_GROUPCH5_OC1REFC: OC1REFC is the logical AND of OC1REFC and OC5REF
2420 * TIM_GROUPCH5_OC2REFC: OC2REFC is the logical AND of OC2REFC and OC5REF
2421 * TIM_GROUPCH5_OC3REFC: OC3REFC is the logical AND of OC3REFC and OC5REF
2422 * @retval HAL status
2423 */
HAL_TIMEx_GroupChannel5(TIM_HandleTypeDef * htim,uint32_t Channels)2424 HAL_StatusTypeDef HAL_TIMEx_GroupChannel5(TIM_HandleTypeDef *htim, uint32_t Channels)
2425 {
2426 /* Check parameters */
2427 assert_param(IS_TIM_COMBINED3PHASEPWM_INSTANCE(htim->Instance));
2428 assert_param(IS_TIM_GROUPCH5(Channels));
2429
2430 /* Process Locked */
2431 __HAL_LOCK(htim);
2432
2433 htim->State = HAL_TIM_STATE_BUSY;
2434
2435 /* Clear GC5Cx bit fields */
2436 htim->Instance->CCR5 &= ~(TIM_CCR5_GC5C3 | TIM_CCR5_GC5C2 | TIM_CCR5_GC5C1);
2437
2438 /* Set GC5Cx bit fields */
2439 htim->Instance->CCR5 |= Channels;
2440
2441 /* Change the htim state */
2442 htim->State = HAL_TIM_STATE_READY;
2443
2444 __HAL_UNLOCK(htim);
2445
2446 return HAL_OK;
2447 }
2448
2449 /**
2450 * @brief Disarm the designated break input (when it operates in bidirectional mode).
2451 * @param htim TIM handle.
2452 * @param BreakInput Break input to disarm
2453 * This parameter can be one of the following values:
2454 * @arg TIM_BREAKINPUT_BRK: Timer break input
2455 * @arg TIM_BREAKINPUT_BRK2: Timer break 2 input
2456 * @note The break input can be disarmed only when it is configured in
2457 * bidirectional mode and when when MOE is reset.
2458 * @note Purpose is to be able to have the input voltage back to high-state,
2459 * whatever the time constant on the output .
2460 * @retval HAL status
2461 */
HAL_TIMEx_DisarmBreakInput(TIM_HandleTypeDef * htim,uint32_t BreakInput)2462 HAL_StatusTypeDef HAL_TIMEx_DisarmBreakInput(TIM_HandleTypeDef *htim, uint32_t BreakInput)
2463 {
2464 HAL_StatusTypeDef status = HAL_OK;
2465 uint32_t tmpbdtr;
2466
2467 /* Check the parameters */
2468 assert_param(IS_TIM_ADVANCED_INSTANCE(htim->Instance));
2469 assert_param(IS_TIM_BREAKINPUT(BreakInput));
2470
2471 switch (BreakInput)
2472 {
2473 case TIM_BREAKINPUT_BRK:
2474 {
2475 /* Check initial conditions */
2476 tmpbdtr = READ_REG(htim->Instance->BDTR);
2477 if ((READ_BIT(tmpbdtr, TIM_BDTR_BKBID) == TIM_BDTR_BKBID) &&
2478 (READ_BIT(tmpbdtr, TIM_BDTR_MOE) == 0U))
2479 {
2480 /* Break input BRK is disarmed */
2481 SET_BIT(htim->Instance->BDTR, TIM_BDTR_BKDSRM);
2482 }
2483 break;
2484 }
2485
2486 case TIM_BREAKINPUT_BRK2:
2487 {
2488 /* Check initial conditions */
2489 tmpbdtr = READ_REG(htim->Instance->BDTR);
2490 if ((READ_BIT(tmpbdtr, TIM_BDTR_BK2BID) == TIM_BDTR_BK2BID) &&
2491 (READ_BIT(tmpbdtr, TIM_BDTR_MOE) == 0U))
2492 {
2493 /* Break input BRK is disarmed */
2494 SET_BIT(htim->Instance->BDTR, TIM_BDTR_BK2DSRM);
2495 }
2496 break;
2497 }
2498 default:
2499 status = HAL_ERROR;
2500 break;
2501 }
2502
2503 return status;
2504 }
2505
2506 /**
2507 * @brief Arm the designated break input (when it operates in bidirectional mode).
2508 * @param htim TIM handle.
2509 * @param BreakInput Break input to arm
2510 * This parameter can be one of the following values:
2511 * @arg TIM_BREAKINPUT_BRK: Timer break input
2512 * @arg TIM_BREAKINPUT_BRK2: Timer break 2 input
2513 * @note Arming is possible at anytime, even if fault is present.
2514 * @note Break input is automatically armed as soon as MOE bit is set.
2515 * @retval HAL status
2516 */
HAL_TIMEx_ReArmBreakInput(TIM_HandleTypeDef * htim,uint32_t BreakInput)2517 HAL_StatusTypeDef HAL_TIMEx_ReArmBreakInput(TIM_HandleTypeDef *htim, uint32_t BreakInput)
2518 {
2519 HAL_StatusTypeDef status = HAL_OK;
2520 uint32_t tickstart;
2521
2522 /* Check the parameters */
2523 assert_param(IS_TIM_ADVANCED_INSTANCE(htim->Instance));
2524 assert_param(IS_TIM_BREAKINPUT(BreakInput));
2525
2526 switch (BreakInput)
2527 {
2528 case TIM_BREAKINPUT_BRK:
2529 {
2530 /* Check initial conditions */
2531 if (READ_BIT(htim->Instance->BDTR, TIM_BDTR_BKBID) == TIM_BDTR_BKBID)
2532 {
2533 /* Break input BRK is re-armed automatically by hardware. Poll to check whether fault condition disappeared */
2534 /* Init tickstart for timeout management */
2535 tickstart = HAL_GetTick();
2536 while (READ_BIT(htim->Instance->BDTR, TIM_BDTR_BKDSRM) != 0UL)
2537 {
2538 if ((HAL_GetTick() - tickstart) > TIM_BREAKINPUT_REARM_TIMEOUT)
2539 {
2540 /* New check to avoid false timeout detection in case of preemption */
2541 if (READ_BIT(htim->Instance->BDTR, TIM_BDTR_BKDSRM) != 0UL)
2542 {
2543 return HAL_TIMEOUT;
2544 }
2545 }
2546 }
2547 }
2548 break;
2549 }
2550
2551 case TIM_BREAKINPUT_BRK2:
2552 {
2553 /* Check initial conditions */
2554 if (READ_BIT(htim->Instance->BDTR, TIM_BDTR_BK2BID) == TIM_BDTR_BK2BID)
2555 {
2556 /* Break input BRK2 is re-armed automatically by hardware. Poll to check whether fault condition disappeared */
2557 /* Init tickstart for timeout management */
2558 tickstart = HAL_GetTick();
2559 while (READ_BIT(htim->Instance->BDTR, TIM_BDTR_BK2DSRM) != 0UL)
2560 {
2561 if ((HAL_GetTick() - tickstart) > TIM_BREAKINPUT_REARM_TIMEOUT)
2562 {
2563 /* New check to avoid false timeout detection in case of preemption */
2564 if (READ_BIT(htim->Instance->BDTR, TIM_BDTR_BK2DSRM) != 0UL)
2565 {
2566 return HAL_TIMEOUT;
2567 }
2568 }
2569 }
2570 }
2571 break;
2572 }
2573 default:
2574 status = HAL_ERROR;
2575 break;
2576 }
2577
2578 return status;
2579 }
2580
2581 /**
2582 * @}
2583 */
2584
2585 /** @defgroup TIMEx_Exported_Functions_Group6 Extended Callbacks functions
2586 * @brief Extended Callbacks functions
2587 *
2588 @verbatim
2589 ==============================================================================
2590 ##### Extended Callbacks functions #####
2591 ==============================================================================
2592 [..]
2593 This section provides Extended TIM callback functions:
2594 (+) Timer Commutation callback
2595 (+) Timer Break callback
2596
2597 @endverbatim
2598 * @{
2599 */
2600
2601 /**
2602 * @brief Hall commutation changed callback in non-blocking mode
2603 * @param htim TIM handle
2604 * @retval None
2605 */
HAL_TIMEx_CommutCallback(TIM_HandleTypeDef * htim)2606 __weak void HAL_TIMEx_CommutCallback(TIM_HandleTypeDef *htim)
2607 {
2608 /* Prevent unused argument(s) compilation warning */
2609 UNUSED(htim);
2610
2611 /* NOTE : This function should not be modified, when the callback is needed,
2612 the HAL_TIMEx_CommutCallback could be implemented in the user file
2613 */
2614 }
2615 /**
2616 * @brief Hall commutation changed half complete callback in non-blocking mode
2617 * @param htim TIM handle
2618 * @retval None
2619 */
HAL_TIMEx_CommutHalfCpltCallback(TIM_HandleTypeDef * htim)2620 __weak void HAL_TIMEx_CommutHalfCpltCallback(TIM_HandleTypeDef *htim)
2621 {
2622 /* Prevent unused argument(s) compilation warning */
2623 UNUSED(htim);
2624
2625 /* NOTE : This function should not be modified, when the callback is needed,
2626 the HAL_TIMEx_CommutHalfCpltCallback could be implemented in the user file
2627 */
2628 }
2629
2630 /**
2631 * @brief Hall Break detection callback in non-blocking mode
2632 * @param htim TIM handle
2633 * @retval None
2634 */
HAL_TIMEx_BreakCallback(TIM_HandleTypeDef * htim)2635 __weak void HAL_TIMEx_BreakCallback(TIM_HandleTypeDef *htim)
2636 {
2637 /* Prevent unused argument(s) compilation warning */
2638 UNUSED(htim);
2639
2640 /* NOTE : This function should not be modified, when the callback is needed,
2641 the HAL_TIMEx_BreakCallback could be implemented in the user file
2642 */
2643 }
2644
2645 /**
2646 * @brief Hall Break2 detection callback in non blocking mode
2647 * @param htim: TIM handle
2648 * @retval None
2649 */
HAL_TIMEx_Break2Callback(TIM_HandleTypeDef * htim)2650 __weak void HAL_TIMEx_Break2Callback(TIM_HandleTypeDef *htim)
2651 {
2652 /* Prevent unused argument(s) compilation warning */
2653 UNUSED(htim);
2654
2655 /* NOTE : This function Should not be modified, when the callback is needed,
2656 the HAL_TIMEx_Break2Callback could be implemented in the user file
2657 */
2658 }
2659 /**
2660 * @}
2661 */
2662
2663 /** @defgroup TIMEx_Exported_Functions_Group7 Extended Peripheral State functions
2664 * @brief Extended Peripheral State functions
2665 *
2666 @verbatim
2667 ==============================================================================
2668 ##### Extended Peripheral State functions #####
2669 ==============================================================================
2670 [..]
2671 This subsection permits to get in run-time the status of the peripheral
2672 and the data flow.
2673
2674 @endverbatim
2675 * @{
2676 */
2677
2678 /**
2679 * @brief Return the TIM Hall Sensor interface handle state.
2680 * @param htim TIM Hall Sensor handle
2681 * @retval HAL state
2682 */
HAL_TIMEx_HallSensor_GetState(const TIM_HandleTypeDef * htim)2683 HAL_TIM_StateTypeDef HAL_TIMEx_HallSensor_GetState(const TIM_HandleTypeDef *htim)
2684 {
2685 return htim->State;
2686 }
2687
2688 /**
2689 * @brief Return actual state of the TIM complementary channel.
2690 * @param htim TIM handle
2691 * @param ChannelN TIM Complementary channel
2692 * This parameter can be one of the following values:
2693 * @arg TIM_CHANNEL_1: TIM Channel 1
2694 * @arg TIM_CHANNEL_2: TIM Channel 2
2695 * @arg TIM_CHANNEL_3: TIM Channel 3
2696 * @retval TIM Complementary channel state
2697 */
HAL_TIMEx_GetChannelNState(const TIM_HandleTypeDef * htim,uint32_t ChannelN)2698 HAL_TIM_ChannelStateTypeDef HAL_TIMEx_GetChannelNState(const TIM_HandleTypeDef *htim, uint32_t ChannelN)
2699 {
2700 HAL_TIM_ChannelStateTypeDef channel_state;
2701
2702 /* Check the parameters */
2703 assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, ChannelN));
2704
2705 channel_state = TIM_CHANNEL_N_STATE_GET(htim, ChannelN);
2706
2707 return channel_state;
2708 }
2709 /**
2710 * @}
2711 */
2712
2713 /**
2714 * @}
2715 */
2716
2717 /* Private functions ---------------------------------------------------------*/
2718 /** @defgroup TIMEx_Private_Functions TIM Extended Private Functions
2719 * @{
2720 */
2721
2722 /**
2723 * @brief TIM DMA Commutation callback.
2724 * @param hdma pointer to DMA handle.
2725 * @retval None
2726 */
TIMEx_DMACommutationCplt(DMA_HandleTypeDef * hdma)2727 void TIMEx_DMACommutationCplt(DMA_HandleTypeDef *hdma)
2728 {
2729 TIM_HandleTypeDef *htim = (TIM_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent;
2730
2731 /* Change the htim state */
2732 htim->State = HAL_TIM_STATE_READY;
2733
2734 #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
2735 htim->CommutationCallback(htim);
2736 #else
2737 HAL_TIMEx_CommutCallback(htim);
2738 #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
2739 }
2740
2741 /**
2742 * @brief TIM DMA Commutation half complete callback.
2743 * @param hdma pointer to DMA handle.
2744 * @retval None
2745 */
TIMEx_DMACommutationHalfCplt(DMA_HandleTypeDef * hdma)2746 void TIMEx_DMACommutationHalfCplt(DMA_HandleTypeDef *hdma)
2747 {
2748 TIM_HandleTypeDef *htim = (TIM_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent;
2749
2750 /* Change the htim state */
2751 htim->State = HAL_TIM_STATE_READY;
2752
2753 #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
2754 htim->CommutationHalfCpltCallback(htim);
2755 #else
2756 HAL_TIMEx_CommutHalfCpltCallback(htim);
2757 #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
2758 }
2759
2760
2761 /**
2762 * @brief TIM DMA Delay Pulse complete callback (complementary channel).
2763 * @param hdma pointer to DMA handle.
2764 * @retval None
2765 */
TIM_DMADelayPulseNCplt(DMA_HandleTypeDef * hdma)2766 static void TIM_DMADelayPulseNCplt(DMA_HandleTypeDef *hdma)
2767 {
2768 TIM_HandleTypeDef *htim = (TIM_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent;
2769
2770 if (hdma == htim->hdma[TIM_DMA_ID_CC1])
2771 {
2772 htim->Channel = HAL_TIM_ACTIVE_CHANNEL_1;
2773
2774 if (hdma->Init.Mode == DMA_NORMAL)
2775 {
2776 TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY);
2777 }
2778 }
2779 else if (hdma == htim->hdma[TIM_DMA_ID_CC2])
2780 {
2781 htim->Channel = HAL_TIM_ACTIVE_CHANNEL_2;
2782
2783 if (hdma->Init.Mode == DMA_NORMAL)
2784 {
2785 TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY);
2786 }
2787 }
2788 else if (hdma == htim->hdma[TIM_DMA_ID_CC3])
2789 {
2790 htim->Channel = HAL_TIM_ACTIVE_CHANNEL_3;
2791
2792 if (hdma->Init.Mode == DMA_NORMAL)
2793 {
2794 TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_3, HAL_TIM_CHANNEL_STATE_READY);
2795 }
2796 }
2797 else if (hdma == htim->hdma[TIM_DMA_ID_CC4])
2798 {
2799 htim->Channel = HAL_TIM_ACTIVE_CHANNEL_4;
2800
2801 if (hdma->Init.Mode == DMA_NORMAL)
2802 {
2803 TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_4, HAL_TIM_CHANNEL_STATE_READY);
2804 }
2805 }
2806 else
2807 {
2808 /* nothing to do */
2809 }
2810
2811 #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
2812 htim->PWM_PulseFinishedCallback(htim);
2813 #else
2814 HAL_TIM_PWM_PulseFinishedCallback(htim);
2815 #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
2816
2817 htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED;
2818 }
2819
2820 /**
2821 * @brief TIM DMA error callback (complementary channel)
2822 * @param hdma pointer to DMA handle.
2823 * @retval None
2824 */
TIM_DMAErrorCCxN(DMA_HandleTypeDef * hdma)2825 static void TIM_DMAErrorCCxN(DMA_HandleTypeDef *hdma)
2826 {
2827 TIM_HandleTypeDef *htim = (TIM_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent;
2828
2829 if (hdma == htim->hdma[TIM_DMA_ID_CC1])
2830 {
2831 htim->Channel = HAL_TIM_ACTIVE_CHANNEL_1;
2832 TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY);
2833 }
2834 else if (hdma == htim->hdma[TIM_DMA_ID_CC2])
2835 {
2836 htim->Channel = HAL_TIM_ACTIVE_CHANNEL_2;
2837 TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY);
2838 }
2839 else if (hdma == htim->hdma[TIM_DMA_ID_CC3])
2840 {
2841 htim->Channel = HAL_TIM_ACTIVE_CHANNEL_3;
2842 TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_3, HAL_TIM_CHANNEL_STATE_READY);
2843 }
2844 else
2845 {
2846 /* nothing to do */
2847 }
2848
2849 #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
2850 htim->ErrorCallback(htim);
2851 #else
2852 HAL_TIM_ErrorCallback(htim);
2853 #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
2854
2855 htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED;
2856 }
2857
2858 /**
2859 * @brief Enables or disables the TIM Capture Compare Channel xN.
2860 * @param TIMx to select the TIM peripheral
2861 * @param Channel specifies the TIM Channel
2862 * This parameter can be one of the following values:
2863 * @arg TIM_CHANNEL_1: TIM Channel 1
2864 * @arg TIM_CHANNEL_2: TIM Channel 2
2865 * @arg TIM_CHANNEL_3: TIM Channel 3
2866 * @param ChannelNState specifies the TIM Channel CCxNE bit new state.
2867 * This parameter can be: TIM_CCxN_ENABLE or TIM_CCxN_Disable.
2868 * @retval None
2869 */
TIM_CCxNChannelCmd(TIM_TypeDef * TIMx,uint32_t Channel,uint32_t ChannelNState)2870 static void TIM_CCxNChannelCmd(TIM_TypeDef *TIMx, uint32_t Channel, uint32_t ChannelNState)
2871 {
2872 uint32_t tmp;
2873
2874 tmp = TIM_CCER_CC1NE << (Channel & 0x1FU); /* 0x1FU = 31 bits max shift */
2875
2876 /* Reset the CCxNE Bit */
2877 TIMx->CCER &= ~tmp;
2878
2879 /* Set or reset the CCxNE Bit */
2880 TIMx->CCER |= (uint32_t)(ChannelNState << (Channel & 0x1FU)); /* 0x1FU = 31 bits max shift */
2881 }
2882 /**
2883 * @}
2884 */
2885
2886 #endif /* HAL_TIM_MODULE_ENABLED */
2887 /**
2888 * @}
2889 */
2890
2891 /**
2892 * @}
2893 */
2894
