1 /**
2 ******************************************************************************
3 * @file stm32g0xx_hal_dac.c
4 * @author MCD Application Team
5 * @brief DAC HAL module driver.
6 * This file provides firmware functions to manage the following
7 * functionalities of the Digital to Analog Converter (DAC) peripheral:
8 * + Initialization and de-initialization functions
9 * + IO operation functions
10 * + Peripheral Control functions
11 * + Peripheral State and Errors functions
12 *
13 *
14 ******************************************************************************
15 * @attention
16 *
17 * Copyright (c) 2018 STMicroelectronics.
18 * All rights reserved.
19 *
20 * This software is licensed under terms that can be found in the LICENSE file
21 * in the root directory of this software component.
22 * If no LICENSE file comes with this software, it is provided AS-IS.
23 *
24 ******************************************************************************
25 @verbatim
26 ==============================================================================
27 ##### DAC Peripheral features #####
28 ==============================================================================
29 [..]
30 *** DAC Channels ***
31 ====================
32 [..]
33 STM32G0 devices integrate two 12-bit Digital Analog Converters
34
35 The 2 converters (i.e. channel1 & channel2)
36 can be used independently or simultaneously (dual mode):
37 (#) DAC channel1 with DAC_OUT1 (PA4) as output or connected to on-chip
38 peripherals (ex. timers).
39 (#) DAC channel2 with DAC_OUT2 (PA5) as output or connected to on-chip
40 peripherals (ex. timers).
41
42 *** DAC Triggers ***
43 ====================
44 [..]
45 Digital to Analog conversion can be non-triggered using DAC_TRIGGER_NONE
46 and DAC_OUT1/DAC_OUT2 is available once writing to DHRx register.
47 [..]
48 Digital to Analog conversion can be triggered by:
49 (#) External event: EXTI Line 9 (any GPIOx_PIN_9) using DAC_TRIGGER_EXT_IT9.
50 The used pin (GPIOx_PIN_9) must be configured in input mode.
51
52 (#) Timers TRGO: TIM2, TIM3, TIM4, TIM5, TIM6 and TIM7
53 (DAC_TRIGGER_T2_TRGO, DAC_TRIGGER_T3_TRGO...)
54
55 (#) Software using DAC_TRIGGER_SOFTWARE
56
57 *** DAC Buffer mode feature ***
58 ===============================
59 [..]
60 Each DAC channel integrates an output buffer that can be used to
61 reduce the output impedance, and to drive external loads directly
62 without having to add an external operational amplifier.
63 To enable, the output buffer use
64 sConfig.DAC_OutputBuffer = DAC_OUTPUTBUFFER_ENABLE;
65 [..]
66 (@) Refer to the device datasheet for more details about output
67 impedance value with and without output buffer.
68
69 *** GPIO configurations guidelines ***
70 =====================
71 [..]
72 When a DAC channel is used (ex channel1 on PA4) and the other is not
73 (ex channel2 on PA5 is configured in Analog and disabled).
74 Channel1 may disturb channel2 as coupling effect.
75 Note that there is no coupling on channel2 as soon as channel2 is turned on.
76 Coupling on adjacent channel could be avoided as follows:
77 when unused PA5 is configured as INPUT PULL-UP or DOWN.
78 PA5 is configured in ANALOG just before it is turned on.
79
80 *** DAC Sample and Hold feature ***
81 ========================
82 [..]
83 For each converter, 2 modes are supported: normal mode and
84 "sample and hold" mode (i.e. low power mode).
85 In the sample and hold mode, the DAC core converts data, then holds the
86 converted voltage on a capacitor. When not converting, the DAC cores and
87 buffer are completely turned off between samples and the DAC output is
88 tri-stated, therefore reducing the overall power consumption. A new
89 stabilization period is needed before each new conversion.
90
91 The sample and hold allow setting internal or external voltage @
92 low power consumption cost (output value can be at any given rate either
93 by CPU or DMA).
94
95 The Sample and hold block and registers uses either LSI & run in
96 several power modes: run mode, sleep mode, low power run, low power sleep
97 mode & stop1 mode.
98
99 Low power stop1 mode allows only static conversion.
100
101 To enable Sample and Hold mode
102 Enable LSI using HAL_RCC_OscConfig with RCC_OSCILLATORTYPE_LSI &
103 RCC_LSI_ON parameters.
104
105 Use DAC_InitStructure.DAC_SampleAndHold = DAC_SAMPLEANDHOLD_ENABLE;
106 & DAC_ChannelConfTypeDef.DAC_SampleAndHoldConfig.DAC_SampleTime,
107 DAC_HoldTime & DAC_RefreshTime;
108
109 *** DAC calibration feature ***
110 ===================================
111 [..]
112 (#) The 2 converters (channel1 & channel2) provide calibration capabilities.
113 (++) Calibration aims at correcting some offset of output buffer.
114 (++) The DAC uses either factory calibration settings OR user defined
115 calibration (trimming) settings (i.e. trimming mode).
116 (++) The user defined settings can be figured out using self calibration
117 handled by HAL_DACEx_SelfCalibrate.
118 (++) HAL_DACEx_SelfCalibrate:
119 (+++) Runs automatically the calibration.
120 (+++) Enables the user trimming mode
121 (+++) Updates a structure with trimming values with fresh calibration
122 results.
123 The user may store the calibration results for larger
124 (ex monitoring the trimming as a function of temperature
125 for instance)
126
127 *** DAC wave generation feature ***
128 ===================================
129 [..]
130 Both DAC channels can be used to generate
131 (#) Noise wave
132 (#) Triangle wave
133
134 *** DAC data format ***
135 =======================
136 [..]
137 The DAC data format can be:
138 (#) 8-bit right alignment using DAC_ALIGN_8B_R
139 (#) 12-bit left alignment using DAC_ALIGN_12B_L
140 (#) 12-bit right alignment using DAC_ALIGN_12B_R
141
142 *** DAC data value to voltage correspondence ***
143 ================================================
144 [..]
145 The analog output voltage on each DAC channel pin is determined
146 by the following equation:
147 [..]
148 DAC_OUTx = VREF+ * DOR / 4095
149 (+) with DOR is the Data Output Register
150 [..]
151 VREF+ is the input voltage reference (refer to the device datasheet)
152 [..]
153 e.g. To set DAC_OUT1 to 0.7V, use
154 (+) Assuming that VREF+ = 3.3V, DAC_OUT1 = (3.3 * 868) / 4095 = 0.7V
155
156 *** DMA requests ***
157 =====================
158 [..]
159 A DMA request can be generated when an external trigger (but not a software trigger)
160 occurs if DMA1 requests are enabled using HAL_DAC_Start_DMA().
161 DMA requests are mapped as following:
162 (#) DAC channel1: mapped on DMA request 8 (can be any DMA channel)
163 (#) DAC channel2: mapped on DMA request 9 (can be any DMA channel)
164
165 [..]
166 (@) For Dual mode and specific signal (Triangle and noise) generation please
167 refer to Extended Features Driver description
168
169 ##### How to use this driver #####
170 ==============================================================================
171 [..]
172 (+) DAC APB clock must be enabled to get write access to DAC
173 registers using HAL_DAC_Init()
174 (+) Configure DAC_OUTx (DAC_OUT1: PA4, DAC_OUT2: PA5) in analog mode.
175 (+) Configure the DAC channel using HAL_DAC_ConfigChannel() function.
176 (+) Enable the DAC channel using HAL_DAC_Start() or HAL_DAC_Start_DMA() functions.
177
178 *** Calibration mode IO operation ***
179 ======================================
180 [..]
181 (+) Retrieve the factory trimming (calibration settings) using HAL_DACEx_GetTrimOffset()
182 (+) Run the calibration using HAL_DACEx_SelfCalibrate()
183 (+) Update the trimming while DAC running using HAL_DACEx_SetUserTrimming()
184
185 *** Polling mode IO operation ***
186 =================================
187 [..]
188 (+) Start the DAC peripheral using HAL_DAC_Start()
189 (+) To read the DAC last data output value, use the HAL_DAC_GetValue() function.
190 (+) Stop the DAC peripheral using HAL_DAC_Stop()
191
192 *** DMA mode IO operation ***
193 ==============================
194 [..]
195 (+) Start the DAC peripheral using HAL_DAC_Start_DMA(), at this stage the user specify the length
196 of data to be transferred at each end of conversion
197 First issued trigger will start the conversion of the value previously set by HAL_DAC_SetValue().
198 (+) At the middle of data transfer HAL_DAC_ConvHalfCpltCallbackCh1() or HAL_DACEx_ConvHalfCpltCallbackCh2()
199 function is executed and user can add his own code by customization of function pointer
200 HAL_DAC_ConvHalfCpltCallbackCh1() or HAL_DACEx_ConvHalfCpltCallbackCh2()
201 (+) At The end of data transfer HAL_DAC_ConvCpltCallbackCh1() or HAL_DACEx_ConvHalfCpltCallbackCh2()
202 function is executed and user can add his own code by customization of function pointer
203 HAL_DAC_ConvCpltCallbackCh1() or HAL_DACEx_ConvHalfCpltCallbackCh2()
204 (+) In case of transfer Error, HAL_DAC_ErrorCallbackCh1() function is executed and user can
205 add his own code by customization of function pointer HAL_DAC_ErrorCallbackCh1
206 (+) In case of DMA underrun, DAC interruption triggers and execute internal function HAL_DAC_IRQHandler.
207 HAL_DAC_DMAUnderrunCallbackCh1() or HAL_DACEx_DMAUnderrunCallbackCh2()
208 function is executed and user can add his own code by customization of function pointer
209 HAL_DAC_DMAUnderrunCallbackCh1() or HAL_DACEx_DMAUnderrunCallbackCh2() and
210 add his own code by customization of function pointer HAL_DAC_ErrorCallbackCh1()
211 (+) Stop the DAC peripheral using HAL_DAC_Stop_DMA()
212
213 *** Callback registration ***
214 =============================================
215 [..]
216 The compilation define USE_HAL_DAC_REGISTER_CALLBACKS when set to 1
217 allows the user to configure dynamically the driver callbacks.
218
219 Use Functions HAL_DAC_RegisterCallback() to register a user callback,
220 it allows to register following callbacks:
221 (+) ConvCpltCallbackCh1 : callback when a half transfer is completed on Ch1.
222 (+) ConvHalfCpltCallbackCh1 : callback when a transfer is completed on Ch1.
223 (+) ErrorCallbackCh1 : callback when an error occurs on Ch1.
224 (+) DMAUnderrunCallbackCh1 : callback when an underrun error occurs on Ch1.
225 (+) ConvCpltCallbackCh2 : callback when a half transfer is completed on Ch2.
226 (+) ConvHalfCpltCallbackCh2 : callback when a transfer is completed on Ch2.
227 (+) ErrorCallbackCh2 : callback when an error occurs on Ch2.
228 (+) DMAUnderrunCallbackCh2 : callback when an underrun error occurs on Ch2.
229 (+) MspInitCallback : DAC MspInit.
230 (+) MspDeInitCallback : DAC MspdeInit.
231 This function takes as parameters the HAL peripheral handle, the Callback ID
232 and a pointer to the user callback function.
233
234 Use function HAL_DAC_UnRegisterCallback() to reset a callback to the default
235 weak (surcharged) function. It allows to reset following callbacks:
236 (+) ConvCpltCallbackCh1 : callback when a half transfer is completed on Ch1.
237 (+) ConvHalfCpltCallbackCh1 : callback when a transfer is completed on Ch1.
238 (+) ErrorCallbackCh1 : callback when an error occurs on Ch1.
239 (+) DMAUnderrunCallbackCh1 : callback when an underrun error occurs on Ch1.
240 (+) ConvCpltCallbackCh2 : callback when a half transfer is completed on Ch2.
241 (+) ConvHalfCpltCallbackCh2 : callback when a transfer is completed on Ch2.
242 (+) ErrorCallbackCh2 : callback when an error occurs on Ch2.
243 (+) DMAUnderrunCallbackCh2 : callback when an underrun error occurs on Ch2.
244 (+) MspInitCallback : DAC MspInit.
245 (+) MspDeInitCallback : DAC MspdeInit.
246 (+) All Callbacks
247 This function) takes as parameters the HAL peripheral handle and the Callback ID.
248
249 By default, after the HAL_DAC_Init and if the state is HAL_DAC_STATE_RESET
250 all callbacks are reset to the corresponding legacy weak (surcharged) functions.
251 Exception done for MspInit and MspDeInit callbacks that are respectively
252 reset to the legacy weak (surcharged) functions in the HAL_DAC_Init
253 and HAL_DAC_DeInit only when these callbacks are null (not registered beforehand).
254 If not, MspInit or MspDeInit are not null, the HAL_DAC_Init and HAL_DAC_DeInit
255 keep and use the user MspInit/MspDeInit callbacks (registered beforehand)
256
257 Callbacks can be registered/unregistered in READY state only.
258 Exception done for MspInit/MspDeInit callbacks that can be registered/unregistered
259 in READY or RESET state, thus registered (user) MspInit/DeInit callbacks can be used
260 during the Init/DeInit.
261 In that case first register the MspInit/MspDeInit user callbacks
262 using HAL_DAC_RegisterCallback before calling HAL_DAC_DeInit
263 or HAL_DAC_Init function.
264
265 When The compilation define USE_HAL_DAC_REGISTER_CALLBACKS is set to 0 or
266 not defined, the callback registering feature is not available
267 and weak (surcharged) callbacks are used.
268
269 *** DAC HAL driver macros list ***
270 =============================================
271 [..]
272 Below the list of most used macros in DAC HAL driver.
273
274 (+) __HAL_DAC_ENABLE : Enable the DAC peripheral
275 (+) __HAL_DAC_DISABLE : Disable the DAC peripheral
276 (+) __HAL_DAC_CLEAR_FLAG: Clear the DAC's pending flags
277 (+) __HAL_DAC_GET_FLAG: Get the selected DAC's flag status
278
279 [..]
280 (@) You can refer to the DAC HAL driver header file for more useful macros
281
282 @endverbatim
283 ******************************************************************************
284 */
285
286 /* Includes ------------------------------------------------------------------*/
287 #include "stm32g0xx_hal.h"
288
289 /** @addtogroup STM32G0xx_HAL_Driver
290 * @{
291 */
292
293 #ifdef HAL_DAC_MODULE_ENABLED
294 #if defined(DAC1)
295
296 /** @defgroup DAC DAC
297 * @brief DAC driver modules
298 * @{
299 */
300
301 /* Private typedef -----------------------------------------------------------*/
302 /* Private define ------------------------------------------------------------*/
303 /* Private constants ---------------------------------------------------------*/
304 /** @addtogroup DAC_Private_Constants DAC Private Constants
305 * @{
306 */
307 #define TIMEOUT_DAC_CALIBCONFIG 1U /* 1 ms */
308
309 /**
310 * @}
311 */
312
313 /* Private macro -------------------------------------------------------------*/
314 /* Private variables ---------------------------------------------------------*/
315 /* Private function prototypes -----------------------------------------------*/
316 /* Exported functions -------------------------------------------------------*/
317
318 /** @defgroup DAC_Exported_Functions DAC Exported Functions
319 * @{
320 */
321
322 /** @defgroup DAC_Exported_Functions_Group1 Initialization and de-initialization functions
323 * @brief Initialization and Configuration functions
324 *
325 @verbatim
326 ==============================================================================
327 ##### Initialization and de-initialization functions #####
328 ==============================================================================
329 [..] This section provides functions allowing to:
330 (+) Initialize and configure the DAC.
331 (+) De-initialize the DAC.
332
333 @endverbatim
334 * @{
335 */
336
337 /**
338 * @brief Initialize the DAC peripheral according to the specified parameters
339 * in the DAC_InitStruct and initialize the associated handle.
340 * @param hdac pointer to a DAC_HandleTypeDef structure that contains
341 * the configuration information for the specified DAC.
342 * @retval HAL status
343 */
HAL_DAC_Init(DAC_HandleTypeDef * hdac)344 HAL_StatusTypeDef HAL_DAC_Init(DAC_HandleTypeDef *hdac)
345 {
346 /* Check DAC handle */
347 if (hdac == NULL)
348 {
349 return HAL_ERROR;
350 }
351 /* Check the parameters */
352 assert_param(IS_DAC_ALL_INSTANCE(hdac->Instance));
353
354 if (hdac->State == HAL_DAC_STATE_RESET)
355 {
356 #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1)
357 /* Init the DAC Callback settings */
358 hdac->ConvCpltCallbackCh1 = HAL_DAC_ConvCpltCallbackCh1;
359 hdac->ConvHalfCpltCallbackCh1 = HAL_DAC_ConvHalfCpltCallbackCh1;
360 hdac->ErrorCallbackCh1 = HAL_DAC_ErrorCallbackCh1;
361 hdac->DMAUnderrunCallbackCh1 = HAL_DAC_DMAUnderrunCallbackCh1;
362
363 hdac->ConvCpltCallbackCh2 = HAL_DACEx_ConvCpltCallbackCh2;
364 hdac->ConvHalfCpltCallbackCh2 = HAL_DACEx_ConvHalfCpltCallbackCh2;
365 hdac->ErrorCallbackCh2 = HAL_DACEx_ErrorCallbackCh2;
366 hdac->DMAUnderrunCallbackCh2 = HAL_DACEx_DMAUnderrunCallbackCh2;
367
368 if (hdac->MspInitCallback == NULL)
369 {
370 hdac->MspInitCallback = HAL_DAC_MspInit;
371 }
372 #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */
373
374 /* Allocate lock resource and initialize it */
375 hdac->Lock = HAL_UNLOCKED;
376
377 #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1)
378 /* Init the low level hardware */
379 hdac->MspInitCallback(hdac);
380 #else
381 /* Init the low level hardware */
382 HAL_DAC_MspInit(hdac);
383 #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */
384 }
385
386 /* Initialize the DAC state*/
387 hdac->State = HAL_DAC_STATE_BUSY;
388
389 /* Set DAC error code to none */
390 hdac->ErrorCode = HAL_DAC_ERROR_NONE;
391
392 /* Initialize the DAC state*/
393 hdac->State = HAL_DAC_STATE_READY;
394
395 /* Return function status */
396 return HAL_OK;
397 }
398
399 /**
400 * @brief Deinitialize the DAC peripheral registers to their default reset values.
401 * @param hdac pointer to a DAC_HandleTypeDef structure that contains
402 * the configuration information for the specified DAC.
403 * @retval HAL status
404 */
HAL_DAC_DeInit(DAC_HandleTypeDef * hdac)405 HAL_StatusTypeDef HAL_DAC_DeInit(DAC_HandleTypeDef *hdac)
406 {
407 /* Check DAC handle */
408 if (hdac == NULL)
409 {
410 return HAL_ERROR;
411 }
412
413 /* Check the parameters */
414 assert_param(IS_DAC_ALL_INSTANCE(hdac->Instance));
415
416 /* Change DAC state */
417 hdac->State = HAL_DAC_STATE_BUSY;
418
419 #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1)
420 if (hdac->MspDeInitCallback == NULL)
421 {
422 hdac->MspDeInitCallback = HAL_DAC_MspDeInit;
423 }
424 /* DeInit the low level hardware */
425 hdac->MspDeInitCallback(hdac);
426 #else
427 /* DeInit the low level hardware */
428 HAL_DAC_MspDeInit(hdac);
429 #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */
430
431 /* Set DAC error code to none */
432 hdac->ErrorCode = HAL_DAC_ERROR_NONE;
433
434 /* Change DAC state */
435 hdac->State = HAL_DAC_STATE_RESET;
436
437 /* Release Lock */
438 __HAL_UNLOCK(hdac);
439
440 /* Return function status */
441 return HAL_OK;
442 }
443
444 /**
445 * @brief Initialize the DAC MSP.
446 * @param hdac pointer to a DAC_HandleTypeDef structure that contains
447 * the configuration information for the specified DAC.
448 * @retval None
449 */
HAL_DAC_MspInit(DAC_HandleTypeDef * hdac)450 __weak void HAL_DAC_MspInit(DAC_HandleTypeDef *hdac)
451 {
452 /* Prevent unused argument(s) compilation warning */
453 UNUSED(hdac);
454
455 /* NOTE : This function should not be modified, when the callback is needed,
456 the HAL_DAC_MspInit could be implemented in the user file
457 */
458 }
459
460 /**
461 * @brief DeInitialize the DAC MSP.
462 * @param hdac pointer to a DAC_HandleTypeDef structure that contains
463 * the configuration information for the specified DAC.
464 * @retval None
465 */
HAL_DAC_MspDeInit(DAC_HandleTypeDef * hdac)466 __weak void HAL_DAC_MspDeInit(DAC_HandleTypeDef *hdac)
467 {
468 /* Prevent unused argument(s) compilation warning */
469 UNUSED(hdac);
470
471 /* NOTE : This function should not be modified, when the callback is needed,
472 the HAL_DAC_MspDeInit could be implemented in the user file
473 */
474 }
475
476 /**
477 * @}
478 */
479
480 /** @defgroup DAC_Exported_Functions_Group2 IO operation functions
481 * @brief IO operation functions
482 *
483 @verbatim
484 ==============================================================================
485 ##### IO operation functions #####
486 ==============================================================================
487 [..] This section provides functions allowing to:
488 (+) Start conversion.
489 (+) Stop conversion.
490 (+) Start conversion and enable DMA transfer.
491 (+) Stop conversion and disable DMA transfer.
492 (+) Get result of conversion.
493
494 @endverbatim
495 * @{
496 */
497
498 /**
499 * @brief Enables DAC and starts conversion of channel.
500 * @param hdac pointer to a DAC_HandleTypeDef structure that contains
501 * the configuration information for the specified DAC.
502 * @param Channel The selected DAC channel.
503 * This parameter can be one of the following values:
504 * @arg DAC_CHANNEL_1: DAC Channel1 selected
505 * @arg DAC_CHANNEL_2: DAC Channel2 selected
506 * @retval HAL status
507 */
HAL_DAC_Start(DAC_HandleTypeDef * hdac,uint32_t Channel)508 HAL_StatusTypeDef HAL_DAC_Start(DAC_HandleTypeDef *hdac, uint32_t Channel)
509 {
510 /* Check the parameters */
511 assert_param(IS_DAC_CHANNEL(Channel));
512
513 /* Process locked */
514 __HAL_LOCK(hdac);
515
516 /* Change DAC state */
517 hdac->State = HAL_DAC_STATE_BUSY;
518
519 /* Enable the Peripheral */
520 __HAL_DAC_ENABLE(hdac, Channel);
521
522 if (Channel == DAC_CHANNEL_1)
523 {
524 /* Check if software trigger enabled */
525 if ((hdac->Instance->CR & (DAC_CR_TEN1 | DAC_CR_TSEL1)) == DAC_TRIGGER_SOFTWARE)
526 {
527 /* Enable the selected DAC software conversion */
528 SET_BIT(hdac->Instance->SWTRIGR, DAC_SWTRIGR_SWTRIG1);
529 }
530 }
531
532 else
533 {
534 /* Check if software trigger enabled */
535 if ((hdac->Instance->CR & (DAC_CR_TEN2 | DAC_CR_TSEL2)) == (DAC_TRIGGER_SOFTWARE << (Channel & 0x10UL)))
536 {
537 /* Enable the selected DAC software conversion*/
538 SET_BIT(hdac->Instance->SWTRIGR, DAC_SWTRIGR_SWTRIG2);
539 }
540 }
541
542
543 /* Change DAC state */
544 hdac->State = HAL_DAC_STATE_READY;
545
546 /* Process unlocked */
547 __HAL_UNLOCK(hdac);
548
549 /* Return function status */
550 return HAL_OK;
551 }
552
553 /**
554 * @brief Disables DAC and stop conversion of channel.
555 * @param hdac pointer to a DAC_HandleTypeDef structure that contains
556 * the configuration information for the specified DAC.
557 * @param Channel The selected DAC channel.
558 * This parameter can be one of the following values:
559 * @arg DAC_CHANNEL_1: DAC Channel1 selected
560 * @arg DAC_CHANNEL_2: DAC Channel2 selected
561 * @retval HAL status
562 */
HAL_DAC_Stop(DAC_HandleTypeDef * hdac,uint32_t Channel)563 HAL_StatusTypeDef HAL_DAC_Stop(DAC_HandleTypeDef *hdac, uint32_t Channel)
564 {
565 /* Check the parameters */
566 assert_param(IS_DAC_CHANNEL(Channel));
567
568 /* Disable the Peripheral */
569 __HAL_DAC_DISABLE(hdac, Channel);
570
571 /* Change DAC state */
572 hdac->State = HAL_DAC_STATE_READY;
573
574 /* Return function status */
575 return HAL_OK;
576 }
577
578 /**
579 * @brief Enables DAC and starts conversion of channel.
580 * @param hdac pointer to a DAC_HandleTypeDef structure that contains
581 * the configuration information for the specified DAC.
582 * @param Channel The selected DAC channel.
583 * This parameter can be one of the following values:
584 * @arg DAC_CHANNEL_1: DAC Channel1 selected
585 * @arg DAC_CHANNEL_2: DAC Channel2 selected
586 * @param pData The source Buffer address.
587 * @param Length The length of data to be transferred from memory to DAC peripheral
588 * @param Alignment Specifies the data alignment for DAC channel.
589 * This parameter can be one of the following values:
590 * @arg DAC_ALIGN_8B_R: 8bit right data alignment selected
591 * @arg DAC_ALIGN_12B_L: 12bit left data alignment selected
592 * @arg DAC_ALIGN_12B_R: 12bit right data alignment selected
593 * @retval HAL status
594 */
HAL_DAC_Start_DMA(DAC_HandleTypeDef * hdac,uint32_t Channel,uint32_t * pData,uint32_t Length,uint32_t Alignment)595 HAL_StatusTypeDef HAL_DAC_Start_DMA(DAC_HandleTypeDef *hdac, uint32_t Channel, uint32_t *pData, uint32_t Length,
596 uint32_t Alignment)
597 {
598 HAL_StatusTypeDef status;
599 uint32_t tmpreg = 0U;
600
601 /* Check the parameters */
602 assert_param(IS_DAC_CHANNEL(Channel));
603 assert_param(IS_DAC_ALIGN(Alignment));
604
605 /* Process locked */
606 __HAL_LOCK(hdac);
607
608 /* Change DAC state */
609 hdac->State = HAL_DAC_STATE_BUSY;
610
611 if (Channel == DAC_CHANNEL_1)
612 {
613 /* Set the DMA transfer complete callback for channel1 */
614 hdac->DMA_Handle1->XferCpltCallback = DAC_DMAConvCpltCh1;
615
616 /* Set the DMA half transfer complete callback for channel1 */
617 hdac->DMA_Handle1->XferHalfCpltCallback = DAC_DMAHalfConvCpltCh1;
618
619 /* Set the DMA error callback for channel1 */
620 hdac->DMA_Handle1->XferErrorCallback = DAC_DMAErrorCh1;
621
622 /* Enable the selected DAC channel1 DMA request */
623 SET_BIT(hdac->Instance->CR, DAC_CR_DMAEN1);
624
625 /* Case of use of channel 1 */
626 switch (Alignment)
627 {
628 case DAC_ALIGN_12B_R:
629 /* Get DHR12R1 address */
630 tmpreg = (uint32_t)&hdac->Instance->DHR12R1;
631 break;
632 case DAC_ALIGN_12B_L:
633 /* Get DHR12L1 address */
634 tmpreg = (uint32_t)&hdac->Instance->DHR12L1;
635 break;
636 case DAC_ALIGN_8B_R:
637 /* Get DHR8R1 address */
638 tmpreg = (uint32_t)&hdac->Instance->DHR8R1;
639 break;
640 default:
641 break;
642 }
643 }
644
645 else
646 {
647 /* Set the DMA transfer complete callback for channel2 */
648 hdac->DMA_Handle2->XferCpltCallback = DAC_DMAConvCpltCh2;
649
650 /* Set the DMA half transfer complete callback for channel2 */
651 hdac->DMA_Handle2->XferHalfCpltCallback = DAC_DMAHalfConvCpltCh2;
652
653 /* Set the DMA error callback for channel2 */
654 hdac->DMA_Handle2->XferErrorCallback = DAC_DMAErrorCh2;
655
656 /* Enable the selected DAC channel2 DMA request */
657 SET_BIT(hdac->Instance->CR, DAC_CR_DMAEN2);
658
659 /* Case of use of channel 2 */
660 switch (Alignment)
661 {
662 case DAC_ALIGN_12B_R:
663 /* Get DHR12R2 address */
664 tmpreg = (uint32_t)&hdac->Instance->DHR12R2;
665 break;
666 case DAC_ALIGN_12B_L:
667 /* Get DHR12L2 address */
668 tmpreg = (uint32_t)&hdac->Instance->DHR12L2;
669 break;
670 case DAC_ALIGN_8B_R:
671 /* Get DHR8R2 address */
672 tmpreg = (uint32_t)&hdac->Instance->DHR8R2;
673 break;
674 default:
675 break;
676 }
677 }
678
679
680 /* Enable the DMA channel */
681 if (Channel == DAC_CHANNEL_1)
682 {
683 /* Enable the DAC DMA underrun interrupt */
684 __HAL_DAC_ENABLE_IT(hdac, DAC_IT_DMAUDR1);
685
686 /* Enable the DMA channel */
687 status = HAL_DMA_Start_IT(hdac->DMA_Handle1, (uint32_t)pData, tmpreg, Length);
688 }
689
690 else
691 {
692 /* Enable the DAC DMA underrun interrupt */
693 __HAL_DAC_ENABLE_IT(hdac, DAC_IT_DMAUDR2);
694
695 /* Enable the DMA channel */
696 status = HAL_DMA_Start_IT(hdac->DMA_Handle2, (uint32_t)pData, tmpreg, Length);
697 }
698
699
700 /* Process Unlocked */
701 __HAL_UNLOCK(hdac);
702
703 if (status == HAL_OK)
704 {
705 /* Enable the Peripheral */
706 __HAL_DAC_ENABLE(hdac, Channel);
707 }
708 else
709 {
710 hdac->ErrorCode |= HAL_DAC_ERROR_DMA;
711 }
712
713 /* Return function status */
714 return status;
715 }
716
717 /**
718 * @brief Disables DAC and stop conversion of channel.
719 * @param hdac pointer to a DAC_HandleTypeDef structure that contains
720 * the configuration information for the specified DAC.
721 * @param Channel The selected DAC channel.
722 * This parameter can be one of the following values:
723 * @arg DAC_CHANNEL_1: DAC Channel1 selected
724 * @arg DAC_CHANNEL_2: DAC Channel2 selected
725 * @retval HAL status
726 */
HAL_DAC_Stop_DMA(DAC_HandleTypeDef * hdac,uint32_t Channel)727 HAL_StatusTypeDef HAL_DAC_Stop_DMA(DAC_HandleTypeDef *hdac, uint32_t Channel)
728 {
729 /* Check the parameters */
730 assert_param(IS_DAC_CHANNEL(Channel));
731
732 /* Disable the selected DAC channel DMA request */
733 hdac->Instance->CR &= ~(DAC_CR_DMAEN1 << (Channel & 0x10UL));
734
735 /* Disable the Peripheral */
736 __HAL_DAC_DISABLE(hdac, Channel);
737
738 /* Disable the DMA channel */
739
740 /* Channel1 is used */
741 if (Channel == DAC_CHANNEL_1)
742 {
743 /* Disable the DMA channel */
744 (void)HAL_DMA_Abort(hdac->DMA_Handle1);
745
746 /* Disable the DAC DMA underrun interrupt */
747 __HAL_DAC_DISABLE_IT(hdac, DAC_IT_DMAUDR1);
748 }
749
750 else /* Channel2 is used for */
751 {
752 /* Disable the DMA channel */
753 (void)HAL_DMA_Abort(hdac->DMA_Handle2);
754
755 /* Disable the DAC DMA underrun interrupt */
756 __HAL_DAC_DISABLE_IT(hdac, DAC_IT_DMAUDR2);
757 }
758
759
760 /* Change DAC state */
761 hdac->State = HAL_DAC_STATE_READY;
762
763 /* Return function status */
764 return HAL_OK;
765 }
766
767 /**
768 * @brief Handles DAC interrupt request
769 * This function uses the interruption of DMA
770 * underrun.
771 * @param hdac pointer to a DAC_HandleTypeDef structure that contains
772 * the configuration information for the specified DAC.
773 * @retval None
774 */
HAL_DAC_IRQHandler(DAC_HandleTypeDef * hdac)775 void HAL_DAC_IRQHandler(DAC_HandleTypeDef *hdac)
776 {
777 if (__HAL_DAC_GET_IT_SOURCE(hdac, DAC_IT_DMAUDR1))
778 {
779 /* Check underrun flag of DAC channel 1 */
780 if (__HAL_DAC_GET_FLAG(hdac, DAC_FLAG_DMAUDR1))
781 {
782 /* Change DAC state to error state */
783 hdac->State = HAL_DAC_STATE_ERROR;
784
785 /* Set DAC error code to channel1 DMA underrun error */
786 SET_BIT(hdac->ErrorCode, HAL_DAC_ERROR_DMAUNDERRUNCH1);
787
788 /* Clear the underrun flag */
789 __HAL_DAC_CLEAR_FLAG(hdac, DAC_FLAG_DMAUDR1);
790
791 /* Disable the selected DAC channel1 DMA request */
792 CLEAR_BIT(hdac->Instance->CR, DAC_CR_DMAEN1);
793
794 /* Error callback */
795 #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1)
796 hdac->DMAUnderrunCallbackCh1(hdac);
797 #else
798 HAL_DAC_DMAUnderrunCallbackCh1(hdac);
799 #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */
800 }
801 }
802
803
804 if (__HAL_DAC_GET_IT_SOURCE(hdac, DAC_IT_DMAUDR2))
805 {
806 /* Check underrun flag of DAC channel 2 */
807 if (__HAL_DAC_GET_FLAG(hdac, DAC_FLAG_DMAUDR2))
808 {
809 /* Change DAC state to error state */
810 hdac->State = HAL_DAC_STATE_ERROR;
811
812 /* Set DAC error code to channel2 DMA underrun error */
813 SET_BIT(hdac->ErrorCode, HAL_DAC_ERROR_DMAUNDERRUNCH2);
814
815 /* Clear the underrun flag */
816 __HAL_DAC_CLEAR_FLAG(hdac, DAC_FLAG_DMAUDR2);
817
818 /* Disable the selected DAC channel2 DMA request */
819 CLEAR_BIT(hdac->Instance->CR, DAC_CR_DMAEN2);
820
821 /* Error callback */
822 #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1)
823 hdac->DMAUnderrunCallbackCh2(hdac);
824 #else
825 HAL_DACEx_DMAUnderrunCallbackCh2(hdac);
826 #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */
827 }
828 }
829
830 }
831
832 /**
833 * @brief Set the specified data holding register value for DAC channel.
834 * @param hdac pointer to a DAC_HandleTypeDef structure that contains
835 * the configuration information for the specified DAC.
836 * @param Channel The selected DAC channel.
837 * This parameter can be one of the following values:
838 * @arg DAC_CHANNEL_1: DAC Channel1 selected
839 * @arg DAC_CHANNEL_2: DAC Channel2 selected
840 * @param Alignment Specifies the data alignment.
841 * This parameter can be one of the following values:
842 * @arg DAC_ALIGN_8B_R: 8bit right data alignment selected
843 * @arg DAC_ALIGN_12B_L: 12bit left data alignment selected
844 * @arg DAC_ALIGN_12B_R: 12bit right data alignment selected
845 * @param Data Data to be loaded in the selected data holding register.
846 * @retval HAL status
847 */
HAL_DAC_SetValue(DAC_HandleTypeDef * hdac,uint32_t Channel,uint32_t Alignment,uint32_t Data)848 HAL_StatusTypeDef HAL_DAC_SetValue(DAC_HandleTypeDef *hdac, uint32_t Channel, uint32_t Alignment, uint32_t Data)
849 {
850 __IO uint32_t tmp = 0UL;
851
852 /* Check the parameters */
853 assert_param(IS_DAC_CHANNEL(Channel));
854 assert_param(IS_DAC_ALIGN(Alignment));
855 assert_param(IS_DAC_DATA(Data));
856
857 tmp = (uint32_t)hdac->Instance;
858 if (Channel == DAC_CHANNEL_1)
859 {
860 tmp += DAC_DHR12R1_ALIGNMENT(Alignment);
861 }
862
863 else
864 {
865 tmp += DAC_DHR12R2_ALIGNMENT(Alignment);
866 }
867
868
869 /* Set the DAC channel selected data holding register */
870 *(__IO uint32_t *) tmp = Data;
871
872 /* Return function status */
873 return HAL_OK;
874 }
875
876 /**
877 * @brief Conversion complete callback in non-blocking mode for Channel1
878 * @param hdac pointer to a DAC_HandleTypeDef structure that contains
879 * the configuration information for the specified DAC.
880 * @retval None
881 */
HAL_DAC_ConvCpltCallbackCh1(DAC_HandleTypeDef * hdac)882 __weak void HAL_DAC_ConvCpltCallbackCh1(DAC_HandleTypeDef *hdac)
883 {
884 /* Prevent unused argument(s) compilation warning */
885 UNUSED(hdac);
886
887 /* NOTE : This function should not be modified, when the callback is needed,
888 the HAL_DAC_ConvCpltCallbackCh1 could be implemented in the user file
889 */
890 }
891
892 /**
893 * @brief Conversion half DMA transfer callback in non-blocking mode for Channel1
894 * @param hdac pointer to a DAC_HandleTypeDef structure that contains
895 * the configuration information for the specified DAC.
896 * @retval None
897 */
HAL_DAC_ConvHalfCpltCallbackCh1(DAC_HandleTypeDef * hdac)898 __weak void HAL_DAC_ConvHalfCpltCallbackCh1(DAC_HandleTypeDef *hdac)
899 {
900 /* Prevent unused argument(s) compilation warning */
901 UNUSED(hdac);
902
903 /* NOTE : This function should not be modified, when the callback is needed,
904 the HAL_DAC_ConvHalfCpltCallbackCh1 could be implemented in the user file
905 */
906 }
907
908 /**
909 * @brief Error DAC callback for Channel1.
910 * @param hdac pointer to a DAC_HandleTypeDef structure that contains
911 * the configuration information for the specified DAC.
912 * @retval None
913 */
HAL_DAC_ErrorCallbackCh1(DAC_HandleTypeDef * hdac)914 __weak void HAL_DAC_ErrorCallbackCh1(DAC_HandleTypeDef *hdac)
915 {
916 /* Prevent unused argument(s) compilation warning */
917 UNUSED(hdac);
918
919 /* NOTE : This function should not be modified, when the callback is needed,
920 the HAL_DAC_ErrorCallbackCh1 could be implemented in the user file
921 */
922 }
923
924 /**
925 * @brief DMA underrun DAC callback for channel1.
926 * @param hdac pointer to a DAC_HandleTypeDef structure that contains
927 * the configuration information for the specified DAC.
928 * @retval None
929 */
HAL_DAC_DMAUnderrunCallbackCh1(DAC_HandleTypeDef * hdac)930 __weak void HAL_DAC_DMAUnderrunCallbackCh1(DAC_HandleTypeDef *hdac)
931 {
932 /* Prevent unused argument(s) compilation warning */
933 UNUSED(hdac);
934
935 /* NOTE : This function should not be modified, when the callback is needed,
936 the HAL_DAC_DMAUnderrunCallbackCh1 could be implemented in the user file
937 */
938 }
939
940 /**
941 * @}
942 */
943
944 /** @defgroup DAC_Exported_Functions_Group3 Peripheral Control functions
945 * @brief Peripheral Control functions
946 *
947 @verbatim
948 ==============================================================================
949 ##### Peripheral Control functions #####
950 ==============================================================================
951 [..] This section provides functions allowing to:
952 (+) Configure channels.
953 (+) Set the specified data holding register value for DAC channel.
954
955 @endverbatim
956 * @{
957 */
958
959 /**
960 * @brief Returns the last data output value of the selected DAC channel.
961 * @param hdac pointer to a DAC_HandleTypeDef structure that contains
962 * the configuration information for the specified DAC.
963 * @param Channel The selected DAC channel.
964 * This parameter can be one of the following values:
965 * @arg DAC_CHANNEL_1: DAC Channel1 selected
966 * @arg DAC_CHANNEL_2: DAC Channel2 selected
967 * @retval The selected DAC channel data output value.
968 */
HAL_DAC_GetValue(DAC_HandleTypeDef * hdac,uint32_t Channel)969 uint32_t HAL_DAC_GetValue(DAC_HandleTypeDef *hdac, uint32_t Channel)
970 {
971 uint32_t result;
972
973 /* Check the parameters */
974 assert_param(IS_DAC_CHANNEL(Channel));
975
976 if (Channel == DAC_CHANNEL_1)
977 {
978 result = hdac->Instance->DOR1;
979 }
980
981 else
982 {
983 result = hdac->Instance->DOR2;
984 }
985
986 /* Returns the DAC channel data output register value */
987 return result;
988 }
989
990 /**
991 * @brief Configures the selected DAC channel.
992 * @param hdac pointer to a DAC_HandleTypeDef structure that contains
993 * the configuration information for the specified DAC.
994 * @param sConfig DAC configuration structure.
995 * @param Channel The selected DAC channel.
996 * This parameter can be one of the following values:
997 * @arg DAC_CHANNEL_1: DAC Channel1 selected
998 * @arg DAC_CHANNEL_2: DAC Channel2 selected
999 * @retval HAL status
1000 */
HAL_DAC_ConfigChannel(DAC_HandleTypeDef * hdac,DAC_ChannelConfTypeDef * sConfig,uint32_t Channel)1001 HAL_StatusTypeDef HAL_DAC_ConfigChannel(DAC_HandleTypeDef *hdac, DAC_ChannelConfTypeDef *sConfig, uint32_t Channel)
1002 {
1003 uint32_t tmpreg1;
1004 uint32_t tmpreg2;
1005 uint32_t tickstart;
1006
1007 /* Check the DAC parameters */
1008 assert_param(IS_DAC_TRIGGER(sConfig->DAC_Trigger));
1009 assert_param(IS_DAC_OUTPUT_BUFFER_STATE(sConfig->DAC_OutputBuffer));
1010 assert_param(IS_DAC_CHIP_CONNECTION(sConfig->DAC_ConnectOnChipPeripheral));
1011 assert_param(IS_DAC_TRIMMING(sConfig->DAC_UserTrimming));
1012 if ((sConfig->DAC_UserTrimming) == DAC_TRIMMING_USER)
1013 {
1014 assert_param(IS_DAC_TRIMMINGVALUE(sConfig->DAC_TrimmingValue));
1015 }
1016 assert_param(IS_DAC_SAMPLEANDHOLD(sConfig->DAC_SampleAndHold));
1017 if ((sConfig->DAC_SampleAndHold) == DAC_SAMPLEANDHOLD_ENABLE)
1018 {
1019 assert_param(IS_DAC_SAMPLETIME(sConfig->DAC_SampleAndHoldConfig.DAC_SampleTime));
1020 assert_param(IS_DAC_HOLDTIME(sConfig->DAC_SampleAndHoldConfig.DAC_HoldTime));
1021 assert_param(IS_DAC_REFRESHTIME(sConfig->DAC_SampleAndHoldConfig.DAC_RefreshTime));
1022 }
1023 assert_param(IS_DAC_CHANNEL(Channel));
1024
1025 /* Process locked */
1026 __HAL_LOCK(hdac);
1027
1028 /* Change DAC state */
1029 hdac->State = HAL_DAC_STATE_BUSY;
1030
1031 /* Sample and hold configuration */
1032 if (sConfig->DAC_SampleAndHold == DAC_SAMPLEANDHOLD_ENABLE)
1033 {
1034 /* Get timeout */
1035 tickstart = HAL_GetTick();
1036
1037 if (Channel == DAC_CHANNEL_1)
1038 {
1039 /* SHSR1 can be written when BWST1 is cleared */
1040 while (((hdac->Instance->SR) & DAC_SR_BWST1) != 0UL)
1041 {
1042 /* Check for the Timeout */
1043 if ((HAL_GetTick() - tickstart) > TIMEOUT_DAC_CALIBCONFIG)
1044 {
1045 /* Update error code */
1046 SET_BIT(hdac->ErrorCode, HAL_DAC_ERROR_TIMEOUT);
1047
1048 /* Change the DMA state */
1049 hdac->State = HAL_DAC_STATE_TIMEOUT;
1050
1051 return HAL_TIMEOUT;
1052 }
1053 }
1054 HAL_Delay(1);
1055 hdac->Instance->SHSR1 = sConfig->DAC_SampleAndHoldConfig.DAC_SampleTime;
1056 }
1057
1058 else /* Channel 2 */
1059 {
1060 /* SHSR2 can be written when BWST2 is cleared */
1061 while (((hdac->Instance->SR) & DAC_SR_BWST2) != 0UL)
1062 {
1063 /* Check for the Timeout */
1064 if ((HAL_GetTick() - tickstart) > TIMEOUT_DAC_CALIBCONFIG)
1065 {
1066 /* Update error code */
1067 SET_BIT(hdac->ErrorCode, HAL_DAC_ERROR_TIMEOUT);
1068
1069 /* Change the DMA state */
1070 hdac->State = HAL_DAC_STATE_TIMEOUT;
1071
1072 return HAL_TIMEOUT;
1073 }
1074 }
1075 HAL_Delay(1U);
1076 hdac->Instance->SHSR2 = sConfig->DAC_SampleAndHoldConfig.DAC_SampleTime;
1077 }
1078
1079
1080 /* HoldTime */
1081 MODIFY_REG(hdac->Instance->SHHR, DAC_SHHR_THOLD1 << (Channel & 0x10UL),
1082 (sConfig->DAC_SampleAndHoldConfig.DAC_HoldTime) << (Channel & 0x10UL));
1083 /* RefreshTime */
1084 MODIFY_REG(hdac->Instance->SHRR, DAC_SHRR_TREFRESH1 << (Channel & 0x10UL),
1085 (sConfig->DAC_SampleAndHoldConfig.DAC_RefreshTime) << (Channel & 0x10UL));
1086 }
1087
1088 if (sConfig->DAC_UserTrimming == DAC_TRIMMING_USER)
1089 /* USER TRIMMING */
1090 {
1091 /* Get the DAC CCR value */
1092 tmpreg1 = hdac->Instance->CCR;
1093 /* Clear trimming value */
1094 tmpreg1 &= ~(((uint32_t)(DAC_CCR_OTRIM1)) << (Channel & 0x10UL));
1095 /* Configure for the selected trimming offset */
1096 tmpreg2 = sConfig->DAC_TrimmingValue;
1097 /* Calculate CCR register value depending on DAC_Channel */
1098 tmpreg1 |= tmpreg2 << (Channel & 0x10UL);
1099 /* Write to DAC CCR */
1100 hdac->Instance->CCR = tmpreg1;
1101 }
1102 /* else factory trimming is used (factory setting are available at reset)*/
1103 /* SW Nothing has nothing to do */
1104
1105 /* Get the DAC MCR value */
1106 tmpreg1 = hdac->Instance->MCR;
1107 /* Clear DAC_MCR_MODEx bits */
1108 tmpreg1 &= ~(((uint32_t)(DAC_MCR_MODE1)) << (Channel & 0x10UL));
1109 /* Configure for the selected DAC channel: mode, buffer output & on chip peripheral connect */
1110 tmpreg2 = (sConfig->DAC_SampleAndHold | sConfig->DAC_OutputBuffer | sConfig->DAC_ConnectOnChipPeripheral);
1111 /* Calculate MCR register value depending on DAC_Channel */
1112 tmpreg1 |= tmpreg2 << (Channel & 0x10UL);
1113 /* Write to DAC MCR */
1114 hdac->Instance->MCR = tmpreg1;
1115
1116 /* DAC in normal operating mode hence clear DAC_CR_CENx bit */
1117 CLEAR_BIT(hdac->Instance->CR, DAC_CR_CEN1 << (Channel & 0x10UL));
1118
1119 /* Get the DAC CR value */
1120 tmpreg1 = hdac->Instance->CR;
1121 /* Clear TENx, TSELx, WAVEx and MAMPx bits */
1122 tmpreg1 &= ~(((uint32_t)(DAC_CR_MAMP1 | DAC_CR_WAVE1 | DAC_CR_TSEL1 | DAC_CR_TEN1)) << (Channel & 0x10UL));
1123 /* Configure for the selected DAC channel: trigger */
1124 /* Set TSELx and TENx bits according to DAC_Trigger value */
1125 tmpreg2 = sConfig->DAC_Trigger;
1126 /* Calculate CR register value depending on DAC_Channel */
1127 tmpreg1 |= tmpreg2 << (Channel & 0x10UL);
1128 /* Write to DAC CR */
1129 hdac->Instance->CR = tmpreg1;
1130 /* Disable wave generation */
1131 CLEAR_BIT(hdac->Instance->CR, (DAC_CR_WAVE1 << (Channel & 0x10UL)));
1132
1133 /* Change DAC state */
1134 hdac->State = HAL_DAC_STATE_READY;
1135
1136 /* Process unlocked */
1137 __HAL_UNLOCK(hdac);
1138
1139 /* Return function status */
1140 return HAL_OK;
1141 }
1142
1143 /**
1144 * @}
1145 */
1146
1147 /** @defgroup DAC_Exported_Functions_Group4 Peripheral State and Errors functions
1148 * @brief Peripheral State and Errors functions
1149 *
1150 @verbatim
1151 ==============================================================================
1152 ##### Peripheral State and Errors functions #####
1153 ==============================================================================
1154 [..]
1155 This subsection provides functions allowing to
1156 (+) Check the DAC state.
1157 (+) Check the DAC Errors.
1158
1159 @endverbatim
1160 * @{
1161 */
1162
1163 /**
1164 * @brief return the DAC handle state
1165 * @param hdac pointer to a DAC_HandleTypeDef structure that contains
1166 * the configuration information for the specified DAC.
1167 * @retval HAL state
1168 */
HAL_DAC_GetState(DAC_HandleTypeDef * hdac)1169 HAL_DAC_StateTypeDef HAL_DAC_GetState(DAC_HandleTypeDef *hdac)
1170 {
1171 /* Return DAC handle state */
1172 return hdac->State;
1173 }
1174
1175
1176 /**
1177 * @brief Return the DAC error code
1178 * @param hdac pointer to a DAC_HandleTypeDef structure that contains
1179 * the configuration information for the specified DAC.
1180 * @retval DAC Error Code
1181 */
HAL_DAC_GetError(DAC_HandleTypeDef * hdac)1182 uint32_t HAL_DAC_GetError(DAC_HandleTypeDef *hdac)
1183 {
1184 return hdac->ErrorCode;
1185 }
1186
1187 /**
1188 * @}
1189 */
1190
1191 /**
1192 * @}
1193 */
1194
1195 /** @addtogroup DAC_Exported_Functions
1196 * @{
1197 */
1198
1199 /** @addtogroup DAC_Exported_Functions_Group1
1200 * @{
1201 */
1202 #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1)
1203 /**
1204 * @brief Register a User DAC Callback
1205 * To be used instead of the weak (surcharged) predefined callback
1206 * @param hdac DAC handle
1207 * @param CallbackID ID of the callback to be registered
1208 * This parameter can be one of the following values:
1209 * @arg @ref HAL_DAC_ERROR_INVALID_CALLBACK DAC Error Callback ID
1210 * @arg @ref HAL_DAC_CH1_COMPLETE_CB_ID DAC CH1 Complete Callback ID
1211 * @arg @ref HAL_DAC_CH1_HALF_COMPLETE_CB_ID DAC CH1 Half Complete Callback ID
1212 * @arg @ref HAL_DAC_CH1_ERROR_ID DAC CH1 Error Callback ID
1213 * @arg @ref HAL_DAC_CH1_UNDERRUN_CB_ID DAC CH1 UnderRun Callback ID
1214 * @arg @ref HAL_DAC_CH2_COMPLETE_CB_ID DAC CH2 Complete Callback ID
1215 * @arg @ref HAL_DAC_CH2_HALF_COMPLETE_CB_ID DAC CH2 Half Complete Callback ID
1216 * @arg @ref HAL_DAC_CH2_ERROR_ID DAC CH2 Error Callback ID
1217 * @arg @ref HAL_DAC_CH2_UNDERRUN_CB_ID DAC CH2 UnderRun Callback ID
1218 * @arg @ref HAL_DAC_MSPINIT_CB_ID DAC MSP Init Callback ID
1219 * @arg @ref HAL_DAC_MSPDEINIT_CB_ID DAC MSP DeInit Callback ID
1220 *
1221 * @param pCallback pointer to the Callback function
1222 * @retval status
1223 */
HAL_DAC_RegisterCallback(DAC_HandleTypeDef * hdac,HAL_DAC_CallbackIDTypeDef CallbackID,pDAC_CallbackTypeDef pCallback)1224 HAL_StatusTypeDef HAL_DAC_RegisterCallback(DAC_HandleTypeDef *hdac, HAL_DAC_CallbackIDTypeDef CallbackID,
1225 pDAC_CallbackTypeDef pCallback)
1226 {
1227 HAL_StatusTypeDef status = HAL_OK;
1228
1229 if (pCallback == NULL)
1230 {
1231 /* Update the error code */
1232 hdac->ErrorCode |= HAL_DAC_ERROR_INVALID_CALLBACK;
1233 return HAL_ERROR;
1234 }
1235
1236 /* Process locked */
1237 __HAL_LOCK(hdac);
1238
1239 if (hdac->State == HAL_DAC_STATE_READY)
1240 {
1241 switch (CallbackID)
1242 {
1243 case HAL_DAC_CH1_COMPLETE_CB_ID :
1244 hdac->ConvCpltCallbackCh1 = pCallback;
1245 break;
1246 case HAL_DAC_CH1_HALF_COMPLETE_CB_ID :
1247 hdac->ConvHalfCpltCallbackCh1 = pCallback;
1248 break;
1249 case HAL_DAC_CH1_ERROR_ID :
1250 hdac->ErrorCallbackCh1 = pCallback;
1251 break;
1252 case HAL_DAC_CH1_UNDERRUN_CB_ID :
1253 hdac->DMAUnderrunCallbackCh1 = pCallback;
1254 break;
1255
1256 case HAL_DAC_CH2_COMPLETE_CB_ID :
1257 hdac->ConvCpltCallbackCh2 = pCallback;
1258 break;
1259 case HAL_DAC_CH2_HALF_COMPLETE_CB_ID :
1260 hdac->ConvHalfCpltCallbackCh2 = pCallback;
1261 break;
1262 case HAL_DAC_CH2_ERROR_ID :
1263 hdac->ErrorCallbackCh2 = pCallback;
1264 break;
1265 case HAL_DAC_CH2_UNDERRUN_CB_ID :
1266 hdac->DMAUnderrunCallbackCh2 = pCallback;
1267 break;
1268
1269 case HAL_DAC_MSPINIT_CB_ID :
1270 hdac->MspInitCallback = pCallback;
1271 break;
1272 case HAL_DAC_MSPDEINIT_CB_ID :
1273 hdac->MspDeInitCallback = pCallback;
1274 break;
1275 default :
1276 /* Update the error code */
1277 hdac->ErrorCode |= HAL_DAC_ERROR_INVALID_CALLBACK;
1278 /* update return status */
1279 status = HAL_ERROR;
1280 break;
1281 }
1282 }
1283 else if (hdac->State == HAL_DAC_STATE_RESET)
1284 {
1285 switch (CallbackID)
1286 {
1287 case HAL_DAC_MSPINIT_CB_ID :
1288 hdac->MspInitCallback = pCallback;
1289 break;
1290 case HAL_DAC_MSPDEINIT_CB_ID :
1291 hdac->MspDeInitCallback = pCallback;
1292 break;
1293 default :
1294 /* Update the error code */
1295 hdac->ErrorCode |= HAL_DAC_ERROR_INVALID_CALLBACK;
1296 /* update return status */
1297 status = HAL_ERROR;
1298 break;
1299 }
1300 }
1301 else
1302 {
1303 /* Update the error code */
1304 hdac->ErrorCode |= HAL_DAC_ERROR_INVALID_CALLBACK;
1305 /* update return status */
1306 status = HAL_ERROR;
1307 }
1308
1309 /* Release Lock */
1310 __HAL_UNLOCK(hdac);
1311 return status;
1312 }
1313
1314 /**
1315 * @brief Unregister a User DAC Callback
1316 * DAC Callback is redirected to the weak (surcharged) predefined callback
1317 * @param hdac DAC handle
1318 * @param CallbackID ID of the callback to be unregistered
1319 * This parameter can be one of the following values:
1320 * @arg @ref HAL_DAC_CH1_COMPLETE_CB_ID DAC CH1 transfer Complete Callback ID
1321 * @arg @ref HAL_DAC_CH1_HALF_COMPLETE_CB_ID DAC CH1 Half Complete Callback ID
1322 * @arg @ref HAL_DAC_CH1_ERROR_ID DAC CH1 Error Callback ID
1323 * @arg @ref HAL_DAC_CH1_UNDERRUN_CB_ID DAC CH1 UnderRun Callback ID
1324 * @arg @ref HAL_DAC_CH2_COMPLETE_CB_ID DAC CH2 Complete Callback ID
1325 * @arg @ref HAL_DAC_CH2_HALF_COMPLETE_CB_ID DAC CH2 Half Complete Callback ID
1326 * @arg @ref HAL_DAC_CH2_ERROR_ID DAC CH2 Error Callback ID
1327 * @arg @ref HAL_DAC_CH2_UNDERRUN_CB_ID DAC CH2 UnderRun Callback ID
1328 * @arg @ref HAL_DAC_MSPINIT_CB_ID DAC MSP Init Callback ID
1329 * @arg @ref HAL_DAC_MSPDEINIT_CB_ID DAC MSP DeInit Callback ID
1330 * @arg @ref HAL_DAC_ALL_CB_ID DAC All callbacks
1331 * @retval status
1332 */
HAL_DAC_UnRegisterCallback(DAC_HandleTypeDef * hdac,HAL_DAC_CallbackIDTypeDef CallbackID)1333 HAL_StatusTypeDef HAL_DAC_UnRegisterCallback(DAC_HandleTypeDef *hdac, HAL_DAC_CallbackIDTypeDef CallbackID)
1334 {
1335 HAL_StatusTypeDef status = HAL_OK;
1336
1337 /* Process locked */
1338 __HAL_LOCK(hdac);
1339
1340 if (hdac->State == HAL_DAC_STATE_READY)
1341 {
1342 switch (CallbackID)
1343 {
1344 case HAL_DAC_CH1_COMPLETE_CB_ID :
1345 hdac->ConvCpltCallbackCh1 = HAL_DAC_ConvCpltCallbackCh1;
1346 break;
1347 case HAL_DAC_CH1_HALF_COMPLETE_CB_ID :
1348 hdac->ConvHalfCpltCallbackCh1 = HAL_DAC_ConvHalfCpltCallbackCh1;
1349 break;
1350 case HAL_DAC_CH1_ERROR_ID :
1351 hdac->ErrorCallbackCh1 = HAL_DAC_ErrorCallbackCh1;
1352 break;
1353 case HAL_DAC_CH1_UNDERRUN_CB_ID :
1354 hdac->DMAUnderrunCallbackCh1 = HAL_DAC_DMAUnderrunCallbackCh1;
1355 break;
1356
1357 case HAL_DAC_CH2_COMPLETE_CB_ID :
1358 hdac->ConvCpltCallbackCh2 = HAL_DACEx_ConvCpltCallbackCh2;
1359 break;
1360 case HAL_DAC_CH2_HALF_COMPLETE_CB_ID :
1361 hdac->ConvHalfCpltCallbackCh2 = HAL_DACEx_ConvHalfCpltCallbackCh2;
1362 break;
1363 case HAL_DAC_CH2_ERROR_ID :
1364 hdac->ErrorCallbackCh2 = HAL_DACEx_ErrorCallbackCh2;
1365 break;
1366 case HAL_DAC_CH2_UNDERRUN_CB_ID :
1367 hdac->DMAUnderrunCallbackCh2 = HAL_DACEx_DMAUnderrunCallbackCh2;
1368 break;
1369
1370 case HAL_DAC_MSPINIT_CB_ID :
1371 hdac->MspInitCallback = HAL_DAC_MspInit;
1372 break;
1373 case HAL_DAC_MSPDEINIT_CB_ID :
1374 hdac->MspDeInitCallback = HAL_DAC_MspDeInit;
1375 break;
1376 case HAL_DAC_ALL_CB_ID :
1377 hdac->ConvCpltCallbackCh1 = HAL_DAC_ConvCpltCallbackCh1;
1378 hdac->ConvHalfCpltCallbackCh1 = HAL_DAC_ConvHalfCpltCallbackCh1;
1379 hdac->ErrorCallbackCh1 = HAL_DAC_ErrorCallbackCh1;
1380 hdac->DMAUnderrunCallbackCh1 = HAL_DAC_DMAUnderrunCallbackCh1;
1381
1382 hdac->ConvCpltCallbackCh2 = HAL_DACEx_ConvCpltCallbackCh2;
1383 hdac->ConvHalfCpltCallbackCh2 = HAL_DACEx_ConvHalfCpltCallbackCh2;
1384 hdac->ErrorCallbackCh2 = HAL_DACEx_ErrorCallbackCh2;
1385 hdac->DMAUnderrunCallbackCh2 = HAL_DACEx_DMAUnderrunCallbackCh2;
1386
1387 hdac->MspInitCallback = HAL_DAC_MspInit;
1388 hdac->MspDeInitCallback = HAL_DAC_MspDeInit;
1389 break;
1390 default :
1391 /* Update the error code */
1392 hdac->ErrorCode |= HAL_DAC_ERROR_INVALID_CALLBACK;
1393 /* update return status */
1394 status = HAL_ERROR;
1395 break;
1396 }
1397 }
1398 else if (hdac->State == HAL_DAC_STATE_RESET)
1399 {
1400 switch (CallbackID)
1401 {
1402 case HAL_DAC_MSPINIT_CB_ID :
1403 hdac->MspInitCallback = HAL_DAC_MspInit;
1404 break;
1405 case HAL_DAC_MSPDEINIT_CB_ID :
1406 hdac->MspDeInitCallback = HAL_DAC_MspDeInit;
1407 break;
1408 default :
1409 /* Update the error code */
1410 hdac->ErrorCode |= HAL_DAC_ERROR_INVALID_CALLBACK;
1411 /* update return status */
1412 status = HAL_ERROR;
1413 break;
1414 }
1415 }
1416 else
1417 {
1418 /* Update the error code */
1419 hdac->ErrorCode |= HAL_DAC_ERROR_INVALID_CALLBACK;
1420 /* update return status */
1421 status = HAL_ERROR;
1422 }
1423
1424 /* Release Lock */
1425 __HAL_UNLOCK(hdac);
1426 return status;
1427 }
1428 #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */
1429
1430 /**
1431 * @}
1432 */
1433
1434 /**
1435 * @}
1436 */
1437
1438 /** @addtogroup DAC_Private_Functions
1439 * @{
1440 */
1441
1442 /**
1443 * @brief DMA conversion complete callback.
1444 * @param hdma pointer to a DMA_HandleTypeDef structure that contains
1445 * the configuration information for the specified DMA module.
1446 * @retval None
1447 */
DAC_DMAConvCpltCh1(DMA_HandleTypeDef * hdma)1448 void DAC_DMAConvCpltCh1(DMA_HandleTypeDef *hdma)
1449 {
1450 DAC_HandleTypeDef *hdac = (DAC_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent;
1451
1452 #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1)
1453 hdac->ConvCpltCallbackCh1(hdac);
1454 #else
1455 HAL_DAC_ConvCpltCallbackCh1(hdac);
1456 #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */
1457
1458 hdac->State = HAL_DAC_STATE_READY;
1459 }
1460
1461 /**
1462 * @brief DMA half transfer complete callback.
1463 * @param hdma pointer to a DMA_HandleTypeDef structure that contains
1464 * the configuration information for the specified DMA module.
1465 * @retval None
1466 */
DAC_DMAHalfConvCpltCh1(DMA_HandleTypeDef * hdma)1467 void DAC_DMAHalfConvCpltCh1(DMA_HandleTypeDef *hdma)
1468 {
1469 DAC_HandleTypeDef *hdac = (DAC_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent;
1470 /* Conversion complete callback */
1471 #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1)
1472 hdac->ConvHalfCpltCallbackCh1(hdac);
1473 #else
1474 HAL_DAC_ConvHalfCpltCallbackCh1(hdac);
1475 #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */
1476 }
1477
1478 /**
1479 * @brief DMA error callback
1480 * @param hdma pointer to a DMA_HandleTypeDef structure that contains
1481 * the configuration information for the specified DMA module.
1482 * @retval None
1483 */
DAC_DMAErrorCh1(DMA_HandleTypeDef * hdma)1484 void DAC_DMAErrorCh1(DMA_HandleTypeDef *hdma)
1485 {
1486 DAC_HandleTypeDef *hdac = (DAC_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent;
1487
1488 /* Set DAC error code to DMA error */
1489 hdac->ErrorCode |= HAL_DAC_ERROR_DMA;
1490
1491 #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1)
1492 hdac->ErrorCallbackCh1(hdac);
1493 #else
1494 HAL_DAC_ErrorCallbackCh1(hdac);
1495 #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */
1496
1497 hdac->State = HAL_DAC_STATE_READY;
1498 }
1499
1500 /**
1501 * @}
1502 */
1503
1504 /**
1505 * @}
1506 */
1507
1508 #endif /* DAC1 */
1509
1510 #endif /* HAL_DAC_MODULE_ENABLED */
1511
1512 /**
1513 * @}
1514 */
1515
1516
