1 /**
2 ******************************************************************************
3 * @file stm32g0xx_ll_utils.h
4 * @author MCD Application Team
5 * @brief Header file of UTILS LL module.
6 ******************************************************************************
7 * @attention
8 *
9 * Copyright (c) 2018 STMicroelectronics.
10 * All rights reserved.
11 *
12 * This software is licensed under terms that can be found in the LICENSE file
13 * in the root directory of this software component.
14 * If no LICENSE file comes with this software, it is provided AS-IS.
15 *
16 ******************************************************************************
17 @verbatim
18 ==============================================================================
19 ##### How to use this driver #####
20 ==============================================================================
21 [..]
22 The LL UTILS driver contains a set of generic APIs that can be
23 used by user:
24 (+) Device electronic signature
25 (+) Timing functions
26 (+) PLL configuration functions
27
28 @endverbatim
29 ******************************************************************************
30 */
31
32 /* Define to prevent recursive inclusion -------------------------------------*/
33 #ifndef STM32G0xx_LL_UTILS_H
34 #define STM32G0xx_LL_UTILS_H
35
36 #ifdef __cplusplus
37 extern "C" {
38 #endif
39
40 /* Includes ------------------------------------------------------------------*/
41 #include "stm32g0xx.h"
42
43 /** @addtogroup STM32G0xx_LL_Driver
44 * @{
45 */
46
47 /** @defgroup UTILS_LL UTILS
48 * @{
49 */
50
51 /* Private types -------------------------------------------------------------*/
52 /* Private variables ---------------------------------------------------------*/
53
54 /* Private constants ---------------------------------------------------------*/
55 /** @defgroup UTILS_LL_Private_Constants UTILS Private Constants
56 * @{
57 */
58
59 /* Max delay can be used in LL_mDelay */
60 #define LL_MAX_DELAY 0xFFFFFFFFU
61
62 /**
63 * @brief Unique device ID register base address
64 */
65 #define UID_BASE_ADDRESS UID_BASE
66
67 /**
68 * @brief Flash size data register base address
69 */
70 #define FLASHSIZE_BASE_ADDRESS FLASHSIZE_BASE
71
72 /**
73 * @brief Package data register base address
74 */
75 #define PACKAGE_BASE_ADDRESS PACKAGE_BASE
76
77 /**
78 * @}
79 */
80
81 /* Private macros ------------------------------------------------------------*/
82 /** @defgroup UTILS_LL_Private_Macros UTILS Private Macros
83 * @{
84 */
85 /**
86 * @}
87 */
88 /* Exported types ------------------------------------------------------------*/
89 /** @defgroup UTILS_LL_ES_INIT UTILS Exported structures
90 * @{
91 */
92 /**
93 * @brief UTILS PLL structure definition
94 */
95 typedef struct
96 {
97 uint32_t PLLM; /*!< Division factor for PLL VCO input clock.
98 This parameter can be a value of @ref RCC_LL_EC_PLLM_DIV
99
100 This feature can be modified afterwards using unitary function
101 @ref LL_RCC_PLL_ConfigDomain_SYS(). */
102
103 uint32_t PLLN; /*!< Multiplication factor for PLL VCO output clock.
104 This parameter must be a number between Min_Data = 8 and Max_Data = 86
105
106 This feature can be modified afterwards using unitary function
107 @ref LL_RCC_PLL_ConfigDomain_SYS(). */
108
109 uint32_t PLLR; /*!< Division for the main system clock.
110 This parameter can be a value of @ref RCC_LL_EC_PLLR_DIV
111
112 This feature can be modified afterwards using unitary function
113 @ref LL_RCC_PLL_ConfigDomain_SYS(). */
114 } LL_UTILS_PLLInitTypeDef;
115
116 /**
117 * @brief UTILS System, AHB and APB buses clock configuration structure definition
118 */
119 typedef struct
120 {
121 uint32_t AHBCLKDivider; /*!< The AHB clock (HCLK) divider. This clock is derived from the system clock (SYSCLK).
122 This parameter can be a value of @ref RCC_LL_EC_SYSCLK_DIV
123
124 This feature can be modified afterwards using unitary function
125 @ref LL_RCC_SetAHBPrescaler(). */
126
127 uint32_t APB1CLKDivider; /*!< The APB1 clock (PCLK1) divider. This clock is derived from the AHB clock (HCLK).
128 This parameter can be a value of @ref RCC_LL_EC_APB1_DIV
129
130 This feature can be modified afterwards using unitary function
131 @ref LL_RCC_SetAPB1Prescaler(). */
132 } LL_UTILS_ClkInitTypeDef;
133
134 /**
135 * @}
136 */
137
138 /* Exported constants --------------------------------------------------------*/
139 /** @defgroup UTILS_LL_Exported_Constants UTILS Exported Constants
140 * @{
141 */
142
143 /** @defgroup UTILS_EC_HSE_BYPASS HSE Bypass activation
144 * @{
145 */
146 #define LL_UTILS_HSEBYPASS_OFF 0x00000000U /*!< HSE Bypass is not enabled */
147 #define LL_UTILS_HSEBYPASS_ON 0x00000001U /*!< HSE Bypass is enabled */
148 /**
149 * @}
150 */
151
152 /** @defgroup UTILS_EC_PACKAGETYPE PACKAGE TYPE
153 * @{
154 */
155 #if defined(STM32G0C1xx) || defined(STM32G0B1xx) || defined(STM32G0B0xx)
156 #define LL_UTILS_PACKAGETYPE_QFP100 0x00000000U /*!< LQFP100 package type */
157 #define LL_UTILS_PACKAGETYPE_QFN32_GP 0x00000001U /*!< LQFP32/UFQFPN32 General purpose (GP) */
158 #define LL_UTILS_PACKAGETYPE_QFN32_N 0x00000002U /*!< LQFP32/UFQFPN32 N-version */
159 #define LL_UTILS_PACKAGETYPE_QFN48_GP 0x00000004U /*!< LQFP48/UFQPN48 General purpose (GP) */
160 #define LL_UTILS_PACKAGETYPE_QFN48_N 0x00000005U /*!< LQFP48/UFQPN48 N-version */
161 #define LL_UTILS_PACKAGETYPE_WLCSP52 0x00000006U /*!< WLCSP52 */
162 #define LL_UTILS_PACKAGETYPE_QFN64_GP 0x00000007U /*!< LQFP64 General purpose (GP) */
163 #define LL_UTILS_PACKAGETYPE_QFN64_N 0x00000008U /*!< LQFP64 N-version */
164 #define LL_UTILS_PACKAGETYPE_BGA64_N 0x0000000AU /*!< UFBGA64 N-version */
165 #define LL_UTILS_PACKAGETYPE_QFP80 0x0000000BU /*!< LQFP80 package type */
166 #define LL_UTILS_PACKAGETYPE_BGA100 0x0000000CU /*!< UBGA100 package type */
167 #elif defined(STM32G061xx) || defined(STM32G051xx) || defined(STM32G050xx) || defined(STM32G041xx) || defined(STM32G031xx) || defined(STM32G030xx)
168 #define LL_UTILS_PACKAGETYPE_SO8 0x00000001U /*!< SO8 package type */
169 #define LL_UTILS_PACKAGETYPE_WLCSP18 0x00000002U /*!< WLCSP18 package type */
170 #define LL_UTILS_PACKAGETYPE_TSSOP20 0x00000003U /*!< TSSOP20 package type */
171 #define LL_UTILS_PACKAGETYPE_QFP28 0x00000004U /*!< UFQFPN28 package type */
172 #define LL_UTILS_PACKAGETYPE_QFN32 0x00000005U /*!< UFQFPN32 / LQFP32 package type */
173 #define LL_UTILS_PACKAGETYPE_QFN48 0x00000007U /*!< UFQFPN48 / LQFP48 package type */
174 #elif defined(STM32G081xx) || defined(STM32G071xx) || defined(STM32G070xx)
175 #define LL_UTILS_PACKAGETYPE_QFN28_GP 0x00000000U /*!< UFQFPN28 general purpose (GP) package type */
176 #define LL_UTILS_PACKAGETYPE_QFN28_PD 0x00000001U /*!< UFQFPN28 Power Delivery (PD) */
177 #define LL_UTILS_PACKAGETYPE_QFN32_GP 0x00000004U /*!< UFQFPN32 / LQFP32 general purpose (GP) package type */
178 #define LL_UTILS_PACKAGETYPE_QFN32_PD 0x00000005U /*!< UFQFPN32 / LQFP32 Power Delivery (PD) package type */
179 #define LL_UTILS_PACKAGETYPE_QFN48 0x00000008U /*!< UFQFPN48 / LQFP488 package type */
180 #define LL_UTILS_PACKAGETYPE_QFP64 0x0000000CU /*!< LQPF64 package type */
181 #endif /* STM32G0C1xx || STM32G0B1xx || STM32G0B0xx */
182 /**
183 * @}
184 */
185
186 /**
187 * @}
188 */
189
190 /* Exported macro ------------------------------------------------------------*/
191
192 /* Exported functions --------------------------------------------------------*/
193 /** @defgroup UTILS_LL_Exported_Functions UTILS Exported Functions
194 * @{
195 */
196
197 /** @defgroup UTILS_EF_DEVICE_ELECTRONIC_SIGNATURE DEVICE ELECTRONIC SIGNATURE
198 * @{
199 */
200
201 /**
202 * @brief Get Word0 of the unique device identifier (UID based on 96 bits)
203 * @retval UID[31:0]: X and Y coordinates on the wafer expressed in BCD format
204 */
LL_GetUID_Word0(void)205 __STATIC_INLINE uint32_t LL_GetUID_Word0(void)
206 {
207 return (uint32_t)(READ_REG(*((uint32_t *)UID_BASE_ADDRESS)));
208 }
209
210 /**
211 * @brief Get Word1 of the unique device identifier (UID based on 96 bits)
212 * @retval UID[63:32]: Wafer number (UID[39:32]) & LOT_NUM[23:0] (UID[63:40])
213 */
LL_GetUID_Word1(void)214 __STATIC_INLINE uint32_t LL_GetUID_Word1(void)
215 {
216 return (uint32_t)(READ_REG(*((uint32_t *)(UID_BASE_ADDRESS + 4U))));
217 }
218
219 /**
220 * @brief Get Word2 of the unique device identifier (UID based on 96 bits)
221 * @retval UID[95:64]: Lot number (ASCII encoded) - LOT_NUM[55:24]
222 */
LL_GetUID_Word2(void)223 __STATIC_INLINE uint32_t LL_GetUID_Word2(void)
224 {
225 return (uint32_t)(READ_REG(*((uint32_t *)(UID_BASE_ADDRESS + 8U))));
226 }
227
228 /**
229 * @brief Get Flash memory size
230 * @note This bitfield indicates the size of the device Flash memory expressed in
231 * Kbytes. As an example, 0x040 corresponds to 64 Kbytes.
232 * @retval FLASH_SIZE[15:0]: Flash memory size
233 */
LL_GetFlashSize(void)234 __STATIC_INLINE uint32_t LL_GetFlashSize(void)
235 {
236 return (uint32_t)(READ_REG(*((uint32_t *)FLASHSIZE_BASE_ADDRESS)) & 0x0000FFFFUL);
237 }
238
239 /**
240 * @brief Get Package type
241 * @retval PKG[3:0]: Package type - This parameter can be a value of @ref UTILS_EC_PACKAGETYPE
242 * @if defined(STM32G0C1xx)
243 * @arg @ref LL_UTILS_PACKAGETYPE_QFP100
244 * @arg @ref LL_UTILS_PACKAGETYPE_QFN32_GP
245 * @arg @ref LL_UTILS_PACKAGETYPE_QFN32_N
246 * @arg @ref LL_UTILS_PACKAGETYPE_QFN48_GP
247 * @arg @ref LL_UTILS_PACKAGETYPE_QFN48_N
248 * @arg @ref LL_UTILS_PACKAGETYPE_WLCSP52
249 * @arg @ref LL_UTILS_PACKAGETYPE_QFN64_GP
250 * @arg @ref LL_UTILS_PACKAGETYPE_QFN64_N
251 * @arg @ref LL_UTILS_PACKAGETYPE_BGA64_N
252 * @arg @ref LL_UTILS_PACKAGETYPE_QFP80
253 * @arg @ref LL_UTILS_PACKAGETYPE_BGA100
254 * @elif defined(STM32G061xx) || defined(STM32G041xx)
255 * @arg @ref LL_UTILS_PACKAGETYPE_SO8
256 * @arg @ref LL_UTILS_PACKAGETYPE_WLCSP18
257 * @arg @ref LL_UTILS_PACKAGETYPE_TSSOP20
258 * @arg @ref LL_UTILS_PACKAGETYPE_QFP28
259 * @arg @ref LL_UTILS_PACKAGETYPE_QFN32
260 * @arg @ref LL_UTILS_PACKAGETYPE_QFN48
261 * @elif defined(STM32G081xx)
262 * @arg @ref LL_UTILS_PACKAGETYPE_QFN28_GP
263 * @arg @ref LL_UTILS_PACKAGETYPE_QFN28_PD
264 * @arg @ref LL_UTILS_PACKAGETYPE_QFN32_GP
265 * @arg @ref LL_UTILS_PACKAGETYPE_QFN32_PD
266 * @arg @ref LL_UTILS_PACKAGETYPE_QFN48
267 * @arg @ref LL_UTILS_PACKAGETYPE_QFP64
268 * @endif
269 *
270 */
LL_GetPackageType(void)271 __STATIC_INLINE uint32_t LL_GetPackageType(void)
272 {
273 #if defined(STM32G0C1xx) || defined(STM32G0B1xx) || defined(STM32G0B0xx)
274 return (uint32_t)(READ_REG(*((uint32_t *)PACKAGE_BASE_ADDRESS)) & 0x1FU);
275 #else
276 return (uint32_t)(READ_REG(*((uint32_t *)PACKAGE_BASE_ADDRESS)) & 0xFU);
277 #endif /* STM32G0C1xx || STM32G0B1xx || STM32G0B0xx */
278 }
279
280 /**
281 * @}
282 */
283
284 /** @defgroup UTILS_LL_EF_DELAY DELAY
285 * @{
286 */
287
288 /**
289 * @brief This function configures the Cortex-M SysTick source of the time base.
290 * @param HCLKFrequency HCLK frequency in Hz (can be calculated thanks to RCC helper macro)
291 * @note When a RTOS is used, it is recommended to avoid changing the SysTick
292 * configuration by calling this function, for a delay use rather osDelay RTOS service.
293 * @param Ticks Number of ticks
294 * @retval None
295 */
LL_InitTick(uint32_t HCLKFrequency,uint32_t Ticks)296 __STATIC_INLINE void LL_InitTick(uint32_t HCLKFrequency, uint32_t Ticks)
297 {
298 /* Configure the SysTick to have interrupt in 1ms time base */
299 SysTick->LOAD = (uint32_t)((HCLKFrequency / Ticks) - 1UL); /* set reload register */
300 SysTick->VAL = 0UL; /* Load the SysTick Counter Value */
301 SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk |
302 SysTick_CTRL_ENABLE_Msk; /* Enable the Systick Timer */
303 }
304
305 void LL_Init1msTick(uint32_t HCLKFrequency);
306 void LL_mDelay(uint32_t Delay);
307
308 /**
309 * @}
310 */
311
312 /** @defgroup UTILS_EF_SYSTEM SYSTEM
313 * @{
314 */
315
316 void LL_SetSystemCoreClock(uint32_t HCLKFrequency);
317 ErrorStatus LL_PLL_ConfigSystemClock_HSI(LL_UTILS_PLLInitTypeDef *UTILS_PLLInitStruct,
318 LL_UTILS_ClkInitTypeDef *UTILS_ClkInitStruct);
319 ErrorStatus LL_PLL_ConfigSystemClock_HSE(uint32_t HSEFrequency, uint32_t HSEBypass,
320 LL_UTILS_PLLInitTypeDef *UTILS_PLLInitStruct, LL_UTILS_ClkInitTypeDef *UTILS_ClkInitStruct);
321 ErrorStatus LL_SetFlashLatency(uint32_t HCLKFrequency);
322
323 /**
324 * @}
325 */
326
327 /**
328 * @}
329 */
330
331 /**
332 * @}
333 */
334
335 /**
336 * @}
337 */
338
339 #ifdef __cplusplus
340 }
341 #endif
342
343 #endif /* STM32G0xx_LL_UTILS_H */
344
