1 /**
2 ******************************************************************************
3 * @file stm32g0xx_ll_lptim.h
4 * @author MCD Application Team
5 * @brief Header file of LPTIM LL module.
6 ******************************************************************************
7 * @attention
8 *
9 * Copyright (c) 2018 STMicroelectronics.
10 * All rights reserved.
11 *
12 * This software is licensed under terms that can be found in the LICENSE file
13 * in the root directory of this software component.
14 * If no LICENSE file comes with this software, it is provided AS-IS.
15 *
16 ******************************************************************************
17 */
18
19 /* Define to prevent recursive inclusion -------------------------------------*/
20 #ifndef STM32G0xx_LL_LPTIM_H
21 #define STM32G0xx_LL_LPTIM_H
22
23 #ifdef __cplusplus
24 extern "C" {
25 #endif
26
27 /* Includes ------------------------------------------------------------------*/
28 #include "stm32g0xx.h"
29
30 /** @addtogroup STM32G0xx_LL_Driver
31 * @{
32 */
33
34 #if defined (LPTIM1) || defined (LPTIM2)
35
36 /** @defgroup LPTIM_LL LPTIM
37 * @{
38 */
39
40 /* Private types -------------------------------------------------------------*/
41 /* Private variables ---------------------------------------------------------*/
42
43 /* Private constants ---------------------------------------------------------*/
44
45 /* Private macros ------------------------------------------------------------*/
46 #if defined(USE_FULL_LL_DRIVER)
47 /** @defgroup LPTIM_LL_Private_Macros LPTIM Private Macros
48 * @{
49 */
50 /**
51 * @}
52 */
53 #endif /*USE_FULL_LL_DRIVER*/
54
55 /* Exported types ------------------------------------------------------------*/
56 #if defined(USE_FULL_LL_DRIVER)
57 /** @defgroup LPTIM_LL_ES_INIT LPTIM Exported Init structure
58 * @{
59 */
60
61 /**
62 * @brief LPTIM Init structure definition
63 */
64 typedef struct
65 {
66 uint32_t ClockSource; /*!< Specifies the source of the clock used by the LPTIM instance.
67 This parameter can be a value of @ref LPTIM_LL_EC_CLK_SOURCE.
68
69 This feature can be modified afterwards using unitary
70 function @ref LL_LPTIM_SetClockSource().*/
71
72 uint32_t Prescaler; /*!< Specifies the prescaler division ratio.
73 This parameter can be a value of @ref LPTIM_LL_EC_PRESCALER.
74
75 This feature can be modified afterwards using using unitary
76 function @ref LL_LPTIM_SetPrescaler().*/
77
78 uint32_t Waveform; /*!< Specifies the waveform shape.
79 This parameter can be a value of @ref LPTIM_LL_EC_OUTPUT_WAVEFORM.
80
81 This feature can be modified afterwards using unitary
82 function @ref LL_LPTIM_ConfigOutput().*/
83
84 uint32_t Polarity; /*!< Specifies waveform polarity.
85 This parameter can be a value of @ref LPTIM_LL_EC_OUTPUT_POLARITY.
86
87 This feature can be modified afterwards using unitary
88 function @ref LL_LPTIM_ConfigOutput().*/
89 } LL_LPTIM_InitTypeDef;
90
91 /**
92 * @}
93 */
94 #endif /* USE_FULL_LL_DRIVER */
95
96 /* Exported constants --------------------------------------------------------*/
97 /** @defgroup LPTIM_LL_Exported_Constants LPTIM Exported Constants
98 * @{
99 */
100
101 /** @defgroup LPTIM_LL_EC_GET_FLAG Get Flags Defines
102 * @brief Flags defines which can be used with LL_LPTIM_ReadReg function
103 * @{
104 */
105 #define LL_LPTIM_ISR_CMPM LPTIM_ISR_CMPM /*!< Compare match */
106 #define LL_LPTIM_ISR_CMPOK LPTIM_ISR_CMPOK /*!< Compare register update OK */
107 #define LL_LPTIM_ISR_ARRM LPTIM_ISR_ARRM /*!< Autoreload match */
108 #define LL_LPTIM_ISR_EXTTRIG LPTIM_ISR_EXTTRIG /*!< External trigger edge event */
109 #define LL_LPTIM_ISR_ARROK LPTIM_ISR_ARROK /*!< Autoreload register update OK */
110 #define LL_LPTIM_ISR_UP LPTIM_ISR_UP /*!< Counter direction change down to up */
111 #define LL_LPTIM_ISR_DOWN LPTIM_ISR_DOWN /*!< Counter direction change up to down */
112 /**
113 * @}
114 */
115
116 /** @defgroup LPTIM_LL_EC_IT IT Defines
117 * @brief IT defines which can be used with LL_LPTIM_ReadReg and LL_LPTIM_WriteReg functions
118 * @{
119 */
120 #define LL_LPTIM_IER_CMPMIE LPTIM_IER_CMPMIE /*!< Compare match */
121 #define LL_LPTIM_IER_CMPOKIE LPTIM_IER_CMPOKIE /*!< Compare register update OK */
122 #define LL_LPTIM_IER_ARRMIE LPTIM_IER_ARRMIE /*!< Autoreload match */
123 #define LL_LPTIM_IER_EXTTRIGIE LPTIM_IER_EXTTRIGIE /*!< External trigger edge event */
124 #define LL_LPTIM_IER_ARROKIE LPTIM_IER_ARROKIE /*!< Autoreload register update OK */
125 #define LL_LPTIM_IER_UPIE LPTIM_IER_UPIE /*!< Counter direction change down to up */
126 #define LL_LPTIM_IER_DOWNIE LPTIM_IER_DOWNIE /*!< Counter direction change up to down */
127 /**
128 * @}
129 */
130
131 /** @defgroup LPTIM_LL_EC_OPERATING_MODE Operating Mode
132 * @{
133 */
134 #define LL_LPTIM_OPERATING_MODE_CONTINUOUS LPTIM_CR_CNTSTRT /*!<LP Timer starts in continuous mode*/
135 #define LL_LPTIM_OPERATING_MODE_ONESHOT LPTIM_CR_SNGSTRT /*!<LP Tilmer starts in single mode*/
136 /**
137 * @}
138 */
139
140 /** @defgroup LPTIM_LL_EC_UPDATE_MODE Update Mode
141 * @{
142 */
143 #define LL_LPTIM_UPDATE_MODE_IMMEDIATE 0x00000000U /*!<Preload is disabled: registers are updated after each APB bus write access*/
144 #define LL_LPTIM_UPDATE_MODE_ENDOFPERIOD LPTIM_CFGR_PRELOAD /*!<preload is enabled: registers are updated at the end of the current LPTIM period*/
145 /**
146 * @}
147 */
148
149 /** @defgroup LPTIM_LL_EC_COUNTER_MODE Counter Mode
150 * @{
151 */
152 #define LL_LPTIM_COUNTER_MODE_INTERNAL 0x00000000U /*!<The counter is incremented following each internal clock pulse*/
153 #define LL_LPTIM_COUNTER_MODE_EXTERNAL LPTIM_CFGR_COUNTMODE /*!<The counter is incremented following each valid clock pulse on the LPTIM external Input1*/
154 /**
155 * @}
156 */
157
158 /** @defgroup LPTIM_LL_EC_OUTPUT_WAVEFORM Output Waveform Type
159 * @{
160 */
161 #define LL_LPTIM_OUTPUT_WAVEFORM_PWM 0x00000000U /*!<LPTIM generates either a PWM waveform or a One pulse waveform depending on chosen operating mode CONTINUOUS or SINGLE*/
162 #define LL_LPTIM_OUTPUT_WAVEFORM_SETONCE LPTIM_CFGR_WAVE /*!<LPTIM generates a Set Once waveform*/
163 /**
164 * @}
165 */
166
167 /** @defgroup LPTIM_LL_EC_OUTPUT_POLARITY Output Polarity
168 * @{
169 */
170 #define LL_LPTIM_OUTPUT_POLARITY_REGULAR 0x00000000U /*!<The LPTIM output reflects the compare results between LPTIMx_ARR and LPTIMx_CMP registers*/
171 #define LL_LPTIM_OUTPUT_POLARITY_INVERSE LPTIM_CFGR_WAVPOL /*!<The LPTIM output reflects the inverse of the compare results between LPTIMx_ARR and LPTIMx_CMP registers*/
172 /**
173 * @}
174 */
175
176 /** @defgroup LPTIM_LL_EC_PRESCALER Prescaler Value
177 * @{
178 */
179 #define LL_LPTIM_PRESCALER_DIV1 0x00000000U /*!<Prescaler division factor is set to 1*/
180 #define LL_LPTIM_PRESCALER_DIV2 LPTIM_CFGR_PRESC_0 /*!<Prescaler division factor is set to 2*/
181 #define LL_LPTIM_PRESCALER_DIV4 LPTIM_CFGR_PRESC_1 /*!<Prescaler division factor is set to 4*/
182 #define LL_LPTIM_PRESCALER_DIV8 (LPTIM_CFGR_PRESC_1 | LPTIM_CFGR_PRESC_0) /*!<Prescaler division factor is set to 8*/
183 #define LL_LPTIM_PRESCALER_DIV16 LPTIM_CFGR_PRESC_2 /*!<Prescaler division factor is set to 16*/
184 #define LL_LPTIM_PRESCALER_DIV32 (LPTIM_CFGR_PRESC_2 | LPTIM_CFGR_PRESC_0) /*!<Prescaler division factor is set to 32*/
185 #define LL_LPTIM_PRESCALER_DIV64 (LPTIM_CFGR_PRESC_2 | LPTIM_CFGR_PRESC_1) /*!<Prescaler division factor is set to 64*/
186 #define LL_LPTIM_PRESCALER_DIV128 LPTIM_CFGR_PRESC /*!<Prescaler division factor is set to 128*/
187 /**
188 * @}
189 */
190
191 /** @defgroup LPTIM_LL_EC_TRIG_SOURCE Trigger Source
192 * @{
193 */
194 #define LL_LPTIM_TRIG_SOURCE_GPIO 0x00000000U /*!<External input trigger is connected to TIMx_ETR input*/
195 #define LL_LPTIM_TRIG_SOURCE_RTCALARMA LPTIM_CFGR_TRIGSEL_0 /*!<External input trigger is connected to RTC Alarm A*/
196 #define LL_LPTIM_TRIG_SOURCE_RTCALARMB LPTIM_CFGR_TRIGSEL_1 /*!<External input trigger is connected to RTC Alarm B*/
197 #define LL_LPTIM_TRIG_SOURCE_RTCTAMP1 (LPTIM_CFGR_TRIGSEL_1 | LPTIM_CFGR_TRIGSEL_0) /*!<External input trigger is connected to RTC Tamper 1*/
198 #define LL_LPTIM_TRIG_SOURCE_RTCTAMP2 LPTIM_CFGR_TRIGSEL_2 /*!<External input trigger is connected to RTC Tamper 2*/
199 #if defined(RTC_TAMPER3_SUPPORT)
200 #define LL_LPTIM_TRIG_SOURCE_RTCTAMP3 (LPTIM_CFGR_TRIGSEL_2 | LPTIM_CFGR_TRIGSEL_0) /*!<External input trigger is connected to RTC Tamper 3*/
201 #endif /* RTC_TAMPER3_SUPPORT */
202 #define LL_LPTIM_TRIG_SOURCE_COMP1 (LPTIM_CFGR_TRIGSEL_2 | LPTIM_CFGR_TRIGSEL_1) /*!<External input trigger is connected to COMP1 output*/
203 #define LL_LPTIM_TRIG_SOURCE_COMP2 LPTIM_CFGR_TRIGSEL /*!<External input trigger is connected to COMP2 output*/
204 #if defined(COMP3)
205 #define LL_LPTIM_TRIG_SOURCE_COMP3 (LPTIM_CFGR_TRIGSEL_2 | LPTIM_CFGR_TRIGSEL_0) /*!<External input trigger is connected to COMP3 output*/
206 #endif /* COMP3 */
207 /**
208 * @}
209 */
210
211 /** @defgroup LPTIM_LL_EC_TRIG_FILTER Trigger Filter
212 * @{
213 */
214 #define LL_LPTIM_TRIG_FILTER_NONE 0x00000000U /*!<Any trigger active level change is considered as a valid trigger*/
215 #define LL_LPTIM_TRIG_FILTER_2 LPTIM_CFGR_TRGFLT_0 /*!<Trigger active level change must be stable for at least 2 clock periods before it is considered as valid trigger*/
216 #define LL_LPTIM_TRIG_FILTER_4 LPTIM_CFGR_TRGFLT_1 /*!<Trigger active level change must be stable for at least 4 clock periods before it is considered as valid trigger*/
217 #define LL_LPTIM_TRIG_FILTER_8 LPTIM_CFGR_TRGFLT /*!<Trigger active level change must be stable for at least 8 clock periods before it is considered as valid trigger*/
218 /**
219 * @}
220 */
221
222 /** @defgroup LPTIM_LL_EC_TRIG_POLARITY Trigger Polarity
223 * @{
224 */
225 #define LL_LPTIM_TRIG_POLARITY_RISING LPTIM_CFGR_TRIGEN_0 /*!<LPTIM counter starts when a rising edge is detected*/
226 #define LL_LPTIM_TRIG_POLARITY_FALLING LPTIM_CFGR_TRIGEN_1 /*!<LPTIM counter starts when a falling edge is detected*/
227 #define LL_LPTIM_TRIG_POLARITY_RISING_FALLING LPTIM_CFGR_TRIGEN /*!<LPTIM counter starts when a rising or a falling edge is detected*/
228 /**
229 * @}
230 */
231
232 /** @defgroup LPTIM_LL_EC_CLK_SOURCE Clock Source
233 * @{
234 */
235 #define LL_LPTIM_CLK_SOURCE_INTERNAL 0x00000000U /*!<LPTIM is clocked by internal clock source (APB clock or any of the embedded oscillators)*/
236 #define LL_LPTIM_CLK_SOURCE_EXTERNAL LPTIM_CFGR_CKSEL /*!<LPTIM is clocked by an external clock source through the LPTIM external Input1*/
237 /**
238 * @}
239 */
240
241 /** @defgroup LPTIM_LL_EC_CLK_FILTER Clock Filter
242 * @{
243 */
244 #define LL_LPTIM_CLK_FILTER_NONE 0x00000000U /*!<Any external clock signal level change is considered as a valid transition*/
245 #define LL_LPTIM_CLK_FILTER_2 LPTIM_CFGR_CKFLT_0 /*!<External clock signal level change must be stable for at least 2 clock periods before it is considered as valid transition*/
246 #define LL_LPTIM_CLK_FILTER_4 LPTIM_CFGR_CKFLT_1 /*!<External clock signal level change must be stable for at least 4 clock periods before it is considered as valid transition*/
247 #define LL_LPTIM_CLK_FILTER_8 LPTIM_CFGR_CKFLT /*!<External clock signal level change must be stable for at least 8 clock periods before it is considered as valid transition*/
248 /**
249 * @}
250 */
251
252 /** @defgroup LPTIM_LL_EC_CLK_POLARITY Clock Polarity
253 * @{
254 */
255 #define LL_LPTIM_CLK_POLARITY_RISING 0x00000000U /*!< The rising edge is the active edge used for counting*/
256 #define LL_LPTIM_CLK_POLARITY_FALLING LPTIM_CFGR_CKPOL_0 /*!< The falling edge is the active edge used for counting*/
257 #define LL_LPTIM_CLK_POLARITY_RISING_FALLING LPTIM_CFGR_CKPOL_1 /*!< Both edges are active edges*/
258 /**
259 * @}
260 */
261
262 /** @defgroup LPTIM_LL_EC_ENCODER_MODE Encoder Mode
263 * @{
264 */
265 #define LL_LPTIM_ENCODER_MODE_RISING 0x00000000U /*!< The rising edge is the active edge used for counting*/
266 #define LL_LPTIM_ENCODER_MODE_FALLING LPTIM_CFGR_CKPOL_0 /*!< The falling edge is the active edge used for counting*/
267 #define LL_LPTIM_ENCODER_MODE_RISING_FALLING LPTIM_CFGR_CKPOL_1 /*!< Both edges are active edges*/
268 /**
269 * @}
270 */
271
272 /** @defgroup LPTIM_EC_INPUT1_SRC Input1 Source
273 * @{
274 */
275 #define LL_LPTIM_INPUT1_SRC_GPIO 0x00000000U /*!< For LPTIM1 and LPTIM2 */
276 #define LL_LPTIM_INPUT1_SRC_COMP1 LPTIM_CFGR2_IN1SEL_0 /*!< For LPTIM1 and LPTIM2 */
277 #define LL_LPTIM_INPUT1_SRC_COMP2 LPTIM_CFGR2_IN1SEL_1 /*!< For LPTIM2 */
278 #define LL_LPTIM_INPUT1_SRC_COMP1_COMP2 (LPTIM_CFGR2_IN1SEL_1 | LPTIM_CFGR2_IN1SEL_0) /*!< For LPTIM2 */
279 /**
280 * @}
281 */
282
283 /** @defgroup LPTIM_EC_INPUT2_SRC Input2 Source
284 * @{
285 */
286 #define LL_LPTIM_INPUT2_SRC_GPIO 0x00000000U /*!< For LPTIM1 */
287 #define LL_LPTIM_INPUT2_SRC_COMP2 LPTIM_CFGR2_IN2SEL_0 /*!< For LPTIM1 */
288 /**
289 * @}
290 */
291
292 /**
293 * @}
294 */
295
296 /* Exported macro ------------------------------------------------------------*/
297 /** @defgroup LPTIM_LL_Exported_Macros LPTIM Exported Macros
298 * @{
299 */
300
301 /** @defgroup LPTIM_LL_EM_WRITE_READ Common Write and read registers Macros
302 * @{
303 */
304
305 /**
306 * @brief Write a value in LPTIM register
307 * @param __INSTANCE__ LPTIM Instance
308 * @param __REG__ Register to be written
309 * @param __VALUE__ Value to be written in the register
310 * @retval None
311 */
312 #define LL_LPTIM_WriteReg(__INSTANCE__, __REG__, __VALUE__) WRITE_REG((__INSTANCE__)->__REG__, (__VALUE__))
313
314 /**
315 * @brief Read a value in LPTIM register
316 * @param __INSTANCE__ LPTIM Instance
317 * @param __REG__ Register to be read
318 * @retval Register value
319 */
320 #define LL_LPTIM_ReadReg(__INSTANCE__, __REG__) READ_REG((__INSTANCE__)->__REG__)
321 /**
322 * @}
323 */
324
325 /**
326 * @}
327 */
328
329 /* Exported functions --------------------------------------------------------*/
330 /** @defgroup LPTIM_LL_Exported_Functions LPTIM Exported Functions
331 * @{
332 */
333
334 #if defined(USE_FULL_LL_DRIVER)
335 /** @defgroup LPTIM_LL_EF_Init Initialisation and deinitialisation functions
336 * @{
337 */
338
339 ErrorStatus LL_LPTIM_DeInit(LPTIM_TypeDef *LPTIMx);
340 void LL_LPTIM_StructInit(LL_LPTIM_InitTypeDef *LPTIM_InitStruct);
341 ErrorStatus LL_LPTIM_Init(LPTIM_TypeDef *LPTIMx, const LL_LPTIM_InitTypeDef *LPTIM_InitStruct);
342 void LL_LPTIM_Disable(LPTIM_TypeDef *LPTIMx);
343 /**
344 * @}
345 */
346 #endif /* USE_FULL_LL_DRIVER */
347
348 /** @defgroup LPTIM_LL_EF_LPTIM_Configuration LPTIM Configuration
349 * @{
350 */
351
352 /**
353 * @brief Enable the LPTIM instance
354 * @note After setting the ENABLE bit, a delay of two counter clock is needed
355 * before the LPTIM instance is actually enabled.
356 * @rmtoll CR ENABLE LL_LPTIM_Enable
357 * @param LPTIMx Low-Power Timer instance
358 * @retval None
359 */
LL_LPTIM_Enable(LPTIM_TypeDef * LPTIMx)360 __STATIC_INLINE void LL_LPTIM_Enable(LPTIM_TypeDef *LPTIMx)
361 {
362 SET_BIT(LPTIMx->CR, LPTIM_CR_ENABLE);
363 }
364
365 /**
366 * @brief Indicates whether the LPTIM instance is enabled.
367 * @rmtoll CR ENABLE LL_LPTIM_IsEnabled
368 * @param LPTIMx Low-Power Timer instance
369 * @retval State of bit (1 or 0).
370 */
LL_LPTIM_IsEnabled(const LPTIM_TypeDef * LPTIMx)371 __STATIC_INLINE uint32_t LL_LPTIM_IsEnabled(const LPTIM_TypeDef *LPTIMx)
372 {
373 return (((READ_BIT(LPTIMx->CR, LPTIM_CR_ENABLE) == LPTIM_CR_ENABLE) ? 1UL : 0UL));
374 }
375
376 /**
377 * @brief Starts the LPTIM counter in the desired mode.
378 * @note LPTIM instance must be enabled before starting the counter.
379 * @note It is possible to change on the fly from One Shot mode to
380 * Continuous mode.
381 * @rmtoll CR CNTSTRT LL_LPTIM_StartCounter\n
382 * CR SNGSTRT LL_LPTIM_StartCounter
383 * @param LPTIMx Low-Power Timer instance
384 * @param OperatingMode This parameter can be one of the following values:
385 * @arg @ref LL_LPTIM_OPERATING_MODE_CONTINUOUS
386 * @arg @ref LL_LPTIM_OPERATING_MODE_ONESHOT
387 * @retval None
388 */
LL_LPTIM_StartCounter(LPTIM_TypeDef * LPTIMx,uint32_t OperatingMode)389 __STATIC_INLINE void LL_LPTIM_StartCounter(LPTIM_TypeDef *LPTIMx, uint32_t OperatingMode)
390 {
391 MODIFY_REG(LPTIMx->CR, LPTIM_CR_CNTSTRT | LPTIM_CR_SNGSTRT, OperatingMode);
392 }
393
394 /**
395 * @brief Enable reset after read.
396 * @note After calling this function any read access to LPTIM_CNT
397 * register will asynchronously reset the LPTIM_CNT register content.
398 * @rmtoll CR RSTARE LL_LPTIM_EnableResetAfterRead
399 * @param LPTIMx Low-Power Timer instance
400 * @retval None
401 */
LL_LPTIM_EnableResetAfterRead(LPTIM_TypeDef * LPTIMx)402 __STATIC_INLINE void LL_LPTIM_EnableResetAfterRead(LPTIM_TypeDef *LPTIMx)
403 {
404 SET_BIT(LPTIMx->CR, LPTIM_CR_RSTARE);
405 }
406
407 /**
408 * @brief Disable reset after read.
409 * @rmtoll CR RSTARE LL_LPTIM_DisableResetAfterRead
410 * @param LPTIMx Low-Power Timer instance
411 * @retval None
412 */
LL_LPTIM_DisableResetAfterRead(LPTIM_TypeDef * LPTIMx)413 __STATIC_INLINE void LL_LPTIM_DisableResetAfterRead(LPTIM_TypeDef *LPTIMx)
414 {
415 CLEAR_BIT(LPTIMx->CR, LPTIM_CR_RSTARE);
416 }
417
418 /**
419 * @brief Indicate whether the reset after read feature is enabled.
420 * @rmtoll CR RSTARE LL_LPTIM_IsEnabledResetAfterRead
421 * @param LPTIMx Low-Power Timer instance
422 * @retval State of bit (1 or 0).
423 */
LL_LPTIM_IsEnabledResetAfterRead(const LPTIM_TypeDef * LPTIMx)424 __STATIC_INLINE uint32_t LL_LPTIM_IsEnabledResetAfterRead(const LPTIM_TypeDef *LPTIMx)
425 {
426 return (((READ_BIT(LPTIMx->CR, LPTIM_CR_RSTARE) == LPTIM_CR_RSTARE) ? 1UL : 0UL));
427 }
428
429 /**
430 * @brief Reset of the LPTIM_CNT counter register (synchronous).
431 * @note Due to the synchronous nature of this reset, it only takes
432 * place after a synchronization delay of 3 LPTIM core clock cycles
433 * (LPTIM core clock may be different from APB clock).
434 * @note COUNTRST is automatically cleared by hardware
435 * @rmtoll CR COUNTRST LL_LPTIM_ResetCounter\n
436 * @param LPTIMx Low-Power Timer instance
437 * @retval None
438 */
LL_LPTIM_ResetCounter(LPTIM_TypeDef * LPTIMx)439 __STATIC_INLINE void LL_LPTIM_ResetCounter(LPTIM_TypeDef *LPTIMx)
440 {
441 SET_BIT(LPTIMx->CR, LPTIM_CR_COUNTRST);
442 }
443
444 /**
445 * @brief Set the LPTIM registers update mode (enable/disable register preload)
446 * @note This function must be called when the LPTIM instance is disabled.
447 * @rmtoll CFGR PRELOAD LL_LPTIM_SetUpdateMode
448 * @param LPTIMx Low-Power Timer instance
449 * @param UpdateMode This parameter can be one of the following values:
450 * @arg @ref LL_LPTIM_UPDATE_MODE_IMMEDIATE
451 * @arg @ref LL_LPTIM_UPDATE_MODE_ENDOFPERIOD
452 * @retval None
453 */
LL_LPTIM_SetUpdateMode(LPTIM_TypeDef * LPTIMx,uint32_t UpdateMode)454 __STATIC_INLINE void LL_LPTIM_SetUpdateMode(LPTIM_TypeDef *LPTIMx, uint32_t UpdateMode)
455 {
456 MODIFY_REG(LPTIMx->CFGR, LPTIM_CFGR_PRELOAD, UpdateMode);
457 }
458
459 /**
460 * @brief Get the LPTIM registers update mode
461 * @rmtoll CFGR PRELOAD LL_LPTIM_GetUpdateMode
462 * @param LPTIMx Low-Power Timer instance
463 * @retval Returned value can be one of the following values:
464 * @arg @ref LL_LPTIM_UPDATE_MODE_IMMEDIATE
465 * @arg @ref LL_LPTIM_UPDATE_MODE_ENDOFPERIOD
466 */
LL_LPTIM_GetUpdateMode(const LPTIM_TypeDef * LPTIMx)467 __STATIC_INLINE uint32_t LL_LPTIM_GetUpdateMode(const LPTIM_TypeDef *LPTIMx)
468 {
469 return (uint32_t)(READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_PRELOAD));
470 }
471
472 /**
473 * @brief Set the auto reload value
474 * @note The LPTIMx_ARR register content must only be modified when the LPTIM is enabled
475 * @note After a write to the LPTIMx_ARR register a new write operation to the
476 * same register can only be performed when the previous write operation
477 * is completed. Any successive write before the ARROK flag is set, will
478 * lead to unpredictable results.
479 * @note autoreload value be strictly greater than the compare value.
480 * @rmtoll ARR ARR LL_LPTIM_SetAutoReload
481 * @param LPTIMx Low-Power Timer instance
482 * @param AutoReload Value between Min_Data=0x0001 and Max_Data=0xFFFF
483 * @retval None
484 */
LL_LPTIM_SetAutoReload(LPTIM_TypeDef * LPTIMx,uint32_t AutoReload)485 __STATIC_INLINE void LL_LPTIM_SetAutoReload(LPTIM_TypeDef *LPTIMx, uint32_t AutoReload)
486 {
487 MODIFY_REG(LPTIMx->ARR, LPTIM_ARR_ARR, AutoReload);
488 }
489
490 /**
491 * @brief Get actual auto reload value
492 * @rmtoll ARR ARR LL_LPTIM_GetAutoReload
493 * @param LPTIMx Low-Power Timer instance
494 * @retval AutoReload Value between Min_Data=0x0001 and Max_Data=0xFFFF
495 */
LL_LPTIM_GetAutoReload(const LPTIM_TypeDef * LPTIMx)496 __STATIC_INLINE uint32_t LL_LPTIM_GetAutoReload(const LPTIM_TypeDef *LPTIMx)
497 {
498 return (uint32_t)(READ_BIT(LPTIMx->ARR, LPTIM_ARR_ARR));
499 }
500
501 /**
502 * @brief Set the compare value
503 * @note After a write to the LPTIMx_CMP register a new write operation to the
504 * same register can only be performed when the previous write operation
505 * is completed. Any successive write before the CMPOK flag is set, will
506 * lead to unpredictable results.
507 * @rmtoll CMP CMP LL_LPTIM_SetCompare
508 * @param LPTIMx Low-Power Timer instance
509 * @param CompareValue Value between Min_Data=0x00 and Max_Data=0xFFFF
510 * @retval None
511 */
LL_LPTIM_SetCompare(LPTIM_TypeDef * LPTIMx,uint32_t CompareValue)512 __STATIC_INLINE void LL_LPTIM_SetCompare(LPTIM_TypeDef *LPTIMx, uint32_t CompareValue)
513 {
514 MODIFY_REG(LPTIMx->CMP, LPTIM_CMP_CMP, CompareValue);
515 }
516
517 /**
518 * @brief Get actual compare value
519 * @rmtoll CMP CMP LL_LPTIM_GetCompare
520 * @param LPTIMx Low-Power Timer instance
521 * @retval CompareValue Value between Min_Data=0x00 and Max_Data=0xFFFF
522 */
LL_LPTIM_GetCompare(const LPTIM_TypeDef * LPTIMx)523 __STATIC_INLINE uint32_t LL_LPTIM_GetCompare(const LPTIM_TypeDef *LPTIMx)
524 {
525 return (uint32_t)(READ_BIT(LPTIMx->CMP, LPTIM_CMP_CMP));
526 }
527
528 /**
529 * @brief Get actual counter value
530 * @note When the LPTIM instance is running with an asynchronous clock, reading
531 * the LPTIMx_CNT register may return unreliable values. So in this case
532 * it is necessary to perform two consecutive read accesses and verify
533 * that the two returned values are identical.
534 * @rmtoll CNT CNT LL_LPTIM_GetCounter
535 * @param LPTIMx Low-Power Timer instance
536 * @retval Counter value
537 */
LL_LPTIM_GetCounter(const LPTIM_TypeDef * LPTIMx)538 __STATIC_INLINE uint32_t LL_LPTIM_GetCounter(const LPTIM_TypeDef *LPTIMx)
539 {
540 return (uint32_t)(READ_BIT(LPTIMx->CNT, LPTIM_CNT_CNT));
541 }
542
543 /**
544 * @brief Set the counter mode (selection of the LPTIM counter clock source).
545 * @note The counter mode can be set only when the LPTIM instance is disabled.
546 * @rmtoll CFGR COUNTMODE LL_LPTIM_SetCounterMode
547 * @param LPTIMx Low-Power Timer instance
548 * @param CounterMode This parameter can be one of the following values:
549 * @arg @ref LL_LPTIM_COUNTER_MODE_INTERNAL
550 * @arg @ref LL_LPTIM_COUNTER_MODE_EXTERNAL
551 * @retval None
552 */
LL_LPTIM_SetCounterMode(LPTIM_TypeDef * LPTIMx,uint32_t CounterMode)553 __STATIC_INLINE void LL_LPTIM_SetCounterMode(LPTIM_TypeDef *LPTIMx, uint32_t CounterMode)
554 {
555 MODIFY_REG(LPTIMx->CFGR, LPTIM_CFGR_COUNTMODE, CounterMode);
556 }
557
558 /**
559 * @brief Get the counter mode
560 * @rmtoll CFGR COUNTMODE LL_LPTIM_GetCounterMode
561 * @param LPTIMx Low-Power Timer instance
562 * @retval Returned value can be one of the following values:
563 * @arg @ref LL_LPTIM_COUNTER_MODE_INTERNAL
564 * @arg @ref LL_LPTIM_COUNTER_MODE_EXTERNAL
565 */
LL_LPTIM_GetCounterMode(const LPTIM_TypeDef * LPTIMx)566 __STATIC_INLINE uint32_t LL_LPTIM_GetCounterMode(const LPTIM_TypeDef *LPTIMx)
567 {
568 return (uint32_t)(READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_COUNTMODE));
569 }
570
571 /**
572 * @brief Configure the LPTIM instance output (LPTIMx_OUT)
573 * @note This function must be called when the LPTIM instance is disabled.
574 * @note Regarding the LPTIM output polarity the change takes effect
575 * immediately, so the output default value will change immediately after
576 * the polarity is re-configured, even before the timer is enabled.
577 * @rmtoll CFGR WAVE LL_LPTIM_ConfigOutput\n
578 * CFGR WAVPOL LL_LPTIM_ConfigOutput
579 * @param LPTIMx Low-Power Timer instance
580 * @param Waveform This parameter can be one of the following values:
581 * @arg @ref LL_LPTIM_OUTPUT_WAVEFORM_PWM
582 * @arg @ref LL_LPTIM_OUTPUT_WAVEFORM_SETONCE
583 * @param Polarity This parameter can be one of the following values:
584 * @arg @ref LL_LPTIM_OUTPUT_POLARITY_REGULAR
585 * @arg @ref LL_LPTIM_OUTPUT_POLARITY_INVERSE
586 * @retval None
587 */
LL_LPTIM_ConfigOutput(LPTIM_TypeDef * LPTIMx,uint32_t Waveform,uint32_t Polarity)588 __STATIC_INLINE void LL_LPTIM_ConfigOutput(LPTIM_TypeDef *LPTIMx, uint32_t Waveform, uint32_t Polarity)
589 {
590 MODIFY_REG(LPTIMx->CFGR, LPTIM_CFGR_WAVE | LPTIM_CFGR_WAVPOL, Waveform | Polarity);
591 }
592
593 /**
594 * @brief Set waveform shape
595 * @rmtoll CFGR WAVE LL_LPTIM_SetWaveform
596 * @param LPTIMx Low-Power Timer instance
597 * @param Waveform This parameter can be one of the following values:
598 * @arg @ref LL_LPTIM_OUTPUT_WAVEFORM_PWM
599 * @arg @ref LL_LPTIM_OUTPUT_WAVEFORM_SETONCE
600 * @retval None
601 */
LL_LPTIM_SetWaveform(LPTIM_TypeDef * LPTIMx,uint32_t Waveform)602 __STATIC_INLINE void LL_LPTIM_SetWaveform(LPTIM_TypeDef *LPTIMx, uint32_t Waveform)
603 {
604 MODIFY_REG(LPTIMx->CFGR, LPTIM_CFGR_WAVE, Waveform);
605 }
606
607 /**
608 * @brief Get actual waveform shape
609 * @rmtoll CFGR WAVE LL_LPTIM_GetWaveform
610 * @param LPTIMx Low-Power Timer instance
611 * @retval Returned value can be one of the following values:
612 * @arg @ref LL_LPTIM_OUTPUT_WAVEFORM_PWM
613 * @arg @ref LL_LPTIM_OUTPUT_WAVEFORM_SETONCE
614 */
LL_LPTIM_GetWaveform(const LPTIM_TypeDef * LPTIMx)615 __STATIC_INLINE uint32_t LL_LPTIM_GetWaveform(const LPTIM_TypeDef *LPTIMx)
616 {
617 return (uint32_t)(READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_WAVE));
618 }
619
620 /**
621 * @brief Set output polarity
622 * @rmtoll CFGR WAVPOL LL_LPTIM_SetPolarity
623 * @param LPTIMx Low-Power Timer instance
624 * @param Polarity This parameter can be one of the following values:
625 * @arg @ref LL_LPTIM_OUTPUT_POLARITY_REGULAR
626 * @arg @ref LL_LPTIM_OUTPUT_POLARITY_INVERSE
627 * @retval None
628 */
LL_LPTIM_SetPolarity(LPTIM_TypeDef * LPTIMx,uint32_t Polarity)629 __STATIC_INLINE void LL_LPTIM_SetPolarity(LPTIM_TypeDef *LPTIMx, uint32_t Polarity)
630 {
631 MODIFY_REG(LPTIMx->CFGR, LPTIM_CFGR_WAVPOL, Polarity);
632 }
633
634 /**
635 * @brief Get actual output polarity
636 * @rmtoll CFGR WAVPOL LL_LPTIM_GetPolarity
637 * @param LPTIMx Low-Power Timer instance
638 * @retval Returned value can be one of the following values:
639 * @arg @ref LL_LPTIM_OUTPUT_POLARITY_REGULAR
640 * @arg @ref LL_LPTIM_OUTPUT_POLARITY_INVERSE
641 */
LL_LPTIM_GetPolarity(const LPTIM_TypeDef * LPTIMx)642 __STATIC_INLINE uint32_t LL_LPTIM_GetPolarity(const LPTIM_TypeDef *LPTIMx)
643 {
644 return (uint32_t)(READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_WAVPOL));
645 }
646
647 /**
648 * @brief Set actual prescaler division ratio.
649 * @note This function must be called when the LPTIM instance is disabled.
650 * @note When the LPTIM is configured to be clocked by an internal clock source
651 * and the LPTIM counter is configured to be updated by active edges
652 * detected on the LPTIM external Input1, the internal clock provided to
653 * the LPTIM must be not be prescaled.
654 * @rmtoll CFGR PRESC LL_LPTIM_SetPrescaler
655 * @param LPTIMx Low-Power Timer instance
656 * @param Prescaler This parameter can be one of the following values:
657 * @arg @ref LL_LPTIM_PRESCALER_DIV1
658 * @arg @ref LL_LPTIM_PRESCALER_DIV2
659 * @arg @ref LL_LPTIM_PRESCALER_DIV4
660 * @arg @ref LL_LPTIM_PRESCALER_DIV8
661 * @arg @ref LL_LPTIM_PRESCALER_DIV16
662 * @arg @ref LL_LPTIM_PRESCALER_DIV32
663 * @arg @ref LL_LPTIM_PRESCALER_DIV64
664 * @arg @ref LL_LPTIM_PRESCALER_DIV128
665 * @retval None
666 */
LL_LPTIM_SetPrescaler(LPTIM_TypeDef * LPTIMx,uint32_t Prescaler)667 __STATIC_INLINE void LL_LPTIM_SetPrescaler(LPTIM_TypeDef *LPTIMx, uint32_t Prescaler)
668 {
669 MODIFY_REG(LPTIMx->CFGR, LPTIM_CFGR_PRESC, Prescaler);
670 }
671
672 /**
673 * @brief Get actual prescaler division ratio.
674 * @rmtoll CFGR PRESC LL_LPTIM_GetPrescaler
675 * @param LPTIMx Low-Power Timer instance
676 * @retval Returned value can be one of the following values:
677 * @arg @ref LL_LPTIM_PRESCALER_DIV1
678 * @arg @ref LL_LPTIM_PRESCALER_DIV2
679 * @arg @ref LL_LPTIM_PRESCALER_DIV4
680 * @arg @ref LL_LPTIM_PRESCALER_DIV8
681 * @arg @ref LL_LPTIM_PRESCALER_DIV16
682 * @arg @ref LL_LPTIM_PRESCALER_DIV32
683 * @arg @ref LL_LPTIM_PRESCALER_DIV64
684 * @arg @ref LL_LPTIM_PRESCALER_DIV128
685 */
LL_LPTIM_GetPrescaler(const LPTIM_TypeDef * LPTIMx)686 __STATIC_INLINE uint32_t LL_LPTIM_GetPrescaler(const LPTIM_TypeDef *LPTIMx)
687 {
688 return (uint32_t)(READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_PRESC));
689 }
690
691 /**
692 * @brief Set LPTIM input 1 source (default GPIO).
693 * @rmtoll CFGR2 IN1SEL LL_LPTIM_SetInput1Src
694 * @param LPTIMx Low-Power Timer instance
695 * @param Src This parameter can be one of the following values:
696 * @arg @ref LL_LPTIM_INPUT1_SRC_GPIO
697 * @arg @ref LL_LPTIM_INPUT1_SRC_COMP1
698 * @arg @ref LL_LPTIM_INPUT1_SRC_COMP2
699 * @arg @ref LL_LPTIM_INPUT1_SRC_COMP1_COMP2
700 * @retval None
701 */
LL_LPTIM_SetInput1Src(LPTIM_TypeDef * LPTIMx,uint32_t Src)702 __STATIC_INLINE void LL_LPTIM_SetInput1Src(LPTIM_TypeDef *LPTIMx, uint32_t Src)
703 {
704 MODIFY_REG(LPTIMx->CFGR2, LPTIM_CFGR2_IN1SEL, Src);
705 }
706
707 /**
708 * @brief Set LPTIM input 2 source (default GPIO).
709 * @rmtoll CFGR2 IN2SEL LL_LPTIM_SetInput2Src
710 * @param LPTIMx Low-Power Timer instance
711 * @param Src This parameter can be one of the following values:
712 * @arg @ref LL_LPTIM_INPUT2_SRC_GPIO
713 * @arg @ref LL_LPTIM_INPUT2_SRC_COMP2
714 * @retval None
715 */
LL_LPTIM_SetInput2Src(LPTIM_TypeDef * LPTIMx,uint32_t Src)716 __STATIC_INLINE void LL_LPTIM_SetInput2Src(LPTIM_TypeDef *LPTIMx, uint32_t Src)
717 {
718 MODIFY_REG(LPTIMx->CFGR2, LPTIM_CFGR2_IN2SEL, Src);
719 }
720
721 /**
722 * @}
723 */
724
725 /** @defgroup LPTIM_LL_EF_Trigger_Configuration Trigger Configuration
726 * @{
727 */
728
729 /**
730 * @brief Enable the timeout function
731 * @note This function must be called when the LPTIM instance is disabled.
732 * @note The first trigger event will start the timer, any successive trigger
733 * event will reset the counter and the timer will restart.
734 * @note The timeout value corresponds to the compare value; if no trigger
735 * occurs within the expected time frame, the MCU is waked-up by the
736 * compare match event.
737 * @rmtoll CFGR TIMOUT LL_LPTIM_EnableTimeout
738 * @param LPTIMx Low-Power Timer instance
739 * @retval None
740 */
LL_LPTIM_EnableTimeout(LPTIM_TypeDef * LPTIMx)741 __STATIC_INLINE void LL_LPTIM_EnableTimeout(LPTIM_TypeDef *LPTIMx)
742 {
743 SET_BIT(LPTIMx->CFGR, LPTIM_CFGR_TIMOUT);
744 }
745
746 /**
747 * @brief Disable the timeout function
748 * @note This function must be called when the LPTIM instance is disabled.
749 * @note A trigger event arriving when the timer is already started will be
750 * ignored.
751 * @rmtoll CFGR TIMOUT LL_LPTIM_DisableTimeout
752 * @param LPTIMx Low-Power Timer instance
753 * @retval None
754 */
LL_LPTIM_DisableTimeout(LPTIM_TypeDef * LPTIMx)755 __STATIC_INLINE void LL_LPTIM_DisableTimeout(LPTIM_TypeDef *LPTIMx)
756 {
757 CLEAR_BIT(LPTIMx->CFGR, LPTIM_CFGR_TIMOUT);
758 }
759
760 /**
761 * @brief Indicate whether the timeout function is enabled.
762 * @rmtoll CFGR TIMOUT LL_LPTIM_IsEnabledTimeout
763 * @param LPTIMx Low-Power Timer instance
764 * @retval State of bit (1 or 0).
765 */
LL_LPTIM_IsEnabledTimeout(const LPTIM_TypeDef * LPTIMx)766 __STATIC_INLINE uint32_t LL_LPTIM_IsEnabledTimeout(const LPTIM_TypeDef *LPTIMx)
767 {
768 return (((READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_TIMOUT) == LPTIM_CFGR_TIMOUT) ? 1UL : 0UL));
769 }
770
771 /**
772 * @brief Start the LPTIM counter
773 * @note This function must be called when the LPTIM instance is disabled.
774 * @rmtoll CFGR TRIGEN LL_LPTIM_TrigSw
775 * @param LPTIMx Low-Power Timer instance
776 * @retval None
777 */
LL_LPTIM_TrigSw(LPTIM_TypeDef * LPTIMx)778 __STATIC_INLINE void LL_LPTIM_TrigSw(LPTIM_TypeDef *LPTIMx)
779 {
780 CLEAR_BIT(LPTIMx->CFGR, LPTIM_CFGR_TRIGEN);
781 }
782
783 /**
784 * @brief Configure the external trigger used as a trigger event for the LPTIM.
785 * @note This function must be called when the LPTIM instance is disabled.
786 * @note An internal clock source must be present when a digital filter is
787 * required for the trigger.
788 * @rmtoll CFGR TRIGSEL LL_LPTIM_ConfigTrigger\n
789 * CFGR TRGFLT LL_LPTIM_ConfigTrigger\n
790 * CFGR TRIGEN LL_LPTIM_ConfigTrigger
791 * @param LPTIMx Low-Power Timer instance
792 * @param Source This parameter can be one of the following values:
793 * @arg @ref LL_LPTIM_TRIG_SOURCE_GPIO
794 * @arg @ref LL_LPTIM_TRIG_SOURCE_RTCALARMA
795 * @arg @ref LL_LPTIM_TRIG_SOURCE_RTCALARMB
796 * @arg @ref LL_LPTIM_TRIG_SOURCE_RTCTAMP1
797 * @arg @ref LL_LPTIM_TRIG_SOURCE_RTCTAMP2
798 * @arg @ref LL_LPTIM_TRIG_SOURCE_RTCTAMP3 (*)
799 * @arg @ref LL_LPTIM_TRIG_SOURCE_COMP1
800 * @arg @ref LL_LPTIM_TRIG_SOURCE_COMP2
801 * @arg @ref LL_LPTIM_TRIG_SOURCE_COMP3 (*)
802 *
803 * (*) Value not defined in all devices. \n
804 *
805 * @param Filter This parameter can be one of the following values:
806 * @arg @ref LL_LPTIM_TRIG_FILTER_NONE
807 * @arg @ref LL_LPTIM_TRIG_FILTER_2
808 * @arg @ref LL_LPTIM_TRIG_FILTER_4
809 * @arg @ref LL_LPTIM_TRIG_FILTER_8
810 * @param Polarity This parameter can be one of the following values:
811 * @arg @ref LL_LPTIM_TRIG_POLARITY_RISING
812 * @arg @ref LL_LPTIM_TRIG_POLARITY_FALLING
813 * @arg @ref LL_LPTIM_TRIG_POLARITY_RISING_FALLING
814 * @retval None
815 */
LL_LPTIM_ConfigTrigger(LPTIM_TypeDef * LPTIMx,uint32_t Source,uint32_t Filter,uint32_t Polarity)816 __STATIC_INLINE void LL_LPTIM_ConfigTrigger(LPTIM_TypeDef *LPTIMx, uint32_t Source, uint32_t Filter, uint32_t Polarity)
817 {
818 MODIFY_REG(LPTIMx->CFGR, LPTIM_CFGR_TRIGSEL | LPTIM_CFGR_TRGFLT | LPTIM_CFGR_TRIGEN, Source | Filter | Polarity);
819 }
820
821 /**
822 * @brief Get actual external trigger source.
823 * @rmtoll CFGR TRIGSEL LL_LPTIM_GetTriggerSource
824 * @param LPTIMx Low-Power Timer instance
825 * @retval Returned value can be one of the following values:
826 * @arg @ref LL_LPTIM_TRIG_SOURCE_GPIO
827 * @arg @ref LL_LPTIM_TRIG_SOURCE_RTCALARMA
828 * @arg @ref LL_LPTIM_TRIG_SOURCE_RTCALARMB
829 * @arg @ref LL_LPTIM_TRIG_SOURCE_RTCTAMP1
830 * @arg @ref LL_LPTIM_TRIG_SOURCE_RTCTAMP2
831 * @arg @ref LL_LPTIM_TRIG_SOURCE_RTCTAMP3 (*)
832 * @arg @ref LL_LPTIM_TRIG_SOURCE_COMP1
833 * @arg @ref LL_LPTIM_TRIG_SOURCE_COMP2
834 * @arg @ref LL_LPTIM_TRIG_SOURCE_COMP3 (*)
835 *
836 * (*) Value not defined in all devices. \n
837 *
838 */
LL_LPTIM_GetTriggerSource(const LPTIM_TypeDef * LPTIMx)839 __STATIC_INLINE uint32_t LL_LPTIM_GetTriggerSource(const LPTIM_TypeDef *LPTIMx)
840 {
841 return (uint32_t)(READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_TRIGSEL));
842 }
843
844 /**
845 * @brief Get actual external trigger filter.
846 * @rmtoll CFGR TRGFLT LL_LPTIM_GetTriggerFilter
847 * @param LPTIMx Low-Power Timer instance
848 * @retval Returned value can be one of the following values:
849 * @arg @ref LL_LPTIM_TRIG_FILTER_NONE
850 * @arg @ref LL_LPTIM_TRIG_FILTER_2
851 * @arg @ref LL_LPTIM_TRIG_FILTER_4
852 * @arg @ref LL_LPTIM_TRIG_FILTER_8
853 */
LL_LPTIM_GetTriggerFilter(const LPTIM_TypeDef * LPTIMx)854 __STATIC_INLINE uint32_t LL_LPTIM_GetTriggerFilter(const LPTIM_TypeDef *LPTIMx)
855 {
856 return (uint32_t)(READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_TRGFLT));
857 }
858
859 /**
860 * @brief Get actual external trigger polarity.
861 * @rmtoll CFGR TRIGEN LL_LPTIM_GetTriggerPolarity
862 * @param LPTIMx Low-Power Timer instance
863 * @retval Returned value can be one of the following values:
864 * @arg @ref LL_LPTIM_TRIG_POLARITY_RISING
865 * @arg @ref LL_LPTIM_TRIG_POLARITY_FALLING
866 * @arg @ref LL_LPTIM_TRIG_POLARITY_RISING_FALLING
867 */
LL_LPTIM_GetTriggerPolarity(const LPTIM_TypeDef * LPTIMx)868 __STATIC_INLINE uint32_t LL_LPTIM_GetTriggerPolarity(const LPTIM_TypeDef *LPTIMx)
869 {
870 return (uint32_t)(READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_TRIGEN));
871 }
872
873 /**
874 * @}
875 */
876
877 /** @defgroup LPTIM_LL_EF_Clock_Configuration Clock Configuration
878 * @{
879 */
880
881 /**
882 * @brief Set the source of the clock used by the LPTIM instance.
883 * @note This function must be called when the LPTIM instance is disabled.
884 * @rmtoll CFGR CKSEL LL_LPTIM_SetClockSource
885 * @param LPTIMx Low-Power Timer instance
886 * @param ClockSource This parameter can be one of the following values:
887 * @arg @ref LL_LPTIM_CLK_SOURCE_INTERNAL
888 * @arg @ref LL_LPTIM_CLK_SOURCE_EXTERNAL
889 * @retval None
890 */
LL_LPTIM_SetClockSource(LPTIM_TypeDef * LPTIMx,uint32_t ClockSource)891 __STATIC_INLINE void LL_LPTIM_SetClockSource(LPTIM_TypeDef *LPTIMx, uint32_t ClockSource)
892 {
893 MODIFY_REG(LPTIMx->CFGR, LPTIM_CFGR_CKSEL, ClockSource);
894 }
895
896 /**
897 * @brief Get actual LPTIM instance clock source.
898 * @rmtoll CFGR CKSEL LL_LPTIM_GetClockSource
899 * @param LPTIMx Low-Power Timer instance
900 * @retval Returned value can be one of the following values:
901 * @arg @ref LL_LPTIM_CLK_SOURCE_INTERNAL
902 * @arg @ref LL_LPTIM_CLK_SOURCE_EXTERNAL
903 */
LL_LPTIM_GetClockSource(const LPTIM_TypeDef * LPTIMx)904 __STATIC_INLINE uint32_t LL_LPTIM_GetClockSource(const LPTIM_TypeDef *LPTIMx)
905 {
906 return (uint32_t)(READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_CKSEL));
907 }
908
909 /**
910 * @brief Configure the active edge or edges used by the counter when
911 the LPTIM is clocked by an external clock source.
912 * @note This function must be called when the LPTIM instance is disabled.
913 * @note When both external clock signal edges are considered active ones,
914 * the LPTIM must also be clocked by an internal clock source with a
915 * frequency equal to at least four times the external clock frequency.
916 * @note An internal clock source must be present when a digital filter is
917 * required for external clock.
918 * @rmtoll CFGR CKFLT LL_LPTIM_ConfigClock\n
919 * CFGR CKPOL LL_LPTIM_ConfigClock
920 * @param LPTIMx Low-Power Timer instance
921 * @param ClockFilter This parameter can be one of the following values:
922 * @arg @ref LL_LPTIM_CLK_FILTER_NONE
923 * @arg @ref LL_LPTIM_CLK_FILTER_2
924 * @arg @ref LL_LPTIM_CLK_FILTER_4
925 * @arg @ref LL_LPTIM_CLK_FILTER_8
926 * @param ClockPolarity This parameter can be one of the following values:
927 * @arg @ref LL_LPTIM_CLK_POLARITY_RISING
928 * @arg @ref LL_LPTIM_CLK_POLARITY_FALLING
929 * @arg @ref LL_LPTIM_CLK_POLARITY_RISING_FALLING
930 * @retval None
931 */
LL_LPTIM_ConfigClock(LPTIM_TypeDef * LPTIMx,uint32_t ClockFilter,uint32_t ClockPolarity)932 __STATIC_INLINE void LL_LPTIM_ConfigClock(LPTIM_TypeDef *LPTIMx, uint32_t ClockFilter, uint32_t ClockPolarity)
933 {
934 MODIFY_REG(LPTIMx->CFGR, LPTIM_CFGR_CKFLT | LPTIM_CFGR_CKPOL, ClockFilter | ClockPolarity);
935 }
936
937 /**
938 * @brief Get actual clock polarity
939 * @rmtoll CFGR CKPOL LL_LPTIM_GetClockPolarity
940 * @param LPTIMx Low-Power Timer instance
941 * @retval Returned value can be one of the following values:
942 * @arg @ref LL_LPTIM_CLK_POLARITY_RISING
943 * @arg @ref LL_LPTIM_CLK_POLARITY_FALLING
944 * @arg @ref LL_LPTIM_CLK_POLARITY_RISING_FALLING
945 */
LL_LPTIM_GetClockPolarity(const LPTIM_TypeDef * LPTIMx)946 __STATIC_INLINE uint32_t LL_LPTIM_GetClockPolarity(const LPTIM_TypeDef *LPTIMx)
947 {
948 return (uint32_t)(READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_CKPOL));
949 }
950
951 /**
952 * @brief Get actual clock digital filter
953 * @rmtoll CFGR CKFLT LL_LPTIM_GetClockFilter
954 * @param LPTIMx Low-Power Timer instance
955 * @retval Returned value can be one of the following values:
956 * @arg @ref LL_LPTIM_CLK_FILTER_NONE
957 * @arg @ref LL_LPTIM_CLK_FILTER_2
958 * @arg @ref LL_LPTIM_CLK_FILTER_4
959 * @arg @ref LL_LPTIM_CLK_FILTER_8
960 */
LL_LPTIM_GetClockFilter(const LPTIM_TypeDef * LPTIMx)961 __STATIC_INLINE uint32_t LL_LPTIM_GetClockFilter(const LPTIM_TypeDef *LPTIMx)
962 {
963 return (uint32_t)(READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_CKFLT));
964 }
965
966 /**
967 * @}
968 */
969
970 /** @defgroup LPTIM_LL_EF_Encoder_Mode Encoder Mode
971 * @{
972 */
973
974 /**
975 * @brief Configure the encoder mode.
976 * @note This function must be called when the LPTIM instance is disabled.
977 * @rmtoll CFGR CKPOL LL_LPTIM_SetEncoderMode
978 * @param LPTIMx Low-Power Timer instance
979 * @param EncoderMode This parameter can be one of the following values:
980 * @arg @ref LL_LPTIM_ENCODER_MODE_RISING
981 * @arg @ref LL_LPTIM_ENCODER_MODE_FALLING
982 * @arg @ref LL_LPTIM_ENCODER_MODE_RISING_FALLING
983 * @retval None
984 */
LL_LPTIM_SetEncoderMode(LPTIM_TypeDef * LPTIMx,uint32_t EncoderMode)985 __STATIC_INLINE void LL_LPTIM_SetEncoderMode(LPTIM_TypeDef *LPTIMx, uint32_t EncoderMode)
986 {
987 MODIFY_REG(LPTIMx->CFGR, LPTIM_CFGR_CKPOL, EncoderMode);
988 }
989
990 /**
991 * @brief Get actual encoder mode.
992 * @rmtoll CFGR CKPOL LL_LPTIM_GetEncoderMode
993 * @param LPTIMx Low-Power Timer instance
994 * @retval Returned value can be one of the following values:
995 * @arg @ref LL_LPTIM_ENCODER_MODE_RISING
996 * @arg @ref LL_LPTIM_ENCODER_MODE_FALLING
997 * @arg @ref LL_LPTIM_ENCODER_MODE_RISING_FALLING
998 */
LL_LPTIM_GetEncoderMode(const LPTIM_TypeDef * LPTIMx)999 __STATIC_INLINE uint32_t LL_LPTIM_GetEncoderMode(const LPTIM_TypeDef *LPTIMx)
1000 {
1001 return (uint32_t)(READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_CKPOL));
1002 }
1003
1004 /**
1005 * @brief Enable the encoder mode
1006 * @note This function must be called when the LPTIM instance is disabled.
1007 * @note In this mode the LPTIM instance must be clocked by an internal clock
1008 * source. Also, the prescaler division ratio must be equal to 1.
1009 * @note LPTIM instance must be configured in continuous mode prior enabling
1010 * the encoder mode.
1011 * @rmtoll CFGR ENC LL_LPTIM_EnableEncoderMode
1012 * @param LPTIMx Low-Power Timer instance
1013 * @retval None
1014 */
LL_LPTIM_EnableEncoderMode(LPTIM_TypeDef * LPTIMx)1015 __STATIC_INLINE void LL_LPTIM_EnableEncoderMode(LPTIM_TypeDef *LPTIMx)
1016 {
1017 SET_BIT(LPTIMx->CFGR, LPTIM_CFGR_ENC);
1018 }
1019
1020 /**
1021 * @brief Disable the encoder mode
1022 * @note This function must be called when the LPTIM instance is disabled.
1023 * @rmtoll CFGR ENC LL_LPTIM_DisableEncoderMode
1024 * @param LPTIMx Low-Power Timer instance
1025 * @retval None
1026 */
LL_LPTIM_DisableEncoderMode(LPTIM_TypeDef * LPTIMx)1027 __STATIC_INLINE void LL_LPTIM_DisableEncoderMode(LPTIM_TypeDef *LPTIMx)
1028 {
1029 CLEAR_BIT(LPTIMx->CFGR, LPTIM_CFGR_ENC);
1030 }
1031
1032 /**
1033 * @brief Indicates whether the LPTIM operates in encoder mode.
1034 * @rmtoll CFGR ENC LL_LPTIM_IsEnabledEncoderMode
1035 * @param LPTIMx Low-Power Timer instance
1036 * @retval State of bit (1 or 0).
1037 */
LL_LPTIM_IsEnabledEncoderMode(const LPTIM_TypeDef * LPTIMx)1038 __STATIC_INLINE uint32_t LL_LPTIM_IsEnabledEncoderMode(const LPTIM_TypeDef *LPTIMx)
1039 {
1040 return (((READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_ENC) == LPTIM_CFGR_ENC) ? 1UL : 0UL));
1041 }
1042
1043 /**
1044 * @}
1045 */
1046
1047 /** @defgroup LPTIM_LL_EF_FLAG_Management FLAG Management
1048 * @{
1049 */
1050
1051 /**
1052 * @brief Clear the compare match flag (CMPMCF)
1053 * @rmtoll ICR CMPMCF LL_LPTIM_ClearFLAG_CMPM
1054 * @param LPTIMx Low-Power Timer instance
1055 * @retval None
1056 */
LL_LPTIM_ClearFLAG_CMPM(LPTIM_TypeDef * LPTIMx)1057 __STATIC_INLINE void LL_LPTIM_ClearFLAG_CMPM(LPTIM_TypeDef *LPTIMx)
1058 {
1059 SET_BIT(LPTIMx->ICR, LPTIM_ICR_CMPMCF);
1060 }
1061
1062 /**
1063 * @brief Inform application whether a compare match interrupt has occurred.
1064 * @rmtoll ISR CMPM LL_LPTIM_IsActiveFlag_CMPM
1065 * @param LPTIMx Low-Power Timer instance
1066 * @retval State of bit (1 or 0).
1067 */
LL_LPTIM_IsActiveFlag_CMPM(const LPTIM_TypeDef * LPTIMx)1068 __STATIC_INLINE uint32_t LL_LPTIM_IsActiveFlag_CMPM(const LPTIM_TypeDef *LPTIMx)
1069 {
1070 return (((READ_BIT(LPTIMx->ISR, LPTIM_ISR_CMPM) == LPTIM_ISR_CMPM) ? 1UL : 0UL));
1071 }
1072
1073 /**
1074 * @brief Clear the autoreload match flag (ARRMCF)
1075 * @rmtoll ICR ARRMCF LL_LPTIM_ClearFLAG_ARRM
1076 * @param LPTIMx Low-Power Timer instance
1077 * @retval None
1078 */
LL_LPTIM_ClearFLAG_ARRM(LPTIM_TypeDef * LPTIMx)1079 __STATIC_INLINE void LL_LPTIM_ClearFLAG_ARRM(LPTIM_TypeDef *LPTIMx)
1080 {
1081 SET_BIT(LPTIMx->ICR, LPTIM_ICR_ARRMCF);
1082 }
1083
1084 /**
1085 * @brief Inform application whether a autoreload match interrupt has occurred.
1086 * @rmtoll ISR ARRM LL_LPTIM_IsActiveFlag_ARRM
1087 * @param LPTIMx Low-Power Timer instance
1088 * @retval State of bit (1 or 0).
1089 */
LL_LPTIM_IsActiveFlag_ARRM(const LPTIM_TypeDef * LPTIMx)1090 __STATIC_INLINE uint32_t LL_LPTIM_IsActiveFlag_ARRM(const LPTIM_TypeDef *LPTIMx)
1091 {
1092 return (((READ_BIT(LPTIMx->ISR, LPTIM_ISR_ARRM) == LPTIM_ISR_ARRM) ? 1UL : 0UL));
1093 }
1094
1095 /**
1096 * @brief Clear the external trigger valid edge flag(EXTTRIGCF).
1097 * @rmtoll ICR EXTTRIGCF LL_LPTIM_ClearFlag_EXTTRIG
1098 * @param LPTIMx Low-Power Timer instance
1099 * @retval None
1100 */
LL_LPTIM_ClearFlag_EXTTRIG(LPTIM_TypeDef * LPTIMx)1101 __STATIC_INLINE void LL_LPTIM_ClearFlag_EXTTRIG(LPTIM_TypeDef *LPTIMx)
1102 {
1103 SET_BIT(LPTIMx->ICR, LPTIM_ICR_EXTTRIGCF);
1104 }
1105
1106 /**
1107 * @brief Inform application whether a valid edge on the selected external trigger input has occurred.
1108 * @rmtoll ISR EXTTRIG LL_LPTIM_IsActiveFlag_EXTTRIG
1109 * @param LPTIMx Low-Power Timer instance
1110 * @retval State of bit (1 or 0).
1111 */
LL_LPTIM_IsActiveFlag_EXTTRIG(const LPTIM_TypeDef * LPTIMx)1112 __STATIC_INLINE uint32_t LL_LPTIM_IsActiveFlag_EXTTRIG(const LPTIM_TypeDef *LPTIMx)
1113 {
1114 return (((READ_BIT(LPTIMx->ISR, LPTIM_ISR_EXTTRIG) == LPTIM_ISR_EXTTRIG) ? 1UL : 0UL));
1115 }
1116
1117 /**
1118 * @brief Clear the compare register update interrupt flag (CMPOKCF).
1119 * @rmtoll ICR CMPOKCF LL_LPTIM_ClearFlag_CMPOK
1120 * @param LPTIMx Low-Power Timer instance
1121 * @retval None
1122 */
LL_LPTIM_ClearFlag_CMPOK(LPTIM_TypeDef * LPTIMx)1123 __STATIC_INLINE void LL_LPTIM_ClearFlag_CMPOK(LPTIM_TypeDef *LPTIMx)
1124 {
1125 SET_BIT(LPTIMx->ICR, LPTIM_ICR_CMPOKCF);
1126 }
1127
1128 /**
1129 * @brief Informs application whether the APB bus write operation to the LPTIMx_CMP register has been successfully
1130 completed. If so, a new one can be initiated.
1131 * @rmtoll ISR CMPOK LL_LPTIM_IsActiveFlag_CMPOK
1132 * @param LPTIMx Low-Power Timer instance
1133 * @retval State of bit (1 or 0).
1134 */
LL_LPTIM_IsActiveFlag_CMPOK(const LPTIM_TypeDef * LPTIMx)1135 __STATIC_INLINE uint32_t LL_LPTIM_IsActiveFlag_CMPOK(const LPTIM_TypeDef *LPTIMx)
1136 {
1137 return (((READ_BIT(LPTIMx->ISR, LPTIM_ISR_CMPOK) == LPTIM_ISR_CMPOK) ? 1UL : 0UL));
1138 }
1139
1140 /**
1141 * @brief Clear the autoreload register update interrupt flag (ARROKCF).
1142 * @rmtoll ICR ARROKCF LL_LPTIM_ClearFlag_ARROK
1143 * @param LPTIMx Low-Power Timer instance
1144 * @retval None
1145 */
LL_LPTIM_ClearFlag_ARROK(LPTIM_TypeDef * LPTIMx)1146 __STATIC_INLINE void LL_LPTIM_ClearFlag_ARROK(LPTIM_TypeDef *LPTIMx)
1147 {
1148 SET_BIT(LPTIMx->ICR, LPTIM_ICR_ARROKCF);
1149 }
1150
1151 /**
1152 * @brief Informs application whether the APB bus write operation to the LPTIMx_ARR register has been successfully
1153 completed. If so, a new one can be initiated.
1154 * @rmtoll ISR ARROK LL_LPTIM_IsActiveFlag_ARROK
1155 * @param LPTIMx Low-Power Timer instance
1156 * @retval State of bit (1 or 0).
1157 */
LL_LPTIM_IsActiveFlag_ARROK(const LPTIM_TypeDef * LPTIMx)1158 __STATIC_INLINE uint32_t LL_LPTIM_IsActiveFlag_ARROK(const LPTIM_TypeDef *LPTIMx)
1159 {
1160 return (((READ_BIT(LPTIMx->ISR, LPTIM_ISR_ARROK) == LPTIM_ISR_ARROK) ? 1UL : 0UL));
1161 }
1162
1163 /**
1164 * @brief Clear the counter direction change to up interrupt flag (UPCF).
1165 * @rmtoll ICR UPCF LL_LPTIM_ClearFlag_UP
1166 * @param LPTIMx Low-Power Timer instance
1167 * @retval None
1168 */
LL_LPTIM_ClearFlag_UP(LPTIM_TypeDef * LPTIMx)1169 __STATIC_INLINE void LL_LPTIM_ClearFlag_UP(LPTIM_TypeDef *LPTIMx)
1170 {
1171 SET_BIT(LPTIMx->ICR, LPTIM_ICR_UPCF);
1172 }
1173
1174 /**
1175 * @brief Informs the application whether the counter direction has changed from down to up (when the LPTIM instance
1176 operates in encoder mode).
1177 * @rmtoll ISR UP LL_LPTIM_IsActiveFlag_UP
1178 * @param LPTIMx Low-Power Timer instance
1179 * @retval State of bit (1 or 0).
1180 */
LL_LPTIM_IsActiveFlag_UP(const LPTIM_TypeDef * LPTIMx)1181 __STATIC_INLINE uint32_t LL_LPTIM_IsActiveFlag_UP(const LPTIM_TypeDef *LPTIMx)
1182 {
1183 return (((READ_BIT(LPTIMx->ISR, LPTIM_ISR_UP) == LPTIM_ISR_UP) ? 1UL : 0UL));
1184 }
1185
1186 /**
1187 * @brief Clear the counter direction change to down interrupt flag (DOWNCF).
1188 * @rmtoll ICR DOWNCF LL_LPTIM_ClearFlag_DOWN
1189 * @param LPTIMx Low-Power Timer instance
1190 * @retval None
1191 */
LL_LPTIM_ClearFlag_DOWN(LPTIM_TypeDef * LPTIMx)1192 __STATIC_INLINE void LL_LPTIM_ClearFlag_DOWN(LPTIM_TypeDef *LPTIMx)
1193 {
1194 SET_BIT(LPTIMx->ICR, LPTIM_ICR_DOWNCF);
1195 }
1196
1197 /**
1198 * @brief Informs the application whether the counter direction has changed from up to down (when the LPTIM instance
1199 operates in encoder mode).
1200 * @rmtoll ISR DOWN LL_LPTIM_IsActiveFlag_DOWN
1201 * @param LPTIMx Low-Power Timer instance
1202 * @retval State of bit (1 or 0).
1203 */
LL_LPTIM_IsActiveFlag_DOWN(const LPTIM_TypeDef * LPTIMx)1204 __STATIC_INLINE uint32_t LL_LPTIM_IsActiveFlag_DOWN(const LPTIM_TypeDef *LPTIMx)
1205 {
1206 return (((READ_BIT(LPTIMx->ISR, LPTIM_ISR_DOWN) == LPTIM_ISR_DOWN) ? 1UL : 0UL));
1207 }
1208
1209 /**
1210 * @}
1211 */
1212
1213 /** @defgroup LPTIM_LL_EF_IT_Management Interrupt Management
1214 * @{
1215 */
1216
1217 /**
1218 * @brief Enable compare match interrupt (CMPMIE).
1219 * @rmtoll IER CMPMIE LL_LPTIM_EnableIT_CMPM
1220 * @param LPTIMx Low-Power Timer instance
1221 * @retval None
1222 */
LL_LPTIM_EnableIT_CMPM(LPTIM_TypeDef * LPTIMx)1223 __STATIC_INLINE void LL_LPTIM_EnableIT_CMPM(LPTIM_TypeDef *LPTIMx)
1224 {
1225 SET_BIT(LPTIMx->IER, LPTIM_IER_CMPMIE);
1226 }
1227
1228 /**
1229 * @brief Disable compare match interrupt (CMPMIE).
1230 * @rmtoll IER CMPMIE LL_LPTIM_DisableIT_CMPM
1231 * @param LPTIMx Low-Power Timer instance
1232 * @retval None
1233 */
LL_LPTIM_DisableIT_CMPM(LPTIM_TypeDef * LPTIMx)1234 __STATIC_INLINE void LL_LPTIM_DisableIT_CMPM(LPTIM_TypeDef *LPTIMx)
1235 {
1236 CLEAR_BIT(LPTIMx->IER, LPTIM_IER_CMPMIE);
1237 }
1238
1239 /**
1240 * @brief Indicates whether the compare match interrupt (CMPMIE) is enabled.
1241 * @rmtoll IER CMPMIE LL_LPTIM_IsEnabledIT_CMPM
1242 * @param LPTIMx Low-Power Timer instance
1243 * @retval State of bit (1 or 0).
1244 */
LL_LPTIM_IsEnabledIT_CMPM(const LPTIM_TypeDef * LPTIMx)1245 __STATIC_INLINE uint32_t LL_LPTIM_IsEnabledIT_CMPM(const LPTIM_TypeDef *LPTIMx)
1246 {
1247 return (((READ_BIT(LPTIMx->IER, LPTIM_IER_CMPMIE) == LPTIM_IER_CMPMIE) ? 1UL : 0UL));
1248 }
1249
1250 /**
1251 * @brief Enable autoreload match interrupt (ARRMIE).
1252 * @rmtoll IER ARRMIE LL_LPTIM_EnableIT_ARRM
1253 * @param LPTIMx Low-Power Timer instance
1254 * @retval None
1255 */
LL_LPTIM_EnableIT_ARRM(LPTIM_TypeDef * LPTIMx)1256 __STATIC_INLINE void LL_LPTIM_EnableIT_ARRM(LPTIM_TypeDef *LPTIMx)
1257 {
1258 SET_BIT(LPTIMx->IER, LPTIM_IER_ARRMIE);
1259 }
1260
1261 /**
1262 * @brief Disable autoreload match interrupt (ARRMIE).
1263 * @rmtoll IER ARRMIE LL_LPTIM_DisableIT_ARRM
1264 * @param LPTIMx Low-Power Timer instance
1265 * @retval None
1266 */
LL_LPTIM_DisableIT_ARRM(LPTIM_TypeDef * LPTIMx)1267 __STATIC_INLINE void LL_LPTIM_DisableIT_ARRM(LPTIM_TypeDef *LPTIMx)
1268 {
1269 CLEAR_BIT(LPTIMx->IER, LPTIM_IER_ARRMIE);
1270 }
1271
1272 /**
1273 * @brief Indicates whether the autoreload match interrupt (ARRMIE) is enabled.
1274 * @rmtoll IER ARRMIE LL_LPTIM_IsEnabledIT_ARRM
1275 * @param LPTIMx Low-Power Timer instance
1276 * @retval State of bit (1 or 0).
1277 */
LL_LPTIM_IsEnabledIT_ARRM(const LPTIM_TypeDef * LPTIMx)1278 __STATIC_INLINE uint32_t LL_LPTIM_IsEnabledIT_ARRM(const LPTIM_TypeDef *LPTIMx)
1279 {
1280 return (((READ_BIT(LPTIMx->IER, LPTIM_IER_ARRMIE) == LPTIM_IER_ARRMIE) ? 1UL : 0UL));
1281 }
1282
1283 /**
1284 * @brief Enable external trigger valid edge interrupt (EXTTRIGIE).
1285 * @rmtoll IER EXTTRIGIE LL_LPTIM_EnableIT_EXTTRIG
1286 * @param LPTIMx Low-Power Timer instance
1287 * @retval None
1288 */
LL_LPTIM_EnableIT_EXTTRIG(LPTIM_TypeDef * LPTIMx)1289 __STATIC_INLINE void LL_LPTIM_EnableIT_EXTTRIG(LPTIM_TypeDef *LPTIMx)
1290 {
1291 SET_BIT(LPTIMx->IER, LPTIM_IER_EXTTRIGIE);
1292 }
1293
1294 /**
1295 * @brief Disable external trigger valid edge interrupt (EXTTRIGIE).
1296 * @rmtoll IER EXTTRIGIE LL_LPTIM_DisableIT_EXTTRIG
1297 * @param LPTIMx Low-Power Timer instance
1298 * @retval None
1299 */
LL_LPTIM_DisableIT_EXTTRIG(LPTIM_TypeDef * LPTIMx)1300 __STATIC_INLINE void LL_LPTIM_DisableIT_EXTTRIG(LPTIM_TypeDef *LPTIMx)
1301 {
1302 CLEAR_BIT(LPTIMx->IER, LPTIM_IER_EXTTRIGIE);
1303 }
1304
1305 /**
1306 * @brief Indicates external trigger valid edge interrupt (EXTTRIGIE) is enabled.
1307 * @rmtoll IER EXTTRIGIE LL_LPTIM_IsEnabledIT_EXTTRIG
1308 * @param LPTIMx Low-Power Timer instance
1309 * @retval State of bit (1 or 0).
1310 */
LL_LPTIM_IsEnabledIT_EXTTRIG(const LPTIM_TypeDef * LPTIMx)1311 __STATIC_INLINE uint32_t LL_LPTIM_IsEnabledIT_EXTTRIG(const LPTIM_TypeDef *LPTIMx)
1312 {
1313 return (((READ_BIT(LPTIMx->IER, LPTIM_IER_EXTTRIGIE) == LPTIM_IER_EXTTRIGIE) ? 1UL : 0UL));
1314 }
1315
1316 /**
1317 * @brief Enable compare register write completed interrupt (CMPOKIE).
1318 * @rmtoll IER CMPOKIE LL_LPTIM_EnableIT_CMPOK
1319 * @param LPTIMx Low-Power Timer instance
1320 * @retval None
1321 */
LL_LPTIM_EnableIT_CMPOK(LPTIM_TypeDef * LPTIMx)1322 __STATIC_INLINE void LL_LPTIM_EnableIT_CMPOK(LPTIM_TypeDef *LPTIMx)
1323 {
1324 SET_BIT(LPTIMx->IER, LPTIM_IER_CMPOKIE);
1325 }
1326
1327 /**
1328 * @brief Disable compare register write completed interrupt (CMPOKIE).
1329 * @rmtoll IER CMPOKIE LL_LPTIM_DisableIT_CMPOK
1330 * @param LPTIMx Low-Power Timer instance
1331 * @retval None
1332 */
LL_LPTIM_DisableIT_CMPOK(LPTIM_TypeDef * LPTIMx)1333 __STATIC_INLINE void LL_LPTIM_DisableIT_CMPOK(LPTIM_TypeDef *LPTIMx)
1334 {
1335 CLEAR_BIT(LPTIMx->IER, LPTIM_IER_CMPOKIE);
1336 }
1337
1338 /**
1339 * @brief Indicates whether the compare register write completed interrupt (CMPOKIE) is enabled.
1340 * @rmtoll IER CMPOKIE LL_LPTIM_IsEnabledIT_CMPOK
1341 * @param LPTIMx Low-Power Timer instance
1342 * @retval State of bit (1 or 0).
1343 */
LL_LPTIM_IsEnabledIT_CMPOK(const LPTIM_TypeDef * LPTIMx)1344 __STATIC_INLINE uint32_t LL_LPTIM_IsEnabledIT_CMPOK(const LPTIM_TypeDef *LPTIMx)
1345 {
1346 return (((READ_BIT(LPTIMx->IER, LPTIM_IER_CMPOKIE) == LPTIM_IER_CMPOKIE) ? 1UL : 0UL));
1347 }
1348
1349 /**
1350 * @brief Enable autoreload register write completed interrupt (ARROKIE).
1351 * @rmtoll IER ARROKIE LL_LPTIM_EnableIT_ARROK
1352 * @param LPTIMx Low-Power Timer instance
1353 * @retval None
1354 */
LL_LPTIM_EnableIT_ARROK(LPTIM_TypeDef * LPTIMx)1355 __STATIC_INLINE void LL_LPTIM_EnableIT_ARROK(LPTIM_TypeDef *LPTIMx)
1356 {
1357 SET_BIT(LPTIMx->IER, LPTIM_IER_ARROKIE);
1358 }
1359
1360 /**
1361 * @brief Disable autoreload register write completed interrupt (ARROKIE).
1362 * @rmtoll IER ARROKIE LL_LPTIM_DisableIT_ARROK
1363 * @param LPTIMx Low-Power Timer instance
1364 * @retval None
1365 */
LL_LPTIM_DisableIT_ARROK(LPTIM_TypeDef * LPTIMx)1366 __STATIC_INLINE void LL_LPTIM_DisableIT_ARROK(LPTIM_TypeDef *LPTIMx)
1367 {
1368 CLEAR_BIT(LPTIMx->IER, LPTIM_IER_ARROKIE);
1369 }
1370
1371 /**
1372 * @brief Indicates whether the autoreload register write completed interrupt (ARROKIE) is enabled.
1373 * @rmtoll IER ARROKIE LL_LPTIM_IsEnabledIT_ARROK
1374 * @param LPTIMx Low-Power Timer instance
1375 * @retval State of bit(1 or 0).
1376 */
LL_LPTIM_IsEnabledIT_ARROK(const LPTIM_TypeDef * LPTIMx)1377 __STATIC_INLINE uint32_t LL_LPTIM_IsEnabledIT_ARROK(const LPTIM_TypeDef *LPTIMx)
1378 {
1379 return (((READ_BIT(LPTIMx->IER, LPTIM_IER_ARROKIE) == LPTIM_IER_ARROKIE) ? 1UL : 0UL));
1380 }
1381
1382 /**
1383 * @brief Enable direction change to up interrupt (UPIE).
1384 * @rmtoll IER UPIE LL_LPTIM_EnableIT_UP
1385 * @param LPTIMx Low-Power Timer instance
1386 * @retval None
1387 */
LL_LPTIM_EnableIT_UP(LPTIM_TypeDef * LPTIMx)1388 __STATIC_INLINE void LL_LPTIM_EnableIT_UP(LPTIM_TypeDef *LPTIMx)
1389 {
1390 SET_BIT(LPTIMx->IER, LPTIM_IER_UPIE);
1391 }
1392
1393 /**
1394 * @brief Disable direction change to up interrupt (UPIE).
1395 * @rmtoll IER UPIE LL_LPTIM_DisableIT_UP
1396 * @param LPTIMx Low-Power Timer instance
1397 * @retval None
1398 */
LL_LPTIM_DisableIT_UP(LPTIM_TypeDef * LPTIMx)1399 __STATIC_INLINE void LL_LPTIM_DisableIT_UP(LPTIM_TypeDef *LPTIMx)
1400 {
1401 CLEAR_BIT(LPTIMx->IER, LPTIM_IER_UPIE);
1402 }
1403
1404 /**
1405 * @brief Indicates whether the direction change to up interrupt (UPIE) is enabled.
1406 * @rmtoll IER UPIE LL_LPTIM_IsEnabledIT_UP
1407 * @param LPTIMx Low-Power Timer instance
1408 * @retval State of bit(1 or 0).
1409 */
LL_LPTIM_IsEnabledIT_UP(const LPTIM_TypeDef * LPTIMx)1410 __STATIC_INLINE uint32_t LL_LPTIM_IsEnabledIT_UP(const LPTIM_TypeDef *LPTIMx)
1411 {
1412 return (((READ_BIT(LPTIMx->IER, LPTIM_IER_UPIE) == LPTIM_IER_UPIE) ? 1UL : 0UL));
1413 }
1414
1415 /**
1416 * @brief Enable direction change to down interrupt (DOWNIE).
1417 * @rmtoll IER DOWNIE LL_LPTIM_EnableIT_DOWN
1418 * @param LPTIMx Low-Power Timer instance
1419 * @retval None
1420 */
LL_LPTIM_EnableIT_DOWN(LPTIM_TypeDef * LPTIMx)1421 __STATIC_INLINE void LL_LPTIM_EnableIT_DOWN(LPTIM_TypeDef *LPTIMx)
1422 {
1423 SET_BIT(LPTIMx->IER, LPTIM_IER_DOWNIE);
1424 }
1425
1426 /**
1427 * @brief Disable direction change to down interrupt (DOWNIE).
1428 * @rmtoll IER DOWNIE LL_LPTIM_DisableIT_DOWN
1429 * @param LPTIMx Low-Power Timer instance
1430 * @retval None
1431 */
LL_LPTIM_DisableIT_DOWN(LPTIM_TypeDef * LPTIMx)1432 __STATIC_INLINE void LL_LPTIM_DisableIT_DOWN(LPTIM_TypeDef *LPTIMx)
1433 {
1434 CLEAR_BIT(LPTIMx->IER, LPTIM_IER_DOWNIE);
1435 }
1436
1437 /**
1438 * @brief Indicates whether the direction change to down interrupt (DOWNIE) is enabled.
1439 * @rmtoll IER DOWNIE LL_LPTIM_IsEnabledIT_DOWN
1440 * @param LPTIMx Low-Power Timer instance
1441 * @retval State of bit(1 or 0).
1442 */
LL_LPTIM_IsEnabledIT_DOWN(const LPTIM_TypeDef * LPTIMx)1443 __STATIC_INLINE uint32_t LL_LPTIM_IsEnabledIT_DOWN(const LPTIM_TypeDef *LPTIMx)
1444 {
1445 return ((READ_BIT(LPTIMx->IER, LPTIM_IER_DOWNIE) == LPTIM_IER_DOWNIE) ? 1UL : 0UL);
1446 }
1447
1448 /**
1449 * @}
1450 */
1451
1452 /**
1453 * @}
1454 */
1455
1456 /**
1457 * @}
1458 */
1459
1460 #endif /* LPTIM1 || LPTIM2 */
1461
1462 /**
1463 * @}
1464 */
1465
1466 #ifdef __cplusplus
1467 }
1468 #endif
1469
1470 #endif /* STM32G0xx_LL_LPTIM_H */
1471
