1 /**
2 ******************************************************************************
3 * @file stm32g0xx_ll_exti.h
4 * @author MCD Application Team
5 * @brief Header file of EXTI LL module.
6 ******************************************************************************
7 * @attention
8 *
9 * Copyright (c) 2018 STMicroelectronics.
10 * All rights reserved.
11 *
12 * This software is licensed under terms that can be found in the LICENSE file
13 * in the root directory of this software component.
14 * If no LICENSE file comes with this software, it is provided AS-IS.
15 *
16 ******************************************************************************
17 */
18
19 /* Define to prevent recursive inclusion -------------------------------------*/
20 #ifndef STM32G0xx_LL_EXTI_H
21 #define STM32G0xx_LL_EXTI_H
22
23 #ifdef __cplusplus
24 extern "C" {
25 #endif
26
27 /* Includes ------------------------------------------------------------------*/
28 #include "stm32g0xx.h"
29
30 /** @addtogroup STM32G0xx_LL_Driver
31 * @{
32 */
33
34 #if defined (EXTI)
35
36 /** @defgroup EXTI_LL EXTI
37 * @{
38 */
39
40 /* Private types -------------------------------------------------------------*/
41 /* Private variables ---------------------------------------------------------*/
42 /* Private constants ---------------------------------------------------------*/
43 #define LL_EXTI_REGISTER_PINPOS_SHFT 16u /*!< Define used to shift pin position in EXTICR register */
44
45 /* Private Macros ------------------------------------------------------------*/
46 #if defined(USE_FULL_LL_DRIVER)
47 /** @defgroup EXTI_LL_Private_Macros EXTI Private Macros
48 * @{
49 */
50 /**
51 * @}
52 */
53 #endif /*USE_FULL_LL_DRIVER*/
54 /* Exported types ------------------------------------------------------------*/
55 #if defined(USE_FULL_LL_DRIVER)
56 /** @defgroup EXTI_LL_ES_INIT EXTI Exported Init structure
57 * @{
58 */
59 typedef struct
60 {
61
62 uint32_t Line_0_31; /*!< Specifies the EXTI lines to be enabled or disabled for Lines in range 0 to 31
63 This parameter can be any combination of @ref EXTI_LL_EC_LINE */
64 #if defined(STM32G081xx) || defined(STM32G071xx) || defined(STM32G0C1xx) || defined(STM32G0B1xx) || defined(STM32G0B0xx)
65 uint32_t Line_32_63; /*!< Specifies the EXTI lines to be enabled or disabled for Lines in range 32 to 63
66 This parameter can be any combination of @ref EXTI_LL_EC_LINE */
67 #endif /* STM32G081xx || STM32G071xx || STM32G0C1xx || STM32G0B1xx || STM32G0B0xx */
68 FunctionalState LineCommand; /*!< Specifies the new state of the selected EXTI lines.
69 This parameter can be set either to ENABLE or DISABLE */
70
71 uint8_t Mode; /*!< Specifies the mode for the EXTI lines.
72 This parameter can be a value of @ref EXTI_LL_EC_MODE. */
73
74 uint8_t Trigger; /*!< Specifies the trigger signal active edge for the EXTI lines.
75 This parameter can be a value of @ref EXTI_LL_EC_TRIGGER. */
76 } LL_EXTI_InitTypeDef;
77
78 /**
79 * @}
80 */
81 #endif /*USE_FULL_LL_DRIVER*/
82
83 /* Exported constants --------------------------------------------------------*/
84 /** @defgroup EXTI_LL_Exported_Constants EXTI Exported Constants
85 * @{
86 */
87
88 /** @defgroup EXTI_LL_EC_LINE LINE
89 * @{
90 */
91 #define LL_EXTI_LINE_0 EXTI_IMR1_IM0 /*!< Extended line 0 */
92 #define LL_EXTI_LINE_1 EXTI_IMR1_IM1 /*!< Extended line 1 */
93 #define LL_EXTI_LINE_2 EXTI_IMR1_IM2 /*!< Extended line 2 */
94 #define LL_EXTI_LINE_3 EXTI_IMR1_IM3 /*!< Extended line 3 */
95 #define LL_EXTI_LINE_4 EXTI_IMR1_IM4 /*!< Extended line 4 */
96 #define LL_EXTI_LINE_5 EXTI_IMR1_IM5 /*!< Extended line 5 */
97 #define LL_EXTI_LINE_6 EXTI_IMR1_IM6 /*!< Extended line 6 */
98 #define LL_EXTI_LINE_7 EXTI_IMR1_IM7 /*!< Extended line 7 */
99 #define LL_EXTI_LINE_8 EXTI_IMR1_IM8 /*!< Extended line 8 */
100 #define LL_EXTI_LINE_9 EXTI_IMR1_IM9 /*!< Extended line 9 */
101 #define LL_EXTI_LINE_10 EXTI_IMR1_IM10 /*!< Extended line 10 */
102 #define LL_EXTI_LINE_11 EXTI_IMR1_IM11 /*!< Extended line 11 */
103 #define LL_EXTI_LINE_12 EXTI_IMR1_IM12 /*!< Extended line 12 */
104 #define LL_EXTI_LINE_13 EXTI_IMR1_IM13 /*!< Extended line 13 */
105 #define LL_EXTI_LINE_14 EXTI_IMR1_IM14 /*!< Extended line 14 */
106 #define LL_EXTI_LINE_15 EXTI_IMR1_IM15 /*!< Extended line 15 */
107 #if defined(EXTI_IMR1_IM16)
108 #define LL_EXTI_LINE_16 EXTI_IMR1_IM16 /*!< Extended line 16 */
109 #endif /* EXTI_IMR1_IM16 */
110 #if defined(EXTI_IMR1_IM17)
111 #define LL_EXTI_LINE_17 EXTI_IMR1_IM17 /*!< Extended line 17 */
112 #endif /* EXTI_IMR1_IM17 */
113 #if defined(EXTI_IMR1_IM18)
114 #define LL_EXTI_LINE_18 EXTI_IMR1_IM18 /*!< Extended line 18 */
115 #endif /* EXTI_IMR1_IM18 */
116 #define LL_EXTI_LINE_19 EXTI_IMR1_IM19 /*!< Extended line 19 */
117 #if defined(EXTI_IMR1_IM20)
118 #define LL_EXTI_LINE_20 EXTI_IMR1_IM20 /*!< Extended line 20 */
119 #endif /* EXTI_IMR1_IM20 */
120 #if defined(EXTI_IMR1_IM21)
121 #define LL_EXTI_LINE_21 EXTI_IMR1_IM21 /*!< Extended line 21 */
122 #endif /* EXTI_IMR1_IM21 */
123 #if defined(EXTI_IMR1_IM22)
124 #define LL_EXTI_LINE_22 EXTI_IMR1_IM22 /*!< Extended line 22 */
125 #endif /* EXTI_IMR1_IM22 */
126 #define LL_EXTI_LINE_23 EXTI_IMR1_IM23 /*!< Extended line 23 */
127 #if defined(EXTI_IMR1_IM24)
128 #define LL_EXTI_LINE_24 EXTI_IMR1_IM24 /*!< Extended line 24 */
129 #endif /* EXTI_IMR1_IM24 */
130 #if defined(EXTI_IMR1_IM25)
131 #define LL_EXTI_LINE_25 EXTI_IMR1_IM25 /*!< Extended line 25 */
132 #endif /* EXTI_IMR1_IM25 */
133 #if defined(EXTI_IMR1_IM26)
134 #define LL_EXTI_LINE_26 EXTI_IMR1_IM26 /*!< Extended line 26 */
135 #endif /* EXTI_IMR1_IM26 */
136 #if defined(EXTI_IMR1_IM27)
137 #define LL_EXTI_LINE_27 EXTI_IMR1_IM27 /*!< Extended line 27 */
138 #endif /* EXTI_IMR1_IM27 */
139 #if defined(EXTI_IMR1_IM28)
140 #define LL_EXTI_LINE_28 EXTI_IMR1_IM28 /*!< Extended line 28 */
141 #endif /* EXTI_IMR1_IM28 */
142 #if defined(EXTI_IMR1_IM29)
143 #define LL_EXTI_LINE_29 EXTI_IMR1_IM29 /*!< Extended line 29 */
144 #endif /* EXTI_IMR1_IM29 */
145 #if defined(EXTI_IMR1_IM30)
146 #define LL_EXTI_LINE_30 EXTI_IMR1_IM30 /*!< Extended line 30 */
147 #endif /* EXTI_IMR1_IM30 */
148 #if defined(EXTI_IMR1_IM31)
149 #define LL_EXTI_LINE_31 EXTI_IMR1_IM31 /*!< Extended line 31 */
150 #endif /* EXTI_IMR1_IM31 */
151 #define LL_EXTI_LINE_ALL_0_31 EXTI_IMR1_IM /*!< All Extended line not reserved*/
152
153 #if defined(EXTI_IMR2_IM32)
154 #define LL_EXTI_LINE_32 EXTI_IMR2_IM32 /*!< Extended line 32 */
155 #endif /* EXTI_IMR2_IM32 */
156 #if defined(EXTI_IMR2_IM33)
157 #define LL_EXTI_LINE_33 EXTI_IMR2_IM33 /*!< Extended line 33 */
158 #endif /* EXTI_IMR2_IM33 */
159 #if defined(EXTI_IMR2_IM34)
160 #define LL_EXTI_LINE_34 EXTI_IMR2_IM34 /*!< Extended line 34 */
161 #endif /* EXTI_IMR2_IM34 */
162 #if defined(EXTI_IMR2_IM35)
163 #define LL_EXTI_LINE_35 EXTI_IMR2_IM35 /*!< Extended line 35 */
164 #endif /* EXTI_IMR2_IM35 */
165 #if defined(EXTI_IMR2_IM36)
166 #define LL_EXTI_LINE_36 EXTI_IMR2_IM36 /*!< Extended line 36 */
167 #endif /* EXTI_IMR2_IM36 */
168 #if defined(EXTI_IMR2_IM32) || defined(EXTI_IMR2_IM33) || defined(EXTI_IMR2_IM34) || defined(EXTI_IMR2_IM35) || defined(EXTI_IMR2_IM36)
169 #define LL_EXTI_LINE_ALL_32_63 EXTI_IMR2_IM /*!< All Extended line not reserved*/
170 #endif /* EXTI_IMR2_IM32 || EXTI_IMR2_IM33 || EXTI_IMR2_IM34 || EXTI_IMR2_IM35 || EXTI_IMR2_IM36 */
171
172 #define LL_EXTI_LINE_ALL 0xFFFFFFFFU /*!< All Extended line */
173
174 #if defined(USE_FULL_LL_DRIVER)
175 #define LL_EXTI_LINE_NONE 0x00000000U /*!< None Extended line */
176 #endif /*USE_FULL_LL_DRIVER*/
177
178 /** @defgroup EXTI_LL_EC_CONFIG_PORT EXTI CONFIG PORT
179 * @{
180 */
181 #define LL_EXTI_CONFIG_PORTA 0U /*!< EXTI PORT A */
182 #define LL_EXTI_CONFIG_PORTB EXTI_EXTICR1_EXTI0_0 /*!< EXTI PORT B */
183 #define LL_EXTI_CONFIG_PORTC EXTI_EXTICR1_EXTI0_1 /*!< EXTI PORT C */
184 #if defined(GPIOD_BASE)
185 #define LL_EXTI_CONFIG_PORTD (EXTI_EXTICR1_EXTI0_1|EXTI_EXTICR1_EXTI0_0) /*!< EXTI PORT D */
186 #endif /*GPIOD_BASE*/
187 #if defined(GPIOE_BASE)
188 #define LL_EXTI_CONFIG_PORTE EXTI_EXTICR1_EXTI0_2 /*!< EXTI PORT E */
189 #endif /*GPIOE_BASE*/
190 #define LL_EXTI_CONFIG_PORTF (EXTI_EXTICR1_EXTI0_2|EXTI_EXTICR1_EXTI0_0) /*!< EXTI PORT F */
191 /**
192 * @}
193 */
194
195 /** @defgroup EXTI_LL_EC_CONFIG_LINE EXTI CONFIG LINE
196 * @{
197 */
198 #define LL_EXTI_CONFIG_LINE0 ((0uL << LL_EXTI_REGISTER_PINPOS_SHFT) | 0U) /*!< EXTI_POSITION_0 | EXTICR[0] */
199 #define LL_EXTI_CONFIG_LINE1 ((8uL << LL_EXTI_REGISTER_PINPOS_SHFT) | 0U) /*!< EXTI_POSITION_8 | EXTICR[0] */
200 #define LL_EXTI_CONFIG_LINE2 ((16uL << LL_EXTI_REGISTER_PINPOS_SHFT) | 0U) /*!< EXTI_POSITION_16 | EXTICR[0] */
201 #define LL_EXTI_CONFIG_LINE3 ((24uL << LL_EXTI_REGISTER_PINPOS_SHFT) | 0U) /*!< EXTI_POSITION_24 | EXTICR[0] */
202 #define LL_EXTI_CONFIG_LINE4 ((0uL << LL_EXTI_REGISTER_PINPOS_SHFT) | 1U) /*!< EXTI_POSITION_0 | EXTICR[1] */
203 #define LL_EXTI_CONFIG_LINE5 ((8uL << LL_EXTI_REGISTER_PINPOS_SHFT) | 1U) /*!< EXTI_POSITION_8 | EXTICR[1] */
204 #define LL_EXTI_CONFIG_LINE6 ((16uL << LL_EXTI_REGISTER_PINPOS_SHFT) | 1U) /*!< EXTI_POSITION_16 | EXTICR[1] */
205 #define LL_EXTI_CONFIG_LINE7 ((24uL << LL_EXTI_REGISTER_PINPOS_SHFT) | 1U) /*!< EXTI_POSITION_24 | EXTICR[1] */
206 #define LL_EXTI_CONFIG_LINE8 ((0uL << LL_EXTI_REGISTER_PINPOS_SHFT) | 2U) /*!< EXTI_POSITION_0 | EXTICR[2] */
207 #define LL_EXTI_CONFIG_LINE9 ((8uL << LL_EXTI_REGISTER_PINPOS_SHFT) | 2U) /*!< EXTI_POSITION_8 | EXTICR[2] */
208 #define LL_EXTI_CONFIG_LINE10 ((16uL << LL_EXTI_REGISTER_PINPOS_SHFT) | 2U) /*!< EXTI_POSITION_16 | EXTICR[2] */
209 #define LL_EXTI_CONFIG_LINE11 ((24uL << LL_EXTI_REGISTER_PINPOS_SHFT) | 2U) /*!< EXTI_POSITION_24 | EXTICR[2] */
210 #define LL_EXTI_CONFIG_LINE12 ((0uL << LL_EXTI_REGISTER_PINPOS_SHFT) | 3U) /*!< EXTI_POSITION_0 | EXTICR[3] */
211 #define LL_EXTI_CONFIG_LINE13 ((8uL << LL_EXTI_REGISTER_PINPOS_SHFT) | 3U) /*!< EXTI_POSITION_8 | EXTICR[3] */
212 #define LL_EXTI_CONFIG_LINE14 ((16uL << LL_EXTI_REGISTER_PINPOS_SHFT) | 3U) /*!< EXTI_POSITION_16 | EXTICR[3] */
213 #define LL_EXTI_CONFIG_LINE15 ((24uL << LL_EXTI_REGISTER_PINPOS_SHFT) | 3U) /*!< EXTI_POSITION_24 | EXTICR[3] */
214 /**
215 * @}
216 */
217 /**
218 * @}
219 */
220 #if defined(USE_FULL_LL_DRIVER)
221
222 /** @defgroup EXTI_LL_EC_MODE Mode
223 * @{
224 */
225 #define LL_EXTI_MODE_IT ((uint8_t)0x00U) /*!< Interrupt Mode */
226 #define LL_EXTI_MODE_EVENT ((uint8_t)0x01U) /*!< Event Mode */
227 #define LL_EXTI_MODE_IT_EVENT ((uint8_t)0x02U) /*!< Interrupt & Event Mode */
228 /**
229 * @}
230 */
231
232 /** @defgroup EXTI_LL_EC_TRIGGER Edge Trigger
233 * @{
234 */
235 #define LL_EXTI_TRIGGER_NONE ((uint8_t)0x00U) /*!< No Trigger Mode */
236 #define LL_EXTI_TRIGGER_RISING ((uint8_t)0x01U) /*!< Trigger Rising Mode */
237 #define LL_EXTI_TRIGGER_FALLING ((uint8_t)0x02U) /*!< Trigger Falling Mode */
238 #define LL_EXTI_TRIGGER_RISING_FALLING ((uint8_t)0x03U) /*!< Trigger Rising & Falling Mode */
239
240 /**
241 * @}
242 */
243
244
245 #endif /*USE_FULL_LL_DRIVER*/
246
247
248 /**
249 * @}
250 */
251
252 /* Exported macro ------------------------------------------------------------*/
253 /** @defgroup EXTI_LL_Exported_Macros EXTI Exported Macros
254 * @{
255 */
256
257 /** @defgroup EXTI_LL_EM_WRITE_READ Common Write and read registers Macros
258 * @{
259 */
260
261 /**
262 * @brief Write a value in EXTI register
263 * @param __REG__ Register to be written
264 * @param __VALUE__ Value to be written in the register
265 * @retval None
266 */
267 #define LL_EXTI_WriteReg(__REG__, __VALUE__) WRITE_REG(EXTI->__REG__, (__VALUE__))
268
269 /**
270 * @brief Read a value in EXTI register
271 * @param __REG__ Register to be read
272 * @retval Register value
273 */
274 #define LL_EXTI_ReadReg(__REG__) READ_REG(EXTI->__REG__)
275 /**
276 * @}
277 */
278
279
280 /**
281 * @}
282 */
283
284
285
286 /* Exported functions --------------------------------------------------------*/
287 /** @defgroup EXTI_LL_Exported_Functions EXTI Exported Functions
288 * @{
289 */
290 /** @defgroup EXTI_LL_EF_IT_Management IT_Management
291 * @{
292 */
293
294 /**
295 * @brief Enable ExtiLine Interrupt request for Lines in range 0 to 31
296 * @note The reset value for the direct or internal lines (see RM)
297 * is set to 1 in order to enable the interrupt by default.
298 * Bits are set automatically at Power on.
299 * @rmtoll IMR1 IMx LL_EXTI_EnableIT_0_31
300 * @param ExtiLine This parameter can be one of the following values:
301 * @arg @ref LL_EXTI_LINE_0
302 * @arg @ref LL_EXTI_LINE_1
303 * @arg @ref LL_EXTI_LINE_2
304 * @arg @ref LL_EXTI_LINE_3
305 * @arg @ref LL_EXTI_LINE_4
306 * @arg @ref LL_EXTI_LINE_5
307 * @arg @ref LL_EXTI_LINE_6
308 * @arg @ref LL_EXTI_LINE_7
309 * @arg @ref LL_EXTI_LINE_8
310 * @arg @ref LL_EXTI_LINE_9
311 * @arg @ref LL_EXTI_LINE_10
312 * @arg @ref LL_EXTI_LINE_11
313 * @arg @ref LL_EXTI_LINE_12
314 * @arg @ref LL_EXTI_LINE_13
315 * @arg @ref LL_EXTI_LINE_14
316 * @arg @ref LL_EXTI_LINE_15
317 * @arg @ref LL_EXTI_LINE_16
318 * @arg @ref LL_EXTI_LINE_17
319 * @arg @ref LL_EXTI_LINE_18
320 * @arg @ref LL_EXTI_LINE_19
321 * @arg @ref LL_EXTI_LINE_21
322 * @arg @ref LL_EXTI_LINE_23
323 * @arg @ref LL_EXTI_LINE_25
324 * @arg @ref LL_EXTI_LINE_26
325 * @arg @ref LL_EXTI_LINE_27
326 * @arg @ref LL_EXTI_LINE_28
327 * @arg @ref LL_EXTI_LINE_29
328 * @arg @ref LL_EXTI_LINE_30
329 * @arg @ref LL_EXTI_LINE_31
330 * @arg @ref LL_EXTI_LINE_ALL_0_31
331 * @note Please check each device line mapping for EXTI Line availability
332 * @retval None
333 */
LL_EXTI_EnableIT_0_31(uint32_t ExtiLine)334 __STATIC_INLINE void LL_EXTI_EnableIT_0_31(uint32_t ExtiLine)
335 {
336 SET_BIT(EXTI->IMR1, ExtiLine);
337 }
338
339 #if defined(STM32G081xx) || defined(STM32G071xx) || defined(STM32G0C1xx) || defined(STM32G0B1xx) || defined(STM32G0B0xx)
340 /**
341 * @brief Enable ExtiLine Interrupt request for Lines in range 32 to 63
342 * @note The reset value for the direct lines (lines 32 & 33)
343 * is set to 1 in order to enable the interrupt by default.
344 * Bits are set automatically at Power on.
345 * @rmtoll IMR2 IMx LL_EXTI_EnableIT_32_63
346 * @param ExtiLine This parameter can be one of the following values:
347 * @arg @ref LL_EXTI_LINE_32
348 * @arg @ref LL_EXTI_LINE_33
349 * @arg @ref LL_EXTI_LINE_34
350 * @arg @ref LL_EXTI_LINE_35
351 * @arg @ref LL_EXTI_LINE_36
352 * @arg @ref LL_EXTI_LINE_ALL_32_63
353 * @note Please check each device line mapping for EXTI Line availability
354 * @retval None
355 */
LL_EXTI_EnableIT_32_63(uint32_t ExtiLine)356 __STATIC_INLINE void LL_EXTI_EnableIT_32_63(uint32_t ExtiLine)
357 {
358 SET_BIT(EXTI->IMR2, ExtiLine);
359 }
360 #endif /* STM32G081xx || STM32G071xx || STM32G0C1xx || STM32G0B1xx || STM32G0B0xx */
361
362 /**
363 * @brief Disable ExtiLine Interrupt request for Lines in range 0 to 31
364 * @note The reset value for the direct or internal lines (see RM)
365 * is set to 1 in order to enable the interrupt by default.
366 * Bits are set automatically at Power on.
367 * @rmtoll IMR1 IMx LL_EXTI_DisableIT_0_31
368 * @param ExtiLine This parameter can be one of the following values:
369 * @arg @ref LL_EXTI_LINE_0
370 * @arg @ref LL_EXTI_LINE_1
371 * @arg @ref LL_EXTI_LINE_2
372 * @arg @ref LL_EXTI_LINE_3
373 * @arg @ref LL_EXTI_LINE_4
374 * @arg @ref LL_EXTI_LINE_5
375 * @arg @ref LL_EXTI_LINE_6
376 * @arg @ref LL_EXTI_LINE_7
377 * @arg @ref LL_EXTI_LINE_8
378 * @arg @ref LL_EXTI_LINE_9
379 * @arg @ref LL_EXTI_LINE_10
380 * @arg @ref LL_EXTI_LINE_11
381 * @arg @ref LL_EXTI_LINE_12
382 * @arg @ref LL_EXTI_LINE_13
383 * @arg @ref LL_EXTI_LINE_14
384 * @arg @ref LL_EXTI_LINE_15
385 * @arg @ref LL_EXTI_LINE_16
386 * @arg @ref LL_EXTI_LINE_17
387 * @arg @ref LL_EXTI_LINE_18
388 * @arg @ref LL_EXTI_LINE_19
389 * @arg @ref LL_EXTI_LINE_21
390 * @arg @ref LL_EXTI_LINE_23
391 * @arg @ref LL_EXTI_LINE_25
392 * @arg @ref LL_EXTI_LINE_26
393 * @arg @ref LL_EXTI_LINE_27
394 * @arg @ref LL_EXTI_LINE_28
395 * @arg @ref LL_EXTI_LINE_29
396 * @arg @ref LL_EXTI_LINE_30
397 * @arg @ref LL_EXTI_LINE_31
398 * @arg @ref LL_EXTI_LINE_ALL_0_31
399 * @note Please check each device line mapping for EXTI Line availability
400 * @retval None
401 */
LL_EXTI_DisableIT_0_31(uint32_t ExtiLine)402 __STATIC_INLINE void LL_EXTI_DisableIT_0_31(uint32_t ExtiLine)
403 {
404 CLEAR_BIT(EXTI->IMR1, ExtiLine);
405 }
406
407 #if defined(STM32G081xx) || defined(STM32G071xx) || defined(STM32G0C1xx) || defined(STM32G0B1xx) || defined(STM32G0B0xx)
408 /**
409 * @brief Disable ExtiLine Interrupt request for Lines in range 32 to 63
410 * @note The reset value for the direct lines (lines 32 & 33)
411 * is set to 1 in order to enable the interrupt by default.
412 * Bits are set automatically at Power on.
413 * @rmtoll IMR2 IMx LL_EXTI_DisableIT_32_63
414 * @param ExtiLine This parameter can be one of the following values:
415 * @arg @ref LL_EXTI_LINE_32
416 * @arg @ref LL_EXTI_LINE_33
417 * @arg @ref LL_EXTI_LINE_34
418 * @arg @ref LL_EXTI_LINE_35
419 * @arg @ref LL_EXTI_LINE_36
420 * @arg @ref LL_EXTI_LINE_ALL_32_63
421 * @note Please check each device line mapping for EXTI Line availability
422 * @retval None
423 */
LL_EXTI_DisableIT_32_63(uint32_t ExtiLine)424 __STATIC_INLINE void LL_EXTI_DisableIT_32_63(uint32_t ExtiLine)
425 {
426 CLEAR_BIT(EXTI->IMR2, ExtiLine);
427 }
428 #endif /* STM32G081xx || STM32G071xx || STM32G0C1xx || STM32G0B1xx || STM32G0B0xx */
429
430 /**
431 * @brief Indicate if ExtiLine Interrupt request is enabled for Lines in range 0 to 31
432 * @note The reset value for the direct or internal lines (see RM)
433 * is set to 1 in order to enable the interrupt by default.
434 * Bits are set automatically at Power on.
435 * @rmtoll IMR1 IMx LL_EXTI_IsEnabledIT_0_31
436 * @param ExtiLine This parameter can be one of the following values:
437 * @arg @ref LL_EXTI_LINE_0
438 * @arg @ref LL_EXTI_LINE_1
439 * @arg @ref LL_EXTI_LINE_2
440 * @arg @ref LL_EXTI_LINE_3
441 * @arg @ref LL_EXTI_LINE_4
442 * @arg @ref LL_EXTI_LINE_5
443 * @arg @ref LL_EXTI_LINE_6
444 * @arg @ref LL_EXTI_LINE_7
445 * @arg @ref LL_EXTI_LINE_8
446 * @arg @ref LL_EXTI_LINE_9
447 * @arg @ref LL_EXTI_LINE_10
448 * @arg @ref LL_EXTI_LINE_11
449 * @arg @ref LL_EXTI_LINE_12
450 * @arg @ref LL_EXTI_LINE_13
451 * @arg @ref LL_EXTI_LINE_14
452 * @arg @ref LL_EXTI_LINE_15
453 * @arg @ref LL_EXTI_LINE_16
454 * @arg @ref LL_EXTI_LINE_17
455 * @arg @ref LL_EXTI_LINE_18
456 * @arg @ref LL_EXTI_LINE_19
457 * @arg @ref LL_EXTI_LINE_21
458 * @arg @ref LL_EXTI_LINE_23
459 * @arg @ref LL_EXTI_LINE_25
460 * @arg @ref LL_EXTI_LINE_26
461 * @arg @ref LL_EXTI_LINE_27
462 * @arg @ref LL_EXTI_LINE_28
463 * @arg @ref LL_EXTI_LINE_29
464 * @arg @ref LL_EXTI_LINE_30
465 * @arg @ref LL_EXTI_LINE_31
466 * @arg @ref LL_EXTI_LINE_ALL_0_31
467 * @note Please check each device line mapping for EXTI Line availability
468 * @retval State of bit (1 or 0).
469 */
LL_EXTI_IsEnabledIT_0_31(uint32_t ExtiLine)470 __STATIC_INLINE uint32_t LL_EXTI_IsEnabledIT_0_31(uint32_t ExtiLine)
471 {
472 return ((READ_BIT(EXTI->IMR1, ExtiLine) == (ExtiLine)) ? 1UL : 0UL);
473 }
474
475 #if defined(STM32G081xx) || defined(STM32G071xx) || defined(STM32G0C1xx) || defined(STM32G0B1xx) || defined(STM32G0B0xx)
476 /**
477 * @brief Indicate if ExtiLine Interrupt request is enabled for Lines in range 32 to 63
478 * @note The reset value for the direct lines (lines 32 & 33)
479 * is set to 1 in order to enable the interrupt by default.
480 * @rmtoll IMR2 IMx LL_EXTI_IsEnabledIT_32_63
481 * @param ExtiLine This parameter can be one of the following values:
482 * @arg @ref LL_EXTI_LINE_32
483 * @arg @ref LL_EXTI_LINE_33
484 * @arg @ref LL_EXTI_LINE_34
485 * @arg @ref LL_EXTI_LINE_35
486 * @arg @ref LL_EXTI_LINE_36
487 * @arg @ref LL_EXTI_LINE_ALL_32_63
488 * @note Please check each device line mapping for EXTI Line availability
489 * @retval State of bit (1 or 0).
490 */
LL_EXTI_IsEnabledIT_32_63(uint32_t ExtiLine)491 __STATIC_INLINE uint32_t LL_EXTI_IsEnabledIT_32_63(uint32_t ExtiLine)
492 {
493 return ((READ_BIT(EXTI->IMR2, ExtiLine) == (ExtiLine)) ? 1UL : 0UL);
494 }
495 #endif /* STM32G081xx || STM32G071xx || STM32G0C1xx || STM32G0B1xx || STM32G0B0xx */
496
497 /**
498 * @}
499 */
500
501 /** @defgroup EXTI_LL_EF_Event_Management Event_Management
502 * @{
503 */
504
505 /**
506 * @brief Enable ExtiLine Event request for Lines in range 0 to 31
507 * @rmtoll EMR1 EMx LL_EXTI_EnableEvent_0_31
508 * @param ExtiLine This parameter can be one of the following values:
509 * @arg @ref LL_EXTI_LINE_0
510 * @arg @ref LL_EXTI_LINE_1
511 * @arg @ref LL_EXTI_LINE_2
512 * @arg @ref LL_EXTI_LINE_3
513 * @arg @ref LL_EXTI_LINE_4
514 * @arg @ref LL_EXTI_LINE_5
515 * @arg @ref LL_EXTI_LINE_6
516 * @arg @ref LL_EXTI_LINE_7
517 * @arg @ref LL_EXTI_LINE_8
518 * @arg @ref LL_EXTI_LINE_9
519 * @arg @ref LL_EXTI_LINE_10
520 * @arg @ref LL_EXTI_LINE_11
521 * @arg @ref LL_EXTI_LINE_12
522 * @arg @ref LL_EXTI_LINE_13
523 * @arg @ref LL_EXTI_LINE_14
524 * @arg @ref LL_EXTI_LINE_15
525 * @arg @ref LL_EXTI_LINE_16
526 * @arg @ref LL_EXTI_LINE_17
527 * @arg @ref LL_EXTI_LINE_18
528 * @arg @ref LL_EXTI_LINE_19
529 * @arg @ref LL_EXTI_LINE_21
530 * @arg @ref LL_EXTI_LINE_23
531 * @arg @ref LL_EXTI_LINE_25
532 * @arg @ref LL_EXTI_LINE_26
533 * @arg @ref LL_EXTI_LINE_27
534 * @arg @ref LL_EXTI_LINE_28
535 * @arg @ref LL_EXTI_LINE_29
536 * @arg @ref LL_EXTI_LINE_30
537 * @arg @ref LL_EXTI_LINE_31
538 * @arg @ref LL_EXTI_LINE_ALL_0_31
539 * @note Please check each device line mapping for EXTI Line availability
540 * @retval None
541 */
LL_EXTI_EnableEvent_0_31(uint32_t ExtiLine)542 __STATIC_INLINE void LL_EXTI_EnableEvent_0_31(uint32_t ExtiLine)
543 {
544 SET_BIT(EXTI->EMR1, ExtiLine);
545
546 }
547
548 #if defined(STM32G081xx) || defined(STM32G071xx) || defined(STM32G0C1xx) || defined(STM32G0B1xx) || defined(STM32G0B0xx)
549 /**
550 * @brief Enable ExtiLine Event request for Lines in range 32 to 63
551 * @rmtoll EMR2 EMx LL_EXTI_EnableEvent_32_63
552 * @param ExtiLine This parameter can be a combination of the following values:
553 * @arg @ref LL_EXTI_LINE_32
554 * @arg @ref LL_EXTI_LINE_33
555 * @arg @ref LL_EXTI_LINE_34
556 * @arg @ref LL_EXTI_LINE_35
557 * @arg @ref LL_EXTI_LINE_36
558 * @arg @ref LL_EXTI_LINE_ALL_32_63
559 * @note Please check each device line mapping for EXTI Line availability
560 * @retval None
561 */
LL_EXTI_EnableEvent_32_63(uint32_t ExtiLine)562 __STATIC_INLINE void LL_EXTI_EnableEvent_32_63(uint32_t ExtiLine)
563 {
564 SET_BIT(EXTI->EMR2, ExtiLine);
565 }
566 #endif /* STM32G081xx || STM32G071xx || STM32G0C1xx || STM32G0B1xx || STM32G0B0xx */
567 /**
568 * @brief Disable ExtiLine Event request for Lines in range 0 to 31
569 * @rmtoll EMR1 EMx LL_EXTI_DisableEvent_0_31
570 * @param ExtiLine This parameter can be one of the following values:
571 * @arg @ref LL_EXTI_LINE_0
572 * @arg @ref LL_EXTI_LINE_1
573 * @arg @ref LL_EXTI_LINE_2
574 * @arg @ref LL_EXTI_LINE_3
575 * @arg @ref LL_EXTI_LINE_4
576 * @arg @ref LL_EXTI_LINE_5
577 * @arg @ref LL_EXTI_LINE_6
578 * @arg @ref LL_EXTI_LINE_7
579 * @arg @ref LL_EXTI_LINE_8
580 * @arg @ref LL_EXTI_LINE_9
581 * @arg @ref LL_EXTI_LINE_10
582 * @arg @ref LL_EXTI_LINE_11
583 * @arg @ref LL_EXTI_LINE_12
584 * @arg @ref LL_EXTI_LINE_13
585 * @arg @ref LL_EXTI_LINE_14
586 * @arg @ref LL_EXTI_LINE_15
587 * @arg @ref LL_EXTI_LINE_16
588 * @arg @ref LL_EXTI_LINE_17
589 * @arg @ref LL_EXTI_LINE_18
590 * @arg @ref LL_EXTI_LINE_19
591 * @arg @ref LL_EXTI_LINE_21
592 * @arg @ref LL_EXTI_LINE_23
593 * @arg @ref LL_EXTI_LINE_25
594 * @arg @ref LL_EXTI_LINE_26
595 * @arg @ref LL_EXTI_LINE_27
596 * @arg @ref LL_EXTI_LINE_28
597 * @arg @ref LL_EXTI_LINE_29
598 * @arg @ref LL_EXTI_LINE_30
599 * @arg @ref LL_EXTI_LINE_31
600 * @arg @ref LL_EXTI_LINE_ALL_0_31
601 * @note Please check each device line mapping for EXTI Line availability
602 * @retval None
603 */
LL_EXTI_DisableEvent_0_31(uint32_t ExtiLine)604 __STATIC_INLINE void LL_EXTI_DisableEvent_0_31(uint32_t ExtiLine)
605 {
606 CLEAR_BIT(EXTI->EMR1, ExtiLine);
607 }
608
609 #if defined(STM32G081xx) || defined(STM32G071xx) || defined(STM32G0C1xx) || defined(STM32G0B1xx) || defined(STM32G0B0xx)
610 /**
611 * @brief Disable ExtiLine Event request for Lines in range 32 to 63
612 * @rmtoll EMR2 EMx LL_EXTI_DisableEvent_32_63
613 * @param ExtiLine This parameter can be a combination of the following values:
614 * @arg @ref LL_EXTI_LINE_32
615 * @arg @ref LL_EXTI_LINE_33
616 * @arg @ref LL_EXTI_LINE_34
617 * @arg @ref LL_EXTI_LINE_35
618 * @arg @ref LL_EXTI_LINE_36
619 * @arg @ref LL_EXTI_LINE_ALL_32_63
620 * @note Please check each device line mapping for EXTI Line availability
621 * @retval None
622 */
LL_EXTI_DisableEvent_32_63(uint32_t ExtiLine)623 __STATIC_INLINE void LL_EXTI_DisableEvent_32_63(uint32_t ExtiLine)
624 {
625 CLEAR_BIT(EXTI->EMR2, ExtiLine);
626 }
627 #endif
628 /**
629 * @brief Indicate if ExtiLine Event request is enabled for Lines in range 0 to 31
630 * @rmtoll EMR1 EMx LL_EXTI_IsEnabledEvent_0_31
631 * @param ExtiLine This parameter can be one of the following values:
632 * @arg @ref LL_EXTI_LINE_0
633 * @arg @ref LL_EXTI_LINE_1
634 * @arg @ref LL_EXTI_LINE_2
635 * @arg @ref LL_EXTI_LINE_3
636 * @arg @ref LL_EXTI_LINE_4
637 * @arg @ref LL_EXTI_LINE_5
638 * @arg @ref LL_EXTI_LINE_6
639 * @arg @ref LL_EXTI_LINE_7
640 * @arg @ref LL_EXTI_LINE_8
641 * @arg @ref LL_EXTI_LINE_9
642 * @arg @ref LL_EXTI_LINE_10
643 * @arg @ref LL_EXTI_LINE_11
644 * @arg @ref LL_EXTI_LINE_12
645 * @arg @ref LL_EXTI_LINE_13
646 * @arg @ref LL_EXTI_LINE_14
647 * @arg @ref LL_EXTI_LINE_15
648 * @arg @ref LL_EXTI_LINE_16
649 * @arg @ref LL_EXTI_LINE_17
650 * @arg @ref LL_EXTI_LINE_18
651 * @arg @ref LL_EXTI_LINE_19
652 * @arg @ref LL_EXTI_LINE_21
653 * @arg @ref LL_EXTI_LINE_23
654 * @arg @ref LL_EXTI_LINE_25
655 * @arg @ref LL_EXTI_LINE_26
656 * @arg @ref LL_EXTI_LINE_27
657 * @arg @ref LL_EXTI_LINE_28
658 * @arg @ref LL_EXTI_LINE_29
659 * @arg @ref LL_EXTI_LINE_30
660 * @arg @ref LL_EXTI_LINE_31
661 * @arg @ref LL_EXTI_LINE_ALL_0_31
662 * @note Please check each device line mapping for EXTI Line availability
663 * @retval State of bit (1 or 0).
664 */
LL_EXTI_IsEnabledEvent_0_31(uint32_t ExtiLine)665 __STATIC_INLINE uint32_t LL_EXTI_IsEnabledEvent_0_31(uint32_t ExtiLine)
666 {
667 return ((READ_BIT(EXTI->EMR1, ExtiLine) == (ExtiLine)) ? 1UL : 0UL);
668 }
669
670 #if defined(STM32G081xx) || defined(STM32G071xx) || defined(STM32G0C1xx) || defined(STM32G0B1xx) || defined(STM32G0B0xx)
671 /**
672 * @brief Indicate if ExtiLine Event request is enabled for Lines in range 32 to 63
673 * @rmtoll EMR2 EMx LL_EXTI_IsEnabledEvent_32_63
674 * @param ExtiLine This parameter can be a combination of the following values:
675 * @arg @ref LL_EXTI_LINE_32
676 * @arg @ref LL_EXTI_LINE_33
677 * @arg @ref LL_EXTI_LINE_34
678 * @arg @ref LL_EXTI_LINE_35
679 * @arg @ref LL_EXTI_LINE_36
680 * @arg @ref LL_EXTI_LINE_ALL_32_63
681 * @note Please check each device line mapping for EXTI Line availability
682 * @retval State of bit (1 or 0).
683 */
LL_EXTI_IsEnabledEvent_32_63(uint32_t ExtiLine)684 __STATIC_INLINE uint32_t LL_EXTI_IsEnabledEvent_32_63(uint32_t ExtiLine)
685 {
686 return ((READ_BIT(EXTI->EMR2, ExtiLine) == (ExtiLine)) ? 1UL : 0UL);
687 }
688 #endif /* STM32G081xx || STM32G071xx || STM32G0C1xx || STM32G0B1xx || STM32G0B0xx */
689
690 /**
691 * @}
692 */
693
694 /** @defgroup EXTI_LL_EF_Rising_Trigger_Management Rising_Trigger_Management
695 * @{
696 */
697
698 /**
699 * @brief Enable ExtiLine Rising Edge Trigger for Lines in range 0 to 31
700 * @note The configurable wakeup lines are edge-triggered. No glitch must be
701 * generated on these lines. If a rising edge on a configurable interrupt
702 * line occurs during a write operation in the EXTI_RTSR register, the
703 * pending bit is not set.
704 * Rising and falling edge triggers can be set for
705 * the same interrupt line. In this case, both generate a trigger
706 * condition.
707 * @rmtoll RTSR1 RTx LL_EXTI_EnableRisingTrig_0_31
708 * @param ExtiLine This parameter can be a combination of the following values:
709 * @arg @ref LL_EXTI_LINE_0
710 * @arg @ref LL_EXTI_LINE_1
711 * @arg @ref LL_EXTI_LINE_2
712 * @arg @ref LL_EXTI_LINE_3
713 * @arg @ref LL_EXTI_LINE_4
714 * @arg @ref LL_EXTI_LINE_5
715 * @arg @ref LL_EXTI_LINE_6
716 * @arg @ref LL_EXTI_LINE_7
717 * @arg @ref LL_EXTI_LINE_8
718 * @arg @ref LL_EXTI_LINE_9
719 * @arg @ref LL_EXTI_LINE_10
720 * @arg @ref LL_EXTI_LINE_11
721 * @arg @ref LL_EXTI_LINE_12
722 * @arg @ref LL_EXTI_LINE_13
723 * @arg @ref LL_EXTI_LINE_14
724 * @arg @ref LL_EXTI_LINE_15
725 * @arg @ref LL_EXTI_LINE_16
726 * @arg @ref LL_EXTI_LINE_17
727 * @arg @ref LL_EXTI_LINE_18
728 * @arg @ref LL_EXTI_LINE_20
729 * @note Please check each device line mapping for EXTI Line availability
730 * @retval None
731 */
LL_EXTI_EnableRisingTrig_0_31(uint32_t ExtiLine)732 __STATIC_INLINE void LL_EXTI_EnableRisingTrig_0_31(uint32_t ExtiLine)
733 {
734 SET_BIT(EXTI->RTSR1, ExtiLine);
735
736 }
737 #if defined(STM32G0C1xx) || defined(STM32G0B1xx)
738 /**
739 * @brief Enable ExtiLine Rising Edge Trigger for Lines in range 32 to 63
740 * @note The configurable wakeup lines are edge-triggered. No glitch must be
741 * generated on these lines. If a rising edge on a configurable interrupt
742 * line occurs during a write operation in the EXTI_RTSR register, the
743 * pending bit is not set.
744 * Rising and falling edge triggers can be set for
745 * the same interrupt line. In this case, both generate a trigger
746 * condition.
747 * @rmtoll RTSR2 RTx LL_EXTI_EnableRisingTrig_32_63
748 * @param ExtiLine This parameter can be a combination of the following values:
749 * @arg @ref LL_EXTI_LINE_34
750 * @note Please check each device line mapping for EXTI Line availability
751 * @retval None
752 */
LL_EXTI_EnableRisingTrig_32_63(uint32_t ExtiLine)753 __STATIC_INLINE void LL_EXTI_EnableRisingTrig_32_63(uint32_t ExtiLine)
754 {
755 SET_BIT(EXTI->RTSR2, ExtiLine);
756
757 }
758 #endif /* STM32G0C1xx || STM32G0B1xx */
759
760 /**
761 * @brief Disable ExtiLine Rising Edge Trigger for Lines in range 0 to 31
762 * @note The configurable wakeup lines are edge-triggered. No glitch must be
763 * generated on these lines. If a rising edge on a configurable interrupt
764 * line occurs during a write operation in the EXTI_RTSR register, the
765 * pending bit is not set.
766 * Rising and falling edge triggers can be set for
767 * the same interrupt line. In this case, both generate a trigger
768 * condition.
769 * @rmtoll RTSR1 RTx LL_EXTI_DisableRisingTrig_0_31
770 * @param ExtiLine This parameter can be a combination of the following values:
771 * @arg @ref LL_EXTI_LINE_0
772 * @arg @ref LL_EXTI_LINE_1
773 * @arg @ref LL_EXTI_LINE_2
774 * @arg @ref LL_EXTI_LINE_3
775 * @arg @ref LL_EXTI_LINE_4
776 * @arg @ref LL_EXTI_LINE_5
777 * @arg @ref LL_EXTI_LINE_6
778 * @arg @ref LL_EXTI_LINE_7
779 * @arg @ref LL_EXTI_LINE_8
780 * @arg @ref LL_EXTI_LINE_9
781 * @arg @ref LL_EXTI_LINE_10
782 * @arg @ref LL_EXTI_LINE_11
783 * @arg @ref LL_EXTI_LINE_12
784 * @arg @ref LL_EXTI_LINE_13
785 * @arg @ref LL_EXTI_LINE_14
786 * @arg @ref LL_EXTI_LINE_15
787 * @arg @ref LL_EXTI_LINE_16
788 * @arg @ref LL_EXTI_LINE_17
789 * @arg @ref LL_EXTI_LINE_18
790 * @arg @ref LL_EXTI_LINE_20
791 * @note Please check each device line mapping for EXTI Line availability
792 * @retval None
793 */
LL_EXTI_DisableRisingTrig_0_31(uint32_t ExtiLine)794 __STATIC_INLINE void LL_EXTI_DisableRisingTrig_0_31(uint32_t ExtiLine)
795 {
796 CLEAR_BIT(EXTI->RTSR1, ExtiLine);
797
798 }
799
800 #if defined(STM32G0C1xx) || defined(STM32G0B1xx)
801 /**
802 * @brief Disable ExtiLine Rising Edge Trigger for Lines in range 32 to 63
803 * @note The configurable wakeup lines are edge-triggered. No glitch must be
804 * generated on these lines. If a rising edge on a configurable interrupt
805 * line occurs during a write operation in the EXTI_RTSR register, the
806 * pending bit is not set.
807 * Rising and falling edge triggers can be set for
808 * the same interrupt line. In this case, both generate a trigger
809 * condition.
810 * @rmtoll RTSR2 RTx LL_EXTI_DisableRisingTrig_32_63
811 * @param ExtiLine This parameter can be a combination of the following values:
812 * @arg @ref LL_EXTI_LINE_34
813 * @note Please check each device line mapping for EXTI Line availability
814 * @retval None
815 */
LL_EXTI_DisableRisingTrig_32_63(uint32_t ExtiLine)816 __STATIC_INLINE void LL_EXTI_DisableRisingTrig_32_63(uint32_t ExtiLine)
817 {
818 CLEAR_BIT(EXTI->RTSR2, ExtiLine);
819
820 }
821 #endif /* STM32G0C1xx || STM32G0B1xx */
822
823 /**
824 * @brief Check if rising edge trigger is enabled for Lines in range 0 to 31
825 * @rmtoll RTSR1 RTx LL_EXTI_IsEnabledRisingTrig_0_31
826 * @param ExtiLine This parameter can be a combination of the following values:
827 * @arg @ref LL_EXTI_LINE_0
828 * @arg @ref LL_EXTI_LINE_1
829 * @arg @ref LL_EXTI_LINE_2
830 * @arg @ref LL_EXTI_LINE_3
831 * @arg @ref LL_EXTI_LINE_4
832 * @arg @ref LL_EXTI_LINE_5
833 * @arg @ref LL_EXTI_LINE_6
834 * @arg @ref LL_EXTI_LINE_7
835 * @arg @ref LL_EXTI_LINE_8
836 * @arg @ref LL_EXTI_LINE_9
837 * @arg @ref LL_EXTI_LINE_10
838 * @arg @ref LL_EXTI_LINE_11
839 * @arg @ref LL_EXTI_LINE_12
840 * @arg @ref LL_EXTI_LINE_13
841 * @arg @ref LL_EXTI_LINE_14
842 * @arg @ref LL_EXTI_LINE_15
843 * @arg @ref LL_EXTI_LINE_16
844 * @arg @ref LL_EXTI_LINE_17
845 * @arg @ref LL_EXTI_LINE_20
846 * @note Please check each device line mapping for EXTI Line availability
847 * @retval State of bit (1 or 0).
848 */
LL_EXTI_IsEnabledRisingTrig_0_31(uint32_t ExtiLine)849 __STATIC_INLINE uint32_t LL_EXTI_IsEnabledRisingTrig_0_31(uint32_t ExtiLine)
850 {
851 return ((READ_BIT(EXTI->RTSR1, ExtiLine) == (ExtiLine)) ? 1UL : 0UL);
852 }
853
854 #if defined(STM32G0C1xx) || defined(STM32G0B1xx)
855 /**
856 * @brief Check if rising edge trigger is enabled for Lines in range 32 to 63
857 * @rmtoll RTSR2 RTx LL_EXTI_IsEnabledRisingTrig_32_63
858 * @param ExtiLine This parameter can be a combination of the following values:
859 * @arg @ref LL_EXTI_LINE_34
860 * @note Please check each device line mapping for EXTI Line availability
861 * @retval State of bit (1 or 0).
862 */
LL_EXTI_IsEnabledRisingTrig_32_63(uint32_t ExtiLine)863 __STATIC_INLINE uint32_t LL_EXTI_IsEnabledRisingTrig_32_63(uint32_t ExtiLine)
864 {
865 return ((READ_BIT(EXTI->RTSR2, ExtiLine) == (ExtiLine)) ? 1UL : 0UL);
866 }
867 #endif /* STM32G0C1xx || STM32G0B1xx */
868
869 /**
870 * @}
871 */
872
873 /** @defgroup EXTI_LL_EF_Falling_Trigger_Management Falling_Trigger_Management
874 * @{
875 */
876
877 /**
878 * @brief Enable ExtiLine Falling Edge Trigger for Lines in range 0 to 31
879 * @note The configurable wakeup lines are edge-triggered. No glitch must be
880 * generated on these lines. If a falling edge on a configurable interrupt
881 * line occurs during a write operation in the EXTI_FTSR register, the
882 * pending bit is not set.
883 * Rising and falling edge triggers can be set for
884 * the same interrupt line. In this case, both generate a trigger
885 * condition.
886 * @rmtoll FTSR1 FTx LL_EXTI_EnableFallingTrig_0_31
887 * @param ExtiLine This parameter can be a combination of the following values:
888 * @arg @ref LL_EXTI_LINE_0
889 * @arg @ref LL_EXTI_LINE_1
890 * @arg @ref LL_EXTI_LINE_2
891 * @arg @ref LL_EXTI_LINE_3
892 * @arg @ref LL_EXTI_LINE_4
893 * @arg @ref LL_EXTI_LINE_5
894 * @arg @ref LL_EXTI_LINE_6
895 * @arg @ref LL_EXTI_LINE_7
896 * @arg @ref LL_EXTI_LINE_8
897 * @arg @ref LL_EXTI_LINE_9
898 * @arg @ref LL_EXTI_LINE_10
899 * @arg @ref LL_EXTI_LINE_11
900 * @arg @ref LL_EXTI_LINE_12
901 * @arg @ref LL_EXTI_LINE_13
902 * @arg @ref LL_EXTI_LINE_14
903 * @arg @ref LL_EXTI_LINE_15
904 * @arg @ref LL_EXTI_LINE_16
905 * @arg @ref LL_EXTI_LINE_17
906 * @arg @ref LL_EXTI_LINE_18
907 * @arg @ref LL_EXTI_LINE_20
908 * @note Please check each device line mapping for EXTI Line availability
909 * @retval None
910 */
LL_EXTI_EnableFallingTrig_0_31(uint32_t ExtiLine)911 __STATIC_INLINE void LL_EXTI_EnableFallingTrig_0_31(uint32_t ExtiLine)
912 {
913 SET_BIT(EXTI->FTSR1, ExtiLine);
914 }
915
916 #if defined(STM32G0C1xx) || defined(STM32G0B1xx)
917 /**
918 * @brief Enable ExtiLine Falling Edge Trigger for Lines in range 32 to 63
919 * @note The configurable wakeup lines are edge-triggered. No glitch must be
920 * generated on these lines. If a falling edge on a configurable interrupt
921 * line occurs during a write operation in the EXTI_FTSR register, the
922 * pending bit is not set.
923 * Rising and falling edge triggers can be set for
924 * the same interrupt line. In this case, both generate a trigger
925 * condition.
926 * @rmtoll FTSR2 FTx LL_EXTI_EnableFallingTrig_32_63
927 * @param ExtiLine This parameter can be a combination of the following values:
928 * @arg @ref LL_EXTI_LINE_34
929 * @note Please check each device line mapping for EXTI Line availability
930 * @retval None
931 */
LL_EXTI_EnableFallingTrig_32_63(uint32_t ExtiLine)932 __STATIC_INLINE void LL_EXTI_EnableFallingTrig_32_63(uint32_t ExtiLine)
933 {
934 SET_BIT(EXTI->FTSR2, ExtiLine);
935 }
936 #endif /* STM32G0C1xx || STM32G0B1xx */
937
938 /**
939 * @brief Disable ExtiLine Falling Edge Trigger for Lines in range 0 to 31
940 * @note The configurable wakeup lines are edge-triggered. No glitch must be
941 * generated on these lines. If a Falling edge on a configurable interrupt
942 * line occurs during a write operation in the EXTI_FTSR register, the
943 * pending bit is not set.
944 * Rising and falling edge triggers can be set for the same interrupt line.
945 * In this case, both generate a trigger condition.
946 * @rmtoll FTSR1 FTx LL_EXTI_DisableFallingTrig_0_31
947 * @param ExtiLine This parameter can be a combination of the following values:
948 * @arg @ref LL_EXTI_LINE_0
949 * @arg @ref LL_EXTI_LINE_1
950 * @arg @ref LL_EXTI_LINE_2
951 * @arg @ref LL_EXTI_LINE_3
952 * @arg @ref LL_EXTI_LINE_4
953 * @arg @ref LL_EXTI_LINE_5
954 * @arg @ref LL_EXTI_LINE_6
955 * @arg @ref LL_EXTI_LINE_7
956 * @arg @ref LL_EXTI_LINE_8
957 * @arg @ref LL_EXTI_LINE_9
958 * @arg @ref LL_EXTI_LINE_10
959 * @arg @ref LL_EXTI_LINE_11
960 * @arg @ref LL_EXTI_LINE_12
961 * @arg @ref LL_EXTI_LINE_13
962 * @arg @ref LL_EXTI_LINE_14
963 * @arg @ref LL_EXTI_LINE_15
964 * @arg @ref LL_EXTI_LINE_16
965 * @arg @ref LL_EXTI_LINE_17
966 * @arg @ref LL_EXTI_LINE_18
967 * @arg @ref LL_EXTI_LINE_20
968 * @note Please check each device line mapping for EXTI Line availability
969 * @retval None
970 */
LL_EXTI_DisableFallingTrig_0_31(uint32_t ExtiLine)971 __STATIC_INLINE void LL_EXTI_DisableFallingTrig_0_31(uint32_t ExtiLine)
972 {
973 CLEAR_BIT(EXTI->FTSR1, ExtiLine);
974 }
975
976 #if defined(STM32G0C1xx) || defined(STM32G0B1xx)
977 /**
978 * @brief Disable ExtiLine Falling Edge Trigger for Lines in range 32 to 63
979 * @note The configurable wakeup lines are edge-triggered. No glitch must be
980 * generated on these lines. If a Falling edge on a configurable interrupt
981 * line occurs during a write operation in the EXTI_FTSR register, the
982 * pending bit is not set.
983 * Rising and falling edge triggers can be set for the same interrupt line.
984 * In this case, both generate a trigger condition.
985 * @rmtoll FTSR2 FTx LL_EXTI_DisableFallingTrig_32_63
986 * @param ExtiLine This parameter can be a combination of the following values:
987 * @arg @ref LL_EXTI_LINE_34
988 * @note Please check each device line mapping for EXTI Line availability
989 * @retval None
990 */
LL_EXTI_DisableFallingTrig_32_63(uint32_t ExtiLine)991 __STATIC_INLINE void LL_EXTI_DisableFallingTrig_32_63(uint32_t ExtiLine)
992 {
993 CLEAR_BIT(EXTI->FTSR2, ExtiLine);
994 }
995 #endif /* STM32G0C1xx || STM32G0B1xx */
996
997 /**
998 * @brief Check if falling edge trigger is enabled for Lines in range 0 to 31
999 * @rmtoll FTSR1 FTx LL_EXTI_IsEnabledFallingTrig_0_31
1000 * @param ExtiLine This parameter can be a combination of the following values:
1001 * @arg @ref LL_EXTI_LINE_0
1002 * @arg @ref LL_EXTI_LINE_1
1003 * @arg @ref LL_EXTI_LINE_2
1004 * @arg @ref LL_EXTI_LINE_3
1005 * @arg @ref LL_EXTI_LINE_4
1006 * @arg @ref LL_EXTI_LINE_5
1007 * @arg @ref LL_EXTI_LINE_6
1008 * @arg @ref LL_EXTI_LINE_7
1009 * @arg @ref LL_EXTI_LINE_8
1010 * @arg @ref LL_EXTI_LINE_9
1011 * @arg @ref LL_EXTI_LINE_10
1012 * @arg @ref LL_EXTI_LINE_11
1013 * @arg @ref LL_EXTI_LINE_12
1014 * @arg @ref LL_EXTI_LINE_13
1015 * @arg @ref LL_EXTI_LINE_14
1016 * @arg @ref LL_EXTI_LINE_15
1017 * @arg @ref LL_EXTI_LINE_16
1018 * @arg @ref LL_EXTI_LINE_17
1019 * @arg @ref LL_EXTI_LINE_18
1020 * @arg @ref LL_EXTI_LINE_20
1021 * @note Please check each device line mapping for EXTI Line availability
1022 * @retval State of bit (1 or 0).
1023 */
LL_EXTI_IsEnabledFallingTrig_0_31(uint32_t ExtiLine)1024 __STATIC_INLINE uint32_t LL_EXTI_IsEnabledFallingTrig_0_31(uint32_t ExtiLine)
1025 {
1026 return ((READ_BIT(EXTI->FTSR1, ExtiLine) == (ExtiLine)) ? 1UL : 0UL);
1027 }
1028
1029 #if defined(STM32G0C1xx) || defined(STM32G0B1xx)
1030 /**
1031 * @brief Check if falling edge trigger is enabled for Lines in range 32 to 63
1032 * @rmtoll FTSR2 FTx LL_EXTI_IsEnabledFallingTrig_32_63
1033 * @param ExtiLine This parameter can be a combination of the following values:
1034 * @arg @ref LL_EXTI_LINE_34
1035 * @note Please check each device line mapping for EXTI Line availability
1036 * @retval State of bit (1 or 0).
1037 */
LL_EXTI_IsEnabledFallingTrig_32_63(uint32_t ExtiLine)1038 __STATIC_INLINE uint32_t LL_EXTI_IsEnabledFallingTrig_32_63(uint32_t ExtiLine)
1039 {
1040 return ((READ_BIT(EXTI->FTSR2, ExtiLine) == (ExtiLine)) ? 1UL : 0UL);
1041 }
1042 #endif /* STM32G0C1xx || STM32G0B1xx */
1043 /**
1044 * @}
1045 */
1046
1047 /** @defgroup EXTI_LL_EF_Software_Interrupt_Management Software_Interrupt_Management
1048 * @{
1049 */
1050
1051 /**
1052 * @brief Generate a software Interrupt Event for Lines in range 0 to 31
1053 * @note If the interrupt is enabled on this line in the EXTI_IMR, writing a 1 to
1054 * this bit when it is at '0' sets the corresponding pending bit in EXTI_PR
1055 * resulting in an interrupt request generation.
1056 * This bit is cleared by clearing the corresponding bit in the EXTI_PR
1057 * register (by writing a 1 into the bit)
1058 * @rmtoll SWIER1 SWIx LL_EXTI_GenerateSWI_0_31
1059 * @param ExtiLine This parameter can be a combination of the following values:
1060 * @arg @ref LL_EXTI_LINE_0
1061 * @arg @ref LL_EXTI_LINE_1
1062 * @arg @ref LL_EXTI_LINE_2
1063 * @arg @ref LL_EXTI_LINE_3
1064 * @arg @ref LL_EXTI_LINE_4
1065 * @arg @ref LL_EXTI_LINE_5
1066 * @arg @ref LL_EXTI_LINE_6
1067 * @arg @ref LL_EXTI_LINE_7
1068 * @arg @ref LL_EXTI_LINE_8
1069 * @arg @ref LL_EXTI_LINE_9
1070 * @arg @ref LL_EXTI_LINE_10
1071 * @arg @ref LL_EXTI_LINE_11
1072 * @arg @ref LL_EXTI_LINE_12
1073 * @arg @ref LL_EXTI_LINE_13
1074 * @arg @ref LL_EXTI_LINE_14
1075 * @arg @ref LL_EXTI_LINE_15
1076 * @arg @ref LL_EXTI_LINE_16
1077 * @arg @ref LL_EXTI_LINE_17
1078 * @arg @ref LL_EXTI_LINE_18
1079 * @arg @ref LL_EXTI_LINE_20
1080 * @note Please check each device line mapping for EXTI Line availability
1081 * @retval None
1082 */
LL_EXTI_GenerateSWI_0_31(uint32_t ExtiLine)1083 __STATIC_INLINE void LL_EXTI_GenerateSWI_0_31(uint32_t ExtiLine)
1084 {
1085 SET_BIT(EXTI->SWIER1, ExtiLine);
1086 }
1087
1088 #if defined(STM32G0C1xx) || defined(STM32G0B1xx)
1089 /**
1090 * @brief Generate a software Interrupt Event for Lines in range 32 to 63
1091 * @note If the interrupt is enabled on this line in the EXTI_IMR, writing a 1 to
1092 * this bit when it is at '0' sets the corresponding pending bit in EXTI_PR
1093 * resulting in an interrupt request generation.
1094 * This bit is cleared by clearing the corresponding bit in the EXTI_PR
1095 * register (by writing a 1 into the bit)
1096 * @rmtoll SWIER2 SWIx LL_EXTI_GenerateSWI_32_63
1097 * @param ExtiLine This parameter can be a combination of the following values:
1098 * @arg @ref LL_EXTI_LINE_34
1099 * @note Please check each device line mapping for EXTI Line availability
1100 * @retval None
1101 */
LL_EXTI_GenerateSWI_32_63(uint32_t ExtiLine)1102 __STATIC_INLINE void LL_EXTI_GenerateSWI_32_63(uint32_t ExtiLine)
1103 {
1104 SET_BIT(EXTI->SWIER2, ExtiLine);
1105 }
1106 #endif /* STM32G0C1xx || STM32G0B1xx */
1107
1108 /**
1109 * @}
1110 */
1111
1112 /** @defgroup EXTI_LL_EF_Flag_Management Flag_Management
1113 * @{
1114 */
1115
1116 /**
1117 * @brief Check if the ExtLine Falling Flag is set or not for Lines in range 0 to 31
1118 * @note This bit is set when the falling edge event arrives on the interrupt
1119 * line. This bit is cleared by writing a 1 to the bit.
1120 * @rmtoll FPR1 FPIFx LL_EXTI_IsActiveFallingFlag_0_31
1121 * @param ExtiLine This parameter can be a combination of the following values:
1122 * @arg @ref LL_EXTI_LINE_0
1123 * @arg @ref LL_EXTI_LINE_1
1124 * @arg @ref LL_EXTI_LINE_2
1125 * @arg @ref LL_EXTI_LINE_3
1126 * @arg @ref LL_EXTI_LINE_4
1127 * @arg @ref LL_EXTI_LINE_5
1128 * @arg @ref LL_EXTI_LINE_6
1129 * @arg @ref LL_EXTI_LINE_7
1130 * @arg @ref LL_EXTI_LINE_8
1131 * @arg @ref LL_EXTI_LINE_9
1132 * @arg @ref LL_EXTI_LINE_10
1133 * @arg @ref LL_EXTI_LINE_11
1134 * @arg @ref LL_EXTI_LINE_12
1135 * @arg @ref LL_EXTI_LINE_13
1136 * @arg @ref LL_EXTI_LINE_14
1137 * @arg @ref LL_EXTI_LINE_15
1138 * @arg @ref LL_EXTI_LINE_16
1139 * @arg @ref LL_EXTI_LINE_17
1140 * @arg @ref LL_EXTI_LINE_18
1141 * @arg @ref LL_EXTI_LINE_20
1142 * @note Please check each device line mapping for EXTI Line availability
1143 * @retval State of bit (1 or 0).
1144 */
LL_EXTI_IsActiveFallingFlag_0_31(uint32_t ExtiLine)1145 __STATIC_INLINE uint32_t LL_EXTI_IsActiveFallingFlag_0_31(uint32_t ExtiLine)
1146 {
1147 return ((READ_BIT(EXTI->FPR1, ExtiLine) == (ExtiLine)) ? 1UL : 0UL);
1148 }
1149
1150 #if defined(STM32G0C1xx) || defined(STM32G0B1xx)
1151 /**
1152 * @brief Check if the ExtLine Falling Flag is set or not for Lines in range 32 to 63
1153 * @note This bit is set when the falling edge event arrives on the interrupt
1154 * line. This bit is cleared by writing a 1 to the bit.
1155 * @rmtoll FPR2 FPIFx LL_EXTI_IsActiveFallingFlag_32_63
1156 * @param ExtiLine This parameter can be a combination of the following values:
1157 * @arg @ref LL_EXTI_LINE_34
1158 * @note Please check each device line mapping for EXTI Line availability
1159 * @retval State of bit (1 or 0).
1160 */
LL_EXTI_IsActiveFallingFlag_32_63(uint32_t ExtiLine)1161 __STATIC_INLINE uint32_t LL_EXTI_IsActiveFallingFlag_32_63(uint32_t ExtiLine)
1162 {
1163 return ((READ_BIT(EXTI->FPR2, ExtiLine) == (ExtiLine)) ? 1UL : 0UL);
1164 }
1165 #endif /* STM32G0C1xx || STM32G0B1xx */
1166
1167 /**
1168 * @brief Read ExtLine Combination Falling Flag for Lines in range 0 to 31
1169 * @note This bit is set when the falling edge event arrives on the interrupt
1170 * line. This bit is cleared by writing a 1 to the bit.
1171 * @rmtoll FPR1 FPIFx LL_EXTI_ReadFallingFlag_0_31
1172 * @param ExtiLine This parameter can be a combination of the following values:
1173 * @arg @ref LL_EXTI_LINE_0
1174 * @arg @ref LL_EXTI_LINE_1
1175 * @arg @ref LL_EXTI_LINE_2
1176 * @arg @ref LL_EXTI_LINE_3
1177 * @arg @ref LL_EXTI_LINE_4
1178 * @arg @ref LL_EXTI_LINE_5
1179 * @arg @ref LL_EXTI_LINE_6
1180 * @arg @ref LL_EXTI_LINE_7
1181 * @arg @ref LL_EXTI_LINE_8
1182 * @arg @ref LL_EXTI_LINE_9
1183 * @arg @ref LL_EXTI_LINE_10
1184 * @arg @ref LL_EXTI_LINE_11
1185 * @arg @ref LL_EXTI_LINE_12
1186 * @arg @ref LL_EXTI_LINE_13
1187 * @arg @ref LL_EXTI_LINE_14
1188 * @arg @ref LL_EXTI_LINE_15
1189 * @arg @ref LL_EXTI_LINE_16
1190 * @arg @ref LL_EXTI_LINE_17
1191 * @arg @ref LL_EXTI_LINE_18
1192 * @arg @ref LL_EXTI_LINE_20
1193 * @note Please check each device line mapping for EXTI Line availability
1194 * @retval @note This bit is set when the selected edge event arrives on the interrupt
1195 */
LL_EXTI_ReadFallingFlag_0_31(uint32_t ExtiLine)1196 __STATIC_INLINE uint32_t LL_EXTI_ReadFallingFlag_0_31(uint32_t ExtiLine)
1197 {
1198 return (READ_BIT(EXTI->FPR1, ExtiLine));
1199 }
1200
1201 #if defined(STM32G0C1xx) || defined(STM32G0B1xx)
1202 /**
1203 * @brief Read ExtLine Combination Falling Flag for Lines in range 32 to 63
1204 * @note This bit is set when the falling edge event arrives on the interrupt
1205 * line. This bit is cleared by writing a 1 to the bit.
1206 * @rmtoll FPR2 FPIFx LL_EXTI_ReadFallingFlag_32_63
1207 * @param ExtiLine This parameter can be a combination of the following values:
1208 * @arg @ref LL_EXTI_LINE_34
1209 * @note Please check each device line mapping for EXTI Line availability
1210 * @retval @note This bit is set when the selected edge event arrives on the interrupt
1211 */
LL_EXTI_ReadFallingFlag_32_63(uint32_t ExtiLine)1212 __STATIC_INLINE uint32_t LL_EXTI_ReadFallingFlag_32_63(uint32_t ExtiLine)
1213 {
1214 return (READ_BIT(EXTI->FPR2, ExtiLine));
1215 }
1216 #endif /* STM32G0C1xx || STM32G0B1xx */
1217
1218 /**
1219 * @brief Clear ExtLine Falling Flags for Lines in range 0 to 31
1220 * @note This bit is set when the falling edge event arrives on the interrupt
1221 * line. This bit is cleared by writing a 1 to the bit.
1222 * @rmtoll FPR1 FPIFx LL_EXTI_ClearFallingFlag_0_31
1223 * @param ExtiLine This parameter can be a combination of the following values:
1224 * @arg @ref LL_EXTI_LINE_0
1225 * @arg @ref LL_EXTI_LINE_1
1226 * @arg @ref LL_EXTI_LINE_2
1227 * @arg @ref LL_EXTI_LINE_3
1228 * @arg @ref LL_EXTI_LINE_4
1229 * @arg @ref LL_EXTI_LINE_5
1230 * @arg @ref LL_EXTI_LINE_6
1231 * @arg @ref LL_EXTI_LINE_7
1232 * @arg @ref LL_EXTI_LINE_8
1233 * @arg @ref LL_EXTI_LINE_9
1234 * @arg @ref LL_EXTI_LINE_10
1235 * @arg @ref LL_EXTI_LINE_11
1236 * @arg @ref LL_EXTI_LINE_12
1237 * @arg @ref LL_EXTI_LINE_13
1238 * @arg @ref LL_EXTI_LINE_14
1239 * @arg @ref LL_EXTI_LINE_15
1240 * @arg @ref LL_EXTI_LINE_16
1241 * @arg @ref LL_EXTI_LINE_17
1242 * @arg @ref LL_EXTI_LINE_18
1243 * @arg @ref LL_EXTI_LINE_20
1244 * @note Please check each device line mapping for EXTI Line availability
1245 * @retval None
1246 */
LL_EXTI_ClearFallingFlag_0_31(uint32_t ExtiLine)1247 __STATIC_INLINE void LL_EXTI_ClearFallingFlag_0_31(uint32_t ExtiLine)
1248 {
1249 WRITE_REG(EXTI->FPR1, ExtiLine);
1250 }
1251
1252 #if defined(STM32G0C1xx) || defined(STM32G0B1xx)
1253 /**
1254 * @brief Clear ExtLine Falling Flags for Lines in range 32 to 63
1255 * @note This bit is set when the falling edge event arrives on the interrupt
1256 * line. This bit is cleared by writing a 1 to the bit.
1257 * @rmtoll FPR2 FPIFx LL_EXTI_ClearFallingFlag_32_63
1258 * @param ExtiLine This parameter can be a combination of the following values:
1259 * @arg @ref LL_EXTI_LINE_34
1260 * @note Please check each device line mapping for EXTI Line availability
1261 * @retval None
1262 */
LL_EXTI_ClearFallingFlag_32_63(uint32_t ExtiLine)1263 __STATIC_INLINE void LL_EXTI_ClearFallingFlag_32_63(uint32_t ExtiLine)
1264 {
1265 WRITE_REG(EXTI->FPR2, ExtiLine);
1266 }
1267 #endif /* STM32G0C1xx || STM32G0B1xx */
1268
1269 /**
1270 * @brief Check if the ExtLine Rising Flag is set or not for Lines in range 0 to 31
1271 * @note This bit is set when the Rising edge event arrives on the interrupt
1272 * line. This bit is cleared by writing a 1 to the bit.
1273 * @rmtoll RPR1 RPIFx LL_EXTI_IsActiveRisingFlag_0_31
1274 * @param ExtiLine This parameter can be a combination of the following values:
1275 * @arg @ref LL_EXTI_LINE_0
1276 * @arg @ref LL_EXTI_LINE_1
1277 * @arg @ref LL_EXTI_LINE_2
1278 * @arg @ref LL_EXTI_LINE_3
1279 * @arg @ref LL_EXTI_LINE_4
1280 * @arg @ref LL_EXTI_LINE_5
1281 * @arg @ref LL_EXTI_LINE_6
1282 * @arg @ref LL_EXTI_LINE_7
1283 * @arg @ref LL_EXTI_LINE_8
1284 * @arg @ref LL_EXTI_LINE_9
1285 * @arg @ref LL_EXTI_LINE_10
1286 * @arg @ref LL_EXTI_LINE_11
1287 * @arg @ref LL_EXTI_LINE_12
1288 * @arg @ref LL_EXTI_LINE_13
1289 * @arg @ref LL_EXTI_LINE_14
1290 * @arg @ref LL_EXTI_LINE_15
1291 * @arg @ref LL_EXTI_LINE_16
1292 * @arg @ref LL_EXTI_LINE_17
1293 * @arg @ref LL_EXTI_LINE_18
1294 * @arg @ref LL_EXTI_LINE_20
1295 * @note Please check each device line mapping for EXTI Line availability
1296 * @retval State of bit (1 or 0).
1297 */
LL_EXTI_IsActiveRisingFlag_0_31(uint32_t ExtiLine)1298 __STATIC_INLINE uint32_t LL_EXTI_IsActiveRisingFlag_0_31(uint32_t ExtiLine)
1299 {
1300 return ((READ_BIT(EXTI->RPR1, ExtiLine) == (ExtiLine)) ? 1UL : 0UL);
1301 }
1302
1303 #if defined(STM32G0C1xx) || defined(STM32G0B1xx)
1304 /**
1305 * @brief Check if the ExtLine Rising Flag is set or not for Lines in range 32 to 63
1306 * @note This bit is set when the Rising edge event arrives on the interrupt
1307 * line. This bit is cleared by writing a 1 to the bit.
1308 * @rmtoll RPR2 RPIFx LL_EXTI_IsActiveRisingFlag_32_63
1309 * @param ExtiLine This parameter can be a combination of the following values:
1310 * @arg @ref LL_EXTI_LINE_34
1311 * @note Please check each device line mapping for EXTI Line availability
1312 * @retval State of bit (1 or 0).
1313 */
LL_EXTI_IsActiveRisingFlag_32_63(uint32_t ExtiLine)1314 __STATIC_INLINE uint32_t LL_EXTI_IsActiveRisingFlag_32_63(uint32_t ExtiLine)
1315 {
1316 return ((READ_BIT(EXTI->RPR2, ExtiLine) == (ExtiLine)) ? 1UL : 0UL);
1317 }
1318 #endif /* STM32G0C1xx || STM32G0B1xx */
1319
1320 /**
1321 * @brief Read ExtLine Combination Rising Flag for Lines in range 0 to 31
1322 * @note This bit is set when the Rising edge event arrives on the interrupt
1323 * line. This bit is cleared by writing a 1 to the bit.
1324 * @rmtoll RPR1 RPIFx LL_EXTI_ReadRisingFlag_0_31
1325 * @param ExtiLine This parameter can be a combination of the following values:
1326 * @arg @ref LL_EXTI_LINE_0
1327 * @arg @ref LL_EXTI_LINE_1
1328 * @arg @ref LL_EXTI_LINE_2
1329 * @arg @ref LL_EXTI_LINE_3
1330 * @arg @ref LL_EXTI_LINE_4
1331 * @arg @ref LL_EXTI_LINE_5
1332 * @arg @ref LL_EXTI_LINE_6
1333 * @arg @ref LL_EXTI_LINE_7
1334 * @arg @ref LL_EXTI_LINE_8
1335 * @arg @ref LL_EXTI_LINE_9
1336 * @arg @ref LL_EXTI_LINE_10
1337 * @arg @ref LL_EXTI_LINE_11
1338 * @arg @ref LL_EXTI_LINE_12
1339 * @arg @ref LL_EXTI_LINE_13
1340 * @arg @ref LL_EXTI_LINE_14
1341 * @arg @ref LL_EXTI_LINE_15
1342 * @arg @ref LL_EXTI_LINE_16
1343 * @arg @ref LL_EXTI_LINE_17
1344 * @arg @ref LL_EXTI_LINE_18
1345 * @arg @ref LL_EXTI_LINE_20
1346 * @note Please check each device line mapping for EXTI Line availability
1347 * @retval @note This bit is set when the selected edge event arrives on the interrupt
1348 */
LL_EXTI_ReadRisingFlag_0_31(uint32_t ExtiLine)1349 __STATIC_INLINE uint32_t LL_EXTI_ReadRisingFlag_0_31(uint32_t ExtiLine)
1350 {
1351 return (READ_BIT(EXTI->RPR1, ExtiLine));
1352 }
1353
1354 #if defined(STM32G0C1xx) || defined(STM32G0B1xx)
1355 /**
1356 * @brief Read ExtLine Combination Rising Flag for Lines in range 32 to 63
1357 * @note This bit is set when the Rising edge event arrives on the interrupt
1358 * line. This bit is cleared by writing a 1 to the bit.
1359 * @rmtoll RPR2 RPIFx LL_EXTI_ReadRisingFlag_32_63
1360 * @param ExtiLine This parameter can be a combination of the following values:
1361 * @arg @ref LL_EXTI_LINE_34
1362 * @note Please check each device line mapping for EXTI Line availability
1363 * @retval @note This bit is set when the selected edge event arrives on the interrupt
1364 */
LL_EXTI_ReadRisingFlag_32_63(uint32_t ExtiLine)1365 __STATIC_INLINE uint32_t LL_EXTI_ReadRisingFlag_32_63(uint32_t ExtiLine)
1366 {
1367 return (READ_BIT(EXTI->RPR2, ExtiLine));
1368 }
1369 #endif /* STM32G0C1xx || STM32G0B1xx */
1370
1371 /**
1372 * @brief Clear ExtLine Rising Flags for Lines in range 0 to 31
1373 * @note This bit is set when the Rising edge event arrives on the interrupt
1374 * line. This bit is cleared by writing a 1 to the bit.
1375 * @rmtoll RPR1 RPIFx LL_EXTI_ClearRisingFlag_0_31
1376 * @param ExtiLine This parameter can be a combination of the following values:
1377 * @arg @ref LL_EXTI_LINE_0
1378 * @arg @ref LL_EXTI_LINE_1
1379 * @arg @ref LL_EXTI_LINE_2
1380 * @arg @ref LL_EXTI_LINE_3
1381 * @arg @ref LL_EXTI_LINE_4
1382 * @arg @ref LL_EXTI_LINE_5
1383 * @arg @ref LL_EXTI_LINE_6
1384 * @arg @ref LL_EXTI_LINE_7
1385 * @arg @ref LL_EXTI_LINE_8
1386 * @arg @ref LL_EXTI_LINE_9
1387 * @arg @ref LL_EXTI_LINE_10
1388 * @arg @ref LL_EXTI_LINE_11
1389 * @arg @ref LL_EXTI_LINE_12
1390 * @arg @ref LL_EXTI_LINE_13
1391 * @arg @ref LL_EXTI_LINE_14
1392 * @arg @ref LL_EXTI_LINE_15
1393 * @arg @ref LL_EXTI_LINE_16
1394 * @arg @ref LL_EXTI_LINE_17
1395 * @arg @ref LL_EXTI_LINE_18
1396 * @arg @ref LL_EXTI_LINE_20
1397 * @note Please check each device line mapping for EXTI Line availability
1398 * @retval None
1399 */
LL_EXTI_ClearRisingFlag_0_31(uint32_t ExtiLine)1400 __STATIC_INLINE void LL_EXTI_ClearRisingFlag_0_31(uint32_t ExtiLine)
1401 {
1402 WRITE_REG(EXTI->RPR1, ExtiLine);
1403 }
1404
1405 #if defined(STM32G0C1xx) || defined(STM32G0B1xx)
1406 /**
1407 * @brief Clear ExtLine Rising Flags for Lines in range 32 to 63
1408 * @note This bit is set when the Rising edge event arrives on the interrupt
1409 * line. This bit is cleared by writing a 1 to the bit.
1410 * @rmtoll RPR2 RPIFx LL_EXTI_ClearRisingFlag_32_63
1411 * @param ExtiLine This parameter can be a combination of the following values:
1412 * @arg @ref LL_EXTI_LINE_34
1413 * @note Please check each device line mapping for EXTI Line availability
1414 * @retval None
1415 */
LL_EXTI_ClearRisingFlag_32_63(uint32_t ExtiLine)1416 __STATIC_INLINE void LL_EXTI_ClearRisingFlag_32_63(uint32_t ExtiLine)
1417 {
1418 WRITE_REG(EXTI->RPR2, ExtiLine);
1419 }
1420 #endif /* STM32G0C1xx || STM32G0B1xx */
1421
1422 /**
1423 * @}
1424 */
1425 /** @defgroup EXTI_LL_EF_Config EF configuration functions
1426 * @{
1427 */
1428
1429 /**
1430 * @brief Configure source input for the EXTI external interrupt.
1431 * @rmtoll EXTI_EXTICR1 EXTI0 LL_EXTI_SetEXTISource\n
1432 * EXTI_EXTICR1 EXTI1 LL_EXTI_SetEXTISource\n
1433 * EXTI_EXTICR1 EXTI2 LL_EXTI_SetEXTISource\n
1434 * EXTI_EXTICR1 EXTI3 LL_EXTI_SetEXTISource\n
1435 * EXTI_EXTICR2 EXTI4 LL_EXTI_SetEXTISource\n
1436 * EXTI_EXTICR2 EXTI5 LL_EXTI_SetEXTISource\n
1437 * EXTI_EXTICR2 EXTI6 LL_EXTI_SetEXTISource\n
1438 * EXTI_EXTICR2 EXTI7 LL_EXTI_SetEXTISource\n
1439 * EXTI_EXTICR3 EXTI8 LL_EXTI_SetEXTISource\n
1440 * EXTI_EXTICR3 EXTI9 LL_EXTI_SetEXTISource\n
1441 * EXTI_EXTICR3 EXTI10 LL_EXTI_SetEXTISource\n
1442 * EXTI_EXTICR3 EXTI11 LL_EXTI_SetEXTISource\n
1443 * EXTI_EXTICR4 EXTI12 LL_EXTI_SetEXTISource\n
1444 * EXTI_EXTICR4 EXTI13 LL_EXTI_SetEXTISource\n
1445 * EXTI_EXTICR4 EXTI14 LL_EXTI_SetEXTISource\n
1446 * EXTI_EXTICR4 EXTI15 LL_EXTI_SetEXTISource
1447 * @param Port This parameter can be one of the following values:
1448 * @arg @ref EXTI_LL_EC_CONFIG_PORT
1449 *
1450 * (*) value not defined in all devices
1451 * @param Line This parameter can be one of the following values:
1452 * @arg @ref LL_EXTI_CONFIG_LINE0
1453 * @arg @ref LL_EXTI_CONFIG_LINE1
1454 * @arg @ref LL_EXTI_CONFIG_LINE2
1455 * @arg @ref LL_EXTI_CONFIG_LINE3
1456 * @arg @ref LL_EXTI_CONFIG_LINE4
1457 * @arg @ref LL_EXTI_CONFIG_LINE5
1458 * @arg @ref LL_EXTI_CONFIG_LINE6
1459 * @arg @ref LL_EXTI_CONFIG_LINE7
1460 * @arg @ref LL_EXTI_CONFIG_LINE8
1461 * @arg @ref LL_EXTI_CONFIG_LINE9
1462 * @arg @ref LL_EXTI_CONFIG_LINE10
1463 * @arg @ref LL_EXTI_CONFIG_LINE11
1464 * @arg @ref LL_EXTI_CONFIG_LINE12
1465 * @arg @ref LL_EXTI_CONFIG_LINE13
1466 * @arg @ref LL_EXTI_CONFIG_LINE14
1467 * @arg @ref LL_EXTI_CONFIG_LINE15
1468 * @retval None
1469 */
LL_EXTI_SetEXTISource(uint32_t Port,uint32_t Line)1470 __STATIC_INLINE void LL_EXTI_SetEXTISource(uint32_t Port, uint32_t Line)
1471 {
1472 MODIFY_REG(EXTI->EXTICR[Line & 0x03u], EXTI_EXTICR1_EXTI0 << (Line >> LL_EXTI_REGISTER_PINPOS_SHFT), Port << (Line >> LL_EXTI_REGISTER_PINPOS_SHFT));
1473 }
1474
1475 /**
1476 * @brief Get the configured defined for specific EXTI Line
1477 * @rmtoll EXTI_EXTICR1 EXTI0 LL_EXTI_SetEXTISource\n
1478 * EXTI_EXTICR1 EXTI1 LL_EXTI_SetEXTISource\n
1479 * EXTI_EXTICR1 EXTI2 LL_EXTI_SetEXTISource\n
1480 * EXTI_EXTICR1 EXTI3 LL_EXTI_SetEXTISource\n
1481 * EXTI_EXTICR2 EXTI4 LL_EXTI_SetEXTISource\n
1482 * EXTI_EXTICR2 EXTI5 LL_EXTI_SetEXTISource\n
1483 * EXTI_EXTICR2 EXTI6 LL_EXTI_SetEXTISource\n
1484 * EXTI_EXTICR2 EXTI7 LL_EXTI_SetEXTISource\n
1485 * EXTI_EXTICR3 EXTI8 LL_EXTI_SetEXTISource\n
1486 * EXTI_EXTICR3 EXTI9 LL_EXTI_SetEXTISource\n
1487 * EXTI_EXTICR3 EXTI10 LL_EXTI_SetEXTISource\n
1488 * EXTI_EXTICR3 EXTI11 LL_EXTI_SetEXTISource\n
1489 * EXTI_EXTICR4 EXTI12 LL_EXTI_SetEXTISource\n
1490 * EXTI_EXTICR4 EXTI13 LL_EXTI_SetEXTISource\n
1491 * EXTI_EXTICR4 EXTI14 LL_EXTI_SetEXTISource\n
1492 * EXTI_EXTICR4 EXTI15 LL_EXTI_SetEXTISource
1493 * @param Line This parameter can be one of the following values:
1494 * @arg @ref LL_EXTI_CONFIG_LINE0
1495 * @arg @ref LL_EXTI_CONFIG_LINE1
1496 * @arg @ref LL_EXTI_CONFIG_LINE2
1497 * @arg @ref LL_EXTI_CONFIG_LINE3
1498 * @arg @ref LL_EXTI_CONFIG_LINE4
1499 * @arg @ref LL_EXTI_CONFIG_LINE5
1500 * @arg @ref LL_EXTI_CONFIG_LINE6
1501 * @arg @ref LL_EXTI_CONFIG_LINE7
1502 * @arg @ref LL_EXTI_CONFIG_LINE8
1503 * @arg @ref LL_EXTI_CONFIG_LINE9
1504 * @arg @ref LL_EXTI_CONFIG_LINE10
1505 * @arg @ref LL_EXTI_CONFIG_LINE11
1506 * @arg @ref LL_EXTI_CONFIG_LINE12
1507 * @arg @ref LL_EXTI_CONFIG_LINE13
1508 * @arg @ref LL_EXTI_CONFIG_LINE14
1509 * @arg @ref LL_EXTI_CONFIG_LINE15
1510 * @retval Returned value can be one of the following values:
1511 * @arg @ref EXTI_LL_EC_CONFIG_PORT
1512 *
1513 * (*) value not defined in all devices
1514 */
LL_EXTI_GetEXTISource(uint32_t Line)1515 __STATIC_INLINE uint32_t LL_EXTI_GetEXTISource(uint32_t Line)
1516 {
1517 return (READ_BIT(EXTI->EXTICR[Line & 0x03u], (EXTI_EXTICR1_EXTI0 << (Line >> LL_EXTI_REGISTER_PINPOS_SHFT))) >> (Line >> LL_EXTI_REGISTER_PINPOS_SHFT));
1518 }
1519 /**
1520 * @}
1521 */
1522
1523 #if defined(USE_FULL_LL_DRIVER)
1524 /** @defgroup EXTI_LL_EF_Init Initialization and de-initialization functions
1525 * @{
1526 */
1527
1528 uint32_t LL_EXTI_Init(LL_EXTI_InitTypeDef *EXTI_InitStruct);
1529 uint32_t LL_EXTI_DeInit(void);
1530 void LL_EXTI_StructInit(LL_EXTI_InitTypeDef *EXTI_InitStruct);
1531
1532
1533 /**
1534 * @}
1535 */
1536 #endif /* USE_FULL_LL_DRIVER */
1537
1538 /**
1539 * @}
1540 */
1541
1542 /**
1543 * @}
1544 */
1545
1546 #endif /* EXTI */
1547
1548 /**
1549 * @}
1550 */
1551
1552 #ifdef __cplusplus
1553 }
1554 #endif
1555
1556 #endif /* STM32G0xx_LL_EXTI_H */
1557
1558
