1 /**
2 ******************************************************************************
3 * @file stm32g0xx_hal_pcd.h
4 * @author MCD Application Team
5 * @brief Header file of PCD HAL module.
6 ******************************************************************************
7 * @attention
8 *
9 * Copyright (c) 2018 STMicroelectronics.
10 * All rights reserved.
11 *
12 * This software is licensed under terms that can be found in the LICENSE file
13 * in the root directory of this software component.
14 * If no LICENSE file comes with this software, it is provided AS-IS.
15 *
16 ******************************************************************************
17 */
18
19 /* Define to prevent recursive inclusion -------------------------------------*/
20 #ifndef STM32G0xx_HAL_PCD_H
21 #define STM32G0xx_HAL_PCD_H
22
23 #ifdef __cplusplus
24 extern "C" {
25 #endif
26
27 /* Includes ------------------------------------------------------------------*/
28 #include "stm32g0xx_ll_usb.h"
29
30 #if defined (USB_DRD_FS)
31
32 /** @addtogroup STM32G0xx_HAL_Driver
33 * @{
34 */
35
36 /** @addtogroup PCD
37 * @{
38 */
39
40 /* Exported types ------------------------------------------------------------*/
41 /** @defgroup PCD_Exported_Types PCD Exported Types
42 * @{
43 */
44
45 /**
46 * @brief PCD State structure definition
47 */
48 typedef enum
49 {
50 HAL_PCD_STATE_RESET = 0x00,
51 HAL_PCD_STATE_READY = 0x01,
52 HAL_PCD_STATE_ERROR = 0x02,
53 HAL_PCD_STATE_BUSY = 0x03,
54 HAL_PCD_STATE_TIMEOUT = 0x04
55 } PCD_StateTypeDef;
56
57 /* Device LPM suspend state */
58 typedef enum
59 {
60 LPM_L0 = 0x00, /* on */
61 LPM_L1 = 0x01, /* LPM L1 sleep */
62 LPM_L2 = 0x02, /* suspend */
63 LPM_L3 = 0x03, /* off */
64 } PCD_LPM_StateTypeDef;
65
66 typedef enum
67 {
68 PCD_LPM_L0_ACTIVE = 0x00, /* on */
69 PCD_LPM_L1_ACTIVE = 0x01, /* LPM L1 sleep */
70 } PCD_LPM_MsgTypeDef;
71
72 typedef enum
73 {
74 PCD_BCD_ERROR = 0xFF,
75 PCD_BCD_CONTACT_DETECTION = 0xFE,
76 PCD_BCD_STD_DOWNSTREAM_PORT = 0xFD,
77 PCD_BCD_CHARGING_DOWNSTREAM_PORT = 0xFC,
78 PCD_BCD_DEDICATED_CHARGING_PORT = 0xFB,
79 PCD_BCD_DISCOVERY_COMPLETED = 0x00,
80
81 } PCD_BCD_MsgTypeDef;
82
83 typedef USB_DRD_TypeDef PCD_TypeDef;
84 typedef USB_DRD_CfgTypeDef PCD_InitTypeDef;
85 typedef USB_DRD_EPTypeDef PCD_EPTypeDef;
86
87 /**
88 * @brief PCD Handle Structure definition
89 */
90 #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
91 typedef struct __PCD_HandleTypeDef
92 #else
93 typedef struct
94 #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
95 {
96 PCD_TypeDef *Instance; /*!< Register base address */
97 PCD_InitTypeDef Init; /*!< PCD required parameters */
98 __IO uint8_t USB_Address; /*!< USB Address */
99 PCD_EPTypeDef IN_ep[8]; /*!< IN endpoint parameters */
100 PCD_EPTypeDef OUT_ep[8]; /*!< OUT endpoint parameters */
101 HAL_LockTypeDef Lock; /*!< PCD peripheral status */
102 __IO PCD_StateTypeDef State; /*!< PCD communication state */
103 __IO uint32_t ErrorCode; /*!< PCD Error code */
104 uint32_t Setup[12]; /*!< Setup packet buffer */
105 PCD_LPM_StateTypeDef LPM_State; /*!< LPM State */
106 uint32_t BESL;
107
108
109 uint32_t lpm_active; /*!< Enable or disable the Link Power Management .
110 This parameter can be set to ENABLE or DISABLE */
111
112 uint32_t battery_charging_active; /*!< Enable or disable Battery charging.
113 This parameter can be set to ENABLE or DISABLE */
114 void *pData; /*!< Pointer to upper stack Handler */
115
116 #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
117 void (* SOFCallback)(struct __PCD_HandleTypeDef *hpcd); /*!< USB OTG PCD SOF callback */
118 void (* SetupStageCallback)(struct __PCD_HandleTypeDef *hpcd); /*!< USB OTG PCD Setup Stage callback */
119 void (* ResetCallback)(struct __PCD_HandleTypeDef *hpcd); /*!< USB OTG PCD Reset callback */
120 void (* SuspendCallback)(struct __PCD_HandleTypeDef *hpcd); /*!< USB OTG PCD Suspend callback */
121 void (* ResumeCallback)(struct __PCD_HandleTypeDef *hpcd); /*!< USB OTG PCD Resume callback */
122 void (* ConnectCallback)(struct __PCD_HandleTypeDef *hpcd); /*!< USB OTG PCD Connect callback */
123 void (* DisconnectCallback)(struct __PCD_HandleTypeDef *hpcd); /*!< USB OTG PCD Disconnect callback */
124
125 void (* DataOutStageCallback)(struct __PCD_HandleTypeDef *hpcd, uint8_t epnum); /*!< USB OTG PCD Data OUT Stage callback */
126 void (* DataInStageCallback)(struct __PCD_HandleTypeDef *hpcd, uint8_t epnum); /*!< USB OTG PCD Data IN Stage callback */
127 void (* ISOOUTIncompleteCallback)(struct __PCD_HandleTypeDef *hpcd, uint8_t epnum); /*!< USB OTG PCD ISO OUT Incomplete callback */
128 void (* ISOINIncompleteCallback)(struct __PCD_HandleTypeDef *hpcd, uint8_t epnum); /*!< USB OTG PCD ISO IN Incomplete callback */
129 void (* BCDCallback)(struct __PCD_HandleTypeDef *hpcd, PCD_BCD_MsgTypeDef msg); /*!< USB OTG PCD BCD callback */
130 void (* LPMCallback)(struct __PCD_HandleTypeDef *hpcd, PCD_LPM_MsgTypeDef msg); /*!< USB OTG PCD LPM callback */
131
132 void (* MspInitCallback)(struct __PCD_HandleTypeDef *hpcd); /*!< USB OTG PCD Msp Init callback */
133 void (* MspDeInitCallback)(struct __PCD_HandleTypeDef *hpcd); /*!< USB OTG PCD Msp DeInit callback */
134 #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
135 } PCD_HandleTypeDef;
136
137 /**
138 * @}
139 */
140
141 /* Include PCD HAL Extended module */
142 #include "stm32g0xx_hal_pcd_ex.h"
143
144 /* Exported constants --------------------------------------------------------*/
145 /** @defgroup PCD_Exported_Constants PCD Exported Constants
146 * @{
147 */
148
149 /** @defgroup PCD_Speed PCD Speed
150 * @{
151 */
152 #define PCD_SPEED_FULL USBD_FS_SPEED
153 /**
154 * @}
155 */
156
157 /** @defgroup PCD_PHY_Module PCD PHY Module
158 * @{
159 */
160 #define PCD_PHY_ULPI 1U
161 #define PCD_PHY_EMBEDDED 2U
162 #define PCD_PHY_UTMI 3U
163 /**
164 * @}
165 */
166
167 /** @defgroup PCD_Error_Code_definition PCD Error Code definition
168 * @brief PCD Error Code definition
169 * @{
170 */
171 #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
172 #define HAL_PCD_ERROR_INVALID_CALLBACK (0x00000010U) /*!< Invalid Callback error */
173 #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
174
175 /**
176 * @}
177 */
178
179 /**
180 * @}
181 */
182
183 /* Exported macros -----------------------------------------------------------*/
184 /** @defgroup PCD_Exported_Macros PCD Exported Macros
185 * @brief macros to handle interrupts and specific clock configurations
186 * @{
187 */
188
189
190 #define __HAL_PCD_ENABLE(__HANDLE__) (void)USB_EnableGlobalInt ((__HANDLE__)->Instance)
191 #define __HAL_PCD_DISABLE(__HANDLE__) (void)USB_DisableGlobalInt ((__HANDLE__)->Instance)
192 #define __HAL_PCD_GET_FLAG(__HANDLE__, __INTERRUPT__) ((USB_ReadInterrupts((__HANDLE__)->Instance)\
193 & (__INTERRUPT__)) == (__INTERRUPT__))
194
195 #define __HAL_PCD_CLEAR_FLAG(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->ISTR)\
196 &= (uint16_t)(~(__INTERRUPT__)))
197
198 #define __HAL_USB_WAKEUP_EXTI_ENABLE_IT() EXTI->IMR2 |= USB_WAKEUP_EXTI_LINE
199 #define __HAL_USB_WAKEUP_EXTI_DISABLE_IT() EXTI->IMR2 &= ~(USB_WAKEUP_EXTI_LINE)
200
201
202 /**
203 * @}
204 */
205
206 /* Exported functions --------------------------------------------------------*/
207 /** @addtogroup PCD_Exported_Functions PCD Exported Functions
208 * @{
209 */
210
211 /* Initialization/de-initialization functions ********************************/
212 /** @addtogroup PCD_Exported_Functions_Group1 Initialization and de-initialization functions
213 * @{
214 */
215 HAL_StatusTypeDef HAL_PCD_Init(PCD_HandleTypeDef *hpcd);
216 HAL_StatusTypeDef HAL_PCD_DeInit(PCD_HandleTypeDef *hpcd);
217 void HAL_PCD_MspInit(PCD_HandleTypeDef *hpcd);
218 void HAL_PCD_MspDeInit(PCD_HandleTypeDef *hpcd);
219
220 #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
221 /** @defgroup HAL_PCD_Callback_ID_enumeration_definition HAL USB OTG PCD Callback ID enumeration definition
222 * @brief HAL USB OTG PCD Callback ID enumeration definition
223 * @{
224 */
225 typedef enum
226 {
227 HAL_PCD_SOF_CB_ID = 0x01, /*!< USB PCD SOF callback ID */
228 HAL_PCD_SETUPSTAGE_CB_ID = 0x02, /*!< USB PCD Setup Stage callback ID */
229 HAL_PCD_RESET_CB_ID = 0x03, /*!< USB PCD Reset callback ID */
230 HAL_PCD_SUSPEND_CB_ID = 0x04, /*!< USB PCD Suspend callback ID */
231 HAL_PCD_RESUME_CB_ID = 0x05, /*!< USB PCD Resume callback ID */
232 HAL_PCD_CONNECT_CB_ID = 0x06, /*!< USB PCD Connect callback ID */
233 HAL_PCD_DISCONNECT_CB_ID = 0x07, /*!< USB PCD Disconnect callback ID */
234
235 HAL_PCD_MSPINIT_CB_ID = 0x08, /*!< USB PCD MspInit callback ID */
236 HAL_PCD_MSPDEINIT_CB_ID = 0x09 /*!< USB PCD MspDeInit callback ID */
237
238 } HAL_PCD_CallbackIDTypeDef;
239 /**
240 * @}
241 */
242
243 /** @defgroup HAL_PCD_Callback_pointer_definition HAL USB OTG PCD Callback pointer definition
244 * @brief HAL USB OTG PCD Callback pointer definition
245 * @{
246 */
247
248 typedef void (*pPCD_CallbackTypeDef)(PCD_HandleTypeDef *hpcd); /*!< pointer to a common USB OTG PCD callback function */
249 typedef void (*pPCD_DataOutStageCallbackTypeDef)(PCD_HandleTypeDef *hpcd, uint8_t epnum); /*!< pointer to USB OTG PCD Data OUT Stage callback */
250 typedef void (*pPCD_DataInStageCallbackTypeDef)(PCD_HandleTypeDef *hpcd, uint8_t epnum); /*!< pointer to USB OTG PCD Data IN Stage callback */
251 typedef void (*pPCD_IsoOutIncpltCallbackTypeDef)(PCD_HandleTypeDef *hpcd, uint8_t epnum); /*!< pointer to USB OTG PCD ISO OUT Incomplete callback */
252 typedef void (*pPCD_IsoInIncpltCallbackTypeDef)(PCD_HandleTypeDef *hpcd, uint8_t epnum); /*!< pointer to USB OTG PCD ISO IN Incomplete callback */
253 typedef void (*pPCD_LpmCallbackTypeDef)(PCD_HandleTypeDef *hpcd, PCD_LPM_MsgTypeDef msg); /*!< pointer to USB OTG PCD LPM callback */
254 typedef void (*pPCD_BcdCallbackTypeDef)(PCD_HandleTypeDef *hpcd, PCD_BCD_MsgTypeDef msg); /*!< pointer to USB OTG PCD BCD callback */
255
256 /**
257 * @}
258 */
259
260 HAL_StatusTypeDef HAL_PCD_RegisterCallback(PCD_HandleTypeDef *hpcd, HAL_PCD_CallbackIDTypeDef CallbackID,
261 pPCD_CallbackTypeDef pCallback);
262
263 HAL_StatusTypeDef HAL_PCD_UnRegisterCallback(PCD_HandleTypeDef *hpcd, HAL_PCD_CallbackIDTypeDef CallbackID);
264
265 HAL_StatusTypeDef HAL_PCD_RegisterDataOutStageCallback(PCD_HandleTypeDef *hpcd,
266 pPCD_DataOutStageCallbackTypeDef pCallback);
267
268 HAL_StatusTypeDef HAL_PCD_UnRegisterDataOutStageCallback(PCD_HandleTypeDef *hpcd);
269
270 HAL_StatusTypeDef HAL_PCD_RegisterDataInStageCallback(PCD_HandleTypeDef *hpcd,
271 pPCD_DataInStageCallbackTypeDef pCallback);
272
273 HAL_StatusTypeDef HAL_PCD_UnRegisterDataInStageCallback(PCD_HandleTypeDef *hpcd);
274
275 HAL_StatusTypeDef HAL_PCD_RegisterIsoOutIncpltCallback(PCD_HandleTypeDef *hpcd,
276 pPCD_IsoOutIncpltCallbackTypeDef pCallback);
277
278 HAL_StatusTypeDef HAL_PCD_UnRegisterIsoOutIncpltCallback(PCD_HandleTypeDef *hpcd);
279
280 HAL_StatusTypeDef HAL_PCD_RegisterIsoInIncpltCallback(PCD_HandleTypeDef *hpcd,
281 pPCD_IsoInIncpltCallbackTypeDef pCallback);
282
283 HAL_StatusTypeDef HAL_PCD_UnRegisterIsoInIncpltCallback(PCD_HandleTypeDef *hpcd);
284
285 HAL_StatusTypeDef HAL_PCD_RegisterBcdCallback(PCD_HandleTypeDef *hpcd, pPCD_BcdCallbackTypeDef pCallback);
286 HAL_StatusTypeDef HAL_PCD_UnRegisterBcdCallback(PCD_HandleTypeDef *hpcd);
287
288 HAL_StatusTypeDef HAL_PCD_RegisterLpmCallback(PCD_HandleTypeDef *hpcd, pPCD_LpmCallbackTypeDef pCallback);
289 HAL_StatusTypeDef HAL_PCD_UnRegisterLpmCallback(PCD_HandleTypeDef *hpcd);
290 #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
291 /**
292 * @}
293 */
294
295 /* I/O operation functions ***************************************************/
296 /* Non-Blocking mode: Interrupt */
297 /** @addtogroup PCD_Exported_Functions_Group2 Input and Output operation functions
298 * @{
299 */
300 HAL_StatusTypeDef HAL_PCD_Start(PCD_HandleTypeDef *hpcd);
301 HAL_StatusTypeDef HAL_PCD_Stop(PCD_HandleTypeDef *hpcd);
302 void HAL_PCD_IRQHandler(PCD_HandleTypeDef *hpcd);
303
304 void HAL_PCD_SOFCallback(PCD_HandleTypeDef *hpcd);
305 void HAL_PCD_SetupStageCallback(PCD_HandleTypeDef *hpcd);
306 void HAL_PCD_ResetCallback(PCD_HandleTypeDef *hpcd);
307 void HAL_PCD_SuspendCallback(PCD_HandleTypeDef *hpcd);
308 void HAL_PCD_ResumeCallback(PCD_HandleTypeDef *hpcd);
309 void HAL_PCD_ConnectCallback(PCD_HandleTypeDef *hpcd);
310 void HAL_PCD_DisconnectCallback(PCD_HandleTypeDef *hpcd);
311
312 void HAL_PCD_DataOutStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum);
313 void HAL_PCD_DataInStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum);
314 void HAL_PCD_ISOOUTIncompleteCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum);
315 void HAL_PCD_ISOINIncompleteCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum);
316 /**
317 * @}
318 */
319
320 /* Peripheral Control functions **********************************************/
321 /** @addtogroup PCD_Exported_Functions_Group3 Peripheral Control functions
322 * @{
323 */
324 HAL_StatusTypeDef HAL_PCD_DevConnect(PCD_HandleTypeDef *hpcd);
325 HAL_StatusTypeDef HAL_PCD_DevDisconnect(PCD_HandleTypeDef *hpcd);
326 HAL_StatusTypeDef HAL_PCD_SetAddress(PCD_HandleTypeDef *hpcd, uint8_t address);
327 HAL_StatusTypeDef HAL_PCD_EP_Open(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint16_t ep_mps, uint8_t ep_type);
328 HAL_StatusTypeDef HAL_PCD_EP_Close(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
329 HAL_StatusTypeDef HAL_PCD_EP_Receive(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint8_t *pBuf, uint32_t len);
330 HAL_StatusTypeDef HAL_PCD_EP_Transmit(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint8_t *pBuf, uint32_t len);
331 HAL_StatusTypeDef HAL_PCD_EP_SetStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
332 HAL_StatusTypeDef HAL_PCD_EP_ClrStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
333 HAL_StatusTypeDef HAL_PCD_EP_Flush(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
334 HAL_StatusTypeDef HAL_PCD_EP_Abort(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
335 HAL_StatusTypeDef HAL_PCD_ActivateRemoteWakeup(PCD_HandleTypeDef *hpcd);
336 HAL_StatusTypeDef HAL_PCD_DeActivateRemoteWakeup(PCD_HandleTypeDef *hpcd);
337 uint32_t HAL_PCD_EP_GetRxCount(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
338 /**
339 * @}
340 */
341
342 /* Peripheral State functions ************************************************/
343 /** @addtogroup PCD_Exported_Functions_Group4 Peripheral State functions
344 * @{
345 */
346 PCD_StateTypeDef HAL_PCD_GetState(PCD_HandleTypeDef *hpcd);
347 /**
348 * @}
349 */
350
351 /**
352 * @}
353 */
354
355 /* Private constants ---------------------------------------------------------*/
356 /** @defgroup PCD_Private_Constants PCD Private Constants
357 * @{
358 */
359 /** @defgroup USB_EXTI_Line_Interrupt USB EXTI line interrupt
360 * @{
361 */
362
363
364 #define USB_WAKEUP_EXTI_LINE (0x1U << 4) /*!< USB FS EXTI Line WakeUp Interrupt */
365
366
367 /**
368 * @}
369 */
370
371 /** @defgroup PCD_EP0_MPS PCD EP0 MPS
372 * @{
373 */
374 #define PCD_EP0MPS_64 EP_MPS_64
375 #define PCD_EP0MPS_32 EP_MPS_32
376 #define PCD_EP0MPS_16 EP_MPS_16
377 #define PCD_EP0MPS_08 EP_MPS_8
378 /**
379 * @}
380 */
381
382 /** @defgroup PCD_ENDP PCD ENDP
383 * @{
384 */
385 #define PCD_ENDP0 0U
386 #define PCD_ENDP1 1U
387 #define PCD_ENDP2 2U
388 #define PCD_ENDP3 3U
389 #define PCD_ENDP4 4U
390 #define PCD_ENDP5 5U
391 #define PCD_ENDP6 6U
392 #define PCD_ENDP7 7U
393 /**
394 * @}
395 */
396
397 /** @defgroup PCD_ENDP_Kind PCD Endpoint Kind
398 * @{
399 */
400 #define PCD_SNG_BUF 0U
401 #define PCD_DBL_BUF 1U
402 /**
403 * @}
404 */
405
406 /**
407 * @}
408 */
409
410 /* Private macros ------------------------------------------------------------*/
411 /** @defgroup PCD_Private_Macros PCD Private Macros
412 * @{
413 */
414 /* SetENDPOINT */
415 #define PCD_SET_ENDPOINT USB_DRD_SET_CHEP
416
417 /* GetENDPOINT Register value*/
418 #define PCD_GET_ENDPOINT USB_DRD_GET_CHEP
419
420 /* ENDPOINT transfer */
421 #define USB_EP0StartXfer USB_EPStartXfer
422
423 /**
424 * @brief free buffer used from the application realizing it to the line
425 * toggles bit SW_BUF in the double buffered endpoint register
426 * @param USBx USB device.
427 * @param bEpNum, bDir
428 * @retval None
429 */
430 #define PCD_FREE_USER_BUFFER USB_DRD_FREE_USER_BUFFER
431
432 /**
433 * @brief sets the status for tx transfer (bits STAT_TX[1:0]).
434 * @param USBx USB peripheral instance register address.
435 * @param bEpNum Endpoint Number.
436 * @param wState new state
437 * @retval None
438 */
439 #define PCD_SET_EP_TX_STATUS USB_DRD_SET_CHEP_TX_STATUS
440
441 /**
442 * @brief sets the status for rx transfer (bits STAT_TX[1:0])
443 * @param USBx USB peripheral instance register address.
444 * @param bEpNum Endpoint Number.
445 * @param wState new state
446 * @retval None
447 */
448 #define PCD_SET_EP_RX_STATUS USB_DRD_SET_CHEP_RX_STATUS
449
450 /**
451 * @brief Sets/clears directly EP_KIND bit in the endpoint register.
452 * @param USBx USB peripheral instance register address.
453 * @param bEpNum Endpoint Number.
454 * @retval None
455 */
456 #define PCD_SET_EP_KIND USB_DRD_SET_CHEP_KIND
457 #define PCD_CLEAR_EP_KIND USB_DRD_CLEAR_CHEP_KIND
458 #define PCD_SET_BULK_EP_DBUF PCD_SET_EP_KIND
459 #define PCD_CLEAR_BULK_EP_DBUF PCD_CLEAR_EP_KIND
460
461
462 /**
463 * @brief Clears bit CTR_RX / CTR_TX in the endpoint register.
464 * @param USBx USB peripheral instance register address.
465 * @param bEpNum Endpoint Number.
466 * @retval None
467 */
468 #define PCD_CLEAR_RX_EP_CTR USB_DRD_CLEAR_RX_CHEP_CTR
469 #define PCD_CLEAR_TX_EP_CTR USB_DRD_CLEAR_TX_CHEP_CTR
470 /**
471 * @brief Toggles DTOG_RX / DTOG_TX bit in the endpoint register.
472 * @param USBx USB peripheral instance register address.
473 * @param bEpNum Endpoint Number.
474 * @retval None
475 */
476 #define PCD_RX_DTOG USB_DRD_RX_DTOG
477 #define PCD_TX_DTOG USB_DRD_TX_DTOG
478 /**
479 * @brief Clears DTOG_RX / DTOG_TX bit in the endpoint register.
480 * @param USBx USB peripheral instance register address.
481 * @param bEpNum Endpoint Number.
482 * @retval None
483 */
484 #define PCD_CLEAR_RX_DTOG USB_DRD_CLEAR_RX_DTOG
485 #define PCD_CLEAR_TX_DTOG USB_DRD_CLEAR_TX_DTOG
486
487 /**
488 * @brief Sets address in an endpoint register.
489 * @param USBx USB peripheral instance register address.
490 * @param bEpNum Endpoint Number.
491 * @param bAddr Address.
492 * @retval None
493 */
494 #define PCD_SET_EP_ADDRESS USB_DRD_SET_CHEP_ADDRESS
495
496 /**
497 * @brief sets address of the tx/rx buffer.
498 * @param USBx USB peripheral instance register address.
499 * @param bEpNum Endpoint Number.
500 * @param wAddr address to be set (must be word aligned).
501 * @retval None
502 */
503 #define PCD_SET_EP_TX_ADDRESS USB_DRD_SET_CHEP_TX_ADDRESS
504 #define PCD_SET_EP_RX_ADDRESS USB_DRD_SET_CHEP_RX_ADDRESS
505
506 /**
507 * @brief sets counter for the tx/rx buffer.
508 * @param USBx USB peripheral instance register address.
509 * @param bEpNum Endpoint Number.
510 * @param wCount Counter value.
511 * @retval None
512 */
513 #define PCD_SET_EP_TX_CNT USB_DRD_SET_CHEP_TX_CNT
514 #define PCD_SET_EP_RX_CNT USB_DRD_SET_CHEP_RX_CNT
515
516 /**
517 * @brief gets counter of the tx buffer.
518 * @param USBx USB peripheral instance register address.
519 * @param bEpNum Endpoint Number.
520 * @retval Counter value
521 */
522 #define PCD_GET_EP_TX_CNT USB_DRD_GET_CHEP_TX_CNT
523
524 /**
525 * @brief gets counter of the rx buffer.
526 * @param Instance USB peripheral instance register address.
527 * @param bEpNum channel Number.
528 * @retval Counter value
529 */
PCD_GET_EP_RX_CNT(const PCD_TypeDef * Instance,uint16_t bEpNum)530 __STATIC_INLINE uint16_t PCD_GET_EP_RX_CNT(const PCD_TypeDef *Instance, uint16_t bEpNum)
531 {
532 UNUSED(Instance);
533 __IO uint32_t count = 10U;
534
535 /* WA: few cycles for RX PMA descriptor to update */
536 while (count > 0U)
537 {
538 count--;
539 }
540
541 return (uint16_t)USB_DRD_GET_CHEP_RX_CNT((Instance), (bEpNum));
542 }
543
544 /**
545 * @brief Sets addresses in a double buffer endpoint.
546 * @param USBx USB peripheral instance register address.
547 * @param bEpNum Endpoint Number.
548 * @param wBuf0Addr: buffer 0 address.
549 * @param wBuf1Addr = buffer 1 address.
550 * @retval None
551 */
552 #define PCD_SET_EP_DBUF_ADDR USB_DRD_SET_CHEP_DBUF_ADDR
553
554 /**
555 * @brief Gets buffer 0/1 address of a double buffer endpoint.
556 * @param USBx USB peripheral instance register address.
557 * @param bEpNum Endpoint Number.
558 * @param bDir endpoint dir EP_DBUF_OUT = OUT
559 * EP_DBUF_IN = IN
560 * @param wCount: Counter value
561 * @retval None
562 */
563 #define PCD_SET_EP_DBUF0_CNT USB_DRD_SET_CHEP_DBUF0_CNT
564 #define PCD_SET_EP_DBUF1_CNT USB_DRD_SET_CHEP_DBUF1_CNT
565 #define PCD_SET_EP_DBUF_CNT USB_DRD_SET_CHEP_DBUF_CNT
566
567 /**
568 * @brief gets counter of the rx buffer0.
569 * @param Instance USB peripheral instance register address.
570 * @param bEpNum channel Number.
571 * @retval Counter value
572 */
PCD_GET_EP_DBUF0_CNT(const PCD_TypeDef * Instance,uint16_t bEpNum)573 __STATIC_INLINE uint16_t PCD_GET_EP_DBUF0_CNT(const PCD_TypeDef *Instance, uint16_t bEpNum)
574 {
575 UNUSED(Instance);
576 __IO uint32_t count = 10U;
577
578 /* WA: few cycles for RX PMA descriptor to update */
579 while (count > 0U)
580 {
581 count--;
582 }
583
584 return (uint16_t)USB_DRD_GET_CHEP_DBUF0_CNT((Instance), (bEpNum));
585 }
586
587 /**
588 * @brief gets counter of the rx buffer1.
589 * @param Instance USB peripheral instance register address.
590 * @param bEpNum channel Number.
591 * @retval Counter value
592 */
PCD_GET_EP_DBUF1_CNT(const PCD_TypeDef * Instance,uint16_t bEpNum)593 __STATIC_INLINE uint16_t PCD_GET_EP_DBUF1_CNT(const PCD_TypeDef *Instance, uint16_t bEpNum)
594 {
595 UNUSED(Instance);
596 __IO uint32_t count = 10U;
597
598 /* WA: few cycles for RX PMA descriptor to update */
599 while (count > 0U)
600 {
601 count--;
602 }
603
604 return (uint16_t)USB_DRD_GET_CHEP_DBUF1_CNT((Instance), (bEpNum));
605 }
606
607 /**
608 * @}
609 */
610
611 /**
612 * @}
613 */
614
615 /**
616 * @}
617 */
618 #endif /* defined (USB_DRD_FS) */
619
620 #ifdef __cplusplus
621 }
622 #endif
623
624 #endif /* STM32G0xx_HAL_PCD_H */
625
