1 /**
2   ******************************************************************************
3   * @file    stm32f7xx_ll_pwr.c
4   * @author  MCD Application Team
5   * @brief   PWR LL module driver.
6   ******************************************************************************
7   * @attention
8   *
9   * Copyright (c) 2017 STMicroelectronics.
10   * All rights reserved.
11   *
12   * This software is licensed under terms that can be found in the LICENSE file
13   * in the root directory of this software component.
14   * If no LICENSE file comes with this software, it is provided AS-IS.
15   *
16   ******************************************************************************
17   */
18 #if defined(USE_FULL_LL_DRIVER)
19 
20 /* Includes ------------------------------------------------------------------*/
21 #include "stm32f7xx_ll_pwr.h"
22 #include "stm32f7xx_ll_bus.h"
23 
24 /** @addtogroup STM32F7xx_LL_Driver
25   * @{
26   */
27 
28 #if defined(PWR)
29 
30 /** @defgroup PWR_LL PWR
31   * @{
32   */
33 
34 /* Private types -------------------------------------------------------------*/
35 /* Private variables ---------------------------------------------------------*/
36 /* Private constants ---------------------------------------------------------*/
37 /* Private macros ------------------------------------------------------------*/
38 /* Private function prototypes -----------------------------------------------*/
39 
40 /* Exported functions --------------------------------------------------------*/
41 /** @addtogroup PWR_LL_Exported_Functions
42   * @{
43   */
44 
45 /** @addtogroup PWR_LL_EF_Init
46   * @{
47   */
48 
49 /**
50   * @brief  De-initialize the PWR registers to their default reset values.
51   * @retval An ErrorStatus enumeration value:
52   *          - SUCCESS: PWR registers are de-initialized
53   *          - ERROR: not applicable
54   */
LL_PWR_DeInit(void)55 ErrorStatus LL_PWR_DeInit(void)
56 {
57   /* Force reset of PWR clock */
58   LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_PWR);
59 
60   /* Release reset of PWR clock */
61   LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_PWR);
62 
63   WRITE_REG(PWR->CR2, (PWR_CR2_CWUPF1 | PWR_CR2_CWUPF2 | PWR_CR2_CWUPF3 | PWR_CR2_CWUPF4 | PWR_CR2_CWUPF5 | PWR_CR2_CWUPF6));
64 
65   return SUCCESS;
66 }
67 
68 /**
69   * @}
70   */
71 
72 /**
73   * @}
74   */
75 
76 /**
77   * @}
78   */
79 #endif /* defined(PWR) */
80 /**
81   * @}
82   */
83 
84 #endif /* USE_FULL_LL_DRIVER */
85 
86