1 /**
2 ******************************************************************************
3 * @file stm32f7xx_hal_spdifrx.c
4 * @author MCD Application Team
5 * @brief This file provides firmware functions to manage the following
6 * functionalities of the SPDIFRX audio interface:
7 * + Initialization and Configuration
8 * + Data transfers functions
9 * + DMA transfers management
10 * + Interrupts and flags management
11 *
12 ******************************************************************************
13 * @attention
14 *
15 * Copyright (c) 2017 STMicroelectronics.
16 * All rights reserved.
17 *
18 * This software is licensed under terms that can be found in the LICENSE file
19 * in the root directory of this software component.
20 * If no LICENSE file comes with this software, it is provided AS-IS.
21 *
22 ******************************************************************************
23 @verbatim
24 ===============================================================================
25 ##### How to use this driver #####
26 ===============================================================================
27 [..]
28 The SPDIFRX HAL driver can be used as follow:
29
30 (#) Declare SPDIFRX_HandleTypeDef handle structure.
31 (#) Initialize the SPDIFRX low level resources by implement the HAL_SPDIFRX_MspInit() API:
32 (##) Enable the SPDIFRX interface clock.
33 (##) SPDIFRX pins configuration:
34 (+++) Enable the clock for the SPDIFRX GPIOs.
35 (+++) Configure these SPDIFRX pins as alternate function pull-up.
36 (##) NVIC configuration if you need to use interrupt process (HAL_SPDIFRX_ReceiveControlFlow_IT() and HAL_SPDIFRX_ReceiveDataFlow_IT() API's).
37 (+++) Configure the SPDIFRX interrupt priority.
38 (+++) Enable the NVIC SPDIFRX IRQ handle.
39 (##) DMA Configuration if you need to use DMA process (HAL_SPDIFRX_ReceiveDataFlow_DMA() and HAL_SPDIFRX_ReceiveControlFlow_DMA() API's).
40 (+++) Declare a DMA handle structure for the reception of the Data Flow channel.
41 (+++) Declare a DMA handle structure for the reception of the Control Flow channel.
42 (+++) Enable the DMAx interface clock.
43 (+++) Configure the declared DMA handle structure CtrlRx/DataRx with the required parameters.
44 (+++) Configure the DMA Channel.
45 (+++) Associate the initialized DMA handle to the SPDIFRX DMA CtrlRx/DataRx handle.
46 (+++) Configure the priority and enable the NVIC for the transfer complete interrupt on the
47 DMA CtrlRx/DataRx channel.
48
49 (#) Program the input selection, re-tries number, wait for activity, channel status selection, data format, stereo mode and masking of user bits
50 using HAL_SPDIFRX_Init() function.
51
52 -@- The specific SPDIFRX interrupts (RXNE/CSRNE and Error Interrupts) will be managed using the macros
53 __SPDIFRX_ENABLE_IT() and __SPDIFRX_DISABLE_IT() inside the receive process.
54 -@- Make sure that ck_spdif clock is configured.
55
56 (#) Three operation modes are available within this driver :
57
58 *** Polling mode for reception operation (for debug purpose) ***
59 ================================================================
60 [..]
61 (+) Receive data flow in blocking mode using HAL_SPDIFRX_ReceiveDataFlow()
62 (+) Receive control flow of data in blocking mode using HAL_SPDIFRX_ReceiveControlFlow()
63
64 *** Interrupt mode for reception operation ***
65 =========================================
66 [..]
67 (+) Receive an amount of data (Data Flow) in non blocking mode using HAL_SPDIFRX_ReceiveDataFlow_IT()
68 (+) Receive an amount of data (Control Flow) in non blocking mode using HAL_SPDIFRX_ReceiveControlFlow_IT()
69 (+) At reception end of half transfer HAL_SPDIFRX_RxHalfCpltCallback is executed and user can
70 add his own code by customization of function pointer HAL_SPDIFRX_RxHalfCpltCallback
71 (+) At reception end of transfer HAL_SPDIFRX_RxCpltCallback is executed and user can
72 add his own code by customization of function pointer HAL_SPDIFRX_RxCpltCallback
73 (+) In case of transfer Error, HAL_SPDIFRX_ErrorCallback() function is executed and user can
74 add his own code by customization of function pointer HAL_SPDIFRX_ErrorCallback
75
76 *** DMA mode for reception operation ***
77 ========================================
78 [..]
79 (+) Receive an amount of data (Data Flow) in non blocking mode (DMA) using HAL_SPDIFRX_ReceiveDataFlow_DMA()
80 (+) Receive an amount of data (Control Flow) in non blocking mode (DMA) using HAL_SPDIFRX_ReceiveControlFlow_DMA()
81 (+) At reception end of half transfer HAL_SPDIFRX_RxHalfCpltCallback is executed and user can
82 add his own code by customization of function pointer HAL_SPDIFRX_RxHalfCpltCallback
83 (+) At reception end of transfer HAL_SPDIFRX_RxCpltCallback is executed and user can
84 add his own code by customization of function pointer HAL_SPDIFRX_RxCpltCallback
85 (+) In case of transfer Error, HAL_SPDIFRX_ErrorCallback() function is executed and user can
86 add his own code by customization of function pointer HAL_SPDIFRX_ErrorCallback
87 (+) Stop the DMA Transfer using HAL_SPDIFRX_DMAStop()
88
89 *** SPDIFRX HAL driver macros list ***
90 =============================================
91 [..]
92 Below the list of most used macros in SPDIFRX HAL driver.
93 (+) __HAL_SPDIFRX_IDLE: Disable the specified SPDIFRX peripheral (IDEL State)
94 (+) __HAL_SPDIFRX_SYNC: Enable the synchronization state of the specified SPDIFRX peripheral (SYNC State)
95 (+) __HAL_SPDIFRX_RCV: Enable the receive state of the specified SPDIFRX peripheral (RCV State)
96 (+) __HAL_SPDIFRX_ENABLE_IT : Enable the specified SPDIFRX interrupts
97 (+) __HAL_SPDIFRX_DISABLE_IT : Disable the specified SPDIFRX interrupts
98 (+) __HAL_SPDIFRX_GET_FLAG: Check whether the specified SPDIFRX flag is set or not.
99
100 [..]
101 (@) You can refer to the SPDIFRX HAL driver header file for more useful macros
102
103 *** Callback registration ***
104 =============================================
105
106 The compilation define USE_HAL_SPDIFRX_REGISTER_CALLBACKS when set to 1
107 allows the user to configure dynamically the driver callbacks.
108 Use HAL_SPDIFRX_RegisterCallback() function to register an interrupt callback.
109
110 The HAL_SPDIFRX_RegisterCallback() function allows to register the following callbacks:
111 (+) RxHalfCpltCallback : SPDIFRX Data flow half completed callback.
112 (+) RxCpltCallback : SPDIFRX Data flow completed callback.
113 (+) CxHalfCpltCallback : SPDIFRX Control flow half completed callback.
114 (+) CxCpltCallback : SPDIFRX Control flow completed callback.
115 (+) ErrorCallback : SPDIFRX error callback.
116 (+) MspInitCallback : SPDIFRX MspInit.
117 (+) MspDeInitCallback : SPDIFRX MspDeInit.
118 This function takes as parameters the HAL peripheral handle, the Callback ID
119 and a pointer to the user callback function.
120
121 Use HAL_SPDIFRX_UnRegisterCallback() function to reset a callback to the default
122 weak function.
123 The HAL_SPDIFRX_UnRegisterCallback() function takes as parameters the HAL peripheral handle,
124 and the Callback ID.
125 This function allows to reset the following callbacks:
126 (+) RxHalfCpltCallback : SPDIFRX Data flow half completed callback.
127 (+) RxCpltCallback : SPDIFRX Data flow completed callback.
128 (+) CxHalfCpltCallback : SPDIFRX Control flow half completed callback.
129 (+) CxCpltCallback : SPDIFRX Control flow completed callback.
130 (+) ErrorCallback : SPDIFRX error callback.
131 (+) MspInitCallback : SPDIFRX MspInit.
132 (+) MspDeInitCallback : SPDIFRX MspDeInit.
133
134 By default, after the HAL_SPDIFRX_Init() and when the state is HAL_SPDIFRX_STATE_RESET
135 all callbacks are set to the corresponding weak functions :
136 HAL_SPDIFRX_RxHalfCpltCallback() , HAL_SPDIFRX_RxCpltCallback(), HAL_SPDIFRX_CxHalfCpltCallback(),
137 HAL_SPDIFRX_CxCpltCallback() and HAL_SPDIFRX_ErrorCallback()
138 Exception done for MspInit and MspDeInit functions that are
139 reset to the legacy weak function in the HAL_SPDIFRX_Init()/ HAL_SPDIFRX_DeInit() only when
140 these callbacks pointers are NULL (not registered beforehand).
141 If not, MspInit or MspDeInit callbacks pointers are not null, the HAL_SPDIFRX_Init() / HAL_SPDIFRX_DeInit()
142 keep and use the user MspInit/MspDeInit functions (registered beforehand)
143
144 Callbacks can be registered/unregistered in HAL_SPDIFRX_STATE_READY state only.
145 Exception done MspInit/MspDeInit callbacks that can be registered/unregistered
146 in HAL_SPDIFRX_STATE_READY or HAL_SPDIFRX_STATE_RESET state,
147 thus registered (user) MspInit/DeInit callbacks can be used during the Init/DeInit.
148 In that case first register the MspInit/MspDeInit user callbacks
149 using HAL_SPDIFRX_RegisterCallback() before calling HAL_SPDIFRX_DeInit()
150 or HAL_SPDIFRX_Init() function.
151
152 When The compilation define USE_HAL_SPDIFRX_REGISTER_CALLBACKS is set to 0 or
153 not defined, the callback registration feature is not available and all callbacks
154 are set to the corresponding weak functions.
155
156 @endverbatim
157 */
158
159 /* Includes ------------------------------------------------------------------*/
160 #include "stm32f7xx_hal.h"
161
162 /** @addtogroup STM32F7xx_HAL_Driver
163 * @{
164 */
165
166 /** @defgroup SPDIFRX SPDIFRX
167 * @brief SPDIFRX HAL module driver
168 * @{
169 */
170
171 #ifdef HAL_SPDIFRX_MODULE_ENABLED
172 #if defined (SPDIFRX)
173
174 /* Private typedef -----------------------------------------------------------*/
175 /* Private define ------------------------------------------------------------*/
176 #define SPDIFRX_TIMEOUT_VALUE 0xFFFFU
177
178 /* Private macro -------------------------------------------------------------*/
179 /* Private variables ---------------------------------------------------------*/
180 /* Private function prototypes -----------------------------------------------*/
181 /** @addtogroup SPDIFRX_Private_Functions
182 * @{
183 */
184 static void SPDIFRX_DMARxCplt(DMA_HandleTypeDef *hdma);
185 static void SPDIFRX_DMARxHalfCplt(DMA_HandleTypeDef *hdma);
186 static void SPDIFRX_DMACxCplt(DMA_HandleTypeDef *hdma);
187 static void SPDIFRX_DMACxHalfCplt(DMA_HandleTypeDef *hdma);
188 static void SPDIFRX_DMAError(DMA_HandleTypeDef *hdma);
189 static void SPDIFRX_ReceiveControlFlow_IT(SPDIFRX_HandleTypeDef *hspdif);
190 static void SPDIFRX_ReceiveDataFlow_IT(SPDIFRX_HandleTypeDef *hspdif);
191 static HAL_StatusTypeDef SPDIFRX_WaitOnFlagUntilTimeout(SPDIFRX_HandleTypeDef *hspdif, uint32_t Flag,
192 FlagStatus Status, uint32_t Timeout, uint32_t tickstart);
193 /**
194 * @}
195 */
196 /* Exported functions ---------------------------------------------------------*/
197
198 /** @defgroup SPDIFRX_Exported_Functions SPDIFRX Exported Functions
199 * @{
200 */
201
202 /** @defgroup SPDIFRX_Exported_Functions_Group1 Initialization and de-initialization functions
203 * @brief Initialization and Configuration functions
204 *
205 @verbatim
206 ===============================================================================
207 ##### Initialization and de-initialization functions #####
208 ===============================================================================
209 [..] This subsection provides a set of functions allowing to initialize and
210 de-initialize the SPDIFRX peripheral:
211
212 (+) User must Implement HAL_SPDIFRX_MspInit() function in which he configures
213 all related peripherals resources (CLOCK, GPIO, DMA, IT and NVIC ).
214
215 (+) Call the function HAL_SPDIFRX_Init() to configure the SPDIFRX peripheral with
216 the selected configuration:
217 (++) Input Selection (IN0, IN1,...)
218 (++) Maximum allowed re-tries during synchronization phase
219 (++) Wait for activity on SPDIF selected input
220 (++) Channel status selection (from channel A or B)
221 (++) Data format (LSB, MSB, ...)
222 (++) Stereo mode
223 (++) User bits masking (PT,C,U,V,...)
224
225 (+) Call the function HAL_SPDIFRX_DeInit() to restore the default configuration
226 of the selected SPDIFRXx peripheral.
227 @endverbatim
228 * @{
229 */
230
231 /**
232 * @brief Initializes the SPDIFRX according to the specified parameters
233 * in the SPDIFRX_InitTypeDef and create the associated handle.
234 * @param hspdif SPDIFRX handle
235 * @retval HAL status
236 */
HAL_SPDIFRX_Init(SPDIFRX_HandleTypeDef * hspdif)237 HAL_StatusTypeDef HAL_SPDIFRX_Init(SPDIFRX_HandleTypeDef *hspdif)
238 {
239 uint32_t tmpreg;
240
241 /* Check the SPDIFRX handle allocation */
242 if (hspdif == NULL)
243 {
244 return HAL_ERROR;
245 }
246
247 /* Check the SPDIFRX parameters */
248 assert_param(IS_STEREO_MODE(hspdif->Init.StereoMode));
249 assert_param(IS_SPDIFRX_INPUT_SELECT(hspdif->Init.InputSelection));
250 assert_param(IS_SPDIFRX_MAX_RETRIES(hspdif->Init.Retries));
251 assert_param(IS_SPDIFRX_WAIT_FOR_ACTIVITY(hspdif->Init.WaitForActivity));
252 assert_param(IS_SPDIFRX_CHANNEL(hspdif->Init.ChannelSelection));
253 assert_param(IS_SPDIFRX_DATA_FORMAT(hspdif->Init.DataFormat));
254 assert_param(IS_PREAMBLE_TYPE_MASK(hspdif->Init.PreambleTypeMask));
255 assert_param(IS_CHANNEL_STATUS_MASK(hspdif->Init.ChannelStatusMask));
256 assert_param(IS_VALIDITY_MASK(hspdif->Init.ValidityBitMask));
257 assert_param(IS_PARITY_ERROR_MASK(hspdif->Init.ParityErrorMask));
258
259 #if (USE_HAL_SPDIFRX_REGISTER_CALLBACKS == 1)
260 if (hspdif->State == HAL_SPDIFRX_STATE_RESET)
261 {
262 /* Allocate lock resource and initialize it */
263 hspdif->Lock = HAL_UNLOCKED;
264
265 hspdif->RxHalfCpltCallback = HAL_SPDIFRX_RxHalfCpltCallback; /* Legacy weak RxHalfCpltCallback */
266 hspdif->RxCpltCallback = HAL_SPDIFRX_RxCpltCallback; /* Legacy weak RxCpltCallback */
267 hspdif->CxHalfCpltCallback = HAL_SPDIFRX_CxHalfCpltCallback; /* Legacy weak CxHalfCpltCallback */
268 hspdif->CxCpltCallback = HAL_SPDIFRX_CxCpltCallback; /* Legacy weak CxCpltCallback */
269 hspdif->ErrorCallback = HAL_SPDIFRX_ErrorCallback; /* Legacy weak ErrorCallback */
270
271 if (hspdif->MspInitCallback == NULL)
272 {
273 hspdif->MspInitCallback = HAL_SPDIFRX_MspInit; /* Legacy weak MspInit */
274 }
275
276 /* Init the low level hardware */
277 hspdif->MspInitCallback(hspdif);
278 }
279 #else
280 if (hspdif->State == HAL_SPDIFRX_STATE_RESET)
281 {
282 /* Allocate lock resource and initialize it */
283 hspdif->Lock = HAL_UNLOCKED;
284 /* Init the low level hardware : GPIO, CLOCK, CORTEX...etc */
285 HAL_SPDIFRX_MspInit(hspdif);
286 }
287 #endif /* USE_HAL_SPDIFRX_REGISTER_CALLBACKS */
288
289 /* SPDIFRX peripheral state is BUSY */
290 hspdif->State = HAL_SPDIFRX_STATE_BUSY;
291
292 /* Disable SPDIFRX interface (IDLE State) */
293 __HAL_SPDIFRX_IDLE(hspdif);
294
295 /* Reset the old SPDIFRX CR configuration */
296 tmpreg = hspdif->Instance->CR;
297
298 tmpreg &= ~(SPDIFRX_CR_RXSTEO | SPDIFRX_CR_DRFMT | SPDIFRX_CR_PMSK |
299 SPDIFRX_CR_VMSK | SPDIFRX_CR_CUMSK | SPDIFRX_CR_PTMSK |
300 SPDIFRX_CR_CHSEL | SPDIFRX_CR_NBTR | SPDIFRX_CR_WFA |
301 SPDIFRX_CR_INSEL);
302
303 /* Sets the new configuration of the SPDIFRX peripheral */
304 tmpreg |= (hspdif->Init.StereoMode |
305 hspdif->Init.InputSelection |
306 hspdif->Init.Retries |
307 hspdif->Init.WaitForActivity |
308 hspdif->Init.ChannelSelection |
309 hspdif->Init.DataFormat |
310 hspdif->Init.PreambleTypeMask |
311 hspdif->Init.ChannelStatusMask |
312 hspdif->Init.ValidityBitMask |
313 hspdif->Init.ParityErrorMask
314 );
315
316
317 hspdif->Instance->CR = tmpreg;
318
319 hspdif->ErrorCode = HAL_SPDIFRX_ERROR_NONE;
320
321 /* SPDIFRX peripheral state is READY*/
322 hspdif->State = HAL_SPDIFRX_STATE_READY;
323
324 return HAL_OK;
325 }
326
327 /**
328 * @brief DeInitializes the SPDIFRX peripheral
329 * @param hspdif SPDIFRX handle
330 * @retval HAL status
331 */
HAL_SPDIFRX_DeInit(SPDIFRX_HandleTypeDef * hspdif)332 HAL_StatusTypeDef HAL_SPDIFRX_DeInit(SPDIFRX_HandleTypeDef *hspdif)
333 {
334 /* Check the SPDIFRX handle allocation */
335 if (hspdif == NULL)
336 {
337 return HAL_ERROR;
338 }
339
340 /* Check the parameters */
341 assert_param(IS_SPDIFRX_ALL_INSTANCE(hspdif->Instance));
342
343 hspdif->State = HAL_SPDIFRX_STATE_BUSY;
344
345 /* Disable SPDIFRX interface (IDLE state) */
346 __HAL_SPDIFRX_IDLE(hspdif);
347
348 #if (USE_HAL_SPDIFRX_REGISTER_CALLBACKS == 1)
349 if (hspdif->MspDeInitCallback == NULL)
350 {
351 hspdif->MspDeInitCallback = HAL_SPDIFRX_MspDeInit; /* Legacy weak MspDeInit */
352 }
353
354 /* DeInit the low level hardware */
355 hspdif->MspDeInitCallback(hspdif);
356 #else
357 /* DeInit the low level hardware: GPIO, CLOCK, NVIC... */
358 HAL_SPDIFRX_MspDeInit(hspdif);
359 #endif /* USE_HAL_SPDIFRX_REGISTER_CALLBACKS */
360
361 hspdif->ErrorCode = HAL_SPDIFRX_ERROR_NONE;
362
363 /* SPDIFRX peripheral state is RESET*/
364 hspdif->State = HAL_SPDIFRX_STATE_RESET;
365
366 /* Release Lock */
367 __HAL_UNLOCK(hspdif);
368
369 return HAL_OK;
370 }
371
372 /**
373 * @brief SPDIFRX MSP Init
374 * @param hspdif SPDIFRX handle
375 * @retval None
376 */
HAL_SPDIFRX_MspInit(SPDIFRX_HandleTypeDef * hspdif)377 __weak void HAL_SPDIFRX_MspInit(SPDIFRX_HandleTypeDef *hspdif)
378 {
379 /* Prevent unused argument(s) compilation warning */
380 UNUSED(hspdif);
381
382 /* NOTE : This function Should not be modified, when the callback is needed,
383 the HAL_SPDIFRX_MspInit could be implemented in the user file
384 */
385 }
386
387 /**
388 * @brief SPDIFRX MSP DeInit
389 * @param hspdif SPDIFRX handle
390 * @retval None
391 */
HAL_SPDIFRX_MspDeInit(SPDIFRX_HandleTypeDef * hspdif)392 __weak void HAL_SPDIFRX_MspDeInit(SPDIFRX_HandleTypeDef *hspdif)
393 {
394 /* Prevent unused argument(s) compilation warning */
395 UNUSED(hspdif);
396
397 /* NOTE : This function Should not be modified, when the callback is needed,
398 the HAL_SPDIFRX_MspDeInit could be implemented in the user file
399 */
400 }
401
402 #if (USE_HAL_SPDIFRX_REGISTER_CALLBACKS == 1)
403 /**
404 * @brief Register a User SPDIFRX Callback
405 * To be used instead of the weak predefined callback
406 * @param hspdif SPDIFRX handle
407 * @param CallbackID ID of the callback to be registered
408 * This parameter can be one of the following values:
409 * @arg @ref HAL_SPDIFRX_RX_HALF_CB_ID SPDIFRX Data flow half completed callback ID
410 * @arg @ref HAL_SPDIFRX_RX_CPLT_CB_ID SPDIFRX Data flow completed callback ID
411 * @arg @ref HAL_SPDIFRX_CX_HALF_CB_ID SPDIFRX Control flow half completed callback ID
412 * @arg @ref HAL_SPDIFRX_CX_CPLT_CB_ID SPDIFRX Control flow completed callback ID
413 * @arg @ref HAL_SPDIFRX_ERROR_CB_ID SPDIFRX error callback ID
414 * @arg @ref HAL_SPDIFRX_MSPINIT_CB_ID MspInit callback ID
415 * @arg @ref HAL_SPDIFRX_MSPDEINIT_CB_ID MspDeInit callback ID
416 * @param pCallback pointer to the Callback function
417 * @retval HAL status
418 */
HAL_SPDIFRX_RegisterCallback(SPDIFRX_HandleTypeDef * hspdif,HAL_SPDIFRX_CallbackIDTypeDef CallbackID,pSPDIFRX_CallbackTypeDef pCallback)419 HAL_StatusTypeDef HAL_SPDIFRX_RegisterCallback(SPDIFRX_HandleTypeDef *hspdif, HAL_SPDIFRX_CallbackIDTypeDef CallbackID,
420 pSPDIFRX_CallbackTypeDef pCallback)
421 {
422 HAL_StatusTypeDef status = HAL_OK;
423
424 if (pCallback == NULL)
425 {
426 /* Update the error code */
427 hspdif->ErrorCode |= HAL_SPDIFRX_ERROR_INVALID_CALLBACK;
428 return HAL_ERROR;
429 }
430 /* Process locked */
431 __HAL_LOCK(hspdif);
432
433 if (HAL_SPDIFRX_STATE_READY == hspdif->State)
434 {
435 switch (CallbackID)
436 {
437 case HAL_SPDIFRX_RX_HALF_CB_ID :
438 hspdif->RxHalfCpltCallback = pCallback;
439 break;
440
441 case HAL_SPDIFRX_RX_CPLT_CB_ID :
442 hspdif->RxCpltCallback = pCallback;
443 break;
444
445 case HAL_SPDIFRX_CX_HALF_CB_ID :
446 hspdif->CxHalfCpltCallback = pCallback;
447 break;
448
449 case HAL_SPDIFRX_CX_CPLT_CB_ID :
450 hspdif->CxCpltCallback = pCallback;
451 break;
452
453 case HAL_SPDIFRX_ERROR_CB_ID :
454 hspdif->ErrorCallback = pCallback;
455 break;
456
457 case HAL_SPDIFRX_MSPINIT_CB_ID :
458 hspdif->MspInitCallback = pCallback;
459 break;
460
461 case HAL_SPDIFRX_MSPDEINIT_CB_ID :
462 hspdif->MspDeInitCallback = pCallback;
463 break;
464
465 default :
466 /* Update the error code */
467 hspdif->ErrorCode |= HAL_SPDIFRX_ERROR_INVALID_CALLBACK;
468 /* Return error status */
469 status = HAL_ERROR;
470 break;
471 }
472 }
473 else if (HAL_SPDIFRX_STATE_RESET == hspdif->State)
474 {
475 switch (CallbackID)
476 {
477 case HAL_SPDIFRX_MSPINIT_CB_ID :
478 hspdif->MspInitCallback = pCallback;
479 break;
480
481 case HAL_SPDIFRX_MSPDEINIT_CB_ID :
482 hspdif->MspDeInitCallback = pCallback;
483 break;
484
485 default :
486 /* Update the error code */
487 hspdif->ErrorCode |= HAL_SPDIFRX_ERROR_INVALID_CALLBACK;
488 /* Return error status */
489 status = HAL_ERROR;
490 break;
491 }
492 }
493 else
494 {
495 /* Update the error code */
496 hspdif->ErrorCode |= HAL_SPDIFRX_ERROR_INVALID_CALLBACK;
497 /* Return error status */
498 status = HAL_ERROR;
499 }
500
501 /* Release Lock */
502 __HAL_UNLOCK(hspdif);
503 return status;
504 }
505
506 /**
507 * @brief Unregister a SPDIFRX Callback
508 * SPDIFRX callback is redirected to the weak predefined callback
509 * @param hspdif SPDIFRX handle
510 * @param CallbackID ID of the callback to be unregistered
511 * This parameter can be one of the following values:
512 * @arg @ref HAL_SPDIFRX_RX_HALF_CB_ID SPDIFRX Data flow half completed callback ID
513 * @arg @ref HAL_SPDIFRX_RX_CPLT_CB_ID SPDIFRX Data flow completed callback ID
514 * @arg @ref HAL_SPDIFRX_CX_HALF_CB_ID SPDIFRX Control flow half completed callback ID
515 * @arg @ref HAL_SPDIFRX_CX_CPLT_CB_ID SPDIFRX Control flow completed callback ID
516 * @arg @ref HAL_SPDIFRX_ERROR_CB_ID SPDIFRX error callback ID
517 * @arg @ref HAL_SPDIFRX_MSPINIT_CB_ID MspInit callback ID
518 * @arg @ref HAL_SPDIFRX_MSPDEINIT_CB_ID MspDeInit callback ID
519 * @retval HAL status
520 */
HAL_SPDIFRX_UnRegisterCallback(SPDIFRX_HandleTypeDef * hspdif,HAL_SPDIFRX_CallbackIDTypeDef CallbackID)521 HAL_StatusTypeDef HAL_SPDIFRX_UnRegisterCallback(SPDIFRX_HandleTypeDef *hspdif,
522 HAL_SPDIFRX_CallbackIDTypeDef CallbackID)
523 {
524 HAL_StatusTypeDef status = HAL_OK;
525
526 /* Process locked */
527 __HAL_LOCK(hspdif);
528
529 if (HAL_SPDIFRX_STATE_READY == hspdif->State)
530 {
531 switch (CallbackID)
532 {
533 case HAL_SPDIFRX_RX_HALF_CB_ID :
534 hspdif->RxHalfCpltCallback = HAL_SPDIFRX_RxHalfCpltCallback;
535 break;
536
537 case HAL_SPDIFRX_RX_CPLT_CB_ID :
538 hspdif->RxCpltCallback = HAL_SPDIFRX_RxCpltCallback;
539 break;
540
541 case HAL_SPDIFRX_CX_HALF_CB_ID :
542 hspdif->CxHalfCpltCallback = HAL_SPDIFRX_CxHalfCpltCallback;
543 break;
544
545 case HAL_SPDIFRX_CX_CPLT_CB_ID :
546 hspdif->CxCpltCallback = HAL_SPDIFRX_CxCpltCallback;
547 break;
548
549 case HAL_SPDIFRX_ERROR_CB_ID :
550 hspdif->ErrorCallback = HAL_SPDIFRX_ErrorCallback;
551 break;
552
553 default :
554 /* Update the error code */
555 hspdif->ErrorCode |= HAL_SPDIFRX_ERROR_INVALID_CALLBACK;
556 /* Return error status */
557 status = HAL_ERROR;
558 break;
559 }
560 }
561 else if (HAL_SPDIFRX_STATE_RESET == hspdif->State)
562 {
563 switch (CallbackID)
564 {
565 case HAL_SPDIFRX_MSPINIT_CB_ID :
566 hspdif->MspInitCallback = HAL_SPDIFRX_MspInit; /* Legacy weak MspInit */
567 break;
568
569 case HAL_SPDIFRX_MSPDEINIT_CB_ID :
570 hspdif->MspDeInitCallback = HAL_SPDIFRX_MspDeInit; /* Legacy weak MspInit */
571 break;
572
573 default :
574 /* Update the error code */
575 hspdif->ErrorCode |= HAL_SPDIFRX_ERROR_INVALID_CALLBACK;
576 /* Return error status */
577 status = HAL_ERROR;
578 break;
579 }
580 }
581 else
582 {
583 /* Update the error code */
584 hspdif->ErrorCode |= HAL_SPDIFRX_ERROR_INVALID_CALLBACK;
585 /* Return error status */
586 status = HAL_ERROR;
587 }
588
589 /* Release Lock */
590 __HAL_UNLOCK(hspdif);
591 return status;
592 }
593
594 #endif /* USE_HAL_SPDIFRX_REGISTER_CALLBACKS */
595
596 /**
597 * @brief Set the SPDIFRX data format according to the specified parameters in the SPDIFRX_InitTypeDef.
598 * @param hspdif SPDIFRX handle
599 * @param sDataFormat SPDIFRX data format
600 * @retval HAL status
601 */
HAL_SPDIFRX_SetDataFormat(SPDIFRX_HandleTypeDef * hspdif,SPDIFRX_SetDataFormatTypeDef sDataFormat)602 HAL_StatusTypeDef HAL_SPDIFRX_SetDataFormat(SPDIFRX_HandleTypeDef *hspdif, SPDIFRX_SetDataFormatTypeDef sDataFormat)
603 {
604 uint32_t tmpreg;
605
606 /* Check the SPDIFRX handle allocation */
607 if (hspdif == NULL)
608 {
609 return HAL_ERROR;
610 }
611
612 /* Check the SPDIFRX parameters */
613 assert_param(IS_STEREO_MODE(sDataFormat.StereoMode));
614 assert_param(IS_SPDIFRX_DATA_FORMAT(sDataFormat.DataFormat));
615 assert_param(IS_PREAMBLE_TYPE_MASK(sDataFormat.PreambleTypeMask));
616 assert_param(IS_CHANNEL_STATUS_MASK(sDataFormat.ChannelStatusMask));
617 assert_param(IS_VALIDITY_MASK(sDataFormat.ValidityBitMask));
618 assert_param(IS_PARITY_ERROR_MASK(sDataFormat.ParityErrorMask));
619
620 /* Reset the old SPDIFRX CR configuration */
621 tmpreg = hspdif->Instance->CR;
622
623 if (((tmpreg & SPDIFRX_STATE_RCV) == SPDIFRX_STATE_RCV) &&
624 (((tmpreg & SPDIFRX_CR_DRFMT) != sDataFormat.DataFormat) ||
625 ((tmpreg & SPDIFRX_CR_RXSTEO) != sDataFormat.StereoMode)))
626 {
627 return HAL_ERROR;
628 }
629
630 tmpreg &= ~(SPDIFRX_CR_RXSTEO | SPDIFRX_CR_DRFMT | SPDIFRX_CR_PMSK |
631 SPDIFRX_CR_VMSK | SPDIFRX_CR_CUMSK | SPDIFRX_CR_PTMSK);
632
633 /* Configure the new data format */
634 tmpreg |= (sDataFormat.StereoMode |
635 sDataFormat.DataFormat |
636 sDataFormat.PreambleTypeMask |
637 sDataFormat.ChannelStatusMask |
638 sDataFormat.ValidityBitMask |
639 sDataFormat.ParityErrorMask);
640
641 hspdif->Instance->CR = tmpreg;
642
643 return HAL_OK;
644 }
645
646 /**
647 * @}
648 */
649
650 /** @defgroup SPDIFRX_Exported_Functions_Group2 IO operation functions
651 * @brief Data transfers functions
652 *
653 @verbatim
654 ===============================================================================
655 ##### IO operation functions #####
656 ===============================================================================
657 [..]
658 This subsection provides a set of functions allowing to manage the SPDIFRX data
659 transfers.
660
661 (#) There is two mode of transfer:
662 (++) Blocking mode : The communication is performed in the polling mode.
663 The status of all data processing is returned by the same function
664 after finishing transfer.
665 (++) No-Blocking mode : The communication is performed using Interrupts
666 or DMA. These functions return the status of the transfer start-up.
667 The end of the data processing will be indicated through the
668 dedicated SPDIFRX IRQ when using Interrupt mode or the DMA IRQ when
669 using DMA mode.
670
671 (#) Blocking mode functions are :
672 (++) HAL_SPDIFRX_ReceiveDataFlow()
673 (++) HAL_SPDIFRX_ReceiveControlFlow()
674 (+@) Do not use blocking mode to receive both control and data flow at the same time.
675
676 (#) No-Blocking mode functions with Interrupt are :
677 (++) HAL_SPDIFRX_ReceiveControlFlow_IT()
678 (++) HAL_SPDIFRX_ReceiveDataFlow_IT()
679
680 (#) No-Blocking mode functions with DMA are :
681 (++) HAL_SPDIFRX_ReceiveControlFlow_DMA()
682 (++) HAL_SPDIFRX_ReceiveDataFlow_DMA()
683
684 (#) A set of Transfer Complete Callbacks are provided in No_Blocking mode:
685 (++) HAL_SPDIFRX_RxCpltCallback()
686 (++) HAL_SPDIFRX_CxCpltCallback()
687
688 @endverbatim
689 * @{
690 */
691
692 /**
693 * @brief Receives an amount of data (Data Flow) in blocking mode.
694 * @param hspdif pointer to SPDIFRX_HandleTypeDef structure that contains
695 * the configuration information for SPDIFRX module.
696 * @param pData Pointer to data buffer
697 * @param Size Amount of data to be received
698 * @param Timeout Timeout duration
699 * @retval HAL status
700 */
HAL_SPDIFRX_ReceiveDataFlow(SPDIFRX_HandleTypeDef * hspdif,uint32_t * pData,uint16_t Size,uint32_t Timeout)701 HAL_StatusTypeDef HAL_SPDIFRX_ReceiveDataFlow(SPDIFRX_HandleTypeDef *hspdif, uint32_t *pData, uint16_t Size,
702 uint32_t Timeout)
703 {
704 uint32_t tickstart;
705 uint16_t sizeCounter = Size;
706 uint32_t *pTmpBuf = pData;
707
708 if ((pData == NULL) || (Size == 0U))
709 {
710 return HAL_ERROR;
711 }
712
713 if (hspdif->State == HAL_SPDIFRX_STATE_READY)
714 {
715 /* Process Locked */
716 __HAL_LOCK(hspdif);
717
718 hspdif->State = HAL_SPDIFRX_STATE_BUSY;
719
720 /* Start synchronisation */
721 __HAL_SPDIFRX_SYNC(hspdif);
722
723 /* Get tick */
724 tickstart = HAL_GetTick();
725
726 /* Wait until SYNCD flag is set */
727 if (SPDIFRX_WaitOnFlagUntilTimeout(hspdif, SPDIFRX_FLAG_SYNCD, RESET, Timeout, tickstart) != HAL_OK)
728 {
729 return HAL_TIMEOUT;
730 }
731
732 /* Start reception */
733 __HAL_SPDIFRX_RCV(hspdif);
734
735 /* Receive data flow */
736 while (sizeCounter > 0U)
737 {
738 /* Get tick */
739 tickstart = HAL_GetTick();
740
741 /* Wait until RXNE flag is set */
742 if (SPDIFRX_WaitOnFlagUntilTimeout(hspdif, SPDIFRX_FLAG_RXNE, RESET, Timeout, tickstart) != HAL_OK)
743 {
744 return HAL_TIMEOUT;
745 }
746
747 (*pTmpBuf) = hspdif->Instance->DR;
748 pTmpBuf++;
749 sizeCounter--;
750 }
751
752 /* SPDIFRX ready */
753 hspdif->State = HAL_SPDIFRX_STATE_READY;
754
755 /* Process Unlocked */
756 __HAL_UNLOCK(hspdif);
757
758 return HAL_OK;
759 }
760 else
761 {
762 return HAL_BUSY;
763 }
764 }
765
766 /**
767 * @brief Receives an amount of data (Control Flow) in blocking mode.
768 * @param hspdif pointer to a SPDIFRX_HandleTypeDef structure that contains
769 * the configuration information for SPDIFRX module.
770 * @param pData Pointer to data buffer
771 * @param Size Amount of data to be received
772 * @param Timeout Timeout duration
773 * @retval HAL status
774 */
HAL_SPDIFRX_ReceiveControlFlow(SPDIFRX_HandleTypeDef * hspdif,uint32_t * pData,uint16_t Size,uint32_t Timeout)775 HAL_StatusTypeDef HAL_SPDIFRX_ReceiveControlFlow(SPDIFRX_HandleTypeDef *hspdif, uint32_t *pData, uint16_t Size,
776 uint32_t Timeout)
777 {
778 uint32_t tickstart;
779 uint16_t sizeCounter = Size;
780 uint32_t *pTmpBuf = pData;
781
782 if ((pData == NULL) || (Size == 0U))
783 {
784 return HAL_ERROR;
785 }
786
787 if (hspdif->State == HAL_SPDIFRX_STATE_READY)
788 {
789 /* Process Locked */
790 __HAL_LOCK(hspdif);
791
792 hspdif->State = HAL_SPDIFRX_STATE_BUSY;
793
794 /* Start synchronization */
795 __HAL_SPDIFRX_SYNC(hspdif);
796
797 /* Get tick */
798 tickstart = HAL_GetTick();
799
800 /* Wait until SYNCD flag is set */
801 if (SPDIFRX_WaitOnFlagUntilTimeout(hspdif, SPDIFRX_FLAG_SYNCD, RESET, Timeout, tickstart) != HAL_OK)
802 {
803 return HAL_TIMEOUT;
804 }
805
806 /* Start reception */
807 __HAL_SPDIFRX_RCV(hspdif);
808
809 /* Receive control flow */
810 while (sizeCounter > 0U)
811 {
812 /* Get tick */
813 tickstart = HAL_GetTick();
814
815 /* Wait until CSRNE flag is set */
816 if (SPDIFRX_WaitOnFlagUntilTimeout(hspdif, SPDIFRX_FLAG_CSRNE, RESET, Timeout, tickstart) != HAL_OK)
817 {
818 return HAL_TIMEOUT;
819 }
820
821 (*pTmpBuf) = hspdif->Instance->CSR;
822 pTmpBuf++;
823 sizeCounter--;
824 }
825
826 /* SPDIFRX ready */
827 hspdif->State = HAL_SPDIFRX_STATE_READY;
828
829 /* Process Unlocked */
830 __HAL_UNLOCK(hspdif);
831
832 return HAL_OK;
833 }
834 else
835 {
836 return HAL_BUSY;
837 }
838 }
839
840 /**
841 * @brief Receive an amount of data (Data Flow) in non-blocking mode with Interrupt
842 * @param hspdif SPDIFRX handle
843 * @param pData a 32-bit pointer to the Receive data buffer.
844 * @param Size number of data sample to be received .
845 * @retval HAL status
846 */
HAL_SPDIFRX_ReceiveDataFlow_IT(SPDIFRX_HandleTypeDef * hspdif,uint32_t * pData,uint16_t Size)847 HAL_StatusTypeDef HAL_SPDIFRX_ReceiveDataFlow_IT(SPDIFRX_HandleTypeDef *hspdif, uint32_t *pData, uint16_t Size)
848 {
849 uint32_t count = SPDIFRX_TIMEOUT_VALUE * (SystemCoreClock / 24U / 1000U);
850
851 const HAL_SPDIFRX_StateTypeDef tempState = hspdif->State;
852
853 if ((tempState == HAL_SPDIFRX_STATE_READY) || (tempState == HAL_SPDIFRX_STATE_BUSY_CX))
854 {
855 if ((pData == NULL) || (Size == 0U))
856 {
857 return HAL_ERROR;
858 }
859
860 /* Process Locked */
861 __HAL_LOCK(hspdif);
862
863 hspdif->pRxBuffPtr = pData;
864 hspdif->RxXferSize = Size;
865 hspdif->RxXferCount = Size;
866
867 hspdif->ErrorCode = HAL_SPDIFRX_ERROR_NONE;
868
869 /* Check if a receive process is ongoing or not */
870 hspdif->State = HAL_SPDIFRX_STATE_BUSY_RX;
871
872 /* Enable the SPDIFRX PE Error Interrupt */
873 __HAL_SPDIFRX_ENABLE_IT(hspdif, SPDIFRX_IT_PERRIE);
874
875 /* Enable the SPDIFRX OVR Error Interrupt */
876 __HAL_SPDIFRX_ENABLE_IT(hspdif, SPDIFRX_IT_OVRIE);
877
878 /* Enable the SPDIFRX RXNE interrupt */
879 __HAL_SPDIFRX_ENABLE_IT(hspdif, SPDIFRX_IT_RXNE);
880
881 if ((SPDIFRX->CR & SPDIFRX_CR_SPDIFEN) != SPDIFRX_STATE_RCV)
882 {
883 /* Start synchronization */
884 __HAL_SPDIFRX_SYNC(hspdif);
885
886 /* Wait until SYNCD flag is set */
887 do
888 {
889 if (count == 0U)
890 {
891 /* Disable TXE, RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts for the interrupt process */
892 __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_RXNE);
893 __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_CSRNE);
894 __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_PERRIE);
895 __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_OVRIE);
896 __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_SBLKIE);
897 __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_SYNCDIE);
898 __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_IFEIE);
899
900 hspdif->State = HAL_SPDIFRX_STATE_READY;
901
902 /* Process Unlocked */
903 __HAL_UNLOCK(hspdif);
904
905 return HAL_TIMEOUT;
906 }
907 count--;
908 } while (__HAL_SPDIFRX_GET_FLAG(hspdif, SPDIFRX_FLAG_SYNCD) == RESET);
909
910 /* Start reception */
911 __HAL_SPDIFRX_RCV(hspdif);
912 }
913
914 /* Process Unlocked */
915 __HAL_UNLOCK(hspdif);
916
917 return HAL_OK;
918 }
919 else
920 {
921 return HAL_BUSY;
922 }
923 }
924
925 /**
926 * @brief Receive an amount of data (Control Flow) with Interrupt
927 * @param hspdif SPDIFRX handle
928 * @param pData a 32-bit pointer to the Receive data buffer.
929 * @param Size number of data sample (Control Flow) to be received
930 * @retval HAL status
931 */
HAL_SPDIFRX_ReceiveControlFlow_IT(SPDIFRX_HandleTypeDef * hspdif,uint32_t * pData,uint16_t Size)932 HAL_StatusTypeDef HAL_SPDIFRX_ReceiveControlFlow_IT(SPDIFRX_HandleTypeDef *hspdif, uint32_t *pData, uint16_t Size)
933 {
934 uint32_t count = SPDIFRX_TIMEOUT_VALUE * (SystemCoreClock / 24U / 1000U);
935
936 const HAL_SPDIFRX_StateTypeDef tempState = hspdif->State;
937
938 if ((tempState == HAL_SPDIFRX_STATE_READY) || (tempState == HAL_SPDIFRX_STATE_BUSY_RX))
939 {
940 if ((pData == NULL) || (Size == 0U))
941 {
942 return HAL_ERROR;
943 }
944
945 /* Process Locked */
946 __HAL_LOCK(hspdif);
947
948 hspdif->pCsBuffPtr = pData;
949 hspdif->CsXferSize = Size;
950 hspdif->CsXferCount = Size;
951
952 hspdif->ErrorCode = HAL_SPDIFRX_ERROR_NONE;
953
954 /* Check if a receive process is ongoing or not */
955 hspdif->State = HAL_SPDIFRX_STATE_BUSY_CX;
956
957 /* Enable the SPDIFRX PE Error Interrupt */
958 __HAL_SPDIFRX_ENABLE_IT(hspdif, SPDIFRX_IT_PERRIE);
959
960 /* Enable the SPDIFRX OVR Error Interrupt */
961 __HAL_SPDIFRX_ENABLE_IT(hspdif, SPDIFRX_IT_OVRIE);
962
963 /* Enable the SPDIFRX CSRNE interrupt */
964 __HAL_SPDIFRX_ENABLE_IT(hspdif, SPDIFRX_IT_CSRNE);
965
966 if ((SPDIFRX->CR & SPDIFRX_CR_SPDIFEN) != SPDIFRX_STATE_RCV)
967 {
968 /* Start synchronization */
969 __HAL_SPDIFRX_SYNC(hspdif);
970
971 /* Wait until SYNCD flag is set */
972 do
973 {
974 if (count == 0U)
975 {
976 /* Disable TXE, RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts for the interrupt process */
977 __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_RXNE);
978 __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_CSRNE);
979 __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_PERRIE);
980 __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_OVRIE);
981 __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_SBLKIE);
982 __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_SYNCDIE);
983 __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_IFEIE);
984
985 hspdif->State = HAL_SPDIFRX_STATE_READY;
986
987 /* Process Unlocked */
988 __HAL_UNLOCK(hspdif);
989
990 return HAL_TIMEOUT;
991 }
992 count--;
993 } while (__HAL_SPDIFRX_GET_FLAG(hspdif, SPDIFRX_FLAG_SYNCD) == RESET);
994
995 /* Start reception */
996 __HAL_SPDIFRX_RCV(hspdif);
997 }
998
999 /* Process Unlocked */
1000 __HAL_UNLOCK(hspdif);
1001
1002 return HAL_OK;
1003 }
1004 else
1005 {
1006 return HAL_BUSY;
1007 }
1008 }
1009
1010 /**
1011 * @brief Receive an amount of data (Data Flow) mode with DMA
1012 * @param hspdif SPDIFRX handle
1013 * @param pData a 32-bit pointer to the Receive data buffer.
1014 * @param Size number of data sample to be received
1015 * @retval HAL status
1016 */
HAL_SPDIFRX_ReceiveDataFlow_DMA(SPDIFRX_HandleTypeDef * hspdif,uint32_t * pData,uint16_t Size)1017 HAL_StatusTypeDef HAL_SPDIFRX_ReceiveDataFlow_DMA(SPDIFRX_HandleTypeDef *hspdif, uint32_t *pData, uint16_t Size)
1018 {
1019 uint32_t count = SPDIFRX_TIMEOUT_VALUE * (SystemCoreClock / 24U / 1000U);
1020
1021 const HAL_SPDIFRX_StateTypeDef tempState = hspdif->State;
1022
1023 if ((pData == NULL) || (Size == 0U))
1024 {
1025 return HAL_ERROR;
1026 }
1027
1028 if ((tempState == HAL_SPDIFRX_STATE_READY) || (tempState == HAL_SPDIFRX_STATE_BUSY_CX))
1029 {
1030 /* Process Locked */
1031 __HAL_LOCK(hspdif);
1032
1033 hspdif->pRxBuffPtr = pData;
1034 hspdif->RxXferSize = Size;
1035 hspdif->RxXferCount = Size;
1036
1037 hspdif->ErrorCode = HAL_SPDIFRX_ERROR_NONE;
1038 hspdif->State = HAL_SPDIFRX_STATE_BUSY_RX;
1039
1040 /* Set the SPDIFRX Rx DMA Half transfer complete callback */
1041 hspdif->hdmaDrRx->XferHalfCpltCallback = SPDIFRX_DMARxHalfCplt;
1042
1043 /* Set the SPDIFRX Rx DMA transfer complete callback */
1044 hspdif->hdmaDrRx->XferCpltCallback = SPDIFRX_DMARxCplt;
1045
1046 /* Set the DMA error callback */
1047 hspdif->hdmaDrRx->XferErrorCallback = SPDIFRX_DMAError;
1048
1049 /* Enable the DMA request */
1050 if (HAL_DMA_Start_IT(hspdif->hdmaDrRx, (uint32_t)&hspdif->Instance->DR, (uint32_t)hspdif->pRxBuffPtr, Size) != HAL_OK)
1051 {
1052 /* Set SPDIFRX error */
1053 hspdif->ErrorCode = HAL_SPDIFRX_ERROR_DMA;
1054
1055 /* Set SPDIFRX state */
1056 hspdif->State = HAL_SPDIFRX_STATE_ERROR;
1057
1058 /* Process Unlocked */
1059 __HAL_UNLOCK(hspdif);
1060
1061 return HAL_ERROR;
1062 }
1063
1064 /* Enable RXDMAEN bit in SPDIFRX CR register for data flow reception*/
1065 hspdif->Instance->CR |= SPDIFRX_CR_RXDMAEN;
1066
1067 if ((SPDIFRX->CR & SPDIFRX_CR_SPDIFEN) != SPDIFRX_STATE_RCV)
1068 {
1069 /* Start synchronization */
1070 __HAL_SPDIFRX_SYNC(hspdif);
1071
1072 /* Wait until SYNCD flag is set */
1073 do
1074 {
1075 if (count == 0U)
1076 {
1077 /* Disable TXE, RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts for the interrupt process */
1078 __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_RXNE);
1079 __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_CSRNE);
1080 __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_PERRIE);
1081 __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_OVRIE);
1082 __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_SBLKIE);
1083 __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_SYNCDIE);
1084 __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_IFEIE);
1085
1086 hspdif->State = HAL_SPDIFRX_STATE_READY;
1087
1088 /* Process Unlocked */
1089 __HAL_UNLOCK(hspdif);
1090
1091 return HAL_TIMEOUT;
1092 }
1093 count--;
1094 } while (__HAL_SPDIFRX_GET_FLAG(hspdif, SPDIFRX_FLAG_SYNCD) == RESET);
1095
1096 /* Start reception */
1097 __HAL_SPDIFRX_RCV(hspdif);
1098 }
1099
1100 /* Process Unlocked */
1101 __HAL_UNLOCK(hspdif);
1102
1103 return HAL_OK;
1104 }
1105 else
1106 {
1107 return HAL_BUSY;
1108 }
1109 }
1110
1111 /**
1112 * @brief Receive an amount of data (Control Flow) with DMA
1113 * @param hspdif SPDIFRX handle
1114 * @param pData a 32-bit pointer to the Receive data buffer.
1115 * @param Size number of data (Control Flow) sample to be received
1116 * @retval HAL status
1117 */
HAL_SPDIFRX_ReceiveControlFlow_DMA(SPDIFRX_HandleTypeDef * hspdif,uint32_t * pData,uint16_t Size)1118 HAL_StatusTypeDef HAL_SPDIFRX_ReceiveControlFlow_DMA(SPDIFRX_HandleTypeDef *hspdif, uint32_t *pData, uint16_t Size)
1119 {
1120 uint32_t count = SPDIFRX_TIMEOUT_VALUE * (SystemCoreClock / 24U / 1000U);
1121
1122 const HAL_SPDIFRX_StateTypeDef tempState = hspdif->State;
1123
1124 if ((pData == NULL) || (Size == 0U))
1125 {
1126 return HAL_ERROR;
1127 }
1128
1129 if ((tempState == HAL_SPDIFRX_STATE_READY) || (tempState == HAL_SPDIFRX_STATE_BUSY_RX))
1130 {
1131 hspdif->pCsBuffPtr = pData;
1132 hspdif->CsXferSize = Size;
1133 hspdif->CsXferCount = Size;
1134
1135 /* Process Locked */
1136 __HAL_LOCK(hspdif);
1137
1138 hspdif->ErrorCode = HAL_SPDIFRX_ERROR_NONE;
1139 hspdif->State = HAL_SPDIFRX_STATE_BUSY_CX;
1140
1141 /* Set the SPDIFRX Rx DMA Half transfer complete callback */
1142 hspdif->hdmaCsRx->XferHalfCpltCallback = SPDIFRX_DMACxHalfCplt;
1143
1144 /* Set the SPDIFRX Rx DMA transfer complete callback */
1145 hspdif->hdmaCsRx->XferCpltCallback = SPDIFRX_DMACxCplt;
1146
1147 /* Set the DMA error callback */
1148 hspdif->hdmaCsRx->XferErrorCallback = SPDIFRX_DMAError;
1149
1150 /* Enable the DMA request */
1151 if (HAL_DMA_Start_IT(hspdif->hdmaCsRx, (uint32_t)&hspdif->Instance->CSR, (uint32_t)hspdif->pCsBuffPtr, Size) != HAL_OK)
1152 {
1153 /* Set SPDIFRX error */
1154 hspdif->ErrorCode = HAL_SPDIFRX_ERROR_DMA;
1155
1156 /* Set SPDIFRX state */
1157 hspdif->State = HAL_SPDIFRX_STATE_ERROR;
1158
1159 /* Process Unlocked */
1160 __HAL_UNLOCK(hspdif);
1161
1162 return HAL_ERROR;
1163 }
1164
1165 /* Enable CBDMAEN bit in SPDIFRX CR register for control flow reception*/
1166 hspdif->Instance->CR |= SPDIFRX_CR_CBDMAEN;
1167
1168 if ((SPDIFRX->CR & SPDIFRX_CR_SPDIFEN) != SPDIFRX_STATE_RCV)
1169 {
1170 /* Start synchronization */
1171 __HAL_SPDIFRX_SYNC(hspdif);
1172
1173 /* Wait until SYNCD flag is set */
1174 do
1175 {
1176 if (count == 0U)
1177 {
1178 /* Disable TXE, RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts for the interrupt process */
1179 __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_RXNE);
1180 __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_CSRNE);
1181 __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_PERRIE);
1182 __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_OVRIE);
1183 __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_SBLKIE);
1184 __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_SYNCDIE);
1185 __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_IFEIE);
1186
1187 hspdif->State = HAL_SPDIFRX_STATE_READY;
1188
1189 /* Process Unlocked */
1190 __HAL_UNLOCK(hspdif);
1191
1192 return HAL_TIMEOUT;
1193 }
1194 count--;
1195 } while (__HAL_SPDIFRX_GET_FLAG(hspdif, SPDIFRX_FLAG_SYNCD) == RESET);
1196
1197 /* Start reception */
1198 __HAL_SPDIFRX_RCV(hspdif);
1199 }
1200
1201 /* Process Unlocked */
1202 __HAL_UNLOCK(hspdif);
1203
1204 return HAL_OK;
1205 }
1206 else
1207 {
1208 return HAL_BUSY;
1209 }
1210 }
1211
1212 /**
1213 * @brief stop the audio stream receive from the Media.
1214 * @param hspdif SPDIFRX handle
1215 * @retval None
1216 */
HAL_SPDIFRX_DMAStop(SPDIFRX_HandleTypeDef * hspdif)1217 HAL_StatusTypeDef HAL_SPDIFRX_DMAStop(SPDIFRX_HandleTypeDef *hspdif)
1218 {
1219 /* Process Locked */
1220 __HAL_LOCK(hspdif);
1221
1222 /* Disable the SPDIFRX DMA requests */
1223 hspdif->Instance->CR &= (uint16_t)(~SPDIFRX_CR_RXDMAEN);
1224 hspdif->Instance->CR &= (uint16_t)(~SPDIFRX_CR_CBDMAEN);
1225
1226 /* Disable the SPDIFRX DMA channel */
1227 __HAL_DMA_DISABLE(hspdif->hdmaDrRx);
1228 __HAL_DMA_DISABLE(hspdif->hdmaCsRx);
1229
1230 /* Disable SPDIFRX peripheral */
1231 __HAL_SPDIFRX_IDLE(hspdif);
1232
1233 hspdif->State = HAL_SPDIFRX_STATE_READY;
1234
1235 /* Process Unlocked */
1236 __HAL_UNLOCK(hspdif);
1237
1238 return HAL_OK;
1239 }
1240
1241 /**
1242 * @brief This function handles SPDIFRX interrupt request.
1243 * @param hspdif SPDIFRX handle
1244 * @retval HAL status
1245 */
HAL_SPDIFRX_IRQHandler(SPDIFRX_HandleTypeDef * hspdif)1246 void HAL_SPDIFRX_IRQHandler(SPDIFRX_HandleTypeDef *hspdif)
1247 {
1248 uint32_t itFlag = hspdif->Instance->SR;
1249 uint32_t itSource = hspdif->Instance->IMR;
1250
1251 /* SPDIFRX in mode Data Flow Reception */
1252 if (((itFlag & SPDIFRX_FLAG_RXNE) == SPDIFRX_FLAG_RXNE) && ((itSource & SPDIFRX_IT_RXNE) == SPDIFRX_IT_RXNE))
1253 {
1254 __HAL_SPDIFRX_CLEAR_IT(hspdif, SPDIFRX_IT_RXNE);
1255 SPDIFRX_ReceiveDataFlow_IT(hspdif);
1256 }
1257
1258 /* SPDIFRX in mode Control Flow Reception */
1259 if (((itFlag & SPDIFRX_FLAG_CSRNE) == SPDIFRX_FLAG_CSRNE) && ((itSource & SPDIFRX_IT_CSRNE) == SPDIFRX_IT_CSRNE))
1260 {
1261 __HAL_SPDIFRX_CLEAR_IT(hspdif, SPDIFRX_IT_CSRNE);
1262 SPDIFRX_ReceiveControlFlow_IT(hspdif);
1263 }
1264
1265 /* SPDIFRX Overrun error interrupt occurred */
1266 if (((itFlag & SPDIFRX_FLAG_OVR) == SPDIFRX_FLAG_OVR) && ((itSource & SPDIFRX_IT_OVRIE) == SPDIFRX_IT_OVRIE))
1267 {
1268 __HAL_SPDIFRX_CLEAR_IT(hspdif, SPDIFRX_IT_OVRIE);
1269
1270 /* Change the SPDIFRX error code */
1271 hspdif->ErrorCode |= HAL_SPDIFRX_ERROR_OVR;
1272
1273 /* the transfer is not stopped */
1274 HAL_SPDIFRX_ErrorCallback(hspdif);
1275 }
1276
1277 /* SPDIFRX Parity error interrupt occurred */
1278 if (((itFlag & SPDIFRX_FLAG_PERR) == SPDIFRX_FLAG_PERR) && ((itSource & SPDIFRX_IT_PERRIE) == SPDIFRX_IT_PERRIE))
1279 {
1280 __HAL_SPDIFRX_CLEAR_IT(hspdif, SPDIFRX_IT_PERRIE);
1281
1282 /* Change the SPDIFRX error code */
1283 hspdif->ErrorCode |= HAL_SPDIFRX_ERROR_PE;
1284
1285 /* the transfer is not stopped */
1286 HAL_SPDIFRX_ErrorCallback(hspdif);
1287 }
1288 }
1289
1290 /**
1291 * @brief Rx Transfer (Data flow) half completed callbacks
1292 * @param hspdif SPDIFRX handle
1293 * @retval None
1294 */
HAL_SPDIFRX_RxHalfCpltCallback(SPDIFRX_HandleTypeDef * hspdif)1295 __weak void HAL_SPDIFRX_RxHalfCpltCallback(SPDIFRX_HandleTypeDef *hspdif)
1296 {
1297 /* Prevent unused argument(s) compilation warning */
1298 UNUSED(hspdif);
1299
1300 /* NOTE : This function Should not be modified, when the callback is needed,
1301 the HAL_SPDIFRX_RxCpltCallback could be implemented in the user file
1302 */
1303 }
1304
1305 /**
1306 * @brief Rx Transfer (Data flow) completed callbacks
1307 * @param hspdif SPDIFRX handle
1308 * @retval None
1309 */
HAL_SPDIFRX_RxCpltCallback(SPDIFRX_HandleTypeDef * hspdif)1310 __weak void HAL_SPDIFRX_RxCpltCallback(SPDIFRX_HandleTypeDef *hspdif)
1311 {
1312 /* Prevent unused argument(s) compilation warning */
1313 UNUSED(hspdif);
1314
1315 /* NOTE : This function Should not be modified, when the callback is needed,
1316 the HAL_SPDIFRX_RxCpltCallback could be implemented in the user file
1317 */
1318 }
1319
1320 /**
1321 * @brief Rx (Control flow) Transfer half completed callbacks
1322 * @param hspdif SPDIFRX handle
1323 * @retval None
1324 */
HAL_SPDIFRX_CxHalfCpltCallback(SPDIFRX_HandleTypeDef * hspdif)1325 __weak void HAL_SPDIFRX_CxHalfCpltCallback(SPDIFRX_HandleTypeDef *hspdif)
1326 {
1327 /* Prevent unused argument(s) compilation warning */
1328 UNUSED(hspdif);
1329
1330 /* NOTE : This function Should not be modified, when the callback is needed,
1331 the HAL_SPDIFRX_RxCpltCallback could be implemented in the user file
1332 */
1333 }
1334
1335 /**
1336 * @brief Rx Transfer (Control flow) completed callbacks
1337 * @param hspdif SPDIFRX handle
1338 * @retval None
1339 */
HAL_SPDIFRX_CxCpltCallback(SPDIFRX_HandleTypeDef * hspdif)1340 __weak void HAL_SPDIFRX_CxCpltCallback(SPDIFRX_HandleTypeDef *hspdif)
1341 {
1342 /* Prevent unused argument(s) compilation warning */
1343 UNUSED(hspdif);
1344
1345 /* NOTE : This function Should not be modified, when the callback is needed,
1346 the HAL_SPDIFRX_RxCpltCallback could be implemented in the user file
1347 */
1348 }
1349
1350 /**
1351 * @brief SPDIFRX error callbacks
1352 * @param hspdif SPDIFRX handle
1353 * @retval None
1354 */
HAL_SPDIFRX_ErrorCallback(SPDIFRX_HandleTypeDef * hspdif)1355 __weak void HAL_SPDIFRX_ErrorCallback(SPDIFRX_HandleTypeDef *hspdif)
1356 {
1357 /* Prevent unused argument(s) compilation warning */
1358 UNUSED(hspdif);
1359
1360 /* NOTE : This function Should not be modified, when the callback is needed,
1361 the HAL_SPDIFRX_ErrorCallback could be implemented in the user file
1362 */
1363 }
1364
1365 /**
1366 * @}
1367 */
1368
1369 /** @defgroup SPDIFRX_Exported_Functions_Group3 Peripheral State and Errors functions
1370 * @brief Peripheral State functions
1371 *
1372 @verbatim
1373 ===============================================================================
1374 ##### Peripheral State and Errors functions #####
1375 ===============================================================================
1376 [..]
1377 This subsection permit to get in run-time the status of the peripheral
1378 and the data flow.
1379
1380 @endverbatim
1381 * @{
1382 */
1383
1384 /**
1385 * @brief Return the SPDIFRX state
1386 * @param hspdif SPDIFRX handle
1387 * @retval HAL state
1388 */
HAL_SPDIFRX_GetState(SPDIFRX_HandleTypeDef const * const hspdif)1389 HAL_SPDIFRX_StateTypeDef HAL_SPDIFRX_GetState(SPDIFRX_HandleTypeDef const *const hspdif)
1390 {
1391 return hspdif->State;
1392 }
1393
1394 /**
1395 * @brief Return the SPDIFRX error code
1396 * @param hspdif SPDIFRX handle
1397 * @retval SPDIFRX Error Code
1398 */
HAL_SPDIFRX_GetError(SPDIFRX_HandleTypeDef const * const hspdif)1399 uint32_t HAL_SPDIFRX_GetError(SPDIFRX_HandleTypeDef const *const hspdif)
1400 {
1401 return hspdif->ErrorCode;
1402 }
1403
1404 /**
1405 * @}
1406 */
1407
1408 /**
1409 * @brief DMA SPDIFRX receive process (Data flow) complete callback
1410 * @param hdma DMA handle
1411 * @retval None
1412 */
SPDIFRX_DMARxCplt(DMA_HandleTypeDef * hdma)1413 static void SPDIFRX_DMARxCplt(DMA_HandleTypeDef *hdma)
1414 {
1415 SPDIFRX_HandleTypeDef *hspdif = (SPDIFRX_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent;
1416
1417 /* Disable Rx DMA Request */
1418 if (hdma->Init.Mode != DMA_CIRCULAR)
1419 {
1420 hspdif->Instance->CR &= (uint16_t)(~SPDIFRX_CR_RXDMAEN);
1421 hspdif->RxXferCount = 0;
1422 hspdif->State = HAL_SPDIFRX_STATE_READY;
1423 }
1424 #if (USE_HAL_SPDIFRX_REGISTER_CALLBACKS == 1)
1425 hspdif->RxCpltCallback(hspdif);
1426 #else
1427 HAL_SPDIFRX_RxCpltCallback(hspdif);
1428 #endif /* USE_HAL_SPDIFRX_REGISTER_CALLBACKS */
1429 }
1430
1431 /**
1432 * @brief DMA SPDIFRX receive process (Data flow) half complete callback
1433 * @param hdma DMA handle
1434 * @retval None
1435 */
SPDIFRX_DMARxHalfCplt(DMA_HandleTypeDef * hdma)1436 static void SPDIFRX_DMARxHalfCplt(DMA_HandleTypeDef *hdma)
1437 {
1438 SPDIFRX_HandleTypeDef *hspdif = (SPDIFRX_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent;
1439
1440 #if (USE_HAL_SPDIFRX_REGISTER_CALLBACKS == 1)
1441 hspdif->RxHalfCpltCallback(hspdif);
1442 #else
1443 HAL_SPDIFRX_RxHalfCpltCallback(hspdif);
1444 #endif /* USE_HAL_SPDIFRX_REGISTER_CALLBACKS */
1445 }
1446
1447
1448 /**
1449 * @brief DMA SPDIFRX receive process (Control flow) complete callback
1450 * @param hdma DMA handle
1451 * @retval None
1452 */
SPDIFRX_DMACxCplt(DMA_HandleTypeDef * hdma)1453 static void SPDIFRX_DMACxCplt(DMA_HandleTypeDef *hdma)
1454 {
1455 SPDIFRX_HandleTypeDef *hspdif = (SPDIFRX_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent;
1456
1457 /* Disable Cb DMA Request */
1458 hspdif->Instance->CR &= (uint16_t)(~SPDIFRX_CR_CBDMAEN);
1459 hspdif->CsXferCount = 0;
1460
1461 hspdif->State = HAL_SPDIFRX_STATE_READY;
1462 #if (USE_HAL_SPDIFRX_REGISTER_CALLBACKS == 1)
1463 hspdif->CxCpltCallback(hspdif);
1464 #else
1465 HAL_SPDIFRX_CxCpltCallback(hspdif);
1466 #endif /* USE_HAL_SPDIFRX_REGISTER_CALLBACKS */
1467 }
1468
1469 /**
1470 * @brief DMA SPDIFRX receive process (Control flow) half complete callback
1471 * @param hdma DMA handle
1472 * @retval None
1473 */
SPDIFRX_DMACxHalfCplt(DMA_HandleTypeDef * hdma)1474 static void SPDIFRX_DMACxHalfCplt(DMA_HandleTypeDef *hdma)
1475 {
1476 SPDIFRX_HandleTypeDef *hspdif = (SPDIFRX_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent;
1477
1478 #if (USE_HAL_SPDIFRX_REGISTER_CALLBACKS == 1)
1479 hspdif->CxHalfCpltCallback(hspdif);
1480 #else
1481 HAL_SPDIFRX_CxHalfCpltCallback(hspdif);
1482 #endif /* USE_HAL_SPDIFRX_REGISTER_CALLBACKS */
1483 }
1484
1485 /**
1486 * @brief DMA SPDIFRX communication error callback
1487 * @param hdma DMA handle
1488 * @retval None
1489 */
SPDIFRX_DMAError(DMA_HandleTypeDef * hdma)1490 static void SPDIFRX_DMAError(DMA_HandleTypeDef *hdma)
1491 {
1492 SPDIFRX_HandleTypeDef *hspdif = (SPDIFRX_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent;
1493
1494 /* Disable Rx and Cb DMA Request */
1495 hspdif->Instance->CR &= (uint16_t)(~(SPDIFRX_CR_RXDMAEN | SPDIFRX_CR_CBDMAEN));
1496 hspdif->RxXferCount = 0;
1497
1498 hspdif->State = HAL_SPDIFRX_STATE_READY;
1499
1500 /* Set the error code and execute error callback*/
1501 hspdif->ErrorCode |= HAL_SPDIFRX_ERROR_DMA;
1502
1503 #if (USE_HAL_SPDIFRX_REGISTER_CALLBACKS == 1)
1504 /* The transfer is not stopped */
1505 hspdif->ErrorCallback(hspdif);
1506 #else
1507 /* The transfer is not stopped */
1508 HAL_SPDIFRX_ErrorCallback(hspdif);
1509 #endif /* USE_HAL_SPDIFRX_REGISTER_CALLBACKS */
1510 }
1511
1512 /**
1513 * @brief Receive an amount of data (Data Flow) with Interrupt
1514 * @param hspdif SPDIFRX handle
1515 * @retval None
1516 */
SPDIFRX_ReceiveDataFlow_IT(SPDIFRX_HandleTypeDef * hspdif)1517 static void SPDIFRX_ReceiveDataFlow_IT(SPDIFRX_HandleTypeDef *hspdif)
1518 {
1519 /* Receive data */
1520 (*hspdif->pRxBuffPtr) = hspdif->Instance->DR;
1521 hspdif->pRxBuffPtr++;
1522 hspdif->RxXferCount--;
1523
1524 if (hspdif->RxXferCount == 0U)
1525 {
1526 /* Disable RXNE/PE and OVR interrupts */
1527 __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_OVRIE | SPDIFRX_IT_PERRIE | SPDIFRX_IT_RXNE);
1528
1529 hspdif->State = HAL_SPDIFRX_STATE_READY;
1530
1531 /* Process Unlocked */
1532 __HAL_UNLOCK(hspdif);
1533
1534 #if (USE_HAL_SPDIFRX_REGISTER_CALLBACKS == 1)
1535 hspdif->RxCpltCallback(hspdif);
1536 #else
1537 HAL_SPDIFRX_RxCpltCallback(hspdif);
1538 #endif /* USE_HAL_SPDIFRX_REGISTER_CALLBACKS */
1539 }
1540 }
1541
1542 /**
1543 * @brief Receive an amount of data (Control Flow) with Interrupt
1544 * @param hspdif SPDIFRX handle
1545 * @retval None
1546 */
SPDIFRX_ReceiveControlFlow_IT(SPDIFRX_HandleTypeDef * hspdif)1547 static void SPDIFRX_ReceiveControlFlow_IT(SPDIFRX_HandleTypeDef *hspdif)
1548 {
1549 /* Receive data */
1550 (*hspdif->pCsBuffPtr) = hspdif->Instance->CSR;
1551 hspdif->pCsBuffPtr++;
1552 hspdif->CsXferCount--;
1553
1554 if (hspdif->CsXferCount == 0U)
1555 {
1556 /* Disable CSRNE interrupt */
1557 __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_CSRNE);
1558
1559 hspdif->State = HAL_SPDIFRX_STATE_READY;
1560
1561 /* Process Unlocked */
1562 __HAL_UNLOCK(hspdif);
1563
1564 #if (USE_HAL_SPDIFRX_REGISTER_CALLBACKS == 1)
1565 hspdif->CxCpltCallback(hspdif);
1566 #else
1567 HAL_SPDIFRX_CxCpltCallback(hspdif);
1568 #endif /* USE_HAL_SPDIFRX_REGISTER_CALLBACKS */
1569 }
1570 }
1571
1572 /**
1573 * @brief This function handles SPDIFRX Communication Timeout.
1574 * @param hspdif SPDIFRX handle
1575 * @param Flag Flag checked
1576 * @param Status Value of the flag expected
1577 * @param Timeout Duration of the timeout
1578 * @param tickstart Tick start value
1579 * @retval HAL status
1580 */
SPDIFRX_WaitOnFlagUntilTimeout(SPDIFRX_HandleTypeDef * hspdif,uint32_t Flag,FlagStatus Status,uint32_t Timeout,uint32_t tickstart)1581 static HAL_StatusTypeDef SPDIFRX_WaitOnFlagUntilTimeout(SPDIFRX_HandleTypeDef *hspdif, uint32_t Flag, FlagStatus Status,
1582 uint32_t Timeout, uint32_t tickstart)
1583 {
1584 /* Wait until flag is set */
1585 while (__HAL_SPDIFRX_GET_FLAG(hspdif, Flag) == Status)
1586 {
1587 /* Check for the Timeout */
1588 if (Timeout != HAL_MAX_DELAY)
1589 {
1590 if (((HAL_GetTick() - tickstart) > Timeout) || (Timeout == 0U))
1591 {
1592 /* Disable TXE, RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts for the interrupt process */
1593 __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_RXNE);
1594 __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_CSRNE);
1595 __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_PERRIE);
1596 __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_OVRIE);
1597 __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_SBLKIE);
1598 __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_SYNCDIE);
1599 __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_IFEIE);
1600
1601 hspdif->State = HAL_SPDIFRX_STATE_READY;
1602
1603 /* Process Unlocked */
1604 __HAL_UNLOCK(hspdif);
1605
1606 return HAL_TIMEOUT;
1607 }
1608 }
1609 }
1610
1611 return HAL_OK;
1612 }
1613
1614 /**
1615 * @}
1616 */
1617
1618
1619 #endif /* SPDIFRX */
1620 #endif /* HAL_SPDIFRX_MODULE_ENABLED */
1621 /**
1622 * @}
1623 */
1624
1625 /**
1626 * @}
1627 */
1628
