1 /**
2 ******************************************************************************
3 * @file stm32f7xx_hal_lptim.c
4 * @author MCD Application Team
5 * @brief LPTIM HAL module driver.
6 * This file provides firmware functions to manage the following
7 * functionalities of the Low Power Timer (LPTIM) peripheral:
8 * + Initialization and de-initialization functions.
9 * + Start/Stop operation functions in polling mode.
10 * + Start/Stop operation functions in interrupt mode.
11 * + Reading operation functions.
12 * + Peripheral State functions.
13 *
14 ******************************************************************************
15 * @attention
16 *
17 * Copyright (c) 2017 STMicroelectronics.
18 * All rights reserved.
19 *
20 * This software is licensed under terms that can be found in the LICENSE file
21 * in the root directory of this software component.
22 * If no LICENSE file comes with this software, it is provided AS-IS.
23 *
24 ******************************************************************************
25 @verbatim
26 ==============================================================================
27 ##### How to use this driver #####
28 ==============================================================================
29 [..]
30 The LPTIM HAL driver can be used as follows:
31
32 (#)Initialize the LPTIM low level resources by implementing the
33 HAL_LPTIM_MspInit():
34 (++) Enable the LPTIM interface clock using __HAL_RCC_LPTIMx_CLK_ENABLE().
35 (++) In case of using interrupts (e.g. HAL_LPTIM_PWM_Start_IT()):
36 (+++) Configure the LPTIM interrupt priority using HAL_NVIC_SetPriority().
37 (+++) Enable the LPTIM IRQ handler using HAL_NVIC_EnableIRQ().
38 (+++) In LPTIM IRQ handler, call HAL_LPTIM_IRQHandler().
39
40 (#)Initialize the LPTIM HAL using HAL_LPTIM_Init(). This function
41 configures mainly:
42 (++) The instance: LPTIM1.
43 (++) Clock: the counter clock.
44 (+++) Source : it can be either the ULPTIM input (IN1) or one of
45 the internal clock; (APB, LSE, LSI or MSI).
46 (+++) Prescaler: select the clock divider.
47 (++) UltraLowPowerClock : To be used only if the ULPTIM is selected
48 as counter clock source.
49 (+++) Polarity: polarity of the active edge for the counter unit
50 if the ULPTIM input is selected.
51 (+++) SampleTime: clock sampling time to configure the clock glitch
52 filter.
53 (++) Trigger: How the counter start.
54 (+++) Source: trigger can be software or one of the hardware triggers.
55 (+++) ActiveEdge : only for hardware trigger.
56 (+++) SampleTime : trigger sampling time to configure the trigger
57 glitch filter.
58 (++) OutputPolarity : 2 opposite polarities are possible.
59 (++) UpdateMode: specifies whether the update of the autoreload and
60 the compare values is done immediately or after the end of current
61 period.
62
63 (#)Six modes are available:
64
65 (++) PWM Mode: To generate a PWM signal with specified period and pulse,
66 call HAL_LPTIM_PWM_Start() or HAL_LPTIM_PWM_Start_IT() for interruption
67 mode.
68
69 (++) One Pulse Mode: To generate pulse with specified width in response
70 to a stimulus, call HAL_LPTIM_OnePulse_Start() or
71 HAL_LPTIM_OnePulse_Start_IT() for interruption mode.
72
73 (++) Set once Mode: In this mode, the output changes the level (from
74 low level to high level if the output polarity is configured high, else
75 the opposite) when a compare match occurs. To start this mode, call
76 HAL_LPTIM_SetOnce_Start() or HAL_LPTIM_SetOnce_Start_IT() for
77 interruption mode.
78
79 (++) Encoder Mode: To use the encoder interface call
80 HAL_LPTIM_Encoder_Start() or HAL_LPTIM_Encoder_Start_IT() for
81 interruption mode. Only available for LPTIM1 instance.
82
83 (++) Time out Mode: an active edge on one selected trigger input rests
84 the counter. The first trigger event will start the timer, any
85 successive trigger event will reset the counter and the timer will
86 restart. To start this mode call HAL_LPTIM_TimeOut_Start_IT() or
87 HAL_LPTIM_TimeOut_Start_IT() for interruption mode.
88
89 (++) Counter Mode: counter can be used to count external events on
90 the LPTIM Input1 or it can be used to count internal clock cycles.
91 To start this mode, call HAL_LPTIM_Counter_Start() or
92 HAL_LPTIM_Counter_Start_IT() for interruption mode.
93
94
95 (#) User can stop any process by calling the corresponding API:
96 HAL_LPTIM_Xxx_Stop() or HAL_LPTIM_Xxx_Stop_IT() if the process is
97 already started in interruption mode.
98
99 (#) De-initialize the LPTIM peripheral using HAL_LPTIM_DeInit().
100
101 *** Callback registration ***
102 =============================================
103 [..]
104 The compilation define USE_HAL_LPTIM_REGISTER_CALLBACKS when set to 1
105 allows the user to configure dynamically the driver callbacks.
106 [..]
107 Use Function HAL_LPTIM_RegisterCallback() to register a callback.
108 HAL_LPTIM_RegisterCallback() takes as parameters the HAL peripheral handle,
109 the Callback ID and a pointer to the user callback function.
110 [..]
111 Use function HAL_LPTIM_UnRegisterCallback() to reset a callback to the
112 default weak function.
113 HAL_LPTIM_UnRegisterCallback takes as parameters the HAL peripheral handle,
114 and the Callback ID.
115 [..]
116 These functions allow to register/unregister following callbacks:
117
118 (+) MspInitCallback : LPTIM Base Msp Init Callback.
119 (+) MspDeInitCallback : LPTIM Base Msp DeInit Callback.
120 (+) CompareMatchCallback : Compare match Callback.
121 (+) AutoReloadMatchCallback : Auto-reload match Callback.
122 (+) TriggerCallback : External trigger event detection Callback.
123 (+) CompareWriteCallback : Compare register write complete Callback.
124 (+) AutoReloadWriteCallback : Auto-reload register write complete Callback.
125 (+) DirectionUpCallback : Up-counting direction change Callback.
126 (+) DirectionDownCallback : Down-counting direction change Callback.
127
128 [..]
129 By default, after the Init and when the state is HAL_LPTIM_STATE_RESET
130 all interrupt callbacks are set to the corresponding weak functions:
131 examples HAL_LPTIM_TriggerCallback(), HAL_LPTIM_CompareMatchCallback().
132
133 [..]
134 Exception done for MspInit and MspDeInit functions that are reset to the legacy weak
135 functionalities in the Init/DeInit only when these callbacks are null
136 (not registered beforehand). If not, MspInit or MspDeInit are not null, the Init/DeInit
137 keep and use the user MspInit/MspDeInit callbacks (registered beforehand)
138
139 [..]
140 Callbacks can be registered/unregistered in HAL_LPTIM_STATE_READY state only.
141 Exception done MspInit/MspDeInit that can be registered/unregistered
142 in HAL_LPTIM_STATE_READY or HAL_LPTIM_STATE_RESET state,
143 thus registered (user) MspInit/DeInit callbacks can be used during the Init/DeInit.
144 In that case first register the MspInit/MspDeInit user callbacks
145 using HAL_LPTIM_RegisterCallback() before calling DeInit or Init function.
146
147 [..]
148 When The compilation define USE_HAL_LPTIM_REGISTER_CALLBACKS is set to 0 or
149 not defined, the callback registration feature is not available and all callbacks
150 are set to the corresponding weak functions.
151
152 @endverbatim
153 ******************************************************************************
154 */
155
156 /* Includes ------------------------------------------------------------------*/
157 #include "stm32f7xx_hal.h"
158
159 /** @addtogroup STM32F7xx_HAL_Driver
160 * @{
161 */
162
163 /** @defgroup LPTIM LPTIM
164 * @brief LPTIM HAL module driver.
165 * @{
166 */
167
168 #ifdef HAL_LPTIM_MODULE_ENABLED
169
170 #if defined (LPTIM1)
171
172 /* Private typedef -----------------------------------------------------------*/
173 /* Private define ------------------------------------------------------------*/
174 /** @addtogroup LPTIM_Private_Constants
175 * @{
176 */
177 #define TIMEOUT 1000UL /* Timeout is 1s */
178 /**
179 * @}
180 */
181
182 /* Private macro -------------------------------------------------------------*/
183 /* Private variables ---------------------------------------------------------*/
184 /* Private function prototypes -----------------------------------------------*/
185 #if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1)
186 static void LPTIM_ResetCallback(LPTIM_HandleTypeDef *lptim);
187 #endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */
188 static HAL_StatusTypeDef LPTIM_WaitForFlag(LPTIM_HandleTypeDef *hlptim, uint32_t flag);
189
190 /* Exported functions --------------------------------------------------------*/
191
192 /** @defgroup LPTIM_Exported_Functions LPTIM Exported Functions
193 * @{
194 */
195
196 /** @defgroup LPTIM_Exported_Functions_Group1 Initialization/de-initialization functions
197 * @brief Initialization and Configuration functions.
198 *
199 @verbatim
200 ==============================================================================
201 ##### Initialization and de-initialization functions #####
202 ==============================================================================
203 [..] This section provides functions allowing to:
204 (+) Initialize the LPTIM according to the specified parameters in the
205 LPTIM_InitTypeDef and initialize the associated handle.
206 (+) DeInitialize the LPTIM peripheral.
207 (+) Initialize the LPTIM MSP.
208 (+) DeInitialize the LPTIM MSP.
209
210 @endverbatim
211 * @{
212 */
213
214 /**
215 * @brief Initialize the LPTIM according to the specified parameters in the
216 * LPTIM_InitTypeDef and initialize the associated handle.
217 * @param hlptim LPTIM handle
218 * @retval HAL status
219 */
HAL_LPTIM_Init(LPTIM_HandleTypeDef * hlptim)220 HAL_StatusTypeDef HAL_LPTIM_Init(LPTIM_HandleTypeDef *hlptim)
221 {
222 uint32_t tmpcfgr;
223
224 /* Check the LPTIM handle allocation */
225 if (hlptim == NULL)
226 {
227 return HAL_ERROR;
228 }
229
230 /* Check the parameters */
231 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
232
233 assert_param(IS_LPTIM_CLOCK_SOURCE(hlptim->Init.Clock.Source));
234 assert_param(IS_LPTIM_CLOCK_PRESCALER(hlptim->Init.Clock.Prescaler));
235 if ((hlptim->Init.Clock.Source == LPTIM_CLOCKSOURCE_ULPTIM)
236 || (hlptim->Init.CounterSource == LPTIM_COUNTERSOURCE_EXTERNAL))
237 {
238 assert_param(IS_LPTIM_CLOCK_POLARITY(hlptim->Init.UltraLowPowerClock.Polarity));
239 assert_param(IS_LPTIM_CLOCK_SAMPLE_TIME(hlptim->Init.UltraLowPowerClock.SampleTime));
240 }
241 assert_param(IS_LPTIM_TRG_SOURCE(hlptim->Init.Trigger.Source));
242 if (hlptim->Init.Trigger.Source != LPTIM_TRIGSOURCE_SOFTWARE)
243 {
244 assert_param(IS_LPTIM_EXT_TRG_POLARITY(hlptim->Init.Trigger.ActiveEdge));
245 assert_param(IS_LPTIM_TRIG_SAMPLE_TIME(hlptim->Init.Trigger.SampleTime));
246 }
247 assert_param(IS_LPTIM_OUTPUT_POLARITY(hlptim->Init.OutputPolarity));
248 assert_param(IS_LPTIM_UPDATE_MODE(hlptim->Init.UpdateMode));
249 assert_param(IS_LPTIM_COUNTER_SOURCE(hlptim->Init.CounterSource));
250
251 if (hlptim->State == HAL_LPTIM_STATE_RESET)
252 {
253 /* Allocate lock resource and initialize it */
254 hlptim->Lock = HAL_UNLOCKED;
255
256 #if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1)
257 /* Reset interrupt callbacks to legacy weak callbacks */
258 LPTIM_ResetCallback(hlptim);
259
260 if (hlptim->MspInitCallback == NULL)
261 {
262 hlptim->MspInitCallback = HAL_LPTIM_MspInit;
263 }
264
265 /* Init the low level hardware : GPIO, CLOCK, NVIC */
266 hlptim->MspInitCallback(hlptim);
267 #else
268 /* Init the low level hardware : GPIO, CLOCK, NVIC */
269 HAL_LPTIM_MspInit(hlptim);
270 #endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */
271 }
272
273 /* Change the LPTIM state */
274 hlptim->State = HAL_LPTIM_STATE_BUSY;
275
276 /* Get the LPTIMx CFGR value */
277 tmpcfgr = hlptim->Instance->CFGR;
278
279 if ((hlptim->Init.Clock.Source == LPTIM_CLOCKSOURCE_ULPTIM)
280 || (hlptim->Init.CounterSource == LPTIM_COUNTERSOURCE_EXTERNAL))
281 {
282 tmpcfgr &= (uint32_t)(~(LPTIM_CFGR_CKPOL | LPTIM_CFGR_CKFLT));
283 }
284 if (hlptim->Init.Trigger.Source != LPTIM_TRIGSOURCE_SOFTWARE)
285 {
286 tmpcfgr &= (uint32_t)(~(LPTIM_CFGR_TRGFLT | LPTIM_CFGR_TRIGSEL));
287 }
288
289 /* Clear CKSEL, PRESC, TRIGEN, TRGFLT, WAVPOL, PRELOAD & COUNTMODE bits */
290 tmpcfgr &= (uint32_t)(~(LPTIM_CFGR_CKSEL | LPTIM_CFGR_TRIGEN | LPTIM_CFGR_PRELOAD |
291 LPTIM_CFGR_WAVPOL | LPTIM_CFGR_PRESC | LPTIM_CFGR_COUNTMODE));
292
293 /* Set initialization parameters */
294 tmpcfgr |= (hlptim->Init.Clock.Source |
295 hlptim->Init.Clock.Prescaler |
296 hlptim->Init.OutputPolarity |
297 hlptim->Init.UpdateMode |
298 hlptim->Init.CounterSource);
299
300 /* Glitch filters for internal triggers and external inputs are configured
301 * only if an internal clock source is provided to the LPTIM
302 */
303 if (hlptim->Init.Clock.Source == LPTIM_CLOCKSOURCE_APBCLOCK_LPOSC)
304 {
305 tmpcfgr |= (hlptim->Init.Trigger.SampleTime |
306 hlptim->Init.UltraLowPowerClock.SampleTime);
307 }
308
309 /* Configure LPTIM external clock polarity and digital filter */
310 if ((hlptim->Init.Clock.Source == LPTIM_CLOCKSOURCE_ULPTIM)
311 || (hlptim->Init.CounterSource == LPTIM_COUNTERSOURCE_EXTERNAL))
312 {
313 tmpcfgr |= (hlptim->Init.UltraLowPowerClock.Polarity |
314 hlptim->Init.UltraLowPowerClock.SampleTime);
315 }
316
317 /* Configure LPTIM external trigger */
318 if (hlptim->Init.Trigger.Source != LPTIM_TRIGSOURCE_SOFTWARE)
319 {
320 /* Enable External trigger and set the trigger source */
321 tmpcfgr |= (hlptim->Init.Trigger.Source |
322 hlptim->Init.Trigger.ActiveEdge |
323 hlptim->Init.Trigger.SampleTime);
324 }
325
326 /* Write to LPTIMx CFGR */
327 hlptim->Instance->CFGR = tmpcfgr;
328
329 /* Change the LPTIM state */
330 hlptim->State = HAL_LPTIM_STATE_READY;
331
332 /* Return function status */
333 return HAL_OK;
334 }
335
336 /**
337 * @brief DeInitialize the LPTIM peripheral.
338 * @param hlptim LPTIM handle
339 * @retval HAL status
340 */
HAL_LPTIM_DeInit(LPTIM_HandleTypeDef * hlptim)341 HAL_StatusTypeDef HAL_LPTIM_DeInit(LPTIM_HandleTypeDef *hlptim)
342 {
343 /* Check the LPTIM handle allocation */
344 if (hlptim == NULL)
345 {
346 return HAL_ERROR;
347 }
348
349 /* Change the LPTIM state */
350 hlptim->State = HAL_LPTIM_STATE_BUSY;
351
352 /* Disable the LPTIM Peripheral Clock */
353 __HAL_LPTIM_DISABLE(hlptim);
354
355 if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
356 {
357 return HAL_TIMEOUT;
358 }
359
360 #if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1)
361 if (hlptim->MspDeInitCallback == NULL)
362 {
363 hlptim->MspDeInitCallback = HAL_LPTIM_MspDeInit;
364 }
365
366 /* DeInit the low level hardware: CLOCK, NVIC.*/
367 hlptim->MspDeInitCallback(hlptim);
368 #else
369 /* DeInit the low level hardware: CLOCK, NVIC.*/
370 HAL_LPTIM_MspDeInit(hlptim);
371 #endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */
372
373 /* Change the LPTIM state */
374 hlptim->State = HAL_LPTIM_STATE_RESET;
375
376 /* Release Lock */
377 __HAL_UNLOCK(hlptim);
378
379 /* Return function status */
380 return HAL_OK;
381 }
382
383 /**
384 * @brief Initialize the LPTIM MSP.
385 * @param hlptim LPTIM handle
386 * @retval None
387 */
HAL_LPTIM_MspInit(LPTIM_HandleTypeDef * hlptim)388 __weak void HAL_LPTIM_MspInit(LPTIM_HandleTypeDef *hlptim)
389 {
390 /* Prevent unused argument(s) compilation warning */
391 UNUSED(hlptim);
392
393 /* NOTE : This function should not be modified, when the callback is needed,
394 the HAL_LPTIM_MspInit could be implemented in the user file
395 */
396 }
397
398 /**
399 * @brief DeInitialize LPTIM MSP.
400 * @param hlptim LPTIM handle
401 * @retval None
402 */
HAL_LPTIM_MspDeInit(LPTIM_HandleTypeDef * hlptim)403 __weak void HAL_LPTIM_MspDeInit(LPTIM_HandleTypeDef *hlptim)
404 {
405 /* Prevent unused argument(s) compilation warning */
406 UNUSED(hlptim);
407
408 /* NOTE : This function should not be modified, when the callback is needed,
409 the HAL_LPTIM_MspDeInit could be implemented in the user file
410 */
411 }
412
413 /**
414 * @}
415 */
416
417 /** @defgroup LPTIM_Exported_Functions_Group2 LPTIM Start-Stop operation functions
418 * @brief Start-Stop operation functions.
419 *
420 @verbatim
421 ==============================================================================
422 ##### LPTIM Start Stop operation functions #####
423 ==============================================================================
424 [..] This section provides functions allowing to:
425 (+) Start the PWM mode.
426 (+) Stop the PWM mode.
427 (+) Start the One pulse mode.
428 (+) Stop the One pulse mode.
429 (+) Start the Set once mode.
430 (+) Stop the Set once mode.
431 (+) Start the Encoder mode.
432 (+) Stop the Encoder mode.
433 (+) Start the Timeout mode.
434 (+) Stop the Timeout mode.
435 (+) Start the Counter mode.
436 (+) Stop the Counter mode.
437
438
439 @endverbatim
440 * @{
441 */
442
443 /**
444 * @brief Start the LPTIM PWM generation.
445 * @param hlptim LPTIM handle
446 * @param Period Specifies the Autoreload value.
447 * This parameter must be a value between 0x0001 and 0xFFFF.
448 * @param Pulse Specifies the compare value.
449 * This parameter must be a value between 0x0000 and 0xFFFF.
450 * @retval HAL status
451 */
HAL_LPTIM_PWM_Start(LPTIM_HandleTypeDef * hlptim,uint32_t Period,uint32_t Pulse)452 HAL_StatusTypeDef HAL_LPTIM_PWM_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Pulse)
453 {
454 /* Check the parameters */
455 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
456 assert_param(IS_LPTIM_PERIOD(Period));
457 assert_param(IS_LPTIM_PULSE(Pulse));
458
459 /* Set the LPTIM state */
460 hlptim->State = HAL_LPTIM_STATE_BUSY;
461
462 /* Reset WAVE bit to set PWM mode */
463 hlptim->Instance->CFGR &= ~LPTIM_CFGR_WAVE;
464
465 /* Enable the Peripheral */
466 __HAL_LPTIM_ENABLE(hlptim);
467
468 /* Clear flag */
469 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_ARROK);
470
471 /* Load the period value in the autoreload register */
472 __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period);
473
474 /* Wait for the completion of the write operation to the LPTIM_ARR register */
475 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_ARROK) == HAL_TIMEOUT)
476 {
477 return HAL_TIMEOUT;
478 }
479
480 /* Clear flag */
481 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_CMPOK);
482
483 /* Load the pulse value in the compare register */
484 __HAL_LPTIM_COMPARE_SET(hlptim, Pulse);
485
486 /* Wait for the completion of the write operation to the LPTIM_CMP register */
487 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_CMPOK) == HAL_TIMEOUT)
488 {
489 return HAL_TIMEOUT;
490 }
491
492 /* Start timer in continuous mode */
493 __HAL_LPTIM_START_CONTINUOUS(hlptim);
494
495 /* Change the LPTIM state */
496 hlptim->State = HAL_LPTIM_STATE_READY;
497
498 /* Return function status */
499 return HAL_OK;
500 }
501
502 /**
503 * @brief Stop the LPTIM PWM generation.
504 * @param hlptim LPTIM handle
505 * @retval HAL status
506 */
HAL_LPTIM_PWM_Stop(LPTIM_HandleTypeDef * hlptim)507 HAL_StatusTypeDef HAL_LPTIM_PWM_Stop(LPTIM_HandleTypeDef *hlptim)
508 {
509 /* Check the parameters */
510 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
511
512 /* Change the LPTIM state */
513 hlptim->State = HAL_LPTIM_STATE_BUSY;
514
515 /* Disable the Peripheral */
516 __HAL_LPTIM_DISABLE(hlptim);
517
518 if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
519 {
520 return HAL_TIMEOUT;
521 }
522
523 /* Change the LPTIM state */
524 hlptim->State = HAL_LPTIM_STATE_READY;
525
526 /* Return function status */
527 return HAL_OK;
528 }
529
530 /**
531 * @brief Start the LPTIM PWM generation in interrupt mode.
532 * @param hlptim LPTIM handle
533 * @param Period Specifies the Autoreload value.
534 * This parameter must be a value between 0x0001 and 0xFFFF
535 * @param Pulse Specifies the compare value.
536 * This parameter must be a value between 0x0000 and 0xFFFF
537 * @retval HAL status
538 */
HAL_LPTIM_PWM_Start_IT(LPTIM_HandleTypeDef * hlptim,uint32_t Period,uint32_t Pulse)539 HAL_StatusTypeDef HAL_LPTIM_PWM_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Pulse)
540 {
541 /* Check the parameters */
542 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
543 assert_param(IS_LPTIM_PERIOD(Period));
544 assert_param(IS_LPTIM_PULSE(Pulse));
545
546 /* Set the LPTIM state */
547 hlptim->State = HAL_LPTIM_STATE_BUSY;
548
549 /* Reset WAVE bit to set PWM mode */
550 hlptim->Instance->CFGR &= ~LPTIM_CFGR_WAVE;
551
552 /* Enable the Peripheral */
553 __HAL_LPTIM_ENABLE(hlptim);
554
555 /* Clear flag */
556 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_ARROK);
557
558 /* Load the period value in the autoreload register */
559 __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period);
560
561 /* Wait for the completion of the write operation to the LPTIM_ARR register */
562 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_ARROK) == HAL_TIMEOUT)
563 {
564 return HAL_TIMEOUT;
565 }
566
567 /* Clear flag */
568 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_CMPOK);
569
570 /* Load the pulse value in the compare register */
571 __HAL_LPTIM_COMPARE_SET(hlptim, Pulse);
572
573 /* Wait for the completion of the write operation to the LPTIM_CMP register */
574 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_CMPOK) == HAL_TIMEOUT)
575 {
576 return HAL_TIMEOUT;
577 }
578
579 /* Disable the Peripheral */
580 __HAL_LPTIM_DISABLE(hlptim);
581
582 if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
583 {
584 return HAL_TIMEOUT;
585 }
586
587 /* Enable Autoreload write complete interrupt */
588 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_ARROK);
589
590 /* Enable Compare write complete interrupt */
591 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_CMPOK);
592
593 /* Enable Autoreload match interrupt */
594 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_ARRM);
595
596 /* Enable Compare match interrupt */
597 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_CMPM);
598
599 /* If external trigger source is used, then enable external trigger interrupt */
600 if ((hlptim->Init.Trigger.Source) != LPTIM_TRIGSOURCE_SOFTWARE)
601 {
602 /* Enable external trigger interrupt */
603 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_EXTTRIG);
604 }
605
606 /* Enable the Peripheral */
607 __HAL_LPTIM_ENABLE(hlptim);
608
609 /* Start timer in continuous mode */
610 __HAL_LPTIM_START_CONTINUOUS(hlptim);
611
612 /* Change the LPTIM state */
613 hlptim->State = HAL_LPTIM_STATE_READY;
614
615 /* Return function status */
616 return HAL_OK;
617 }
618
619 /**
620 * @brief Stop the LPTIM PWM generation in interrupt mode.
621 * @param hlptim LPTIM handle
622 * @retval HAL status
623 */
HAL_LPTIM_PWM_Stop_IT(LPTIM_HandleTypeDef * hlptim)624 HAL_StatusTypeDef HAL_LPTIM_PWM_Stop_IT(LPTIM_HandleTypeDef *hlptim)
625 {
626 /* Check the parameters */
627 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
628
629 /* Change the LPTIM state */
630 hlptim->State = HAL_LPTIM_STATE_BUSY;
631
632 /* Disable the Peripheral */
633 __HAL_LPTIM_DISABLE(hlptim);
634
635 if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
636 {
637 return HAL_TIMEOUT;
638 }
639
640 /* Disable Autoreload write complete interrupt */
641 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_ARROK);
642
643 /* Disable Compare write complete interrupt */
644 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_CMPOK);
645
646 /* Disable Autoreload match interrupt */
647 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_ARRM);
648
649 /* Disable Compare match interrupt */
650 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_CMPM);
651
652 /* If external trigger source is used, then disable external trigger interrupt */
653 if ((hlptim->Init.Trigger.Source) != LPTIM_TRIGSOURCE_SOFTWARE)
654 {
655 /* Disable external trigger interrupt */
656 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_EXTTRIG);
657 }
658
659 /* Change the LPTIM state */
660 hlptim->State = HAL_LPTIM_STATE_READY;
661
662 /* Return function status */
663 return HAL_OK;
664 }
665
666 /**
667 * @brief Start the LPTIM One pulse generation.
668 * @param hlptim LPTIM handle
669 * @param Period Specifies the Autoreload value.
670 * This parameter must be a value between 0x0001 and 0xFFFF.
671 * @param Pulse Specifies the compare value.
672 * This parameter must be a value between 0x0000 and 0xFFFF.
673 * @retval HAL status
674 */
HAL_LPTIM_OnePulse_Start(LPTIM_HandleTypeDef * hlptim,uint32_t Period,uint32_t Pulse)675 HAL_StatusTypeDef HAL_LPTIM_OnePulse_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Pulse)
676 {
677 /* Check the parameters */
678 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
679 assert_param(IS_LPTIM_PERIOD(Period));
680 assert_param(IS_LPTIM_PULSE(Pulse));
681
682 /* Set the LPTIM state */
683 hlptim->State = HAL_LPTIM_STATE_BUSY;
684
685 /* Reset WAVE bit to set one pulse mode */
686 hlptim->Instance->CFGR &= ~LPTIM_CFGR_WAVE;
687
688 /* Enable the Peripheral */
689 __HAL_LPTIM_ENABLE(hlptim);
690
691 /* Clear flag */
692 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_ARROK);
693
694 /* Load the period value in the autoreload register */
695 __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period);
696
697 /* Wait for the completion of the write operation to the LPTIM_ARR register */
698 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_ARROK) == HAL_TIMEOUT)
699 {
700 return HAL_TIMEOUT;
701 }
702
703 /* Clear flag */
704 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_CMPOK);
705
706 /* Load the pulse value in the compare register */
707 __HAL_LPTIM_COMPARE_SET(hlptim, Pulse);
708
709 /* Wait for the completion of the write operation to the LPTIM_CMP register */
710 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_CMPOK) == HAL_TIMEOUT)
711 {
712 return HAL_TIMEOUT;
713 }
714
715 /* Start timer in single (one shot) mode */
716 __HAL_LPTIM_START_SINGLE(hlptim);
717
718 /* Change the LPTIM state */
719 hlptim->State = HAL_LPTIM_STATE_READY;
720
721 /* Return function status */
722 return HAL_OK;
723 }
724
725 /**
726 * @brief Stop the LPTIM One pulse generation.
727 * @param hlptim LPTIM handle
728 * @retval HAL status
729 */
HAL_LPTIM_OnePulse_Stop(LPTIM_HandleTypeDef * hlptim)730 HAL_StatusTypeDef HAL_LPTIM_OnePulse_Stop(LPTIM_HandleTypeDef *hlptim)
731 {
732 /* Check the parameters */
733 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
734
735 /* Set the LPTIM state */
736 hlptim->State = HAL_LPTIM_STATE_BUSY;
737
738 /* Disable the Peripheral */
739 __HAL_LPTIM_DISABLE(hlptim);
740
741 if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
742 {
743 return HAL_TIMEOUT;
744 }
745
746 /* Change the LPTIM state */
747 hlptim->State = HAL_LPTIM_STATE_READY;
748
749 /* Return function status */
750 return HAL_OK;
751 }
752
753 /**
754 * @brief Start the LPTIM One pulse generation in interrupt mode.
755 * @param hlptim LPTIM handle
756 * @param Period Specifies the Autoreload value.
757 * This parameter must be a value between 0x0001 and 0xFFFF.
758 * @param Pulse Specifies the compare value.
759 * This parameter must be a value between 0x0000 and 0xFFFF.
760 * @retval HAL status
761 */
HAL_LPTIM_OnePulse_Start_IT(LPTIM_HandleTypeDef * hlptim,uint32_t Period,uint32_t Pulse)762 HAL_StatusTypeDef HAL_LPTIM_OnePulse_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Pulse)
763 {
764 /* Check the parameters */
765 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
766 assert_param(IS_LPTIM_PERIOD(Period));
767 assert_param(IS_LPTIM_PULSE(Pulse));
768
769 /* Set the LPTIM state */
770 hlptim->State = HAL_LPTIM_STATE_BUSY;
771
772 /* Reset WAVE bit to set one pulse mode */
773 hlptim->Instance->CFGR &= ~LPTIM_CFGR_WAVE;
774
775 /* Enable the Peripheral */
776 __HAL_LPTIM_ENABLE(hlptim);
777
778 /* Clear flag */
779 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_ARROK);
780
781 /* Load the period value in the autoreload register */
782 __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period);
783
784 /* Wait for the completion of the write operation to the LPTIM_ARR register */
785 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_ARROK) == HAL_TIMEOUT)
786 {
787 return HAL_TIMEOUT;
788 }
789
790 /* Clear flag */
791 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_CMPOK);
792
793 /* Load the pulse value in the compare register */
794 __HAL_LPTIM_COMPARE_SET(hlptim, Pulse);
795
796 /* Wait for the completion of the write operation to the LPTIM_CMP register */
797 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_CMPOK) == HAL_TIMEOUT)
798 {
799 return HAL_TIMEOUT;
800 }
801
802 /* Disable the Peripheral */
803 __HAL_LPTIM_DISABLE(hlptim);
804
805 if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
806 {
807 return HAL_TIMEOUT;
808 }
809
810 /* Enable Autoreload write complete interrupt */
811 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_ARROK);
812
813 /* Enable Compare write complete interrupt */
814 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_CMPOK);
815
816 /* Enable Autoreload match interrupt */
817 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_ARRM);
818
819 /* Enable Compare match interrupt */
820 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_CMPM);
821
822 /* If external trigger source is used, then enable external trigger interrupt */
823 if ((hlptim->Init.Trigger.Source) != LPTIM_TRIGSOURCE_SOFTWARE)
824 {
825 /* Enable external trigger interrupt */
826 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_EXTTRIG);
827 }
828
829 /* Enable the Peripheral */
830 __HAL_LPTIM_ENABLE(hlptim);
831
832 /* Start timer in single (one shot) mode */
833 __HAL_LPTIM_START_SINGLE(hlptim);
834
835 /* Change the LPTIM state */
836 hlptim->State = HAL_LPTIM_STATE_READY;
837
838 /* Return function status */
839 return HAL_OK;
840 }
841
842 /**
843 * @brief Stop the LPTIM One pulse generation in interrupt mode.
844 * @param hlptim LPTIM handle
845 * @retval HAL status
846 */
HAL_LPTIM_OnePulse_Stop_IT(LPTIM_HandleTypeDef * hlptim)847 HAL_StatusTypeDef HAL_LPTIM_OnePulse_Stop_IT(LPTIM_HandleTypeDef *hlptim)
848 {
849 /* Check the parameters */
850 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
851
852 /* Set the LPTIM state */
853 hlptim->State = HAL_LPTIM_STATE_BUSY;
854
855
856 /* Disable the Peripheral */
857 __HAL_LPTIM_DISABLE(hlptim);
858
859 if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
860 {
861 return HAL_TIMEOUT;
862 }
863
864 /* Disable Autoreload write complete interrupt */
865 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_ARROK);
866
867 /* Disable Compare write complete interrupt */
868 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_CMPOK);
869
870 /* Disable Autoreload match interrupt */
871 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_ARRM);
872
873 /* Disable Compare match interrupt */
874 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_CMPM);
875
876 /* If external trigger source is used, then disable external trigger interrupt */
877 if ((hlptim->Init.Trigger.Source) != LPTIM_TRIGSOURCE_SOFTWARE)
878 {
879 /* Disable external trigger interrupt */
880 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_EXTTRIG);
881 }
882
883 /* Change the LPTIM state */
884 hlptim->State = HAL_LPTIM_STATE_READY;
885
886 /* Return function status */
887 return HAL_OK;
888 }
889
890 /**
891 * @brief Start the LPTIM in Set once mode.
892 * @param hlptim LPTIM handle
893 * @param Period Specifies the Autoreload value.
894 * This parameter must be a value between 0x0001 and 0xFFFF.
895 * @param Pulse Specifies the compare value.
896 * This parameter must be a value between 0x0000 and 0xFFFF.
897 * @retval HAL status
898 */
HAL_LPTIM_SetOnce_Start(LPTIM_HandleTypeDef * hlptim,uint32_t Period,uint32_t Pulse)899 HAL_StatusTypeDef HAL_LPTIM_SetOnce_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Pulse)
900 {
901 /* Check the parameters */
902 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
903 assert_param(IS_LPTIM_PERIOD(Period));
904 assert_param(IS_LPTIM_PULSE(Pulse));
905
906 /* Set the LPTIM state */
907 hlptim->State = HAL_LPTIM_STATE_BUSY;
908
909 /* Set WAVE bit to enable the set once mode */
910 hlptim->Instance->CFGR |= LPTIM_CFGR_WAVE;
911
912 /* Enable the Peripheral */
913 __HAL_LPTIM_ENABLE(hlptim);
914
915 /* Clear flag */
916 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_ARROK);
917
918 /* Load the period value in the autoreload register */
919 __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period);
920
921 /* Wait for the completion of the write operation to the LPTIM_ARR register */
922 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_ARROK) == HAL_TIMEOUT)
923 {
924 return HAL_TIMEOUT;
925 }
926
927 /* Clear flag */
928 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_CMPOK);
929
930 /* Load the pulse value in the compare register */
931 __HAL_LPTIM_COMPARE_SET(hlptim, Pulse);
932
933 /* Wait for the completion of the write operation to the LPTIM_CMP register */
934 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_CMPOK) == HAL_TIMEOUT)
935 {
936 return HAL_TIMEOUT;
937 }
938
939 /* Start timer in single (one shot) mode */
940 __HAL_LPTIM_START_SINGLE(hlptim);
941
942 /* Change the LPTIM state */
943 hlptim->State = HAL_LPTIM_STATE_READY;
944
945 /* Return function status */
946 return HAL_OK;
947 }
948
949 /**
950 * @brief Stop the LPTIM Set once mode.
951 * @param hlptim LPTIM handle
952 * @retval HAL status
953 */
HAL_LPTIM_SetOnce_Stop(LPTIM_HandleTypeDef * hlptim)954 HAL_StatusTypeDef HAL_LPTIM_SetOnce_Stop(LPTIM_HandleTypeDef *hlptim)
955 {
956 /* Check the parameters */
957 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
958
959 /* Set the LPTIM state */
960 hlptim->State = HAL_LPTIM_STATE_BUSY;
961
962 /* Disable the Peripheral */
963 __HAL_LPTIM_DISABLE(hlptim);
964
965 if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
966 {
967 return HAL_TIMEOUT;
968 }
969
970 /* Change the LPTIM state */
971 hlptim->State = HAL_LPTIM_STATE_READY;
972
973 /* Return function status */
974 return HAL_OK;
975 }
976
977 /**
978 * @brief Start the LPTIM Set once mode in interrupt mode.
979 * @param hlptim LPTIM handle
980 * @param Period Specifies the Autoreload value.
981 * This parameter must be a value between 0x0000 and 0xFFFF.
982 * @param Pulse Specifies the compare value.
983 * This parameter must be a value between 0x0000 and 0xFFFF.
984 * @retval HAL status
985 */
HAL_LPTIM_SetOnce_Start_IT(LPTIM_HandleTypeDef * hlptim,uint32_t Period,uint32_t Pulse)986 HAL_StatusTypeDef HAL_LPTIM_SetOnce_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Pulse)
987 {
988 /* Check the parameters */
989 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
990 assert_param(IS_LPTIM_PERIOD(Period));
991 assert_param(IS_LPTIM_PULSE(Pulse));
992
993 /* Set the LPTIM state */
994 hlptim->State = HAL_LPTIM_STATE_BUSY;
995
996 /* Set WAVE bit to enable the set once mode */
997 hlptim->Instance->CFGR |= LPTIM_CFGR_WAVE;
998
999 /* Enable the Peripheral */
1000 __HAL_LPTIM_ENABLE(hlptim);
1001
1002 /* Clear flag */
1003 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_ARROK);
1004
1005 /* Load the period value in the autoreload register */
1006 __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period);
1007
1008 /* Wait for the completion of the write operation to the LPTIM_ARR register */
1009 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_ARROK) == HAL_TIMEOUT)
1010 {
1011 return HAL_TIMEOUT;
1012 }
1013
1014 /* Clear flag */
1015 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_CMPOK);
1016
1017 /* Load the pulse value in the compare register */
1018 __HAL_LPTIM_COMPARE_SET(hlptim, Pulse);
1019
1020 /* Wait for the completion of the write operation to the LPTIM_CMP register */
1021 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_CMPOK) == HAL_TIMEOUT)
1022 {
1023 return HAL_TIMEOUT;
1024 }
1025
1026 /* Disable the Peripheral */
1027 __HAL_LPTIM_DISABLE(hlptim);
1028
1029 if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
1030 {
1031 return HAL_TIMEOUT;
1032 }
1033
1034 /* Enable Autoreload write complete interrupt */
1035 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_ARROK);
1036
1037 /* Enable Compare write complete interrupt */
1038 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_CMPOK);
1039
1040 /* Enable Autoreload match interrupt */
1041 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_ARRM);
1042
1043 /* Enable Compare match interrupt */
1044 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_CMPM);
1045
1046 /* If external trigger source is used, then enable external trigger interrupt */
1047 if ((hlptim->Init.Trigger.Source) != LPTIM_TRIGSOURCE_SOFTWARE)
1048 {
1049 /* Enable external trigger interrupt */
1050 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_EXTTRIG);
1051 }
1052
1053 /* Enable the Peripheral */
1054 __HAL_LPTIM_ENABLE(hlptim);
1055
1056 /* Start timer in single (one shot) mode */
1057 __HAL_LPTIM_START_SINGLE(hlptim);
1058
1059 /* Change the LPTIM state */
1060 hlptim->State = HAL_LPTIM_STATE_READY;
1061
1062 /* Return function status */
1063 return HAL_OK;
1064 }
1065
1066 /**
1067 * @brief Stop the LPTIM Set once mode in interrupt mode.
1068 * @param hlptim LPTIM handle
1069 * @retval HAL status
1070 */
HAL_LPTIM_SetOnce_Stop_IT(LPTIM_HandleTypeDef * hlptim)1071 HAL_StatusTypeDef HAL_LPTIM_SetOnce_Stop_IT(LPTIM_HandleTypeDef *hlptim)
1072 {
1073 /* Check the parameters */
1074 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
1075
1076 /* Set the LPTIM state */
1077 hlptim->State = HAL_LPTIM_STATE_BUSY;
1078
1079 /* Disable the Peripheral */
1080 __HAL_LPTIM_DISABLE(hlptim);
1081
1082 if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
1083 {
1084 return HAL_TIMEOUT;
1085 }
1086
1087 /* Disable Autoreload write complete interrupt */
1088 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_ARROK);
1089
1090 /* Disable Compare write complete interrupt */
1091 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_CMPOK);
1092
1093 /* Disable Autoreload match interrupt */
1094 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_ARRM);
1095
1096 /* Disable Compare match interrupt */
1097 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_CMPM);
1098
1099 /* If external trigger source is used, then disable external trigger interrupt */
1100 if ((hlptim->Init.Trigger.Source) != LPTIM_TRIGSOURCE_SOFTWARE)
1101 {
1102 /* Disable external trigger interrupt */
1103 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_EXTTRIG);
1104 }
1105
1106 /* Change the LPTIM state */
1107 hlptim->State = HAL_LPTIM_STATE_READY;
1108
1109 /* Return function status */
1110 return HAL_OK;
1111 }
1112
1113 /**
1114 * @brief Start the Encoder interface.
1115 * @param hlptim LPTIM handle
1116 * @param Period Specifies the Autoreload value.
1117 * This parameter must be a value between 0x0001 and 0xFFFF.
1118 * @retval HAL status
1119 */
HAL_LPTIM_Encoder_Start(LPTIM_HandleTypeDef * hlptim,uint32_t Period)1120 HAL_StatusTypeDef HAL_LPTIM_Encoder_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Period)
1121 {
1122 uint32_t tmpcfgr;
1123
1124 /* Check the parameters */
1125 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
1126 assert_param(IS_LPTIM_PERIOD(Period));
1127 assert_param(hlptim->Init.Clock.Source == LPTIM_CLOCKSOURCE_APBCLOCK_LPOSC);
1128 assert_param(hlptim->Init.Clock.Prescaler == LPTIM_PRESCALER_DIV1);
1129 assert_param(IS_LPTIM_CLOCK_POLARITY(hlptim->Init.UltraLowPowerClock.Polarity));
1130
1131 /* Set the LPTIM state */
1132 hlptim->State = HAL_LPTIM_STATE_BUSY;
1133
1134 /* Get the LPTIMx CFGR value */
1135 tmpcfgr = hlptim->Instance->CFGR;
1136
1137 /* Clear CKPOL bits */
1138 tmpcfgr &= (uint32_t)(~LPTIM_CFGR_CKPOL);
1139
1140 /* Set Input polarity */
1141 tmpcfgr |= hlptim->Init.UltraLowPowerClock.Polarity;
1142
1143 /* Write to LPTIMx CFGR */
1144 hlptim->Instance->CFGR = tmpcfgr;
1145
1146 /* Set ENC bit to enable the encoder interface */
1147 hlptim->Instance->CFGR |= LPTIM_CFGR_ENC;
1148
1149 /* Enable the Peripheral */
1150 __HAL_LPTIM_ENABLE(hlptim);
1151
1152 /* Clear flag */
1153 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_ARROK);
1154
1155 /* Load the period value in the autoreload register */
1156 __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period);
1157
1158 /* Wait for the completion of the write operation to the LPTIM_ARR register */
1159 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_ARROK) == HAL_TIMEOUT)
1160 {
1161 return HAL_TIMEOUT;
1162 }
1163
1164 /* Start timer in continuous mode */
1165 __HAL_LPTIM_START_CONTINUOUS(hlptim);
1166
1167 /* Change the LPTIM state */
1168 hlptim->State = HAL_LPTIM_STATE_READY;
1169
1170 /* Return function status */
1171 return HAL_OK;
1172 }
1173
1174 /**
1175 * @brief Stop the Encoder interface.
1176 * @param hlptim LPTIM handle
1177 * @retval HAL status
1178 */
HAL_LPTIM_Encoder_Stop(LPTIM_HandleTypeDef * hlptim)1179 HAL_StatusTypeDef HAL_LPTIM_Encoder_Stop(LPTIM_HandleTypeDef *hlptim)
1180 {
1181 /* Check the parameters */
1182 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
1183
1184 /* Set the LPTIM state */
1185 hlptim->State = HAL_LPTIM_STATE_BUSY;
1186
1187 /* Disable the Peripheral */
1188 __HAL_LPTIM_DISABLE(hlptim);
1189
1190 if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
1191 {
1192 return HAL_TIMEOUT;
1193 }
1194
1195 /* Reset ENC bit to disable the encoder interface */
1196 hlptim->Instance->CFGR &= ~LPTIM_CFGR_ENC;
1197
1198 /* Change the LPTIM state */
1199 hlptim->State = HAL_LPTIM_STATE_READY;
1200
1201 /* Return function status */
1202 return HAL_OK;
1203 }
1204
1205 /**
1206 * @brief Start the Encoder interface in interrupt mode.
1207 * @param hlptim LPTIM handle
1208 * @param Period Specifies the Autoreload value.
1209 * This parameter must be a value between 0x0000 and 0xFFFF.
1210 * @retval HAL status
1211 */
HAL_LPTIM_Encoder_Start_IT(LPTIM_HandleTypeDef * hlptim,uint32_t Period)1212 HAL_StatusTypeDef HAL_LPTIM_Encoder_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Period)
1213 {
1214 uint32_t tmpcfgr;
1215
1216 /* Check the parameters */
1217 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
1218 assert_param(IS_LPTIM_PERIOD(Period));
1219 assert_param(hlptim->Init.Clock.Source == LPTIM_CLOCKSOURCE_APBCLOCK_LPOSC);
1220 assert_param(hlptim->Init.Clock.Prescaler == LPTIM_PRESCALER_DIV1);
1221 assert_param(IS_LPTIM_CLOCK_POLARITY(hlptim->Init.UltraLowPowerClock.Polarity));
1222
1223 /* Set the LPTIM state */
1224 hlptim->State = HAL_LPTIM_STATE_BUSY;
1225
1226 /* Configure edge sensitivity for encoder mode */
1227 /* Get the LPTIMx CFGR value */
1228 tmpcfgr = hlptim->Instance->CFGR;
1229
1230 /* Clear CKPOL bits */
1231 tmpcfgr &= (uint32_t)(~LPTIM_CFGR_CKPOL);
1232
1233 /* Set Input polarity */
1234 tmpcfgr |= hlptim->Init.UltraLowPowerClock.Polarity;
1235
1236 /* Write to LPTIMx CFGR */
1237 hlptim->Instance->CFGR = tmpcfgr;
1238
1239 /* Set ENC bit to enable the encoder interface */
1240 hlptim->Instance->CFGR |= LPTIM_CFGR_ENC;
1241
1242 /* Enable the Peripheral */
1243 __HAL_LPTIM_ENABLE(hlptim);
1244
1245 /* Clear flag */
1246 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_ARROK);
1247
1248 /* Load the period value in the autoreload register */
1249 __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period);
1250
1251 /* Wait for the completion of the write operation to the LPTIM_ARR register */
1252 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_ARROK) == HAL_TIMEOUT)
1253 {
1254 return HAL_TIMEOUT;
1255 }
1256
1257 /* Disable the Peripheral */
1258 __HAL_LPTIM_DISABLE(hlptim);
1259
1260 if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
1261 {
1262 return HAL_TIMEOUT;
1263 }
1264
1265 /* Enable "switch to down direction" interrupt */
1266 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_DOWN);
1267
1268 /* Enable "switch to up direction" interrupt */
1269 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_UP);
1270
1271 /* Enable the Peripheral */
1272 __HAL_LPTIM_ENABLE(hlptim);
1273
1274 /* Start timer in continuous mode */
1275 __HAL_LPTIM_START_CONTINUOUS(hlptim);
1276
1277 /* Change the LPTIM state */
1278 hlptim->State = HAL_LPTIM_STATE_READY;
1279
1280 /* Return function status */
1281 return HAL_OK;
1282 }
1283
1284 /**
1285 * @brief Stop the Encoder interface in interrupt mode.
1286 * @param hlptim LPTIM handle
1287 * @retval HAL status
1288 */
HAL_LPTIM_Encoder_Stop_IT(LPTIM_HandleTypeDef * hlptim)1289 HAL_StatusTypeDef HAL_LPTIM_Encoder_Stop_IT(LPTIM_HandleTypeDef *hlptim)
1290 {
1291 /* Check the parameters */
1292 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
1293
1294 /* Set the LPTIM state */
1295 hlptim->State = HAL_LPTIM_STATE_BUSY;
1296
1297 /* Disable the Peripheral */
1298 __HAL_LPTIM_DISABLE(hlptim);
1299
1300 if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
1301 {
1302 return HAL_TIMEOUT;
1303 }
1304
1305 /* Reset ENC bit to disable the encoder interface */
1306 hlptim->Instance->CFGR &= ~LPTIM_CFGR_ENC;
1307
1308 /* Disable "switch to down direction" interrupt */
1309 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_DOWN);
1310
1311 /* Disable "switch to up direction" interrupt */
1312 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_UP);
1313
1314 /* Change the LPTIM state */
1315 hlptim->State = HAL_LPTIM_STATE_READY;
1316
1317 /* Return function status */
1318 return HAL_OK;
1319 }
1320
1321 /**
1322 * @brief Start the Timeout function.
1323 * @note The first trigger event will start the timer, any successive
1324 * trigger event will reset the counter and the timer restarts.
1325 * @param hlptim LPTIM handle
1326 * @param Period Specifies the Autoreload value.
1327 * This parameter must be a value between 0x0001 and 0xFFFF.
1328 * @param Timeout Specifies the TimeOut value to reset the counter.
1329 * This parameter must be a value between 0x0000 and 0xFFFF.
1330 * @retval HAL status
1331 */
HAL_LPTIM_TimeOut_Start(LPTIM_HandleTypeDef * hlptim,uint32_t Period,uint32_t Timeout)1332 HAL_StatusTypeDef HAL_LPTIM_TimeOut_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Timeout)
1333 {
1334 /* Check the parameters */
1335 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
1336 assert_param(IS_LPTIM_PERIOD(Period));
1337 assert_param(IS_LPTIM_PULSE(Timeout));
1338
1339 /* Set the LPTIM state */
1340 hlptim->State = HAL_LPTIM_STATE_BUSY;
1341
1342 /* Set TIMOUT bit to enable the timeout function */
1343 hlptim->Instance->CFGR |= LPTIM_CFGR_TIMOUT;
1344
1345 /* Enable the Peripheral */
1346 __HAL_LPTIM_ENABLE(hlptim);
1347
1348 /* Clear flag */
1349 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_ARROK);
1350
1351 /* Load the period value in the autoreload register */
1352 __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period);
1353
1354 /* Wait for the completion of the write operation to the LPTIM_ARR register */
1355 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_ARROK) == HAL_TIMEOUT)
1356 {
1357 return HAL_TIMEOUT;
1358 }
1359
1360 /* Clear flag */
1361 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_CMPOK);
1362
1363 /* Load the Timeout value in the compare register */
1364 __HAL_LPTIM_COMPARE_SET(hlptim, Timeout);
1365
1366 /* Wait for the completion of the write operation to the LPTIM_CMP register */
1367 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_CMPOK) == HAL_TIMEOUT)
1368 {
1369 return HAL_TIMEOUT;
1370 }
1371
1372 /* Start timer in continuous mode */
1373 __HAL_LPTIM_START_CONTINUOUS(hlptim);
1374
1375 /* Change the LPTIM state */
1376 hlptim->State = HAL_LPTIM_STATE_READY;
1377
1378 /* Return function status */
1379 return HAL_OK;
1380 }
1381
1382 /**
1383 * @brief Stop the Timeout function.
1384 * @param hlptim LPTIM handle
1385 * @retval HAL status
1386 */
HAL_LPTIM_TimeOut_Stop(LPTIM_HandleTypeDef * hlptim)1387 HAL_StatusTypeDef HAL_LPTIM_TimeOut_Stop(LPTIM_HandleTypeDef *hlptim)
1388 {
1389 /* Check the parameters */
1390 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
1391
1392 /* Set the LPTIM state */
1393 hlptim->State = HAL_LPTIM_STATE_BUSY;
1394
1395 /* Disable the Peripheral */
1396 __HAL_LPTIM_DISABLE(hlptim);
1397
1398 if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
1399 {
1400 return HAL_TIMEOUT;
1401 }
1402
1403 /* Reset TIMOUT bit to enable the timeout function */
1404 hlptim->Instance->CFGR &= ~LPTIM_CFGR_TIMOUT;
1405
1406 /* Change the LPTIM state */
1407 hlptim->State = HAL_LPTIM_STATE_READY;
1408
1409 /* Return function status */
1410 return HAL_OK;
1411 }
1412
1413 /**
1414 * @brief Start the Timeout function in interrupt mode.
1415 * @note The first trigger event will start the timer, any successive
1416 * trigger event will reset the counter and the timer restarts.
1417 * @param hlptim LPTIM handle
1418 * @param Period Specifies the Autoreload value.
1419 * This parameter must be a value between 0x0001 and 0xFFFF.
1420 * @param Timeout Specifies the TimeOut value to reset the counter.
1421 * This parameter must be a value between 0x0000 and 0xFFFF.
1422 * @retval HAL status
1423 */
HAL_LPTIM_TimeOut_Start_IT(LPTIM_HandleTypeDef * hlptim,uint32_t Period,uint32_t Timeout)1424 HAL_StatusTypeDef HAL_LPTIM_TimeOut_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Timeout)
1425 {
1426 /* Check the parameters */
1427 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
1428 assert_param(IS_LPTIM_PERIOD(Period));
1429 assert_param(IS_LPTIM_PULSE(Timeout));
1430
1431 /* Set the LPTIM state */
1432 hlptim->State = HAL_LPTIM_STATE_BUSY;
1433
1434 /* Enable EXTI Line interrupt on the LPTIM Wake-up Timer */
1435 __HAL_LPTIM_WAKEUPTIMER_EXTI_ENABLE_IT();
1436 /* Enable rising edge trigger on the LPTIM Wake-up Timer Exti line */
1437 __HAL_LPTIM_WAKEUPTIMER_EXTI_ENABLE_RISING_EDGE();
1438
1439 /* Set TIMOUT bit to enable the timeout function */
1440 hlptim->Instance->CFGR |= LPTIM_CFGR_TIMOUT;
1441
1442 /* Enable the Peripheral */
1443 __HAL_LPTIM_ENABLE(hlptim);
1444
1445 /* Clear flag */
1446 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_ARROK);
1447
1448 /* Load the period value in the autoreload register */
1449 __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period);
1450
1451 /* Wait for the completion of the write operation to the LPTIM_ARR register */
1452 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_ARROK) == HAL_TIMEOUT)
1453 {
1454 return HAL_TIMEOUT;
1455 }
1456
1457 /* Clear flag */
1458 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_CMPOK);
1459
1460 /* Load the Timeout value in the compare register */
1461 __HAL_LPTIM_COMPARE_SET(hlptim, Timeout);
1462
1463 /* Wait for the completion of the write operation to the LPTIM_CMP register */
1464 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_CMPOK) == HAL_TIMEOUT)
1465 {
1466 return HAL_TIMEOUT;
1467 }
1468
1469 /* Disable the Peripheral */
1470 __HAL_LPTIM_DISABLE(hlptim);
1471
1472 if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
1473 {
1474 return HAL_TIMEOUT;
1475 }
1476
1477 /* Enable Compare match interrupt */
1478 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_CMPM);
1479
1480 /* Enable the Peripheral */
1481 __HAL_LPTIM_ENABLE(hlptim);
1482
1483 /* Start timer in continuous mode */
1484 __HAL_LPTIM_START_CONTINUOUS(hlptim);
1485
1486 /* Change the LPTIM state */
1487 hlptim->State = HAL_LPTIM_STATE_READY;
1488
1489 /* Return function status */
1490 return HAL_OK;
1491 }
1492
1493 /**
1494 * @brief Stop the Timeout function in interrupt mode.
1495 * @param hlptim LPTIM handle
1496 * @retval HAL status
1497 */
HAL_LPTIM_TimeOut_Stop_IT(LPTIM_HandleTypeDef * hlptim)1498 HAL_StatusTypeDef HAL_LPTIM_TimeOut_Stop_IT(LPTIM_HandleTypeDef *hlptim)
1499 {
1500 /* Check the parameters */
1501 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
1502
1503 /* Disable rising edge trigger on the LPTIM Wake-up Timer Exti line */
1504 __HAL_LPTIM_WAKEUPTIMER_EXTI_DISABLE_RISING_EDGE();
1505
1506 /* Disable EXTI Line interrupt on the LPTIM Wake-up Timer */
1507 __HAL_LPTIM_WAKEUPTIMER_EXTI_DISABLE_IT();
1508
1509 /* Set the LPTIM state */
1510 hlptim->State = HAL_LPTIM_STATE_BUSY;
1511
1512 /* Disable the Peripheral */
1513 __HAL_LPTIM_DISABLE(hlptim);
1514
1515 if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
1516 {
1517 return HAL_TIMEOUT;
1518 }
1519
1520 /* Reset TIMOUT bit to enable the timeout function */
1521 hlptim->Instance->CFGR &= ~LPTIM_CFGR_TIMOUT;
1522
1523 /* Disable Compare match interrupt */
1524 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_CMPM);
1525
1526 /* Change the LPTIM state */
1527 hlptim->State = HAL_LPTIM_STATE_READY;
1528
1529 /* Return function status */
1530 return HAL_OK;
1531 }
1532
1533 /**
1534 * @brief Start the Counter mode.
1535 * @param hlptim LPTIM handle
1536 * @param Period Specifies the Autoreload value.
1537 * This parameter must be a value between 0x0001 and 0xFFFF.
1538 * @retval HAL status
1539 */
HAL_LPTIM_Counter_Start(LPTIM_HandleTypeDef * hlptim,uint32_t Period)1540 HAL_StatusTypeDef HAL_LPTIM_Counter_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Period)
1541 {
1542 /* Check the parameters */
1543 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
1544 assert_param(IS_LPTIM_PERIOD(Period));
1545
1546 /* Set the LPTIM state */
1547 hlptim->State = HAL_LPTIM_STATE_BUSY;
1548
1549 /* If clock source is not ULPTIM clock and counter source is external, then it must not be prescaled */
1550 if ((hlptim->Init.Clock.Source != LPTIM_CLOCKSOURCE_ULPTIM)
1551 && (hlptim->Init.CounterSource == LPTIM_COUNTERSOURCE_EXTERNAL))
1552 {
1553 /* Check if clock is prescaled */
1554 assert_param(IS_LPTIM_CLOCK_PRESCALERDIV1(hlptim->Init.Clock.Prescaler));
1555 /* Set clock prescaler to 0 */
1556 hlptim->Instance->CFGR &= ~LPTIM_CFGR_PRESC;
1557 }
1558
1559 /* Enable the Peripheral */
1560 __HAL_LPTIM_ENABLE(hlptim);
1561
1562 /* Clear flag */
1563 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_ARROK);
1564
1565 /* Load the period value in the autoreload register */
1566 __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period);
1567
1568 /* Wait for the completion of the write operation to the LPTIM_ARR register */
1569 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_ARROK) == HAL_TIMEOUT)
1570 {
1571 return HAL_TIMEOUT;
1572 }
1573
1574 /* Start timer in continuous mode */
1575 __HAL_LPTIM_START_CONTINUOUS(hlptim);
1576
1577 /* Change the LPTIM state */
1578 hlptim->State = HAL_LPTIM_STATE_READY;
1579
1580 /* Return function status */
1581 return HAL_OK;
1582 }
1583
1584 /**
1585 * @brief Stop the Counter mode.
1586 * @param hlptim LPTIM handle
1587 * @retval HAL status
1588 */
HAL_LPTIM_Counter_Stop(LPTIM_HandleTypeDef * hlptim)1589 HAL_StatusTypeDef HAL_LPTIM_Counter_Stop(LPTIM_HandleTypeDef *hlptim)
1590 {
1591 /* Check the parameters */
1592 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
1593
1594 /* Set the LPTIM state */
1595 hlptim->State = HAL_LPTIM_STATE_BUSY;
1596
1597 /* Disable the Peripheral */
1598 __HAL_LPTIM_DISABLE(hlptim);
1599
1600 if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
1601 {
1602 return HAL_TIMEOUT;
1603 }
1604
1605 /* Change the LPTIM state */
1606 hlptim->State = HAL_LPTIM_STATE_READY;
1607
1608 /* Return function status */
1609 return HAL_OK;
1610 }
1611
1612 /**
1613 * @brief Start the Counter mode in interrupt mode.
1614 * @param hlptim LPTIM handle
1615 * @param Period Specifies the Autoreload value.
1616 * This parameter must be a value between 0x0001 and 0xFFFF.
1617 * @retval HAL status
1618 */
HAL_LPTIM_Counter_Start_IT(LPTIM_HandleTypeDef * hlptim,uint32_t Period)1619 HAL_StatusTypeDef HAL_LPTIM_Counter_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Period)
1620 {
1621 /* Check the parameters */
1622 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
1623 assert_param(IS_LPTIM_PERIOD(Period));
1624
1625 /* Set the LPTIM state */
1626 hlptim->State = HAL_LPTIM_STATE_BUSY;
1627
1628 /* Enable EXTI Line interrupt on the LPTIM Wake-up Timer */
1629 __HAL_LPTIM_WAKEUPTIMER_EXTI_ENABLE_IT();
1630 /* Enable rising edge trigger on the LPTIM Wake-up Timer Exti line */
1631 __HAL_LPTIM_WAKEUPTIMER_EXTI_ENABLE_RISING_EDGE();
1632
1633 /* If clock source is not ULPTIM clock and counter source is external, then it must not be prescaled */
1634 if ((hlptim->Init.Clock.Source != LPTIM_CLOCKSOURCE_ULPTIM)
1635 && (hlptim->Init.CounterSource == LPTIM_COUNTERSOURCE_EXTERNAL))
1636 {
1637 /* Check if clock is prescaled */
1638 assert_param(IS_LPTIM_CLOCK_PRESCALERDIV1(hlptim->Init.Clock.Prescaler));
1639 /* Set clock prescaler to 0 */
1640 hlptim->Instance->CFGR &= ~LPTIM_CFGR_PRESC;
1641 }
1642
1643 /* Enable the Peripheral */
1644 __HAL_LPTIM_ENABLE(hlptim);
1645
1646 /* Clear flag */
1647 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_ARROK);
1648
1649 /* Load the period value in the autoreload register */
1650 __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period);
1651
1652 /* Wait for the completion of the write operation to the LPTIM_ARR register */
1653 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_ARROK) == HAL_TIMEOUT)
1654 {
1655 return HAL_TIMEOUT;
1656 }
1657
1658 /* Disable the Peripheral */
1659 __HAL_LPTIM_DISABLE(hlptim);
1660
1661 if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
1662 {
1663 return HAL_TIMEOUT;
1664 }
1665
1666 /* Enable Autoreload write complete interrupt */
1667 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_ARROK);
1668
1669 /* Enable Autoreload match interrupt */
1670 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_ARRM);
1671
1672 /* Enable the Peripheral */
1673 __HAL_LPTIM_ENABLE(hlptim);
1674
1675 /* Start timer in continuous mode */
1676 __HAL_LPTIM_START_CONTINUOUS(hlptim);
1677
1678 /* Change the LPTIM state */
1679 hlptim->State = HAL_LPTIM_STATE_READY;
1680
1681 /* Return function status */
1682 return HAL_OK;
1683 }
1684
1685 /**
1686 * @brief Stop the Counter mode in interrupt mode.
1687 * @param hlptim LPTIM handle
1688 * @retval HAL status
1689 */
HAL_LPTIM_Counter_Stop_IT(LPTIM_HandleTypeDef * hlptim)1690 HAL_StatusTypeDef HAL_LPTIM_Counter_Stop_IT(LPTIM_HandleTypeDef *hlptim)
1691 {
1692 /* Check the parameters */
1693 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
1694
1695 /* Disable rising edge trigger on the LPTIM Wake-up Timer Exti line */
1696 __HAL_LPTIM_WAKEUPTIMER_EXTI_DISABLE_RISING_EDGE();
1697
1698 /* Disable EXTI Line interrupt on the LPTIM Wake-up Timer */
1699 __HAL_LPTIM_WAKEUPTIMER_EXTI_DISABLE_IT();
1700
1701 /* Set the LPTIM state */
1702 hlptim->State = HAL_LPTIM_STATE_BUSY;
1703
1704 /* Disable the Peripheral */
1705 __HAL_LPTIM_DISABLE(hlptim);
1706
1707 if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
1708 {
1709 return HAL_TIMEOUT;
1710 }
1711
1712 /* Disable Autoreload write complete interrupt */
1713 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_ARROK);
1714
1715 /* Disable Autoreload match interrupt */
1716 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_ARRM);
1717 /* Change the LPTIM state */
1718 hlptim->State = HAL_LPTIM_STATE_READY;
1719
1720 /* Return function status */
1721 return HAL_OK;
1722 }
1723
1724 /**
1725 * @}
1726 */
1727
1728 /** @defgroup LPTIM_Exported_Functions_Group3 LPTIM Read operation functions
1729 * @brief Read operation functions.
1730 *
1731 @verbatim
1732 ==============================================================================
1733 ##### LPTIM Read operation functions #####
1734 ==============================================================================
1735 [..] This section provides LPTIM Reading functions.
1736 (+) Read the counter value.
1737 (+) Read the period (Auto-reload) value.
1738 (+) Read the pulse (Compare)value.
1739 @endverbatim
1740 * @{
1741 */
1742
1743 /**
1744 * @brief Return the current counter value.
1745 * @param hlptim LPTIM handle
1746 * @retval Counter value.
1747 */
HAL_LPTIM_ReadCounter(const LPTIM_HandleTypeDef * hlptim)1748 uint32_t HAL_LPTIM_ReadCounter(const LPTIM_HandleTypeDef *hlptim)
1749 {
1750 /* Check the parameters */
1751 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
1752
1753 return (hlptim->Instance->CNT);
1754 }
1755
1756 /**
1757 * @brief Return the current Autoreload (Period) value.
1758 * @param hlptim LPTIM handle
1759 * @retval Autoreload value.
1760 */
HAL_LPTIM_ReadAutoReload(const LPTIM_HandleTypeDef * hlptim)1761 uint32_t HAL_LPTIM_ReadAutoReload(const LPTIM_HandleTypeDef *hlptim)
1762 {
1763 /* Check the parameters */
1764 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
1765
1766 return (hlptim->Instance->ARR);
1767 }
1768
1769 /**
1770 * @brief Return the current Compare (Pulse) value.
1771 * @param hlptim LPTIM handle
1772 * @retval Compare value.
1773 */
HAL_LPTIM_ReadCompare(const LPTIM_HandleTypeDef * hlptim)1774 uint32_t HAL_LPTIM_ReadCompare(const LPTIM_HandleTypeDef *hlptim)
1775 {
1776 /* Check the parameters */
1777 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
1778
1779 return (hlptim->Instance->CMP);
1780 }
1781
1782 /**
1783 * @}
1784 */
1785
1786 /** @defgroup LPTIM_Exported_Functions_Group4 LPTIM IRQ handler and callbacks
1787 * @brief LPTIM IRQ handler.
1788 *
1789 @verbatim
1790 ==============================================================================
1791 ##### LPTIM IRQ handler and callbacks #####
1792 ==============================================================================
1793 [..] This section provides LPTIM IRQ handler and callback functions called within
1794 the IRQ handler:
1795 (+) LPTIM interrupt request handler
1796 (+) Compare match Callback
1797 (+) Auto-reload match Callback
1798 (+) External trigger event detection Callback
1799 (+) Compare register write complete Callback
1800 (+) Auto-reload register write complete Callback
1801 (+) Up-counting direction change Callback
1802 (+) Down-counting direction change Callback
1803
1804 @endverbatim
1805 * @{
1806 */
1807
1808 /**
1809 * @brief Handle LPTIM interrupt request.
1810 * @param hlptim LPTIM handle
1811 * @retval None
1812 */
HAL_LPTIM_IRQHandler(LPTIM_HandleTypeDef * hlptim)1813 void HAL_LPTIM_IRQHandler(LPTIM_HandleTypeDef *hlptim)
1814 {
1815 /* Compare match interrupt */
1816 if (__HAL_LPTIM_GET_FLAG(hlptim, LPTIM_FLAG_CMPM) != RESET)
1817 {
1818 if (__HAL_LPTIM_GET_IT_SOURCE(hlptim, LPTIM_IT_CMPM) != RESET)
1819 {
1820 /* Clear Compare match flag */
1821 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_CMPM);
1822
1823 /* Compare match Callback */
1824 #if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1)
1825 hlptim->CompareMatchCallback(hlptim);
1826 #else
1827 HAL_LPTIM_CompareMatchCallback(hlptim);
1828 #endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */
1829 }
1830 }
1831
1832 /* Autoreload match interrupt */
1833 if (__HAL_LPTIM_GET_FLAG(hlptim, LPTIM_FLAG_ARRM) != RESET)
1834 {
1835 if (__HAL_LPTIM_GET_IT_SOURCE(hlptim, LPTIM_IT_ARRM) != RESET)
1836 {
1837 /* Clear Autoreload match flag */
1838 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_ARRM);
1839
1840 /* Autoreload match Callback */
1841 #if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1)
1842 hlptim->AutoReloadMatchCallback(hlptim);
1843 #else
1844 HAL_LPTIM_AutoReloadMatchCallback(hlptim);
1845 #endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */
1846 }
1847 }
1848
1849 /* Trigger detected interrupt */
1850 if (__HAL_LPTIM_GET_FLAG(hlptim, LPTIM_FLAG_EXTTRIG) != RESET)
1851 {
1852 if (__HAL_LPTIM_GET_IT_SOURCE(hlptim, LPTIM_IT_EXTTRIG) != RESET)
1853 {
1854 /* Clear Trigger detected flag */
1855 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_EXTTRIG);
1856
1857 /* Trigger detected callback */
1858 #if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1)
1859 hlptim->TriggerCallback(hlptim);
1860 #else
1861 HAL_LPTIM_TriggerCallback(hlptim);
1862 #endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */
1863 }
1864 }
1865
1866 /* Compare write interrupt */
1867 if (__HAL_LPTIM_GET_FLAG(hlptim, LPTIM_FLAG_CMPOK) != RESET)
1868 {
1869 if (__HAL_LPTIM_GET_IT_SOURCE(hlptim, LPTIM_IT_CMPOK) != RESET)
1870 {
1871 /* Clear Compare write flag */
1872 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_CMPOK);
1873
1874 /* Compare write Callback */
1875 #if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1)
1876 hlptim->CompareWriteCallback(hlptim);
1877 #else
1878 HAL_LPTIM_CompareWriteCallback(hlptim);
1879 #endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */
1880 }
1881 }
1882
1883 /* Autoreload write interrupt */
1884 if (__HAL_LPTIM_GET_FLAG(hlptim, LPTIM_FLAG_ARROK) != RESET)
1885 {
1886 if (__HAL_LPTIM_GET_IT_SOURCE(hlptim, LPTIM_IT_ARROK) != RESET)
1887 {
1888 /* Clear Autoreload write flag */
1889 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_ARROK);
1890
1891 /* Autoreload write Callback */
1892 #if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1)
1893 hlptim->AutoReloadWriteCallback(hlptim);
1894 #else
1895 HAL_LPTIM_AutoReloadWriteCallback(hlptim);
1896 #endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */
1897 }
1898 }
1899
1900 /* Direction counter changed from Down to Up interrupt */
1901 if (__HAL_LPTIM_GET_FLAG(hlptim, LPTIM_FLAG_UP) != RESET)
1902 {
1903 if (__HAL_LPTIM_GET_IT_SOURCE(hlptim, LPTIM_IT_UP) != RESET)
1904 {
1905 /* Clear Direction counter changed from Down to Up flag */
1906 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_UP);
1907
1908 /* Direction counter changed from Down to Up Callback */
1909 #if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1)
1910 hlptim->DirectionUpCallback(hlptim);
1911 #else
1912 HAL_LPTIM_DirectionUpCallback(hlptim);
1913 #endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */
1914 }
1915 }
1916
1917 /* Direction counter changed from Up to Down interrupt */
1918 if (__HAL_LPTIM_GET_FLAG(hlptim, LPTIM_FLAG_DOWN) != RESET)
1919 {
1920 if (__HAL_LPTIM_GET_IT_SOURCE(hlptim, LPTIM_IT_DOWN) != RESET)
1921 {
1922 /* Clear Direction counter changed from Up to Down flag */
1923 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_DOWN);
1924
1925 /* Direction counter changed from Up to Down Callback */
1926 #if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1)
1927 hlptim->DirectionDownCallback(hlptim);
1928 #else
1929 HAL_LPTIM_DirectionDownCallback(hlptim);
1930 #endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */
1931 }
1932 }
1933 __HAL_LPTIM_WAKEUPTIMER_EXTI_CLEAR_FLAG();
1934 }
1935
1936 /**
1937 * @brief Compare match callback in non-blocking mode.
1938 * @param hlptim LPTIM handle
1939 * @retval None
1940 */
HAL_LPTIM_CompareMatchCallback(LPTIM_HandleTypeDef * hlptim)1941 __weak void HAL_LPTIM_CompareMatchCallback(LPTIM_HandleTypeDef *hlptim)
1942 {
1943 /* Prevent unused argument(s) compilation warning */
1944 UNUSED(hlptim);
1945
1946 /* NOTE : This function should not be modified, when the callback is needed,
1947 the HAL_LPTIM_CompareMatchCallback could be implemented in the user file
1948 */
1949 }
1950
1951 /**
1952 * @brief Autoreload match callback in non-blocking mode.
1953 * @param hlptim LPTIM handle
1954 * @retval None
1955 */
HAL_LPTIM_AutoReloadMatchCallback(LPTIM_HandleTypeDef * hlptim)1956 __weak void HAL_LPTIM_AutoReloadMatchCallback(LPTIM_HandleTypeDef *hlptim)
1957 {
1958 /* Prevent unused argument(s) compilation warning */
1959 UNUSED(hlptim);
1960
1961 /* NOTE : This function should not be modified, when the callback is needed,
1962 the HAL_LPTIM_AutoReloadMatchCallback could be implemented in the user file
1963 */
1964 }
1965
1966 /**
1967 * @brief Trigger detected callback in non-blocking mode.
1968 * @param hlptim LPTIM handle
1969 * @retval None
1970 */
HAL_LPTIM_TriggerCallback(LPTIM_HandleTypeDef * hlptim)1971 __weak void HAL_LPTIM_TriggerCallback(LPTIM_HandleTypeDef *hlptim)
1972 {
1973 /* Prevent unused argument(s) compilation warning */
1974 UNUSED(hlptim);
1975
1976 /* NOTE : This function should not be modified, when the callback is needed,
1977 the HAL_LPTIM_TriggerCallback could be implemented in the user file
1978 */
1979 }
1980
1981 /**
1982 * @brief Compare write callback in non-blocking mode.
1983 * @param hlptim LPTIM handle
1984 * @retval None
1985 */
HAL_LPTIM_CompareWriteCallback(LPTIM_HandleTypeDef * hlptim)1986 __weak void HAL_LPTIM_CompareWriteCallback(LPTIM_HandleTypeDef *hlptim)
1987 {
1988 /* Prevent unused argument(s) compilation warning */
1989 UNUSED(hlptim);
1990
1991 /* NOTE : This function should not be modified, when the callback is needed,
1992 the HAL_LPTIM_CompareWriteCallback could be implemented in the user file
1993 */
1994 }
1995
1996 /**
1997 * @brief Autoreload write callback in non-blocking mode.
1998 * @param hlptim LPTIM handle
1999 * @retval None
2000 */
HAL_LPTIM_AutoReloadWriteCallback(LPTIM_HandleTypeDef * hlptim)2001 __weak void HAL_LPTIM_AutoReloadWriteCallback(LPTIM_HandleTypeDef *hlptim)
2002 {
2003 /* Prevent unused argument(s) compilation warning */
2004 UNUSED(hlptim);
2005
2006 /* NOTE : This function should not be modified, when the callback is needed,
2007 the HAL_LPTIM_AutoReloadWriteCallback could be implemented in the user file
2008 */
2009 }
2010
2011 /**
2012 * @brief Direction counter changed from Down to Up callback in non-blocking mode.
2013 * @param hlptim LPTIM handle
2014 * @retval None
2015 */
HAL_LPTIM_DirectionUpCallback(LPTIM_HandleTypeDef * hlptim)2016 __weak void HAL_LPTIM_DirectionUpCallback(LPTIM_HandleTypeDef *hlptim)
2017 {
2018 /* Prevent unused argument(s) compilation warning */
2019 UNUSED(hlptim);
2020
2021 /* NOTE : This function should not be modified, when the callback is needed,
2022 the HAL_LPTIM_DirectionUpCallback could be implemented in the user file
2023 */
2024 }
2025
2026 /**
2027 * @brief Direction counter changed from Up to Down callback in non-blocking mode.
2028 * @param hlptim LPTIM handle
2029 * @retval None
2030 */
HAL_LPTIM_DirectionDownCallback(LPTIM_HandleTypeDef * hlptim)2031 __weak void HAL_LPTIM_DirectionDownCallback(LPTIM_HandleTypeDef *hlptim)
2032 {
2033 /* Prevent unused argument(s) compilation warning */
2034 UNUSED(hlptim);
2035
2036 /* NOTE : This function should not be modified, when the callback is needed,
2037 the HAL_LPTIM_DirectionDownCallback could be implemented in the user file
2038 */
2039 }
2040
2041 #if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1)
2042 /**
2043 * @brief Register a User LPTIM callback to be used instead of the weak predefined callback
2044 * @param hlptim LPTIM handle
2045 * @param CallbackID ID of the callback to be registered
2046 * This parameter can be one of the following values:
2047 * @arg @ref HAL_LPTIM_MSPINIT_CB_ID LPTIM Base Msp Init Callback ID
2048 * @arg @ref HAL_LPTIM_MSPDEINIT_CB_ID LPTIM Base Msp DeInit Callback ID
2049 * @arg @ref HAL_LPTIM_COMPARE_MATCH_CB_ID Compare match Callback ID
2050 * @arg @ref HAL_LPTIM_AUTORELOAD_MATCH_CB_ID Auto-reload match Callback ID
2051 * @arg @ref HAL_LPTIM_TRIGGER_CB_ID External trigger event detection Callback ID
2052 * @arg @ref HAL_LPTIM_COMPARE_WRITE_CB_ID Compare register write complete Callback ID
2053 * @arg @ref HAL_LPTIM_AUTORELOAD_WRITE_CB_ID Auto-reload register write complete Callback ID
2054 * @arg @ref HAL_LPTIM_DIRECTION_UP_CB_ID Up-counting direction change Callback ID
2055 * @arg @ref HAL_LPTIM_DIRECTION_DOWN_CB_ID Down-counting direction change Callback ID
2056 * @param pCallback pointer to the callback function
2057 * @retval status
2058 */
HAL_LPTIM_RegisterCallback(LPTIM_HandleTypeDef * hlptim,HAL_LPTIM_CallbackIDTypeDef CallbackID,pLPTIM_CallbackTypeDef pCallback)2059 HAL_StatusTypeDef HAL_LPTIM_RegisterCallback(LPTIM_HandleTypeDef *hlptim,
2060 HAL_LPTIM_CallbackIDTypeDef CallbackID,
2061 pLPTIM_CallbackTypeDef pCallback)
2062 {
2063 HAL_StatusTypeDef status = HAL_OK;
2064
2065 if (pCallback == NULL)
2066 {
2067 return HAL_ERROR;
2068 }
2069
2070 /* Process locked */
2071 __HAL_LOCK(hlptim);
2072
2073 if (hlptim->State == HAL_LPTIM_STATE_READY)
2074 {
2075 switch (CallbackID)
2076 {
2077 case HAL_LPTIM_MSPINIT_CB_ID :
2078 hlptim->MspInitCallback = pCallback;
2079 break;
2080
2081 case HAL_LPTIM_MSPDEINIT_CB_ID :
2082 hlptim->MspDeInitCallback = pCallback;
2083 break;
2084
2085 case HAL_LPTIM_COMPARE_MATCH_CB_ID :
2086 hlptim->CompareMatchCallback = pCallback;
2087 break;
2088
2089 case HAL_LPTIM_AUTORELOAD_MATCH_CB_ID :
2090 hlptim->AutoReloadMatchCallback = pCallback;
2091 break;
2092
2093 case HAL_LPTIM_TRIGGER_CB_ID :
2094 hlptim->TriggerCallback = pCallback;
2095 break;
2096
2097 case HAL_LPTIM_COMPARE_WRITE_CB_ID :
2098 hlptim->CompareWriteCallback = pCallback;
2099 break;
2100
2101 case HAL_LPTIM_AUTORELOAD_WRITE_CB_ID :
2102 hlptim->AutoReloadWriteCallback = pCallback;
2103 break;
2104
2105 case HAL_LPTIM_DIRECTION_UP_CB_ID :
2106 hlptim->DirectionUpCallback = pCallback;
2107 break;
2108
2109 case HAL_LPTIM_DIRECTION_DOWN_CB_ID :
2110 hlptim->DirectionDownCallback = pCallback;
2111 break;
2112
2113 default :
2114 /* Return error status */
2115 status = HAL_ERROR;
2116 break;
2117 }
2118 }
2119 else if (hlptim->State == HAL_LPTIM_STATE_RESET)
2120 {
2121 switch (CallbackID)
2122 {
2123 case HAL_LPTIM_MSPINIT_CB_ID :
2124 hlptim->MspInitCallback = pCallback;
2125 break;
2126
2127 case HAL_LPTIM_MSPDEINIT_CB_ID :
2128 hlptim->MspDeInitCallback = pCallback;
2129 break;
2130
2131 default :
2132 /* Return error status */
2133 status = HAL_ERROR;
2134 break;
2135 }
2136 }
2137 else
2138 {
2139 /* Return error status */
2140 status = HAL_ERROR;
2141 }
2142
2143 /* Release Lock */
2144 __HAL_UNLOCK(hlptim);
2145
2146 return status;
2147 }
2148
2149 /**
2150 * @brief Unregister a LPTIM callback
2151 * LLPTIM callback is redirected to the weak predefined callback
2152 * @param hlptim LPTIM handle
2153 * @param CallbackID ID of the callback to be unregistered
2154 * This parameter can be one of the following values:
2155 * @arg @ref HAL_LPTIM_MSPINIT_CB_ID LPTIM Base Msp Init Callback ID
2156 * @arg @ref HAL_LPTIM_MSPDEINIT_CB_ID LPTIM Base Msp DeInit Callback ID
2157 * @arg @ref HAL_LPTIM_COMPARE_MATCH_CB_ID Compare match Callback ID
2158 * @arg @ref HAL_LPTIM_AUTORELOAD_MATCH_CB_ID Auto-reload match Callback ID
2159 * @arg @ref HAL_LPTIM_TRIGGER_CB_ID External trigger event detection Callback ID
2160 * @arg @ref HAL_LPTIM_COMPARE_WRITE_CB_ID Compare register write complete Callback ID
2161 * @arg @ref HAL_LPTIM_AUTORELOAD_WRITE_CB_ID Auto-reload register write complete Callback ID
2162 * @arg @ref HAL_LPTIM_DIRECTION_UP_CB_ID Up-counting direction change Callback ID
2163 * @arg @ref HAL_LPTIM_DIRECTION_DOWN_CB_ID Down-counting direction change Callback ID
2164 * @retval status
2165 */
HAL_LPTIM_UnRegisterCallback(LPTIM_HandleTypeDef * hlptim,HAL_LPTIM_CallbackIDTypeDef CallbackID)2166 HAL_StatusTypeDef HAL_LPTIM_UnRegisterCallback(LPTIM_HandleTypeDef *hlptim,
2167 HAL_LPTIM_CallbackIDTypeDef CallbackID)
2168 {
2169 HAL_StatusTypeDef status = HAL_OK;
2170
2171 /* Process locked */
2172 __HAL_LOCK(hlptim);
2173
2174 if (hlptim->State == HAL_LPTIM_STATE_READY)
2175 {
2176 switch (CallbackID)
2177 {
2178 case HAL_LPTIM_MSPINIT_CB_ID :
2179 /* Legacy weak MspInit Callback */
2180 hlptim->MspInitCallback = HAL_LPTIM_MspInit;
2181 break;
2182
2183 case HAL_LPTIM_MSPDEINIT_CB_ID :
2184 /* Legacy weak Msp DeInit Callback */
2185 hlptim->MspDeInitCallback = HAL_LPTIM_MspDeInit;
2186 break;
2187
2188 case HAL_LPTIM_COMPARE_MATCH_CB_ID :
2189 /* Legacy weak Compare match Callback */
2190 hlptim->CompareMatchCallback = HAL_LPTIM_CompareMatchCallback;
2191 break;
2192
2193 case HAL_LPTIM_AUTORELOAD_MATCH_CB_ID :
2194 /* Legacy weak Auto-reload match Callback */
2195 hlptim->AutoReloadMatchCallback = HAL_LPTIM_AutoReloadMatchCallback;
2196 break;
2197
2198 case HAL_LPTIM_TRIGGER_CB_ID :
2199 /* Legacy weak External trigger event detection Callback */
2200 hlptim->TriggerCallback = HAL_LPTIM_TriggerCallback;
2201 break;
2202
2203 case HAL_LPTIM_COMPARE_WRITE_CB_ID :
2204 /* Legacy weak Compare register write complete Callback */
2205 hlptim->CompareWriteCallback = HAL_LPTIM_CompareWriteCallback;
2206 break;
2207
2208 case HAL_LPTIM_AUTORELOAD_WRITE_CB_ID :
2209 /* Legacy weak Auto-reload register write complete Callback */
2210 hlptim->AutoReloadWriteCallback = HAL_LPTIM_AutoReloadWriteCallback;
2211 break;
2212
2213 case HAL_LPTIM_DIRECTION_UP_CB_ID :
2214 /* Legacy weak Up-counting direction change Callback */
2215 hlptim->DirectionUpCallback = HAL_LPTIM_DirectionUpCallback;
2216 break;
2217
2218 case HAL_LPTIM_DIRECTION_DOWN_CB_ID :
2219 /* Legacy weak Down-counting direction change Callback */
2220 hlptim->DirectionDownCallback = HAL_LPTIM_DirectionDownCallback;
2221 break;
2222
2223 default :
2224 /* Return error status */
2225 status = HAL_ERROR;
2226 break;
2227 }
2228 }
2229 else if (hlptim->State == HAL_LPTIM_STATE_RESET)
2230 {
2231 switch (CallbackID)
2232 {
2233 case HAL_LPTIM_MSPINIT_CB_ID :
2234 /* Legacy weak MspInit Callback */
2235 hlptim->MspInitCallback = HAL_LPTIM_MspInit;
2236 break;
2237
2238 case HAL_LPTIM_MSPDEINIT_CB_ID :
2239 /* Legacy weak Msp DeInit Callback */
2240 hlptim->MspDeInitCallback = HAL_LPTIM_MspDeInit;
2241 break;
2242
2243 default :
2244 /* Return error status */
2245 status = HAL_ERROR;
2246 break;
2247 }
2248 }
2249 else
2250 {
2251 /* Return error status */
2252 status = HAL_ERROR;
2253 }
2254
2255 /* Release Lock */
2256 __HAL_UNLOCK(hlptim);
2257
2258 return status;
2259 }
2260 #endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */
2261
2262 /**
2263 * @}
2264 */
2265
2266 /** @defgroup LPTIM_Group5 Peripheral State functions
2267 * @brief Peripheral State functions.
2268 *
2269 @verbatim
2270 ==============================================================================
2271 ##### Peripheral State functions #####
2272 ==============================================================================
2273 [..]
2274 This subsection permits to get in run-time the status of the peripheral.
2275
2276 @endverbatim
2277 * @{
2278 */
2279
2280 /**
2281 * @brief Return the LPTIM handle state.
2282 * @param hlptim LPTIM handle
2283 * @retval HAL state
2284 */
HAL_LPTIM_GetState(LPTIM_HandleTypeDef * hlptim)2285 HAL_LPTIM_StateTypeDef HAL_LPTIM_GetState(LPTIM_HandleTypeDef *hlptim)
2286 {
2287 /* Return LPTIM handle state */
2288 return hlptim->State;
2289 }
2290
2291 /**
2292 * @}
2293 */
2294
2295
2296 /**
2297 * @}
2298 */
2299
2300 /* Private functions ---------------------------------------------------------*/
2301
2302 /** @defgroup LPTIM_Private_Functions LPTIM Private Functions
2303 * @{
2304 */
2305 #if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1)
2306 /**
2307 * @brief Reset interrupt callbacks to the legacy weak callbacks.
2308 * @param lptim pointer to a LPTIM_HandleTypeDef structure that contains
2309 * the configuration information for LPTIM module.
2310 * @retval None
2311 */
LPTIM_ResetCallback(LPTIM_HandleTypeDef * lptim)2312 static void LPTIM_ResetCallback(LPTIM_HandleTypeDef *lptim)
2313 {
2314 /* Reset the LPTIM callback to the legacy weak callbacks */
2315 lptim->CompareMatchCallback = HAL_LPTIM_CompareMatchCallback;
2316 lptim->AutoReloadMatchCallback = HAL_LPTIM_AutoReloadMatchCallback;
2317 lptim->TriggerCallback = HAL_LPTIM_TriggerCallback;
2318 lptim->CompareWriteCallback = HAL_LPTIM_CompareWriteCallback;
2319 lptim->AutoReloadWriteCallback = HAL_LPTIM_AutoReloadWriteCallback;
2320 lptim->DirectionUpCallback = HAL_LPTIM_DirectionUpCallback;
2321 lptim->DirectionDownCallback = HAL_LPTIM_DirectionDownCallback;
2322 }
2323 #endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */
2324
2325 /**
2326 * @brief LPTimer Wait for flag set
2327 * @param hlptim pointer to a LPTIM_HandleTypeDef structure that contains
2328 * the configuration information for LPTIM module.
2329 * @param flag The lptim flag
2330 * @retval HAL status
2331 */
LPTIM_WaitForFlag(LPTIM_HandleTypeDef * hlptim,uint32_t flag)2332 static HAL_StatusTypeDef LPTIM_WaitForFlag(LPTIM_HandleTypeDef *hlptim, uint32_t flag)
2333 {
2334 HAL_StatusTypeDef result = HAL_OK;
2335 uint32_t count = TIMEOUT * (SystemCoreClock / 20UL / 1000UL);
2336 do
2337 {
2338 count--;
2339 if (count == 0UL)
2340 {
2341 result = HAL_TIMEOUT;
2342 }
2343 } while ((!(__HAL_LPTIM_GET_FLAG((hlptim), (flag)))) && (count != 0UL));
2344
2345 return result;
2346 }
2347
2348 /**
2349 * @brief Disable LPTIM HW instance.
2350 * @param hlptim pointer to a LPTIM_HandleTypeDef structure that contains
2351 * the configuration information for LPTIM module.
2352 * @note The following sequence is required to solve LPTIM disable HW limitation.
2353 * Please check Errata Sheet ES0335 for more details under "MCU may remain
2354 * stuck in LPTIM interrupt when entering Stop mode" section.
2355 * @retval None
2356 */
LPTIM_Disable(LPTIM_HandleTypeDef * hlptim)2357 void LPTIM_Disable(LPTIM_HandleTypeDef *hlptim)
2358 {
2359 uint32_t tmpclksource = 0;
2360 uint32_t tmpIER;
2361 uint32_t tmpCFGR;
2362 uint32_t tmpCMP;
2363 uint32_t tmpARR;
2364 uint32_t primask_bit;
2365
2366 /* Enter critical section */
2367 primask_bit = __get_PRIMASK();
2368 __set_PRIMASK(1) ;
2369
2370 /*********** Save LPTIM Config ***********/
2371 /* Save LPTIM source clock */
2372 switch ((uint32_t)hlptim->Instance)
2373 {
2374 case LPTIM1_BASE:
2375 tmpclksource = __HAL_RCC_GET_LPTIM1_SOURCE();
2376 break;
2377 default:
2378 break;
2379 }
2380
2381 /* Save LPTIM configuration registers */
2382 tmpIER = hlptim->Instance->IER;
2383 tmpCFGR = hlptim->Instance->CFGR;
2384 tmpCMP = hlptim->Instance->CMP;
2385 tmpARR = hlptim->Instance->ARR;
2386
2387 /*********** Reset LPTIM ***********/
2388 switch ((uint32_t)hlptim->Instance)
2389 {
2390 case LPTIM1_BASE:
2391 __HAL_RCC_LPTIM1_FORCE_RESET();
2392 __HAL_RCC_LPTIM1_RELEASE_RESET();
2393 break;
2394 default:
2395 break;
2396 }
2397
2398 /*********** Restore LPTIM Config ***********/
2399 if ((tmpCMP != 0UL) || (tmpARR != 0UL))
2400 {
2401 /* Force LPTIM source kernel clock from APB */
2402 switch ((uint32_t)hlptim->Instance)
2403 {
2404 case LPTIM1_BASE:
2405 __HAL_RCC_LPTIM1_CONFIG(RCC_LPTIM1CLKSOURCE_PCLK1);
2406 break;
2407 default:
2408 break;
2409 }
2410
2411 if (tmpCMP != 0UL)
2412 {
2413 /* Restore CMP register (LPTIM should be enabled first) */
2414 hlptim->Instance->CR |= LPTIM_CR_ENABLE;
2415 hlptim->Instance->CMP = tmpCMP;
2416
2417 /* Wait for the completion of the write operation to the LPTIM_CMP register */
2418 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_CMPOK) == HAL_TIMEOUT)
2419 {
2420 hlptim->State = HAL_LPTIM_STATE_TIMEOUT;
2421 }
2422 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_CMPOK);
2423 }
2424
2425 if (tmpARR != 0UL)
2426 {
2427 /* Restore ARR register (LPTIM should be enabled first) */
2428 hlptim->Instance->CR |= LPTIM_CR_ENABLE;
2429 hlptim->Instance->ARR = tmpARR;
2430
2431 /* Wait for the completion of the write operation to the LPTIM_ARR register */
2432 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_ARROK) == HAL_TIMEOUT)
2433 {
2434 hlptim->State = HAL_LPTIM_STATE_TIMEOUT;
2435 }
2436
2437 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_ARROK);
2438 }
2439
2440 /* Restore LPTIM source kernel clock */
2441 switch ((uint32_t)hlptim->Instance)
2442 {
2443 case LPTIM1_BASE:
2444 __HAL_RCC_LPTIM1_CONFIG(tmpclksource);
2445 break;
2446 default:
2447 break;
2448 }
2449 }
2450
2451 /* Restore configuration registers (LPTIM should be disabled first) */
2452 hlptim->Instance->CR &= ~(LPTIM_CR_ENABLE);
2453 hlptim->Instance->IER = tmpIER;
2454 hlptim->Instance->CFGR = tmpCFGR;
2455
2456 /* Exit critical section: restore previous priority mask */
2457 __set_PRIMASK(primask_bit);
2458 }
2459 /**
2460 * @}
2461 */
2462 #endif /* LPTIM1 */
2463
2464 #endif /* HAL_LPTIM_MODULE_ENABLED */
2465 /**
2466 * @}
2467 */
2468
2469 /**
2470 * @}
2471 */
2472
