1 /**
2 ******************************************************************************
3 * @file stm32f7xx_hal_flash_ex.c
4 * @author MCD Application Team
5 * @brief Extended FLASH HAL module driver.
6 * This file provides firmware functions to manage the following
7 * functionalities of the FLASH extension peripheral:
8 * + Extended programming operations functions
9 *
10 @verbatim
11 ==============================================================================
12 ##### Flash Extension features #####
13 ==============================================================================
14
15 [..] Comparing to other previous devices, the FLASH interface for STM32F76xx/STM32F77xx
16 devices contains the following additional features
17
18 (+) Capacity up to 2 Mbyte with dual bank architecture supporting read-while-write
19 capability (RWW)
20 (+) Dual bank memory organization
21 (+) Dual boot mode
22
23 ##### How to use this driver #####
24 ==============================================================================
25 [..] This driver provides functions to configure and program the FLASH memory
26 of all STM32F7xx devices. It includes
27 (#) FLASH Memory Erase functions:
28 (++) Lock and Unlock the FLASH interface using HAL_FLASH_Unlock() and
29 HAL_FLASH_Lock() functions
30 (++) Erase function: Erase sector, erase all sectors
31 (++) There are two modes of erase :
32 (+++) Polling Mode using HAL_FLASHEx_Erase()
33 (+++) Interrupt Mode using HAL_FLASHEx_Erase_IT()
34
35 (#) Option Bytes Programming functions: Use HAL_FLASHEx_OBProgram() to :
36 (++) Set/Reset the write protection
37 (++) Set the Read protection Level
38 (++) Set the BOR level
39 (++) Program the user Option Bytes
40
41 @endverbatim
42 ******************************************************************************
43 * @attention
44 *
45 * Copyright (c) 2017 STMicroelectronics.
46 * All rights reserved.
47 *
48 * This software is licensed under terms that can be found in the LICENSE file in
49 * the root directory of this software component.
50 * If no LICENSE file comes with this software, it is provided AS-IS.
51 ******************************************************************************
52 */
53
54 /* Includes ------------------------------------------------------------------*/
55 #include "stm32f7xx_hal.h"
56
57 /** @addtogroup STM32F7xx_HAL_Driver
58 * @{
59 */
60
61 /** @defgroup FLASHEx FLASHEx
62 * @brief FLASH HAL Extension module driver
63 * @{
64 */
65
66 #ifdef HAL_FLASH_MODULE_ENABLED
67
68 /* Private typedef -----------------------------------------------------------*/
69 /* Private define ------------------------------------------------------------*/
70 /** @addtogroup FLASHEx_Private_Constants
71 * @{
72 */
73 #define SECTOR_MASK 0xFFFFFF07U
74 #define FLASH_TIMEOUT_VALUE 50000U/* 50 s */
75 /**
76 * @}
77 */
78
79 /* Private macro -------------------------------------------------------------*/
80 /* Private variables ---------------------------------------------------------*/
81 /** @addtogroup FLASHEx_Private_Variables
82 * @{
83 */
84 extern FLASH_ProcessTypeDef pFlash;
85 /**
86 * @}
87 */
88
89 /* Private function prototypes -----------------------------------------------*/
90 /** @addtogroup FLASHEx_Private_Functions
91 * @{
92 */
93 /* Option bytes control */
94 static HAL_StatusTypeDef FLASH_OB_EnableWRP(uint32_t WRPSector);
95 static HAL_StatusTypeDef FLASH_OB_DisableWRP(uint32_t WRPSector);
96 static HAL_StatusTypeDef FLASH_OB_RDP_LevelConfig(uint8_t Level);
97 static HAL_StatusTypeDef FLASH_OB_BOR_LevelConfig(uint8_t Level);
98 static HAL_StatusTypeDef FLASH_OB_BootAddressConfig(uint32_t BootOption, uint32_t Address);
99 static uint32_t FLASH_OB_GetUser(void);
100 static uint32_t FLASH_OB_GetWRP(void);
101 static uint8_t FLASH_OB_GetRDP(void);
102 static uint32_t FLASH_OB_GetBOR(void);
103 static uint32_t FLASH_OB_GetBootAddress(uint32_t BootOption);
104
105 #if defined (FLASH_OPTCR_nDBANK)
106 static void FLASH_MassErase(uint8_t VoltageRange, uint32_t Banks);
107 static HAL_StatusTypeDef FLASH_OB_UserConfig(uint32_t Wwdg, uint32_t Iwdg, uint32_t Stop, uint32_t Stdby, uint32_t Iwdgstop, \
108 uint32_t Iwdgstdby, uint32_t NDBank, uint32_t NDBoot);
109 #else
110 static void FLASH_MassErase(uint8_t VoltageRange);
111 static HAL_StatusTypeDef FLASH_OB_UserConfig(uint32_t Wwdg, uint32_t Iwdg, uint32_t Stop, uint32_t Stdby, uint32_t Iwdgstop, uint32_t Iwdgstdby);
112 #endif /* FLASH_OPTCR_nDBANK */
113
114 #if defined (FLASH_OPTCR2_PCROP)
115 static HAL_StatusTypeDef FLASH_OB_PCROP_Config(uint32_t PCROPSector);
116 static HAL_StatusTypeDef FLASH_OB_PCROP_RDP_Config(uint32_t Pcrop_Rdp);
117 static uint32_t FLASH_OB_GetPCROP(void);
118 static uint32_t FLASH_OB_GetPCROPRDP(void);
119 #endif /* FLASH_OPTCR2_PCROP */
120
121 extern HAL_StatusTypeDef FLASH_WaitForLastOperation(uint32_t Timeout);
122 /**
123 * @}
124 */
125
126 /* Exported functions --------------------------------------------------------*/
127 /** @defgroup FLASHEx_Exported_Functions FLASHEx Exported Functions
128 * @{
129 */
130
131 /** @defgroup FLASHEx_Exported_Functions_Group1 Extended IO operation functions
132 * @brief Extended IO operation functions
133 *
134 @verbatim
135 ===============================================================================
136 ##### Extended programming operation functions #####
137 ===============================================================================
138 [..]
139 This subsection provides a set of functions allowing to manage the Extension FLASH
140 programming operations Operations.
141
142 @endverbatim
143 * @{
144 */
145 /**
146 * @brief Perform a mass erase or erase the specified FLASH memory sectors
147 * @param[in] pEraseInit pointer to an FLASH_EraseInitTypeDef structure that
148 * contains the configuration information for the erasing.
149 *
150 * @param[out] SectorError pointer to variable that
151 * contains the configuration information on faulty sector in case of error
152 * (0xFFFFFFFF means that all the sectors have been correctly erased)
153 *
154 * @retval HAL Status
155 */
HAL_FLASHEx_Erase(FLASH_EraseInitTypeDef * pEraseInit,uint32_t * SectorError)156 HAL_StatusTypeDef HAL_FLASHEx_Erase(FLASH_EraseInitTypeDef *pEraseInit, uint32_t *SectorError)
157 {
158 HAL_StatusTypeDef status = HAL_ERROR;
159 uint32_t index = 0;
160
161 /* Process Locked */
162 __HAL_LOCK(&pFlash);
163
164 /* Check the parameters */
165 assert_param(IS_FLASH_TYPEERASE(pEraseInit->TypeErase));
166
167 /* Wait for last operation to be completed */
168 status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
169
170 if(status == HAL_OK)
171 {
172 /*Initialization of SectorError variable*/
173 *SectorError = 0xFFFFFFFFU;
174
175 if(pEraseInit->TypeErase == FLASH_TYPEERASE_MASSERASE)
176 {
177 /*Mass erase to be done*/
178 #if defined (FLASH_OPTCR_nDBANK)
179 FLASH_MassErase((uint8_t) pEraseInit->VoltageRange, pEraseInit->Banks);
180 #else
181 FLASH_MassErase((uint8_t) pEraseInit->VoltageRange);
182 #endif /* FLASH_OPTCR_nDBANK */
183
184 /* Wait for last operation to be completed */
185 status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
186
187 /* if the erase operation is completed, disable the MER Bit */
188 FLASH->CR &= (~FLASH_MER_BIT);
189 }
190 else
191 {
192 /* Check the parameters */
193 assert_param(IS_FLASH_NBSECTORS(pEraseInit->NbSectors + pEraseInit->Sector));
194
195 /* Erase by sector by sector to be done*/
196 for(index = pEraseInit->Sector; index < (pEraseInit->NbSectors + pEraseInit->Sector); index++)
197 {
198 FLASH_Erase_Sector(index, (uint8_t) pEraseInit->VoltageRange);
199
200 /* Wait for last operation to be completed */
201 status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
202
203 /* If the erase operation is completed, disable the SER Bit and SNB Bits */
204 CLEAR_BIT(FLASH->CR, (FLASH_CR_SER | FLASH_CR_SNB));
205
206 if(status != HAL_OK)
207 {
208 /* In case of error, stop erase procedure and return the faulty sector*/
209 *SectorError = index;
210 break;
211 }
212 }
213 }
214 }
215
216 /* Process Unlocked */
217 __HAL_UNLOCK(&pFlash);
218
219 return status;
220 }
221
222 /**
223 * @brief Perform a mass erase or erase the specified FLASH memory sectors with interrupt enabled
224 * @param pEraseInit pointer to an FLASH_EraseInitTypeDef structure that
225 * contains the configuration information for the erasing.
226 *
227 * @retval HAL Status
228 */
HAL_FLASHEx_Erase_IT(FLASH_EraseInitTypeDef * pEraseInit)229 HAL_StatusTypeDef HAL_FLASHEx_Erase_IT(FLASH_EraseInitTypeDef *pEraseInit)
230 {
231 HAL_StatusTypeDef status = HAL_OK;
232
233 /* Process Locked */
234 __HAL_LOCK(&pFlash);
235
236 /* Check the parameters */
237 assert_param(IS_FLASH_TYPEERASE(pEraseInit->TypeErase));
238
239 /* Enable End of FLASH Operation interrupt */
240 __HAL_FLASH_ENABLE_IT(FLASH_IT_EOP);
241
242 /* Enable Error source interrupt */
243 __HAL_FLASH_ENABLE_IT(FLASH_IT_ERR);
244
245 /* Clear pending flags (if any) */
246 __HAL_FLASH_CLEAR_FLAG(FLASH_FLAG_EOP | FLASH_FLAG_OPERR | FLASH_FLAG_WRPERR |\
247 FLASH_FLAG_PGAERR | FLASH_FLAG_PGPERR| FLASH_FLAG_ERSERR);
248
249 if(pEraseInit->TypeErase == FLASH_TYPEERASE_MASSERASE)
250 {
251 /*Mass erase to be done*/
252 pFlash.ProcedureOnGoing = FLASH_PROC_MASSERASE;
253 #if defined (FLASH_OPTCR_nDBANK)
254 FLASH_MassErase((uint8_t) pEraseInit->VoltageRange, pEraseInit->Banks);
255 #else
256 FLASH_MassErase((uint8_t) pEraseInit->VoltageRange);
257 #endif /* FLASH_OPTCR_nDBANK */
258 }
259 else
260 {
261 /* Erase by sector to be done*/
262
263 /* Check the parameters */
264 assert_param(IS_FLASH_NBSECTORS(pEraseInit->NbSectors + pEraseInit->Sector));
265
266 pFlash.ProcedureOnGoing = FLASH_PROC_SECTERASE;
267 pFlash.NbSectorsToErase = pEraseInit->NbSectors;
268 pFlash.Sector = pEraseInit->Sector;
269 pFlash.VoltageForErase = (uint8_t)pEraseInit->VoltageRange;
270
271 /*Erase 1st sector and wait for IT*/
272 FLASH_Erase_Sector(pEraseInit->Sector, pEraseInit->VoltageRange);
273 }
274
275 return status;
276 }
277
278 /**
279 * @brief Program option bytes
280 * @param pOBInit pointer to an FLASH_OBInitStruct structure that
281 * contains the configuration information for the programming.
282 *
283 * @retval HAL Status
284 */
HAL_FLASHEx_OBProgram(FLASH_OBProgramInitTypeDef * pOBInit)285 HAL_StatusTypeDef HAL_FLASHEx_OBProgram(FLASH_OBProgramInitTypeDef *pOBInit)
286 {
287 HAL_StatusTypeDef status = HAL_ERROR;
288
289 /* Process Locked */
290 __HAL_LOCK(&pFlash);
291
292 /* Check the parameters */
293 assert_param(IS_OPTIONBYTE(pOBInit->OptionType));
294
295 /* Write protection configuration */
296 if((pOBInit->OptionType & OPTIONBYTE_WRP) == OPTIONBYTE_WRP)
297 {
298 assert_param(IS_WRPSTATE(pOBInit->WRPState));
299 if(pOBInit->WRPState == OB_WRPSTATE_ENABLE)
300 {
301 /*Enable of Write protection on the selected Sector*/
302 status = FLASH_OB_EnableWRP(pOBInit->WRPSector);
303 }
304 else
305 {
306 /*Disable of Write protection on the selected Sector*/
307 status = FLASH_OB_DisableWRP(pOBInit->WRPSector);
308 }
309 }
310
311 /* Read protection configuration */
312 if((pOBInit->OptionType & OPTIONBYTE_RDP) == OPTIONBYTE_RDP)
313 {
314 status = FLASH_OB_RDP_LevelConfig(pOBInit->RDPLevel);
315 }
316
317 /* USER configuration */
318 if((pOBInit->OptionType & OPTIONBYTE_USER) == OPTIONBYTE_USER)
319 {
320 #if defined (FLASH_OPTCR_nDBANK)
321 status = FLASH_OB_UserConfig(pOBInit->USERConfig & OB_WWDG_SW,
322 pOBInit->USERConfig & OB_IWDG_SW,
323 pOBInit->USERConfig & OB_STOP_NO_RST,
324 pOBInit->USERConfig & OB_STDBY_NO_RST,
325 pOBInit->USERConfig & OB_IWDG_STOP_ACTIVE,
326 pOBInit->USERConfig & OB_IWDG_STDBY_ACTIVE,
327 pOBInit->USERConfig & OB_NDBANK_SINGLE_BANK,
328 pOBInit->USERConfig & OB_DUAL_BOOT_DISABLE);
329 #else
330 status = FLASH_OB_UserConfig(pOBInit->USERConfig & OB_WWDG_SW,
331 pOBInit->USERConfig & OB_IWDG_SW,
332 pOBInit->USERConfig & OB_STOP_NO_RST,
333 pOBInit->USERConfig & OB_STDBY_NO_RST,
334 pOBInit->USERConfig & OB_IWDG_STOP_ACTIVE,
335 pOBInit->USERConfig & OB_IWDG_STDBY_ACTIVE);
336 #endif /* FLASH_OPTCR_nDBANK */
337 }
338
339 /* BOR Level configuration */
340 if((pOBInit->OptionType & OPTIONBYTE_BOR) == OPTIONBYTE_BOR)
341 {
342 status = FLASH_OB_BOR_LevelConfig(pOBInit->BORLevel);
343 }
344
345 /* Boot 0 Address configuration */
346 if((pOBInit->OptionType & OPTIONBYTE_BOOTADDR_0) == OPTIONBYTE_BOOTADDR_0)
347 {
348 status = FLASH_OB_BootAddressConfig(OPTIONBYTE_BOOTADDR_0, pOBInit->BootAddr0);
349 }
350
351 /* Boot 1 Address configuration */
352 if((pOBInit->OptionType & OPTIONBYTE_BOOTADDR_1) == OPTIONBYTE_BOOTADDR_1)
353 {
354 status = FLASH_OB_BootAddressConfig(OPTIONBYTE_BOOTADDR_1, pOBInit->BootAddr1);
355 }
356
357 #if defined (FLASH_OPTCR2_PCROP)
358 /* PCROP configuration */
359 if((pOBInit->OptionType & OPTIONBYTE_PCROP) == OPTIONBYTE_PCROP)
360 {
361 status = FLASH_OB_PCROP_Config(pOBInit->PCROPSector);
362 }
363
364 /* PCROP_RDP configuration */
365 if((pOBInit->OptionType & OPTIONBYTE_PCROP_RDP) == OPTIONBYTE_PCROP_RDP)
366 {
367 status = FLASH_OB_PCROP_RDP_Config(pOBInit->PCROPRdp);
368 }
369 #endif /* FLASH_OPTCR2_PCROP */
370
371 /* Process Unlocked */
372 __HAL_UNLOCK(&pFlash);
373
374 return status;
375 }
376
377 /**
378 * @brief Get the Option byte configuration
379 * @param pOBInit pointer to an FLASH_OBInitStruct structure that
380 * contains the configuration information for the programming.
381 *
382 * @retval None
383 */
HAL_FLASHEx_OBGetConfig(FLASH_OBProgramInitTypeDef * pOBInit)384 void HAL_FLASHEx_OBGetConfig(FLASH_OBProgramInitTypeDef *pOBInit)
385 {
386 pOBInit->OptionType = OPTIONBYTE_WRP | OPTIONBYTE_RDP | OPTIONBYTE_USER |\
387 OPTIONBYTE_BOR | OPTIONBYTE_BOOTADDR_0 | OPTIONBYTE_BOOTADDR_1;
388
389 /*Get WRP*/
390 pOBInit->WRPSector = FLASH_OB_GetWRP();
391
392 /*Get RDP Level*/
393 pOBInit->RDPLevel = FLASH_OB_GetRDP();
394
395 /*Get USER*/
396 pOBInit->USERConfig = FLASH_OB_GetUser();
397
398 /*Get BOR Level*/
399 pOBInit->BORLevel = FLASH_OB_GetBOR();
400
401 /*Get Boot Address when Boot pin = 0 */
402 pOBInit->BootAddr0 = FLASH_OB_GetBootAddress(OPTIONBYTE_BOOTADDR_0);
403
404 /*Get Boot Address when Boot pin = 1 */
405 pOBInit->BootAddr1 = FLASH_OB_GetBootAddress(OPTIONBYTE_BOOTADDR_1);
406
407 #if defined (FLASH_OPTCR2_PCROP)
408 /*Get PCROP Sectors */
409 pOBInit->PCROPSector = FLASH_OB_GetPCROP();
410
411 /*Get PCROP_RDP Value */
412 pOBInit->PCROPRdp = FLASH_OB_GetPCROPRDP();
413 #endif /* FLASH_OPTCR2_PCROP */
414 }
415 /**
416 * @}
417 */
418
419 #if defined (FLASH_OPTCR_nDBANK)
420 /**
421 * @brief Full erase of FLASH memory sectors
422 * @param VoltageRange The device voltage range which defines the erase parallelism.
423 * This parameter can be one of the following values:
424 * @arg VOLTAGE_RANGE_1: when the device voltage range is 1.8V to 2.1V,
425 * the operation will be done by byte (8-bit)
426 * @arg VOLTAGE_RANGE_2: when the device voltage range is 2.1V to 2.7V,
427 * the operation will be done by half word (16-bit)
428 * @arg VOLTAGE_RANGE_3: when the device voltage range is 2.7V to 3.6V,
429 * the operation will be done by word (32-bit)
430 * @arg VOLTAGE_RANGE_4: when the device voltage range is 2.7V to 3.6V + External Vpp,
431 * the operation will be done by double word (64-bit)
432 * @param Banks Banks to be erased
433 * This parameter can be one of the following values:
434 * @arg FLASH_BANK_1: Bank1 to be erased
435 * @arg FLASH_BANK_2: Bank2 to be erased
436 * @arg FLASH_BANK_BOTH: Bank1 and Bank2 to be erased
437 *
438 * @retval HAL Status
439 */
FLASH_MassErase(uint8_t VoltageRange,uint32_t Banks)440 static void FLASH_MassErase(uint8_t VoltageRange, uint32_t Banks)
441 {
442 /* Check the parameters */
443 assert_param(IS_VOLTAGERANGE(VoltageRange));
444 assert_param(IS_FLASH_BANK(Banks));
445
446 /* if the previous operation is completed, proceed to erase all sectors */
447 FLASH->CR &= CR_PSIZE_MASK;
448 if(Banks == FLASH_BANK_BOTH)
449 {
450 /* bank1 & bank2 will be erased*/
451 FLASH->CR |= FLASH_MER_BIT;
452 }
453 else if(Banks == FLASH_BANK_2)
454 {
455 /*Only bank2 will be erased*/
456 FLASH->CR |= FLASH_CR_MER2;
457 }
458 else
459 {
460 /*Only bank1 will be erased*/
461 FLASH->CR |= FLASH_CR_MER1;
462 }
463 FLASH->CR |= FLASH_CR_STRT | ((uint32_t)VoltageRange <<8);
464 /* Data synchronous Barrier (DSB) Just after the write operation
465 This will force the CPU to respect the sequence of instruction (no optimization).*/
466 __DSB();
467 }
468
469 /**
470 * @brief Erase the specified FLASH memory sector
471 * @param Sector FLASH sector to erase
472 * The value of this parameter depend on device used within the same series
473 * @param VoltageRange The device voltage range which defines the erase parallelism.
474 * This parameter can be one of the following values:
475 * @arg FLASH_VOLTAGE_RANGE_1: when the device voltage range is 1.8V to 2.1V,
476 * the operation will be done by byte (8-bit)
477 * @arg FLASH_VOLTAGE_RANGE_2: when the device voltage range is 2.1V to 2.7V,
478 * the operation will be done by half word (16-bit)
479 * @arg FLASH_VOLTAGE_RANGE_3: when the device voltage range is 2.7V to 3.6V,
480 * the operation will be done by word (32-bit)
481 * @arg FLASH_VOLTAGE_RANGE_4: when the device voltage range is 2.7V to 3.6V + External Vpp,
482 * the operation will be done by double word (64-bit)
483 *
484 * @retval None
485 */
FLASH_Erase_Sector(uint32_t Sector,uint8_t VoltageRange)486 void FLASH_Erase_Sector(uint32_t Sector, uint8_t VoltageRange)
487 {
488 uint32_t tmp_psize = 0;
489
490 /* Check the parameters */
491 assert_param(IS_FLASH_SECTOR(Sector));
492 assert_param(IS_VOLTAGERANGE(VoltageRange));
493
494 if(VoltageRange == FLASH_VOLTAGE_RANGE_1)
495 {
496 tmp_psize = FLASH_PSIZE_BYTE;
497 }
498 else if(VoltageRange == FLASH_VOLTAGE_RANGE_2)
499 {
500 tmp_psize = FLASH_PSIZE_HALF_WORD;
501 }
502 else if(VoltageRange == FLASH_VOLTAGE_RANGE_3)
503 {
504 tmp_psize = FLASH_PSIZE_WORD;
505 }
506 else
507 {
508 tmp_psize = FLASH_PSIZE_DOUBLE_WORD;
509 }
510
511 /* Need to add offset of 4 when sector higher than FLASH_SECTOR_11 */
512 if(Sector > FLASH_SECTOR_11)
513 {
514 Sector += 4;
515 }
516
517 /* If the previous operation is completed, proceed to erase the sector */
518 FLASH->CR &= CR_PSIZE_MASK;
519 FLASH->CR |= tmp_psize;
520 CLEAR_BIT(FLASH->CR, FLASH_CR_SNB);
521 FLASH->CR |= FLASH_CR_SER | (Sector << FLASH_CR_SNB_Pos);
522 FLASH->CR |= FLASH_CR_STRT;
523
524 /* Data synchronous Barrier (DSB) Just after the write operation
525 This will force the CPU to respect the sequence of instruction (no optimization).*/
526 __DSB();
527 }
528
529 /**
530 * @brief Return the FLASH Write Protection Option Bytes value.
531 * @retval uint32_t FLASH Write Protection Option Bytes value
532 */
FLASH_OB_GetWRP(void)533 static uint32_t FLASH_OB_GetWRP(void)
534 {
535 /* Return the FLASH write protection Register value */
536 return ((uint32_t)(FLASH->OPTCR & 0x0FFF0000));
537 }
538
539 /**
540 * @brief Program the FLASH User Option Byte: IWDG_SW / RST_STOP / RST_STDBY.
541 * @param Wwdg Selects the IWDG mode
542 * This parameter can be one of the following values:
543 * @arg OB_WWDG_SW: Software WWDG selected
544 * @arg OB_WWDG_HW: Hardware WWDG selected
545 * @param Iwdg Selects the WWDG mode
546 * This parameter can be one of the following values:
547 * @arg OB_IWDG_SW: Software IWDG selected
548 * @arg OB_IWDG_HW: Hardware IWDG selected
549 * @param Stop Reset event when entering STOP mode.
550 * This parameter can be one of the following values:
551 * @arg OB_STOP_NO_RST: No reset generated when entering in STOP
552 * @arg OB_STOP_RST: Reset generated when entering in STOP
553 * @param Stdby Reset event when entering Standby mode.
554 * This parameter can be one of the following values:
555 * @arg OB_STDBY_NO_RST: No reset generated when entering in STANDBY
556 * @arg OB_STDBY_RST: Reset generated when entering in STANDBY
557 * @param Iwdgstop Independent watchdog counter freeze in Stop mode.
558 * This parameter can be one of the following values:
559 * @arg OB_IWDG_STOP_FREEZE: Freeze IWDG counter in STOP
560 * @arg OB_IWDG_STOP_ACTIVE: IWDG counter active in STOP
561 * @param Iwdgstdby Independent watchdog counter freeze in standby mode.
562 * This parameter can be one of the following values:
563 * @arg OB_IWDG_STDBY_FREEZE: Freeze IWDG counter in STANDBY
564 * @arg OB_IWDG_STDBY_ACTIVE: IWDG counter active in STANDBY
565 * @param NDBank Flash Single Bank mode enabled.
566 * This parameter can be one of the following values:
567 * @arg OB_NDBANK_SINGLE_BANK: enable 256 bits mode (Flash is a single bank)
568 * @arg OB_NDBANK_DUAL_BANK: disable 256 bits mode (Flash is a dual bank in 128 bits mode)
569 * @param NDBoot Flash Dual boot mode disable.
570 * This parameter can be one of the following values:
571 * @arg OB_DUAL_BOOT_DISABLE: Disable Dual Boot
572 * @arg OB_DUAL_BOOT_ENABLE: Enable Dual Boot
573
574 * @retval HAL Status
575 */
FLASH_OB_UserConfig(uint32_t Wwdg,uint32_t Iwdg,uint32_t Stop,uint32_t Stdby,uint32_t Iwdgstop,uint32_t Iwdgstdby,uint32_t NDBank,uint32_t NDBoot)576 static HAL_StatusTypeDef FLASH_OB_UserConfig(uint32_t Wwdg, uint32_t Iwdg, uint32_t Stop, uint32_t Stdby, uint32_t Iwdgstop, \
577 uint32_t Iwdgstdby, uint32_t NDBank, uint32_t NDBoot)
578 {
579 uint32_t useroptionmask = 0x00;
580 uint32_t useroptionvalue = 0x00;
581
582 HAL_StatusTypeDef status = HAL_OK;
583
584 /* Check the parameters */
585 assert_param(IS_OB_WWDG_SOURCE(Wwdg));
586 assert_param(IS_OB_IWDG_SOURCE(Iwdg));
587 assert_param(IS_OB_STOP_SOURCE(Stop));
588 assert_param(IS_OB_STDBY_SOURCE(Stdby));
589 assert_param(IS_OB_IWDG_STOP_FREEZE(Iwdgstop));
590 assert_param(IS_OB_IWDG_STDBY_FREEZE(Iwdgstdby));
591 assert_param(IS_OB_NDBANK(NDBank));
592 assert_param(IS_OB_NDBOOT(NDBoot));
593
594 /* Wait for last operation to be completed */
595 status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
596
597 if(status == HAL_OK)
598 {
599 useroptionmask = (FLASH_OPTCR_WWDG_SW | FLASH_OPTCR_IWDG_SW | FLASH_OPTCR_nRST_STOP | \
600 FLASH_OPTCR_nRST_STDBY | FLASH_OPTCR_IWDG_STOP | FLASH_OPTCR_IWDG_STDBY | \
601 FLASH_OPTCR_nDBOOT | FLASH_OPTCR_nDBANK);
602
603 useroptionvalue = (Iwdg | Wwdg | Stop | Stdby | Iwdgstop | Iwdgstdby | NDBoot | NDBank);
604
605 /* Update User Option Byte */
606 MODIFY_REG(FLASH->OPTCR, useroptionmask, useroptionvalue);
607 }
608
609 return status;
610 }
611
612 /**
613 * @brief Return the FLASH User Option Byte value.
614 * @retval uint32_t FLASH User Option Bytes values: WWDG_SW(Bit4), IWDG_SW(Bit5), nRST_STOP(Bit6),
615 * nRST_STDBY(Bit7), nDBOOT(Bit28), nDBANK(Bit29), IWDG_STDBY(Bit30) and IWDG_STOP(Bit31).
616 */
FLASH_OB_GetUser(void)617 static uint32_t FLASH_OB_GetUser(void)
618 {
619 /* Return the User Option Byte */
620 return ((uint32_t)(FLASH->OPTCR & 0xF00000F0U));
621 }
622 #else
623
624 /**
625 * @brief Full erase of FLASH memory sectors
626 * @param VoltageRange The device voltage range which defines the erase parallelism.
627 * This parameter can be one of the following values:
628 * @arg VOLTAGE_RANGE_1: when the device voltage range is 1.8V to 2.1V,
629 * the operation will be done by byte (8-bit)
630 * @arg VOLTAGE_RANGE_2: when the device voltage range is 2.1V to 2.7V,
631 * the operation will be done by half word (16-bit)
632 * @arg VOLTAGE_RANGE_3: when the device voltage range is 2.7V to 3.6V,
633 * the operation will be done by word (32-bit)
634 * @arg VOLTAGE_RANGE_4: when the device voltage range is 2.7V to 3.6V + External Vpp,
635 * the operation will be done by double word (64-bit)
636 *
637 * @retval HAL Status
638 */
FLASH_MassErase(uint8_t VoltageRange)639 static void FLASH_MassErase(uint8_t VoltageRange)
640 {
641 /* Check the parameters */
642 assert_param(IS_VOLTAGERANGE(VoltageRange));
643
644 /* if the previous operation is completed, proceed to erase all sectors */
645 FLASH->CR &= CR_PSIZE_MASK;
646 FLASH->CR |= FLASH_CR_MER;
647 FLASH->CR |= FLASH_CR_STRT | ((uint32_t)VoltageRange <<8);
648 /* Data synchronous Barrier (DSB) Just after the write operation
649 This will force the CPU to respect the sequence of instruction (no optimization).*/
650 __DSB();
651 }
652
653 /**
654 * @brief Erase the specified FLASH memory sector
655 * @param Sector FLASH sector to erase
656 * The value of this parameter depend on device used within the same series
657 * @param VoltageRange The device voltage range which defines the erase parallelism.
658 * This parameter can be one of the following values:
659 * @arg FLASH_VOLTAGE_RANGE_1: when the device voltage range is 1.8V to 2.1V,
660 * the operation will be done by byte (8-bit)
661 * @arg FLASH_VOLTAGE_RANGE_2: when the device voltage range is 2.1V to 2.7V,
662 * the operation will be done by half word (16-bit)
663 * @arg FLASH_VOLTAGE_RANGE_3: when the device voltage range is 2.7V to 3.6V,
664 * the operation will be done by word (32-bit)
665 * @arg FLASH_VOLTAGE_RANGE_4: when the device voltage range is 2.7V to 3.6V + External Vpp,
666 * the operation will be done by double word (64-bit)
667 *
668 * @retval None
669 */
FLASH_Erase_Sector(uint32_t Sector,uint8_t VoltageRange)670 void FLASH_Erase_Sector(uint32_t Sector, uint8_t VoltageRange)
671 {
672 uint32_t tmp_psize = 0;
673
674 /* Check the parameters */
675 assert_param(IS_FLASH_SECTOR(Sector));
676 assert_param(IS_VOLTAGERANGE(VoltageRange));
677
678 if(VoltageRange == FLASH_VOLTAGE_RANGE_1)
679 {
680 tmp_psize = FLASH_PSIZE_BYTE;
681 }
682 else if(VoltageRange == FLASH_VOLTAGE_RANGE_2)
683 {
684 tmp_psize = FLASH_PSIZE_HALF_WORD;
685 }
686 else if(VoltageRange == FLASH_VOLTAGE_RANGE_3)
687 {
688 tmp_psize = FLASH_PSIZE_WORD;
689 }
690 else
691 {
692 tmp_psize = FLASH_PSIZE_DOUBLE_WORD;
693 }
694
695 /* If the previous operation is completed, proceed to erase the sector */
696 FLASH->CR &= CR_PSIZE_MASK;
697 FLASH->CR |= tmp_psize;
698 FLASH->CR &= SECTOR_MASK;
699 FLASH->CR |= FLASH_CR_SER | (Sector << FLASH_CR_SNB_Pos);
700 FLASH->CR |= FLASH_CR_STRT;
701
702 /* Data synchronous Barrier (DSB) Just after the write operation
703 This will force the CPU to respect the sequence of instruction (no optimization).*/
704 __DSB();
705 }
706
707 /**
708 * @brief Return the FLASH Write Protection Option Bytes value.
709 * @retval uint32_t FLASH Write Protection Option Bytes value
710 */
FLASH_OB_GetWRP(void)711 static uint32_t FLASH_OB_GetWRP(void)
712 {
713 /* Return the FLASH write protection Register value */
714 return ((uint32_t)(FLASH->OPTCR & 0x00FF0000));
715 }
716
717 /**
718 * @brief Program the FLASH User Option Byte: IWDG_SW / RST_STOP / RST_STDBY.
719 * @param Wwdg Selects the IWDG mode
720 * This parameter can be one of the following values:
721 * @arg OB_WWDG_SW: Software WWDG selected
722 * @arg OB_WWDG_HW: Hardware WWDG selected
723 * @param Iwdg Selects the WWDG mode
724 * This parameter can be one of the following values:
725 * @arg OB_IWDG_SW: Software IWDG selected
726 * @arg OB_IWDG_HW: Hardware IWDG selected
727 * @param Stop Reset event when entering STOP mode.
728 * This parameter can be one of the following values:
729 * @arg OB_STOP_NO_RST: No reset generated when entering in STOP
730 * @arg OB_STOP_RST: Reset generated when entering in STOP
731 * @param Stdby Reset event when entering Standby mode.
732 * This parameter can be one of the following values:
733 * @arg OB_STDBY_NO_RST: No reset generated when entering in STANDBY
734 * @arg OB_STDBY_RST: Reset generated when entering in STANDBY
735 * @param Iwdgstop Independent watchdog counter freeze in Stop mode.
736 * This parameter can be one of the following values:
737 * @arg OB_IWDG_STOP_FREEZE: Freeze IWDG counter in STOP
738 * @arg OB_IWDG_STOP_ACTIVE: IWDG counter active in STOP
739 * @param Iwdgstdby Independent watchdog counter freeze in standby mode.
740 * This parameter can be one of the following values:
741 * @arg OB_IWDG_STDBY_FREEZE: Freeze IWDG counter in STANDBY
742 * @arg OB_IWDG_STDBY_ACTIVE: IWDG counter active in STANDBY
743 * @retval HAL Status
744 */
FLASH_OB_UserConfig(uint32_t Wwdg,uint32_t Iwdg,uint32_t Stop,uint32_t Stdby,uint32_t Iwdgstop,uint32_t Iwdgstdby)745 static HAL_StatusTypeDef FLASH_OB_UserConfig(uint32_t Wwdg, uint32_t Iwdg, uint32_t Stop, uint32_t Stdby, uint32_t Iwdgstop, uint32_t Iwdgstdby)
746 {
747 uint32_t useroptionmask = 0x00;
748 uint32_t useroptionvalue = 0x00;
749
750 HAL_StatusTypeDef status = HAL_OK;
751
752 /* Check the parameters */
753 assert_param(IS_OB_WWDG_SOURCE(Wwdg));
754 assert_param(IS_OB_IWDG_SOURCE(Iwdg));
755 assert_param(IS_OB_STOP_SOURCE(Stop));
756 assert_param(IS_OB_STDBY_SOURCE(Stdby));
757 assert_param(IS_OB_IWDG_STOP_FREEZE(Iwdgstop));
758 assert_param(IS_OB_IWDG_STDBY_FREEZE(Iwdgstdby));
759
760 /* Wait for last operation to be completed */
761 status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
762
763 if(status == HAL_OK)
764 {
765 useroptionmask = (FLASH_OPTCR_WWDG_SW | FLASH_OPTCR_IWDG_SW | FLASH_OPTCR_nRST_STOP | \
766 FLASH_OPTCR_nRST_STDBY | FLASH_OPTCR_IWDG_STOP | FLASH_OPTCR_IWDG_STDBY);
767
768 useroptionvalue = (Iwdg | Wwdg | Stop | Stdby | Iwdgstop | Iwdgstdby);
769
770 /* Update User Option Byte */
771 MODIFY_REG(FLASH->OPTCR, useroptionmask, useroptionvalue);
772 }
773
774 return status;
775
776 }
777
778 /**
779 * @brief Return the FLASH User Option Byte value.
780 * @retval uint32_t FLASH User Option Bytes values: WWDG_SW(Bit4), IWDG_SW(Bit5), nRST_STOP(Bit6),
781 * nRST_STDBY(Bit7), IWDG_STDBY(Bit30) and IWDG_STOP(Bit31).
782 */
FLASH_OB_GetUser(void)783 static uint32_t FLASH_OB_GetUser(void)
784 {
785 /* Return the User Option Byte */
786 return ((uint32_t)(FLASH->OPTCR & 0xC00000F0U));
787 }
788 #endif /* FLASH_OPTCR_nDBANK */
789
790 /**
791 * @brief Enable the write protection of the desired bank1 or bank2 sectors
792 *
793 * @note When the memory read protection level is selected (RDP level = 1),
794 * it is not possible to program or erase the flash sector i if CortexM7
795 * debug features are connected or boot code is executed in RAM, even if nWRPi = 1
796 *
797 * @param WRPSector specifies the sector(s) to be write protected.
798 * This parameter can be one of the following values:
799 * @arg WRPSector: A value between OB_WRP_SECTOR_0 and OB_WRP_SECTOR_7 (for STM32F74xxx/STM32F75xxx devices)
800 * or a value between OB_WRP_SECTOR_0 and OB_WRP_SECTOR_11 (in Single Bank mode for STM32F76xxx/STM32F77xxx devices)
801 * or a value between OB_WRP_DB_SECTOR_0 and OB_WRP_DB_SECTOR_23 (in Dual Bank mode for STM32F76xxx/STM32F77xxx devices)
802 * @arg OB_WRP_SECTOR_All
803 *
804 * @retval HAL FLASH State
805 */
FLASH_OB_EnableWRP(uint32_t WRPSector)806 static HAL_StatusTypeDef FLASH_OB_EnableWRP(uint32_t WRPSector)
807 {
808 HAL_StatusTypeDef status = HAL_OK;
809
810 /* Check the parameters */
811 assert_param(IS_OB_WRP_SECTOR(WRPSector));
812
813 /* Wait for last operation to be completed */
814 status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
815
816 if(status == HAL_OK)
817 {
818 /*Write protection enabled on sectors */
819 FLASH->OPTCR &= (~WRPSector);
820 }
821
822 return status;
823 }
824
825 /**
826 * @brief Disable the write protection of the desired bank1 or bank 2 sectors
827 *
828 * @note When the memory read protection level is selected (RDP level = 1),
829 * it is not possible to program or erase the flash sector i if CortexM4
830 * debug features are connected or boot code is executed in RAM, even if nWRPi = 1
831 *
832 * @param WRPSector specifies the sector(s) to be write protected.
833 * This parameter can be one of the following values:
834 * @arg WRPSector: A value between OB_WRP_SECTOR_0 and OB_WRP_SECTOR_7 (for STM32F74xxx/STM32F75xxx devices)
835 * or a value between OB_WRP_SECTOR_0 and OB_WRP_SECTOR_11 (in Single Bank mode for STM32F76xxx/STM32F77xxx devices)
836 * or a value between OB_WRP_DB_SECTOR_0 and OB_WRP_DB_SECTOR_23 (in Dual Bank mode for STM32F76xxx/STM32F77xxx devices)
837 * @arg OB_WRP_Sector_All
838 *
839 *
840 * @retval HAL Status
841 */
FLASH_OB_DisableWRP(uint32_t WRPSector)842 static HAL_StatusTypeDef FLASH_OB_DisableWRP(uint32_t WRPSector)
843 {
844 HAL_StatusTypeDef status = HAL_OK;
845
846 /* Check the parameters */
847 assert_param(IS_OB_WRP_SECTOR(WRPSector));
848
849 /* Wait for last operation to be completed */
850 status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
851
852 if(status == HAL_OK)
853 {
854 /* Write protection disabled on sectors */
855 FLASH->OPTCR |= (WRPSector);
856 }
857
858 return status;
859 }
860
861 /**
862 * @brief Set the read protection level.
863 * @param Level specifies the read protection level.
864 * This parameter can be one of the following values:
865 * @arg OB_RDP_LEVEL_0: No protection
866 * @arg OB_RDP_LEVEL_1: Read protection of the memory
867 * @arg OB_RDP_LEVEL_2: Full chip protection
868 *
869 * @note WARNING: When enabling OB_RDP level 2 it's no more possible to go back to level 1 or 0
870 *
871 * @retval HAL Status
872 */
FLASH_OB_RDP_LevelConfig(uint8_t Level)873 static HAL_StatusTypeDef FLASH_OB_RDP_LevelConfig(uint8_t Level)
874 {
875 HAL_StatusTypeDef status = HAL_OK;
876
877 /* Check the parameters */
878 assert_param(IS_OB_RDP_LEVEL(Level));
879
880 /* Wait for last operation to be completed */
881 status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
882
883 if(status == HAL_OK)
884 {
885 *(__IO uint8_t*)OPTCR_BYTE1_ADDRESS = Level;
886 }
887
888 return status;
889 }
890
891 /**
892 * @brief Set the BOR Level.
893 * @param Level specifies the Option Bytes BOR Reset Level.
894 * This parameter can be one of the following values:
895 * @arg OB_BOR_LEVEL3: Supply voltage ranges from 2.7 to 3.6 V
896 * @arg OB_BOR_LEVEL2: Supply voltage ranges from 2.4 to 2.7 V
897 * @arg OB_BOR_LEVEL1: Supply voltage ranges from 2.1 to 2.4 V
898 * @arg OB_BOR_OFF: Supply voltage ranges from 1.62 to 2.1 V
899 * @retval HAL Status
900 */
FLASH_OB_BOR_LevelConfig(uint8_t Level)901 static HAL_StatusTypeDef FLASH_OB_BOR_LevelConfig(uint8_t Level)
902 {
903 /* Check the parameters */
904 assert_param(IS_OB_BOR_LEVEL(Level));
905
906 /* Set the BOR Level */
907 MODIFY_REG(FLASH->OPTCR, FLASH_OPTCR_BOR_LEV, Level);
908
909 return HAL_OK;
910
911 }
912
913 /**
914 * @brief Configure Boot base address.
915 *
916 * @param BootOption specifies Boot base address depending from Boot pin = 0 or pin = 1
917 * This parameter can be one of the following values:
918 * @arg OPTIONBYTE_BOOTADDR_0 : Boot address based when Boot pin = 0
919 * @arg OPTIONBYTE_BOOTADDR_1 : Boot address based when Boot pin = 1
920 * @param Address specifies Boot base address
921 * This parameter can be one of the following values:
922 * @arg OB_BOOTADDR_ITCM_RAM : Boot from ITCM RAM (0x00000000)
923 * @arg OB_BOOTADDR_SYSTEM : Boot from System memory bootloader (0x00100000)
924 * @arg OB_BOOTADDR_ITCM_FLASH : Boot from Flash on ITCM interface (0x00200000)
925 * @arg OB_BOOTADDR_AXIM_FLASH : Boot from Flash on AXIM interface (0x08000000)
926 * @arg OB_BOOTADDR_DTCM_RAM : Boot from DTCM RAM (0x20000000)
927 * @arg OB_BOOTADDR_SRAM1 : Boot from SRAM1 (0x20010000)
928 * @arg OB_BOOTADDR_SRAM2 : Boot from SRAM2 (0x2004C000)
929 *
930 * @retval HAL Status
931 */
FLASH_OB_BootAddressConfig(uint32_t BootOption,uint32_t Address)932 static HAL_StatusTypeDef FLASH_OB_BootAddressConfig(uint32_t BootOption, uint32_t Address)
933 {
934 HAL_StatusTypeDef status = HAL_OK;
935
936 /* Check the parameters */
937 assert_param(IS_OB_BOOT_ADDRESS(Address));
938
939 /* Wait for last operation to be completed */
940 status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
941
942 if(status == HAL_OK)
943 {
944 if(BootOption == OPTIONBYTE_BOOTADDR_0)
945 {
946 MODIFY_REG(FLASH->OPTCR1, FLASH_OPTCR1_BOOT_ADD0, Address);
947 }
948 else
949 {
950 MODIFY_REG(FLASH->OPTCR1, FLASH_OPTCR1_BOOT_ADD1, (Address << 16));
951 }
952 }
953
954 return status;
955 }
956
957 /**
958 * @brief Returns the FLASH Read Protection level.
959 * @retval FlagStatus FLASH ReadOut Protection Status:
960 * This parameter can be one of the following values:
961 * @arg OB_RDP_LEVEL_0: No protection
962 * @arg OB_RDP_LEVEL_1: Read protection of the memory
963 * @arg OB_RDP_LEVEL_2: Full chip protection
964 */
FLASH_OB_GetRDP(void)965 static uint8_t FLASH_OB_GetRDP(void)
966 {
967 uint8_t readstatus = OB_RDP_LEVEL_0;
968
969 if ((*(__IO uint8_t*)(OPTCR_BYTE1_ADDRESS)) == OB_RDP_LEVEL_0)
970 {
971 readstatus = OB_RDP_LEVEL_0;
972 }
973 else if ((*(__IO uint8_t*)(OPTCR_BYTE1_ADDRESS)) == OB_RDP_LEVEL_2)
974 {
975 readstatus = OB_RDP_LEVEL_2;
976 }
977 else
978 {
979 readstatus = OB_RDP_LEVEL_1;
980 }
981
982 return readstatus;
983 }
984
985 /**
986 * @brief Returns the FLASH BOR level.
987 * @retval uint32_t The FLASH BOR level:
988 * - OB_BOR_LEVEL3: Supply voltage ranges from 2.7 to 3.6 V
989 * - OB_BOR_LEVEL2: Supply voltage ranges from 2.4 to 2.7 V
990 * - OB_BOR_LEVEL1: Supply voltage ranges from 2.1 to 2.4 V
991 * - OB_BOR_OFF : Supply voltage ranges from 1.62 to 2.1 V
992 */
FLASH_OB_GetBOR(void)993 static uint32_t FLASH_OB_GetBOR(void)
994 {
995 /* Return the FLASH BOR level */
996 return ((uint32_t)(FLASH->OPTCR & 0x0C));
997 }
998
999 /**
1000 * @brief Configure Boot base address.
1001 *
1002 * @param BootOption specifies Boot base address depending from Boot pin = 0 or pin = 1
1003 * This parameter can be one of the following values:
1004 * @arg OPTIONBYTE_BOOTADDR_0 : Boot address based when Boot pin = 0
1005 * @arg OPTIONBYTE_BOOTADDR_1 : Boot address based when Boot pin = 1
1006 *
1007 * @retval uint32_t Boot Base Address:
1008 * - OB_BOOTADDR_ITCM_RAM : Boot from ITCM RAM (0x00000000)
1009 * - OB_BOOTADDR_SYSTEM : Boot from System memory bootloader (0x00100000)
1010 * - OB_BOOTADDR_ITCM_FLASH : Boot from Flash on ITCM interface (0x00200000)
1011 * - OB_BOOTADDR_AXIM_FLASH : Boot from Flash on AXIM interface (0x08000000)
1012 * - OB_BOOTADDR_DTCM_RAM : Boot from DTCM RAM (0x20000000)
1013 * - OB_BOOTADDR_SRAM1 : Boot from SRAM1 (0x20010000)
1014 * - OB_BOOTADDR_SRAM2 : Boot from SRAM2 (0x2004C000)
1015 */
FLASH_OB_GetBootAddress(uint32_t BootOption)1016 static uint32_t FLASH_OB_GetBootAddress(uint32_t BootOption)
1017 {
1018 uint32_t Address = 0;
1019
1020 /* Return the Boot base Address */
1021 if(BootOption == OPTIONBYTE_BOOTADDR_0)
1022 {
1023 Address = FLASH->OPTCR1 & FLASH_OPTCR1_BOOT_ADD0;
1024 }
1025 else
1026 {
1027 Address = ((FLASH->OPTCR1 & FLASH_OPTCR1_BOOT_ADD1) >> 16);
1028 }
1029
1030 return Address;
1031 }
1032
1033 #if defined (FLASH_OPTCR2_PCROP)
1034 /**
1035 * @brief Set the PCROP protection for sectors.
1036 * @param PCROPSector specifies the sector(s) to be PCROP protected.
1037 * This parameter can be one of the following values:
1038 * @arg OB_PCROP_SECTOR_x: A value between OB_PCROP_SECTOR_0 and OB_PCROP_SECTOR_7
1039 * @arg OB_PCROP_SECTOR_ALL
1040 *
1041 * @retval HAL Status
1042 */
FLASH_OB_PCROP_Config(uint32_t PCROPSector)1043 static HAL_StatusTypeDef FLASH_OB_PCROP_Config(uint32_t PCROPSector)
1044 {
1045 HAL_StatusTypeDef status = HAL_OK;
1046
1047 /* Check the parameters */
1048 assert_param(IS_OB_PCROP_SECTOR(PCROPSector));
1049
1050 /* Wait for last operation to be completed */
1051 status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
1052
1053 if(status == HAL_OK)
1054 {
1055 MODIFY_REG(FLASH->OPTCR2, FLASH_OPTCR2_PCROP, PCROPSector);
1056 }
1057
1058 return status;
1059 }
1060
1061 /**
1062 * @brief Set the PCROP_RDP value
1063 * @param Pcrop_Rdp specifies the PCROP_RDP bit value.
1064 *
1065 * @retval HAL Status
1066 */
FLASH_OB_PCROP_RDP_Config(uint32_t Pcrop_Rdp)1067 static HAL_StatusTypeDef FLASH_OB_PCROP_RDP_Config(uint32_t Pcrop_Rdp)
1068 {
1069 HAL_StatusTypeDef status = HAL_OK;
1070
1071 /* Check the parameters */
1072 assert_param(IS_OB_PCROP_RDP_VALUE(Pcrop_Rdp));
1073
1074 /* Wait for last operation to be completed */
1075 status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
1076
1077 if(status == HAL_OK)
1078 {
1079 MODIFY_REG(FLASH->OPTCR2, FLASH_OPTCR2_PCROP_RDP, Pcrop_Rdp);
1080 }
1081
1082 return status;
1083 }
1084
1085 /**
1086 * @brief Return the FLASH PCROP Protection Option Bytes value.
1087 * @retval uint32_t FLASH PCROP Protection Option Bytes value
1088 */
FLASH_OB_GetPCROP(void)1089 static uint32_t FLASH_OB_GetPCROP(void)
1090 {
1091 /* Return the FLASH write protection Register value */
1092 return ((uint32_t)(FLASH->OPTCR2 & FLASH_OPTCR2_PCROP));
1093 }
1094
1095 /**
1096 * @brief Return the FLASH PCROP_RDP option byte value.
1097 * @retval uint32_t FLASH PCROP_RDP option byte value
1098 */
FLASH_OB_GetPCROPRDP(void)1099 static uint32_t FLASH_OB_GetPCROPRDP(void)
1100 {
1101 /* Return the FLASH write protection Register value */
1102 return ((uint32_t)(FLASH->OPTCR2 & FLASH_OPTCR2_PCROP_RDP));
1103 }
1104 #endif /* FLASH_OPTCR2_PCROP */
1105
1106 /**
1107 * @}
1108 */
1109
1110 #endif /* HAL_FLASH_MODULE_ENABLED */
1111
1112 /**
1113 * @}
1114 */
1115
1116 /**
1117 * @}
1118 */
1119
1120
