1 /**
2 ******************************************************************************
3 * @file stm32f7xx_ll_rng.h
4 * @author MCD Application Team
5 * @brief Header file of RNG LL module.
6 ******************************************************************************
7 * @attention
8 *
9 * Copyright (c) 2017 STMicroelectronics.
10 * All rights reserved.
11 *
12 * This software is licensed under terms that can be found in the LICENSE file
13 * in the root directory of this software component.
14 * If no LICENSE file comes with this software, it is provided AS-IS.
15 *
16 ******************************************************************************
17 */
18
19 /* Define to prevent recursive inclusion -------------------------------------*/
20 #ifndef STM32F7xx_LL_RNG_H
21 #define STM32F7xx_LL_RNG_H
22
23 #ifdef __cplusplus
24 extern "C" {
25 #endif
26
27 /* Includes ------------------------------------------------------------------*/
28 #include "stm32f7xx.h"
29
30 /** @addtogroup STM32F7xx_LL_Driver
31 * @{
32 */
33
34 #if defined (RNG)
35
36 /** @defgroup RNG_LL RNG
37 * @{
38 */
39
40 /* Private types -------------------------------------------------------------*/
41 /* Private variables ---------------------------------------------------------*/
42 /* Private constants ---------------------------------------------------------*/
43 /* Private macros ------------------------------------------------------------*/
44
45 /* Exported types ------------------------------------------------------------*/
46 /* Exported constants --------------------------------------------------------*/
47 /** @defgroup RNG_LL_Exported_Constants RNG Exported Constants
48 * @{
49 */
50
51
52 /** @defgroup RNG_LL_EC_GET_FLAG Get Flags Defines
53 * @brief Flags defines which can be used with LL_RNG_ReadReg function
54 * @{
55 */
56 #define LL_RNG_SR_DRDY RNG_SR_DRDY /*!< Register contains valid random data */
57 #define LL_RNG_SR_CECS RNG_SR_CECS /*!< Clock error current status */
58 #define LL_RNG_SR_SECS RNG_SR_SECS /*!< Seed error current status */
59 #define LL_RNG_SR_CEIS RNG_SR_CEIS /*!< Clock error interrupt status */
60 #define LL_RNG_SR_SEIS RNG_SR_SEIS /*!< Seed error interrupt status */
61 /**
62 * @}
63 */
64
65 /** @defgroup RNG_LL_EC_IT IT Defines
66 * @brief IT defines which can be used with LL_RNG_ReadReg and LL_RNG_WriteReg macros
67 * @{
68 */
69 #define LL_RNG_CR_IE RNG_CR_IE /*!< RNG Interrupt enable */
70 /**
71 * @}
72 */
73
74 /**
75 * @}
76 */
77
78 /* Exported macro ------------------------------------------------------------*/
79 /** @defgroup RNG_LL_Exported_Macros RNG Exported Macros
80 * @{
81 */
82
83 /** @defgroup RNG_LL_EM_WRITE_READ Common Write and read registers Macros
84 * @{
85 */
86
87 /**
88 * @brief Write a value in RNG register
89 * @param __INSTANCE__ RNG Instance
90 * @param __REG__ Register to be written
91 * @param __VALUE__ Value to be written in the register
92 * @retval None
93 */
94 #define LL_RNG_WriteReg(__INSTANCE__, __REG__, __VALUE__) WRITE_REG(__INSTANCE__->__REG__, (__VALUE__))
95
96 /**
97 * @brief Read a value in RNG register
98 * @param __INSTANCE__ RNG Instance
99 * @param __REG__ Register to be read
100 * @retval Register value
101 */
102 #define LL_RNG_ReadReg(__INSTANCE__, __REG__) READ_REG(__INSTANCE__->__REG__)
103 /**
104 * @}
105 */
106
107 /**
108 * @}
109 */
110
111
112 /* Exported functions --------------------------------------------------------*/
113 /** @defgroup RNG_LL_Exported_Functions RNG Exported Functions
114 * @{
115 */
116 /** @defgroup RNG_LL_EF_Configuration RNG Configuration functions
117 * @{
118 */
119
120 /**
121 * @brief Enable Random Number Generation
122 * @rmtoll CR RNGEN LL_RNG_Enable
123 * @param RNGx RNG Instance
124 * @retval None
125 */
LL_RNG_Enable(RNG_TypeDef * RNGx)126 __STATIC_INLINE void LL_RNG_Enable(RNG_TypeDef *RNGx)
127 {
128 SET_BIT(RNGx->CR, RNG_CR_RNGEN);
129 }
130
131 /**
132 * @brief Disable Random Number Generation
133 * @rmtoll CR RNGEN LL_RNG_Disable
134 * @param RNGx RNG Instance
135 * @retval None
136 */
LL_RNG_Disable(RNG_TypeDef * RNGx)137 __STATIC_INLINE void LL_RNG_Disable(RNG_TypeDef *RNGx)
138 {
139 CLEAR_BIT(RNGx->CR, RNG_CR_RNGEN);
140 }
141
142 /**
143 * @brief Check if Random Number Generator is enabled
144 * @rmtoll CR RNGEN LL_RNG_IsEnabled
145 * @param RNGx RNG Instance
146 * @retval State of bit (1 or 0).
147 */
LL_RNG_IsEnabled(RNG_TypeDef * RNGx)148 __STATIC_INLINE uint32_t LL_RNG_IsEnabled(RNG_TypeDef *RNGx)
149 {
150 return ((READ_BIT(RNGx->CR, RNG_CR_RNGEN) == (RNG_CR_RNGEN)) ? 1UL : 0UL);
151 }
152
153 /**
154 * @}
155 */
156
157 /** @defgroup RNG_LL_EF_FLAG_Management FLAG Management
158 * @{
159 */
160
161 /**
162 * @brief Indicate if the RNG Data ready Flag is set or not
163 * @rmtoll SR DRDY LL_RNG_IsActiveFlag_DRDY
164 * @param RNGx RNG Instance
165 * @retval State of bit (1 or 0).
166 */
LL_RNG_IsActiveFlag_DRDY(RNG_TypeDef * RNGx)167 __STATIC_INLINE uint32_t LL_RNG_IsActiveFlag_DRDY(RNG_TypeDef *RNGx)
168 {
169 return ((READ_BIT(RNGx->SR, RNG_SR_DRDY) == (RNG_SR_DRDY)) ? 1UL : 0UL);
170 }
171
172 /**
173 * @brief Indicate if the Clock Error Current Status Flag is set or not
174 * @rmtoll SR CECS LL_RNG_IsActiveFlag_CECS
175 * @param RNGx RNG Instance
176 * @retval State of bit (1 or 0).
177 */
LL_RNG_IsActiveFlag_CECS(RNG_TypeDef * RNGx)178 __STATIC_INLINE uint32_t LL_RNG_IsActiveFlag_CECS(RNG_TypeDef *RNGx)
179 {
180 return ((READ_BIT(RNGx->SR, RNG_SR_CECS) == (RNG_SR_CECS)) ? 1UL : 0UL);
181 }
182
183 /**
184 * @brief Indicate if the Seed Error Current Status Flag is set or not
185 * @rmtoll SR SECS LL_RNG_IsActiveFlag_SECS
186 * @param RNGx RNG Instance
187 * @retval State of bit (1 or 0).
188 */
LL_RNG_IsActiveFlag_SECS(RNG_TypeDef * RNGx)189 __STATIC_INLINE uint32_t LL_RNG_IsActiveFlag_SECS(RNG_TypeDef *RNGx)
190 {
191 return ((READ_BIT(RNGx->SR, RNG_SR_SECS) == (RNG_SR_SECS)) ? 1UL : 0UL);
192 }
193
194 /**
195 * @brief Indicate if the Clock Error Interrupt Status Flag is set or not
196 * @rmtoll SR CEIS LL_RNG_IsActiveFlag_CEIS
197 * @param RNGx RNG Instance
198 * @retval State of bit (1 or 0).
199 */
LL_RNG_IsActiveFlag_CEIS(RNG_TypeDef * RNGx)200 __STATIC_INLINE uint32_t LL_RNG_IsActiveFlag_CEIS(RNG_TypeDef *RNGx)
201 {
202 return ((READ_BIT(RNGx->SR, RNG_SR_CEIS) == (RNG_SR_CEIS)) ? 1UL : 0UL);
203 }
204
205 /**
206 * @brief Indicate if the Seed Error Interrupt Status Flag is set or not
207 * @rmtoll SR SEIS LL_RNG_IsActiveFlag_SEIS
208 * @param RNGx RNG Instance
209 * @retval State of bit (1 or 0).
210 */
LL_RNG_IsActiveFlag_SEIS(RNG_TypeDef * RNGx)211 __STATIC_INLINE uint32_t LL_RNG_IsActiveFlag_SEIS(RNG_TypeDef *RNGx)
212 {
213 return ((READ_BIT(RNGx->SR, RNG_SR_SEIS) == (RNG_SR_SEIS)) ? 1UL : 0UL);
214 }
215
216 /**
217 * @brief Clear Clock Error interrupt Status (CEIS) Flag
218 * @rmtoll SR CEIS LL_RNG_ClearFlag_CEIS
219 * @param RNGx RNG Instance
220 * @retval None
221 */
LL_RNG_ClearFlag_CEIS(RNG_TypeDef * RNGx)222 __STATIC_INLINE void LL_RNG_ClearFlag_CEIS(RNG_TypeDef *RNGx)
223 {
224 WRITE_REG(RNGx->SR, ~RNG_SR_CEIS);
225 }
226
227 /**
228 * @brief Clear Seed Error interrupt Status (SEIS) Flag
229 * @rmtoll SR SEIS LL_RNG_ClearFlag_SEIS
230 * @param RNGx RNG Instance
231 * @retval None
232 */
LL_RNG_ClearFlag_SEIS(RNG_TypeDef * RNGx)233 __STATIC_INLINE void LL_RNG_ClearFlag_SEIS(RNG_TypeDef *RNGx)
234 {
235 WRITE_REG(RNGx->SR, ~RNG_SR_SEIS);
236 }
237
238 /**
239 * @}
240 */
241
242 /** @defgroup RNG_LL_EF_IT_Management IT Management
243 * @{
244 */
245
246 /**
247 * @brief Enable Random Number Generator Interrupt
248 * (applies for either Seed error, Clock Error or Data ready interrupts)
249 * @rmtoll CR IE LL_RNG_EnableIT
250 * @param RNGx RNG Instance
251 * @retval None
252 */
LL_RNG_EnableIT(RNG_TypeDef * RNGx)253 __STATIC_INLINE void LL_RNG_EnableIT(RNG_TypeDef *RNGx)
254 {
255 SET_BIT(RNGx->CR, RNG_CR_IE);
256 }
257
258 /**
259 * @brief Disable Random Number Generator Interrupt
260 * (applies for either Seed error, Clock Error or Data ready interrupts)
261 * @rmtoll CR IE LL_RNG_DisableIT
262 * @param RNGx RNG Instance
263 * @retval None
264 */
LL_RNG_DisableIT(RNG_TypeDef * RNGx)265 __STATIC_INLINE void LL_RNG_DisableIT(RNG_TypeDef *RNGx)
266 {
267 CLEAR_BIT(RNGx->CR, RNG_CR_IE);
268 }
269
270 /**
271 * @brief Check if Random Number Generator Interrupt is enabled
272 * (applies for either Seed error, Clock Error or Data ready interrupts)
273 * @rmtoll CR IE LL_RNG_IsEnabledIT
274 * @param RNGx RNG Instance
275 * @retval State of bit (1 or 0).
276 */
LL_RNG_IsEnabledIT(RNG_TypeDef * RNGx)277 __STATIC_INLINE uint32_t LL_RNG_IsEnabledIT(RNG_TypeDef *RNGx)
278 {
279 return ((READ_BIT(RNGx->CR, RNG_CR_IE) == (RNG_CR_IE)) ? 1UL : 0UL);
280 }
281
282 /**
283 * @}
284 */
285
286 /** @defgroup RNG_LL_EF_Data_Management Data Management
287 * @{
288 */
289
290 /**
291 * @brief Return32-bit Random Number value
292 * @rmtoll DR RNDATA LL_RNG_ReadRandData32
293 * @param RNGx RNG Instance
294 * @retval Generated 32-bit random value
295 */
LL_RNG_ReadRandData32(RNG_TypeDef * RNGx)296 __STATIC_INLINE uint32_t LL_RNG_ReadRandData32(RNG_TypeDef *RNGx)
297 {
298 return (uint32_t)(READ_REG(RNGx->DR));
299 }
300
301 /**
302 * @}
303 */
304
305 #if defined(USE_FULL_LL_DRIVER)
306 /** @defgroup RNG_LL_EF_Init Initialization and de-initialization functions
307 * @{
308 */
309 ErrorStatus LL_RNG_DeInit(RNG_TypeDef *RNGx);
310
311 /**
312 * @}
313 */
314 #endif /* USE_FULL_LL_DRIVER */
315
316 /**
317 * @}
318 */
319
320 /**
321 * @}
322 */
323
324 #endif /* RNG */
325
326 /**
327 * @}
328 */
329
330 #ifdef __cplusplus
331 }
332 #endif
333
334 #endif /* __STM32F7xx_LL_RNG_H */
335
336
