1 /**
2 ******************************************************************************
3 * @file stm32f7xx_ll_lptim.h
4 * @author MCD Application Team
5 * @brief Header file of LPTIM LL module.
6 ******************************************************************************
7 * @attention
8 *
9 * Copyright (c) 2017 STMicroelectronics.
10 * All rights reserved.
11 *
12 * This software is licensed under terms that can be found in the LICENSE file
13 * in the root directory of this software component.
14 * If no LICENSE file comes with this software, it is provided AS-IS.
15 *
16 ******************************************************************************
17 */
18
19 /* Define to prevent recursive inclusion -------------------------------------*/
20 #ifndef STM32F7xx_LL_LPTIM_H
21 #define STM32F7xx_LL_LPTIM_H
22
23 #ifdef __cplusplus
24 extern "C" {
25 #endif
26
27 /* Includes ------------------------------------------------------------------*/
28 #include "stm32f7xx.h"
29
30 /** @addtogroup STM32F7xx_LL_Driver
31 * @{
32 */
33
34 #if defined (LPTIM1)
35
36 /** @defgroup LPTIM_LL LPTIM
37 * @{
38 */
39
40 /* Private types -------------------------------------------------------------*/
41 /* Private variables ---------------------------------------------------------*/
42
43 /* Private constants ---------------------------------------------------------*/
44
45 /* Private macros ------------------------------------------------------------*/
46 #if defined(USE_FULL_LL_DRIVER)
47 /** @defgroup LPTIM_LL_Private_Macros LPTIM Private Macros
48 * @{
49 */
50 /**
51 * @}
52 */
53 #endif /*USE_FULL_LL_DRIVER*/
54
55 /* Exported types ------------------------------------------------------------*/
56 #if defined(USE_FULL_LL_DRIVER)
57 /** @defgroup LPTIM_LL_ES_INIT LPTIM Exported Init structure
58 * @{
59 */
60
61 /**
62 * @brief LPTIM Init structure definition
63 */
64 typedef struct
65 {
66 uint32_t ClockSource; /*!< Specifies the source of the clock used by the LPTIM instance.
67 This parameter can be a value of @ref LPTIM_LL_EC_CLK_SOURCE.
68
69 This feature can be modified afterwards using unitary
70 function @ref LL_LPTIM_SetClockSource().*/
71
72 uint32_t Prescaler; /*!< Specifies the prescaler division ratio.
73 This parameter can be a value of @ref LPTIM_LL_EC_PRESCALER.
74
75 This feature can be modified afterwards using using unitary
76 function @ref LL_LPTIM_SetPrescaler().*/
77
78 uint32_t Waveform; /*!< Specifies the waveform shape.
79 This parameter can be a value of @ref LPTIM_LL_EC_OUTPUT_WAVEFORM.
80
81 This feature can be modified afterwards using unitary
82 function @ref LL_LPTIM_ConfigOutput().*/
83
84 uint32_t Polarity; /*!< Specifies waveform polarity.
85 This parameter can be a value of @ref LPTIM_LL_EC_OUTPUT_POLARITY.
86
87 This feature can be modified afterwards using unitary
88 function @ref LL_LPTIM_ConfigOutput().*/
89 } LL_LPTIM_InitTypeDef;
90
91 /**
92 * @}
93 */
94 #endif /* USE_FULL_LL_DRIVER */
95
96 /* Exported constants --------------------------------------------------------*/
97 /** @defgroup LPTIM_LL_Exported_Constants LPTIM Exported Constants
98 * @{
99 */
100
101 /** @defgroup LPTIM_LL_EC_GET_FLAG Get Flags Defines
102 * @brief Flags defines which can be used with LL_LPTIM_ReadReg function
103 * @{
104 */
105 #define LL_LPTIM_ISR_CMPM LPTIM_ISR_CMPM /*!< Compare match */
106 #define LL_LPTIM_ISR_CMPOK LPTIM_ISR_CMPOK /*!< Compare register update OK */
107 #define LL_LPTIM_ISR_ARRM LPTIM_ISR_ARRM /*!< Autoreload match */
108 #define LL_LPTIM_ISR_EXTTRIG LPTIM_ISR_EXTTRIG /*!< External trigger edge event */
109 #define LL_LPTIM_ISR_ARROK LPTIM_ISR_ARROK /*!< Autoreload register update OK */
110 #define LL_LPTIM_ISR_UP LPTIM_ISR_UP /*!< Counter direction change down to up */
111 #define LL_LPTIM_ISR_DOWN LPTIM_ISR_DOWN /*!< Counter direction change up to down */
112 /**
113 * @}
114 */
115
116 /** @defgroup LPTIM_LL_EC_IT IT Defines
117 * @brief IT defines which can be used with LL_LPTIM_ReadReg and LL_LPTIM_WriteReg functions
118 * @{
119 */
120 #define LL_LPTIM_IER_CMPMIE LPTIM_IER_CMPMIE /*!< Compare match */
121 #define LL_LPTIM_IER_CMPOKIE LPTIM_IER_CMPOKIE /*!< Compare register update OK */
122 #define LL_LPTIM_IER_ARRMIE LPTIM_IER_ARRMIE /*!< Autoreload match */
123 #define LL_LPTIM_IER_EXTTRIGIE LPTIM_IER_EXTTRIGIE /*!< External trigger edge event */
124 #define LL_LPTIM_IER_ARROKIE LPTIM_IER_ARROKIE /*!< Autoreload register update OK */
125 #define LL_LPTIM_IER_UPIE LPTIM_IER_UPIE /*!< Counter direction change down to up */
126 #define LL_LPTIM_IER_DOWNIE LPTIM_IER_DOWNIE /*!< Counter direction change up to down */
127 /**
128 * @}
129 */
130
131 /** @defgroup LPTIM_LL_EC_OPERATING_MODE Operating Mode
132 * @{
133 */
134 #define LL_LPTIM_OPERATING_MODE_CONTINUOUS LPTIM_CR_CNTSTRT /*!<LP Timer starts in continuous mode*/
135 #define LL_LPTIM_OPERATING_MODE_ONESHOT LPTIM_CR_SNGSTRT /*!<LP Tilmer starts in single mode*/
136 /**
137 * @}
138 */
139
140 /** @defgroup LPTIM_LL_EC_UPDATE_MODE Update Mode
141 * @{
142 */
143 #define LL_LPTIM_UPDATE_MODE_IMMEDIATE 0x00000000U /*!<Preload is disabled: registers are updated after each APB bus write access*/
144 #define LL_LPTIM_UPDATE_MODE_ENDOFPERIOD LPTIM_CFGR_PRELOAD /*!<preload is enabled: registers are updated at the end of the current LPTIM period*/
145 /**
146 * @}
147 */
148
149 /** @defgroup LPTIM_LL_EC_COUNTER_MODE Counter Mode
150 * @{
151 */
152 #define LL_LPTIM_COUNTER_MODE_INTERNAL 0x00000000U /*!<The counter is incremented following each internal clock pulse*/
153 #define LL_LPTIM_COUNTER_MODE_EXTERNAL LPTIM_CFGR_COUNTMODE /*!<The counter is incremented following each valid clock pulse on the LPTIM external Input1*/
154 /**
155 * @}
156 */
157
158 /** @defgroup LPTIM_LL_EC_OUTPUT_WAVEFORM Output Waveform Type
159 * @{
160 */
161 #define LL_LPTIM_OUTPUT_WAVEFORM_PWM 0x00000000U /*!<LPTIM generates either a PWM waveform or a One pulse waveform depending on chosen operating mode CONTINUOUS or SINGLE*/
162 #define LL_LPTIM_OUTPUT_WAVEFORM_SETONCE LPTIM_CFGR_WAVE /*!<LPTIM generates a Set Once waveform*/
163 /**
164 * @}
165 */
166
167 /** @defgroup LPTIM_LL_EC_OUTPUT_POLARITY Output Polarity
168 * @{
169 */
170 #define LL_LPTIM_OUTPUT_POLARITY_REGULAR 0x00000000U /*!<The LPTIM output reflects the compare results between LPTIMx_ARR and LPTIMx_CMP registers*/
171 #define LL_LPTIM_OUTPUT_POLARITY_INVERSE LPTIM_CFGR_WAVPOL /*!<The LPTIM output reflects the inverse of the compare results between LPTIMx_ARR and LPTIMx_CMP registers*/
172 /**
173 * @}
174 */
175
176 /** @defgroup LPTIM_LL_EC_PRESCALER Prescaler Value
177 * @{
178 */
179 #define LL_LPTIM_PRESCALER_DIV1 0x00000000U /*!<Prescaler division factor is set to 1*/
180 #define LL_LPTIM_PRESCALER_DIV2 LPTIM_CFGR_PRESC_0 /*!<Prescaler division factor is set to 2*/
181 #define LL_LPTIM_PRESCALER_DIV4 LPTIM_CFGR_PRESC_1 /*!<Prescaler division factor is set to 4*/
182 #define LL_LPTIM_PRESCALER_DIV8 (LPTIM_CFGR_PRESC_1 | LPTIM_CFGR_PRESC_0) /*!<Prescaler division factor is set to 8*/
183 #define LL_LPTIM_PRESCALER_DIV16 LPTIM_CFGR_PRESC_2 /*!<Prescaler division factor is set to 16*/
184 #define LL_LPTIM_PRESCALER_DIV32 (LPTIM_CFGR_PRESC_2 | LPTIM_CFGR_PRESC_0) /*!<Prescaler division factor is set to 32*/
185 #define LL_LPTIM_PRESCALER_DIV64 (LPTIM_CFGR_PRESC_2 | LPTIM_CFGR_PRESC_1) /*!<Prescaler division factor is set to 64*/
186 #define LL_LPTIM_PRESCALER_DIV128 LPTIM_CFGR_PRESC /*!<Prescaler division factor is set to 128*/
187 /**
188 * @}
189 */
190
191 /** @defgroup LPTIM_LL_EC_TRIG_SOURCE Trigger Source
192 * @{
193 */
194 #define LL_LPTIM_TRIG_SOURCE_GPIO 0x00000000U /*!<External input trigger is connected to TIMx_ETR input*/
195 #define LL_LPTIM_TRIG_SOURCE_RTCALARMA LPTIM_CFGR_TRIGSEL_0 /*!<External input trigger is connected to RTC Alarm A*/
196 #define LL_LPTIM_TRIG_SOURCE_RTCALARMB LPTIM_CFGR_TRIGSEL_1 /*!<External input trigger is connected to RTC Alarm B*/
197 #define LL_LPTIM_TRIG_SOURCE_RTCTAMP1 (LPTIM_CFGR_TRIGSEL_1 | LPTIM_CFGR_TRIGSEL_0) /*!<External input trigger is connected to RTC Tamper 1*/
198 #define LL_LPTIM_TRIG_SOURCE_RTCTAMP2 LPTIM_CFGR_TRIGSEL_2 /*!<External input trigger is connected to RTC Tamper 2*/
199 #define LL_LPTIM_TRIG_SOURCE_RTCTAMP3 (LPTIM_CFGR_TRIGSEL_2 | LPTIM_CFGR_TRIGSEL_0) /*!<External input trigger is connected to RTC Tamper 3*/
200 #define LL_LPTIM_TRIG_SOURCE_COMP1 (LPTIM_CFGR_TRIGSEL_2 | LPTIM_CFGR_TRIGSEL_1) /*!<External input trigger is connected to COMP1 output*/
201 #define LL_LPTIM_TRIG_SOURCE_COMP2 LPTIM_CFGR_TRIGSEL /*!<External input trigger is connected to COMP2 output*/
202 /**
203 * @}
204 */
205
206 /** @defgroup LPTIM_LL_EC_TRIG_FILTER Trigger Filter
207 * @{
208 */
209 #define LL_LPTIM_TRIG_FILTER_NONE 0x00000000U /*!<Any trigger active level change is considered as a valid trigger*/
210 #define LL_LPTIM_TRIG_FILTER_2 LPTIM_CFGR_TRGFLT_0 /*!<Trigger active level change must be stable for at least 2 clock periods before it is considered as valid trigger*/
211 #define LL_LPTIM_TRIG_FILTER_4 LPTIM_CFGR_TRGFLT_1 /*!<Trigger active level change must be stable for at least 4 clock periods before it is considered as valid trigger*/
212 #define LL_LPTIM_TRIG_FILTER_8 LPTIM_CFGR_TRGFLT /*!<Trigger active level change must be stable for at least 8 clock periods before it is considered as valid trigger*/
213 /**
214 * @}
215 */
216
217 /** @defgroup LPTIM_LL_EC_TRIG_POLARITY Trigger Polarity
218 * @{
219 */
220 #define LL_LPTIM_TRIG_POLARITY_RISING LPTIM_CFGR_TRIGEN_0 /*!<LPTIM counter starts when a rising edge is detected*/
221 #define LL_LPTIM_TRIG_POLARITY_FALLING LPTIM_CFGR_TRIGEN_1 /*!<LPTIM counter starts when a falling edge is detected*/
222 #define LL_LPTIM_TRIG_POLARITY_RISING_FALLING LPTIM_CFGR_TRIGEN /*!<LPTIM counter starts when a rising or a falling edge is detected*/
223 /**
224 * @}
225 */
226
227 /** @defgroup LPTIM_LL_EC_CLK_SOURCE Clock Source
228 * @{
229 */
230 #define LL_LPTIM_CLK_SOURCE_INTERNAL 0x00000000U /*!<LPTIM is clocked by internal clock source (APB clock or any of the embedded oscillators)*/
231 #define LL_LPTIM_CLK_SOURCE_EXTERNAL LPTIM_CFGR_CKSEL /*!<LPTIM is clocked by an external clock source through the LPTIM external Input1*/
232 /**
233 * @}
234 */
235
236 /** @defgroup LPTIM_LL_EC_CLK_FILTER Clock Filter
237 * @{
238 */
239 #define LL_LPTIM_CLK_FILTER_NONE 0x00000000U /*!<Any external clock signal level change is considered as a valid transition*/
240 #define LL_LPTIM_CLK_FILTER_2 LPTIM_CFGR_CKFLT_0 /*!<External clock signal level change must be stable for at least 2 clock periods before it is considered as valid transition*/
241 #define LL_LPTIM_CLK_FILTER_4 LPTIM_CFGR_CKFLT_1 /*!<External clock signal level change must be stable for at least 4 clock periods before it is considered as valid transition*/
242 #define LL_LPTIM_CLK_FILTER_8 LPTIM_CFGR_CKFLT /*!<External clock signal level change must be stable for at least 8 clock periods before it is considered as valid transition*/
243 /**
244 * @}
245 */
246
247 /** @defgroup LPTIM_LL_EC_CLK_POLARITY Clock Polarity
248 * @{
249 */
250 #define LL_LPTIM_CLK_POLARITY_RISING 0x00000000U /*!< The rising edge is the active edge used for counting*/
251 #define LL_LPTIM_CLK_POLARITY_FALLING LPTIM_CFGR_CKPOL_0 /*!< The falling edge is the active edge used for counting*/
252 #define LL_LPTIM_CLK_POLARITY_RISING_FALLING LPTIM_CFGR_CKPOL_1 /*!< Both edges are active edges*/
253 /**
254 * @}
255 */
256
257 /** @defgroup LPTIM_LL_EC_ENCODER_MODE Encoder Mode
258 * @{
259 */
260 #define LL_LPTIM_ENCODER_MODE_RISING 0x00000000U /*!< The rising edge is the active edge used for counting*/
261 #define LL_LPTIM_ENCODER_MODE_FALLING LPTIM_CFGR_CKPOL_0 /*!< The falling edge is the active edge used for counting*/
262 #define LL_LPTIM_ENCODER_MODE_RISING_FALLING LPTIM_CFGR_CKPOL_1 /*!< Both edges are active edges*/
263 /**
264 * @}
265 */
266
267 /**
268 * @}
269 */
270
271 /* Exported macro ------------------------------------------------------------*/
272 /** @defgroup LPTIM_LL_Exported_Macros LPTIM Exported Macros
273 * @{
274 */
275
276 /** @defgroup LPTIM_LL_EM_WRITE_READ Common Write and read registers Macros
277 * @{
278 */
279
280 /**
281 * @brief Write a value in LPTIM register
282 * @param __INSTANCE__ LPTIM Instance
283 * @param __REG__ Register to be written
284 * @param __VALUE__ Value to be written in the register
285 * @retval None
286 */
287 #define LL_LPTIM_WriteReg(__INSTANCE__, __REG__, __VALUE__) WRITE_REG((__INSTANCE__)->__REG__, (__VALUE__))
288
289 /**
290 * @brief Read a value in LPTIM register
291 * @param __INSTANCE__ LPTIM Instance
292 * @param __REG__ Register to be read
293 * @retval Register value
294 */
295 #define LL_LPTIM_ReadReg(__INSTANCE__, __REG__) READ_REG((__INSTANCE__)->__REG__)
296 /**
297 * @}
298 */
299
300 /**
301 * @}
302 */
303
304 /* Exported functions --------------------------------------------------------*/
305 /** @defgroup LPTIM_LL_Exported_Functions LPTIM Exported Functions
306 * @{
307 */
308
309 #if defined(USE_FULL_LL_DRIVER)
310 /** @defgroup LPTIM_LL_EF_Init Initialisation and deinitialisation functions
311 * @{
312 */
313
314 ErrorStatus LL_LPTIM_DeInit(LPTIM_TypeDef *LPTIMx);
315 void LL_LPTIM_StructInit(LL_LPTIM_InitTypeDef *LPTIM_InitStruct);
316 ErrorStatus LL_LPTIM_Init(LPTIM_TypeDef *LPTIMx, const LL_LPTIM_InitTypeDef *LPTIM_InitStruct);
317 void LL_LPTIM_Disable(LPTIM_TypeDef *LPTIMx);
318 /**
319 * @}
320 */
321 #endif /* USE_FULL_LL_DRIVER */
322
323 /** @defgroup LPTIM_LL_EF_LPTIM_Configuration LPTIM Configuration
324 * @{
325 */
326
327 /**
328 * @brief Enable the LPTIM instance
329 * @note After setting the ENABLE bit, a delay of two counter clock is needed
330 * before the LPTIM instance is actually enabled.
331 * @rmtoll CR ENABLE LL_LPTIM_Enable
332 * @param LPTIMx Low-Power Timer instance
333 * @retval None
334 */
LL_LPTIM_Enable(LPTIM_TypeDef * LPTIMx)335 __STATIC_INLINE void LL_LPTIM_Enable(LPTIM_TypeDef *LPTIMx)
336 {
337 SET_BIT(LPTIMx->CR, LPTIM_CR_ENABLE);
338 }
339
340 /**
341 * @brief Indicates whether the LPTIM instance is enabled.
342 * @rmtoll CR ENABLE LL_LPTIM_IsEnabled
343 * @param LPTIMx Low-Power Timer instance
344 * @retval State of bit (1 or 0).
345 */
LL_LPTIM_IsEnabled(const LPTIM_TypeDef * LPTIMx)346 __STATIC_INLINE uint32_t LL_LPTIM_IsEnabled(const LPTIM_TypeDef *LPTIMx)
347 {
348 return (((READ_BIT(LPTIMx->CR, LPTIM_CR_ENABLE) == LPTIM_CR_ENABLE) ? 1UL : 0UL));
349 }
350
351 /**
352 * @brief Starts the LPTIM counter in the desired mode.
353 * @note LPTIM instance must be enabled before starting the counter.
354 * @note It is possible to change on the fly from One Shot mode to
355 * Continuous mode.
356 * @rmtoll CR CNTSTRT LL_LPTIM_StartCounter\n
357 * CR SNGSTRT LL_LPTIM_StartCounter
358 * @param LPTIMx Low-Power Timer instance
359 * @param OperatingMode This parameter can be one of the following values:
360 * @arg @ref LL_LPTIM_OPERATING_MODE_CONTINUOUS
361 * @arg @ref LL_LPTIM_OPERATING_MODE_ONESHOT
362 * @retval None
363 */
LL_LPTIM_StartCounter(LPTIM_TypeDef * LPTIMx,uint32_t OperatingMode)364 __STATIC_INLINE void LL_LPTIM_StartCounter(LPTIM_TypeDef *LPTIMx, uint32_t OperatingMode)
365 {
366 MODIFY_REG(LPTIMx->CR, LPTIM_CR_CNTSTRT | LPTIM_CR_SNGSTRT, OperatingMode);
367 }
368
369 /**
370 * @brief Set the LPTIM registers update mode (enable/disable register preload)
371 * @note This function must be called when the LPTIM instance is disabled.
372 * @rmtoll CFGR PRELOAD LL_LPTIM_SetUpdateMode
373 * @param LPTIMx Low-Power Timer instance
374 * @param UpdateMode This parameter can be one of the following values:
375 * @arg @ref LL_LPTIM_UPDATE_MODE_IMMEDIATE
376 * @arg @ref LL_LPTIM_UPDATE_MODE_ENDOFPERIOD
377 * @retval None
378 */
LL_LPTIM_SetUpdateMode(LPTIM_TypeDef * LPTIMx,uint32_t UpdateMode)379 __STATIC_INLINE void LL_LPTIM_SetUpdateMode(LPTIM_TypeDef *LPTIMx, uint32_t UpdateMode)
380 {
381 MODIFY_REG(LPTIMx->CFGR, LPTIM_CFGR_PRELOAD, UpdateMode);
382 }
383
384 /**
385 * @brief Get the LPTIM registers update mode
386 * @rmtoll CFGR PRELOAD LL_LPTIM_GetUpdateMode
387 * @param LPTIMx Low-Power Timer instance
388 * @retval Returned value can be one of the following values:
389 * @arg @ref LL_LPTIM_UPDATE_MODE_IMMEDIATE
390 * @arg @ref LL_LPTIM_UPDATE_MODE_ENDOFPERIOD
391 */
LL_LPTIM_GetUpdateMode(const LPTIM_TypeDef * LPTIMx)392 __STATIC_INLINE uint32_t LL_LPTIM_GetUpdateMode(const LPTIM_TypeDef *LPTIMx)
393 {
394 return (uint32_t)(READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_PRELOAD));
395 }
396
397 /**
398 * @brief Set the auto reload value
399 * @note The LPTIMx_ARR register content must only be modified when the LPTIM is enabled
400 * @note After a write to the LPTIMx_ARR register a new write operation to the
401 * same register can only be performed when the previous write operation
402 * is completed. Any successive write before the ARROK flag is set, will
403 * lead to unpredictable results.
404 * @note autoreload value be strictly greater than the compare value.
405 * @rmtoll ARR ARR LL_LPTIM_SetAutoReload
406 * @param LPTIMx Low-Power Timer instance
407 * @param AutoReload Value between Min_Data=0x0001 and Max_Data=0xFFFF
408 * @retval None
409 */
LL_LPTIM_SetAutoReload(LPTIM_TypeDef * LPTIMx,uint32_t AutoReload)410 __STATIC_INLINE void LL_LPTIM_SetAutoReload(LPTIM_TypeDef *LPTIMx, uint32_t AutoReload)
411 {
412 MODIFY_REG(LPTIMx->ARR, LPTIM_ARR_ARR, AutoReload);
413 }
414
415 /**
416 * @brief Get actual auto reload value
417 * @rmtoll ARR ARR LL_LPTIM_GetAutoReload
418 * @param LPTIMx Low-Power Timer instance
419 * @retval AutoReload Value between Min_Data=0x0001 and Max_Data=0xFFFF
420 */
LL_LPTIM_GetAutoReload(const LPTIM_TypeDef * LPTIMx)421 __STATIC_INLINE uint32_t LL_LPTIM_GetAutoReload(const LPTIM_TypeDef *LPTIMx)
422 {
423 return (uint32_t)(READ_BIT(LPTIMx->ARR, LPTIM_ARR_ARR));
424 }
425
426 /**
427 * @brief Set the compare value
428 * @note After a write to the LPTIMx_CMP register a new write operation to the
429 * same register can only be performed when the previous write operation
430 * is completed. Any successive write before the CMPOK flag is set, will
431 * lead to unpredictable results.
432 * @rmtoll CMP CMP LL_LPTIM_SetCompare
433 * @param LPTIMx Low-Power Timer instance
434 * @param CompareValue Value between Min_Data=0x00 and Max_Data=0xFFFF
435 * @retval None
436 */
LL_LPTIM_SetCompare(LPTIM_TypeDef * LPTIMx,uint32_t CompareValue)437 __STATIC_INLINE void LL_LPTIM_SetCompare(LPTIM_TypeDef *LPTIMx, uint32_t CompareValue)
438 {
439 MODIFY_REG(LPTIMx->CMP, LPTIM_CMP_CMP, CompareValue);
440 }
441
442 /**
443 * @brief Get actual compare value
444 * @rmtoll CMP CMP LL_LPTIM_GetCompare
445 * @param LPTIMx Low-Power Timer instance
446 * @retval CompareValue Value between Min_Data=0x00 and Max_Data=0xFFFF
447 */
LL_LPTIM_GetCompare(const LPTIM_TypeDef * LPTIMx)448 __STATIC_INLINE uint32_t LL_LPTIM_GetCompare(const LPTIM_TypeDef *LPTIMx)
449 {
450 return (uint32_t)(READ_BIT(LPTIMx->CMP, LPTIM_CMP_CMP));
451 }
452
453 /**
454 * @brief Get actual counter value
455 * @note When the LPTIM instance is running with an asynchronous clock, reading
456 * the LPTIMx_CNT register may return unreliable values. So in this case
457 * it is necessary to perform two consecutive read accesses and verify
458 * that the two returned values are identical.
459 * @rmtoll CNT CNT LL_LPTIM_GetCounter
460 * @param LPTIMx Low-Power Timer instance
461 * @retval Counter value
462 */
LL_LPTIM_GetCounter(const LPTIM_TypeDef * LPTIMx)463 __STATIC_INLINE uint32_t LL_LPTIM_GetCounter(const LPTIM_TypeDef *LPTIMx)
464 {
465 return (uint32_t)(READ_BIT(LPTIMx->CNT, LPTIM_CNT_CNT));
466 }
467
468 /**
469 * @brief Set the counter mode (selection of the LPTIM counter clock source).
470 * @note The counter mode can be set only when the LPTIM instance is disabled.
471 * @rmtoll CFGR COUNTMODE LL_LPTIM_SetCounterMode
472 * @param LPTIMx Low-Power Timer instance
473 * @param CounterMode This parameter can be one of the following values:
474 * @arg @ref LL_LPTIM_COUNTER_MODE_INTERNAL
475 * @arg @ref LL_LPTIM_COUNTER_MODE_EXTERNAL
476 * @retval None
477 */
LL_LPTIM_SetCounterMode(LPTIM_TypeDef * LPTIMx,uint32_t CounterMode)478 __STATIC_INLINE void LL_LPTIM_SetCounterMode(LPTIM_TypeDef *LPTIMx, uint32_t CounterMode)
479 {
480 MODIFY_REG(LPTIMx->CFGR, LPTIM_CFGR_COUNTMODE, CounterMode);
481 }
482
483 /**
484 * @brief Get the counter mode
485 * @rmtoll CFGR COUNTMODE LL_LPTIM_GetCounterMode
486 * @param LPTIMx Low-Power Timer instance
487 * @retval Returned value can be one of the following values:
488 * @arg @ref LL_LPTIM_COUNTER_MODE_INTERNAL
489 * @arg @ref LL_LPTIM_COUNTER_MODE_EXTERNAL
490 */
LL_LPTIM_GetCounterMode(const LPTIM_TypeDef * LPTIMx)491 __STATIC_INLINE uint32_t LL_LPTIM_GetCounterMode(const LPTIM_TypeDef *LPTIMx)
492 {
493 return (uint32_t)(READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_COUNTMODE));
494 }
495
496 /**
497 * @brief Configure the LPTIM instance output (LPTIMx_OUT)
498 * @note This function must be called when the LPTIM instance is disabled.
499 * @note Regarding the LPTIM output polarity the change takes effect
500 * immediately, so the output default value will change immediately after
501 * the polarity is re-configured, even before the timer is enabled.
502 * @rmtoll CFGR WAVE LL_LPTIM_ConfigOutput\n
503 * CFGR WAVPOL LL_LPTIM_ConfigOutput
504 * @param LPTIMx Low-Power Timer instance
505 * @param Waveform This parameter can be one of the following values:
506 * @arg @ref LL_LPTIM_OUTPUT_WAVEFORM_PWM
507 * @arg @ref LL_LPTIM_OUTPUT_WAVEFORM_SETONCE
508 * @param Polarity This parameter can be one of the following values:
509 * @arg @ref LL_LPTIM_OUTPUT_POLARITY_REGULAR
510 * @arg @ref LL_LPTIM_OUTPUT_POLARITY_INVERSE
511 * @retval None
512 */
LL_LPTIM_ConfigOutput(LPTIM_TypeDef * LPTIMx,uint32_t Waveform,uint32_t Polarity)513 __STATIC_INLINE void LL_LPTIM_ConfigOutput(LPTIM_TypeDef *LPTIMx, uint32_t Waveform, uint32_t Polarity)
514 {
515 MODIFY_REG(LPTIMx->CFGR, LPTIM_CFGR_WAVE | LPTIM_CFGR_WAVPOL, Waveform | Polarity);
516 }
517
518 /**
519 * @brief Set waveform shape
520 * @rmtoll CFGR WAVE LL_LPTIM_SetWaveform
521 * @param LPTIMx Low-Power Timer instance
522 * @param Waveform This parameter can be one of the following values:
523 * @arg @ref LL_LPTIM_OUTPUT_WAVEFORM_PWM
524 * @arg @ref LL_LPTIM_OUTPUT_WAVEFORM_SETONCE
525 * @retval None
526 */
LL_LPTIM_SetWaveform(LPTIM_TypeDef * LPTIMx,uint32_t Waveform)527 __STATIC_INLINE void LL_LPTIM_SetWaveform(LPTIM_TypeDef *LPTIMx, uint32_t Waveform)
528 {
529 MODIFY_REG(LPTIMx->CFGR, LPTIM_CFGR_WAVE, Waveform);
530 }
531
532 /**
533 * @brief Get actual waveform shape
534 * @rmtoll CFGR WAVE LL_LPTIM_GetWaveform
535 * @param LPTIMx Low-Power Timer instance
536 * @retval Returned value can be one of the following values:
537 * @arg @ref LL_LPTIM_OUTPUT_WAVEFORM_PWM
538 * @arg @ref LL_LPTIM_OUTPUT_WAVEFORM_SETONCE
539 */
LL_LPTIM_GetWaveform(const LPTIM_TypeDef * LPTIMx)540 __STATIC_INLINE uint32_t LL_LPTIM_GetWaveform(const LPTIM_TypeDef *LPTIMx)
541 {
542 return (uint32_t)(READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_WAVE));
543 }
544
545 /**
546 * @brief Set output polarity
547 * @rmtoll CFGR WAVPOL LL_LPTIM_SetPolarity
548 * @param LPTIMx Low-Power Timer instance
549 * @param Polarity This parameter can be one of the following values:
550 * @arg @ref LL_LPTIM_OUTPUT_POLARITY_REGULAR
551 * @arg @ref LL_LPTIM_OUTPUT_POLARITY_INVERSE
552 * @retval None
553 */
LL_LPTIM_SetPolarity(LPTIM_TypeDef * LPTIMx,uint32_t Polarity)554 __STATIC_INLINE void LL_LPTIM_SetPolarity(LPTIM_TypeDef *LPTIMx, uint32_t Polarity)
555 {
556 MODIFY_REG(LPTIMx->CFGR, LPTIM_CFGR_WAVPOL, Polarity);
557 }
558
559 /**
560 * @brief Get actual output polarity
561 * @rmtoll CFGR WAVPOL LL_LPTIM_GetPolarity
562 * @param LPTIMx Low-Power Timer instance
563 * @retval Returned value can be one of the following values:
564 * @arg @ref LL_LPTIM_OUTPUT_POLARITY_REGULAR
565 * @arg @ref LL_LPTIM_OUTPUT_POLARITY_INVERSE
566 */
LL_LPTIM_GetPolarity(const LPTIM_TypeDef * LPTIMx)567 __STATIC_INLINE uint32_t LL_LPTIM_GetPolarity(const LPTIM_TypeDef *LPTIMx)
568 {
569 return (uint32_t)(READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_WAVPOL));
570 }
571
572 /**
573 * @brief Set actual prescaler division ratio.
574 * @note This function must be called when the LPTIM instance is disabled.
575 * @note When the LPTIM is configured to be clocked by an internal clock source
576 * and the LPTIM counter is configured to be updated by active edges
577 * detected on the LPTIM external Input1, the internal clock provided to
578 * the LPTIM must be not be prescaled.
579 * @rmtoll CFGR PRESC LL_LPTIM_SetPrescaler
580 * @param LPTIMx Low-Power Timer instance
581 * @param Prescaler This parameter can be one of the following values:
582 * @arg @ref LL_LPTIM_PRESCALER_DIV1
583 * @arg @ref LL_LPTIM_PRESCALER_DIV2
584 * @arg @ref LL_LPTIM_PRESCALER_DIV4
585 * @arg @ref LL_LPTIM_PRESCALER_DIV8
586 * @arg @ref LL_LPTIM_PRESCALER_DIV16
587 * @arg @ref LL_LPTIM_PRESCALER_DIV32
588 * @arg @ref LL_LPTIM_PRESCALER_DIV64
589 * @arg @ref LL_LPTIM_PRESCALER_DIV128
590 * @retval None
591 */
LL_LPTIM_SetPrescaler(LPTIM_TypeDef * LPTIMx,uint32_t Prescaler)592 __STATIC_INLINE void LL_LPTIM_SetPrescaler(LPTIM_TypeDef *LPTIMx, uint32_t Prescaler)
593 {
594 MODIFY_REG(LPTIMx->CFGR, LPTIM_CFGR_PRESC, Prescaler);
595 }
596
597 /**
598 * @brief Get actual prescaler division ratio.
599 * @rmtoll CFGR PRESC LL_LPTIM_GetPrescaler
600 * @param LPTIMx Low-Power Timer instance
601 * @retval Returned value can be one of the following values:
602 * @arg @ref LL_LPTIM_PRESCALER_DIV1
603 * @arg @ref LL_LPTIM_PRESCALER_DIV2
604 * @arg @ref LL_LPTIM_PRESCALER_DIV4
605 * @arg @ref LL_LPTIM_PRESCALER_DIV8
606 * @arg @ref LL_LPTIM_PRESCALER_DIV16
607 * @arg @ref LL_LPTIM_PRESCALER_DIV32
608 * @arg @ref LL_LPTIM_PRESCALER_DIV64
609 * @arg @ref LL_LPTIM_PRESCALER_DIV128
610 */
LL_LPTIM_GetPrescaler(const LPTIM_TypeDef * LPTIMx)611 __STATIC_INLINE uint32_t LL_LPTIM_GetPrescaler(const LPTIM_TypeDef *LPTIMx)
612 {
613 return (uint32_t)(READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_PRESC));
614 }
615
616 /**
617 * @}
618 */
619
620 /** @defgroup LPTIM_LL_EF_Trigger_Configuration Trigger Configuration
621 * @{
622 */
623
624 /**
625 * @brief Enable the timeout function
626 * @note This function must be called when the LPTIM instance is disabled.
627 * @note The first trigger event will start the timer, any successive trigger
628 * event will reset the counter and the timer will restart.
629 * @note The timeout value corresponds to the compare value; if no trigger
630 * occurs within the expected time frame, the MCU is waked-up by the
631 * compare match event.
632 * @rmtoll CFGR TIMOUT LL_LPTIM_EnableTimeout
633 * @param LPTIMx Low-Power Timer instance
634 * @retval None
635 */
LL_LPTIM_EnableTimeout(LPTIM_TypeDef * LPTIMx)636 __STATIC_INLINE void LL_LPTIM_EnableTimeout(LPTIM_TypeDef *LPTIMx)
637 {
638 SET_BIT(LPTIMx->CFGR, LPTIM_CFGR_TIMOUT);
639 }
640
641 /**
642 * @brief Disable the timeout function
643 * @note This function must be called when the LPTIM instance is disabled.
644 * @note A trigger event arriving when the timer is already started will be
645 * ignored.
646 * @rmtoll CFGR TIMOUT LL_LPTIM_DisableTimeout
647 * @param LPTIMx Low-Power Timer instance
648 * @retval None
649 */
LL_LPTIM_DisableTimeout(LPTIM_TypeDef * LPTIMx)650 __STATIC_INLINE void LL_LPTIM_DisableTimeout(LPTIM_TypeDef *LPTIMx)
651 {
652 CLEAR_BIT(LPTIMx->CFGR, LPTIM_CFGR_TIMOUT);
653 }
654
655 /**
656 * @brief Indicate whether the timeout function is enabled.
657 * @rmtoll CFGR TIMOUT LL_LPTIM_IsEnabledTimeout
658 * @param LPTIMx Low-Power Timer instance
659 * @retval State of bit (1 or 0).
660 */
LL_LPTIM_IsEnabledTimeout(const LPTIM_TypeDef * LPTIMx)661 __STATIC_INLINE uint32_t LL_LPTIM_IsEnabledTimeout(const LPTIM_TypeDef *LPTIMx)
662 {
663 return (((READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_TIMOUT) == LPTIM_CFGR_TIMOUT) ? 1UL : 0UL));
664 }
665
666 /**
667 * @brief Start the LPTIM counter
668 * @note This function must be called when the LPTIM instance is disabled.
669 * @rmtoll CFGR TRIGEN LL_LPTIM_TrigSw
670 * @param LPTIMx Low-Power Timer instance
671 * @retval None
672 */
LL_LPTIM_TrigSw(LPTIM_TypeDef * LPTIMx)673 __STATIC_INLINE void LL_LPTIM_TrigSw(LPTIM_TypeDef *LPTIMx)
674 {
675 CLEAR_BIT(LPTIMx->CFGR, LPTIM_CFGR_TRIGEN);
676 }
677
678 /**
679 * @brief Configure the external trigger used as a trigger event for the LPTIM.
680 * @note This function must be called when the LPTIM instance is disabled.
681 * @note An internal clock source must be present when a digital filter is
682 * required for the trigger.
683 * @rmtoll CFGR TRIGSEL LL_LPTIM_ConfigTrigger\n
684 * CFGR TRGFLT LL_LPTIM_ConfigTrigger\n
685 * CFGR TRIGEN LL_LPTIM_ConfigTrigger
686 * @param LPTIMx Low-Power Timer instance
687 * @param Source This parameter can be one of the following values:
688 * @arg @ref LL_LPTIM_TRIG_SOURCE_GPIO
689 * @arg @ref LL_LPTIM_TRIG_SOURCE_RTCALARMA
690 * @arg @ref LL_LPTIM_TRIG_SOURCE_RTCALARMB
691 * @arg @ref LL_LPTIM_TRIG_SOURCE_RTCTAMP1
692 * @arg @ref LL_LPTIM_TRIG_SOURCE_RTCTAMP2
693 * @arg @ref LL_LPTIM_TRIG_SOURCE_RTCTAMP3
694 * @arg @ref LL_LPTIM_TRIG_SOURCE_COMP1
695 * @arg @ref LL_LPTIM_TRIG_SOURCE_COMP2
696 * @param Filter This parameter can be one of the following values:
697 * @arg @ref LL_LPTIM_TRIG_FILTER_NONE
698 * @arg @ref LL_LPTIM_TRIG_FILTER_2
699 * @arg @ref LL_LPTIM_TRIG_FILTER_4
700 * @arg @ref LL_LPTIM_TRIG_FILTER_8
701 * @param Polarity This parameter can be one of the following values:
702 * @arg @ref LL_LPTIM_TRIG_POLARITY_RISING
703 * @arg @ref LL_LPTIM_TRIG_POLARITY_FALLING
704 * @arg @ref LL_LPTIM_TRIG_POLARITY_RISING_FALLING
705 * @retval None
706 */
LL_LPTIM_ConfigTrigger(LPTIM_TypeDef * LPTIMx,uint32_t Source,uint32_t Filter,uint32_t Polarity)707 __STATIC_INLINE void LL_LPTIM_ConfigTrigger(LPTIM_TypeDef *LPTIMx, uint32_t Source, uint32_t Filter, uint32_t Polarity)
708 {
709 MODIFY_REG(LPTIMx->CFGR, LPTIM_CFGR_TRIGSEL | LPTIM_CFGR_TRGFLT | LPTIM_CFGR_TRIGEN, Source | Filter | Polarity);
710 }
711
712 /**
713 * @brief Get actual external trigger source.
714 * @rmtoll CFGR TRIGSEL LL_LPTIM_GetTriggerSource
715 * @param LPTIMx Low-Power Timer instance
716 * @retval Returned value can be one of the following values:
717 * @arg @ref LL_LPTIM_TRIG_SOURCE_GPIO
718 * @arg @ref LL_LPTIM_TRIG_SOURCE_RTCALARMA
719 * @arg @ref LL_LPTIM_TRIG_SOURCE_RTCALARMB
720 * @arg @ref LL_LPTIM_TRIG_SOURCE_RTCTAMP1
721 * @arg @ref LL_LPTIM_TRIG_SOURCE_RTCTAMP2
722 * @arg @ref LL_LPTIM_TRIG_SOURCE_RTCTAMP3
723 * @arg @ref LL_LPTIM_TRIG_SOURCE_COMP1
724 * @arg @ref LL_LPTIM_TRIG_SOURCE_COMP2
725 */
LL_LPTIM_GetTriggerSource(const LPTIM_TypeDef * LPTIMx)726 __STATIC_INLINE uint32_t LL_LPTIM_GetTriggerSource(const LPTIM_TypeDef *LPTIMx)
727 {
728 return (uint32_t)(READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_TRIGSEL));
729 }
730
731 /**
732 * @brief Get actual external trigger filter.
733 * @rmtoll CFGR TRGFLT LL_LPTIM_GetTriggerFilter
734 * @param LPTIMx Low-Power Timer instance
735 * @retval Returned value can be one of the following values:
736 * @arg @ref LL_LPTIM_TRIG_FILTER_NONE
737 * @arg @ref LL_LPTIM_TRIG_FILTER_2
738 * @arg @ref LL_LPTIM_TRIG_FILTER_4
739 * @arg @ref LL_LPTIM_TRIG_FILTER_8
740 */
LL_LPTIM_GetTriggerFilter(const LPTIM_TypeDef * LPTIMx)741 __STATIC_INLINE uint32_t LL_LPTIM_GetTriggerFilter(const LPTIM_TypeDef *LPTIMx)
742 {
743 return (uint32_t)(READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_TRGFLT));
744 }
745
746 /**
747 * @brief Get actual external trigger polarity.
748 * @rmtoll CFGR TRIGEN LL_LPTIM_GetTriggerPolarity
749 * @param LPTIMx Low-Power Timer instance
750 * @retval Returned value can be one of the following values:
751 * @arg @ref LL_LPTIM_TRIG_POLARITY_RISING
752 * @arg @ref LL_LPTIM_TRIG_POLARITY_FALLING
753 * @arg @ref LL_LPTIM_TRIG_POLARITY_RISING_FALLING
754 */
LL_LPTIM_GetTriggerPolarity(const LPTIM_TypeDef * LPTIMx)755 __STATIC_INLINE uint32_t LL_LPTIM_GetTriggerPolarity(const LPTIM_TypeDef *LPTIMx)
756 {
757 return (uint32_t)(READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_TRIGEN));
758 }
759
760 /**
761 * @}
762 */
763
764 /** @defgroup LPTIM_LL_EF_Clock_Configuration Clock Configuration
765 * @{
766 */
767
768 /**
769 * @brief Set the source of the clock used by the LPTIM instance.
770 * @note This function must be called when the LPTIM instance is disabled.
771 * @rmtoll CFGR CKSEL LL_LPTIM_SetClockSource
772 * @param LPTIMx Low-Power Timer instance
773 * @param ClockSource This parameter can be one of the following values:
774 * @arg @ref LL_LPTIM_CLK_SOURCE_INTERNAL
775 * @arg @ref LL_LPTIM_CLK_SOURCE_EXTERNAL
776 * @retval None
777 */
LL_LPTIM_SetClockSource(LPTIM_TypeDef * LPTIMx,uint32_t ClockSource)778 __STATIC_INLINE void LL_LPTIM_SetClockSource(LPTIM_TypeDef *LPTIMx, uint32_t ClockSource)
779 {
780 MODIFY_REG(LPTIMx->CFGR, LPTIM_CFGR_CKSEL, ClockSource);
781 }
782
783 /**
784 * @brief Get actual LPTIM instance clock source.
785 * @rmtoll CFGR CKSEL LL_LPTIM_GetClockSource
786 * @param LPTIMx Low-Power Timer instance
787 * @retval Returned value can be one of the following values:
788 * @arg @ref LL_LPTIM_CLK_SOURCE_INTERNAL
789 * @arg @ref LL_LPTIM_CLK_SOURCE_EXTERNAL
790 */
LL_LPTIM_GetClockSource(const LPTIM_TypeDef * LPTIMx)791 __STATIC_INLINE uint32_t LL_LPTIM_GetClockSource(const LPTIM_TypeDef *LPTIMx)
792 {
793 return (uint32_t)(READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_CKSEL));
794 }
795
796 /**
797 * @brief Configure the active edge or edges used by the counter when
798 the LPTIM is clocked by an external clock source.
799 * @note This function must be called when the LPTIM instance is disabled.
800 * @note When both external clock signal edges are considered active ones,
801 * the LPTIM must also be clocked by an internal clock source with a
802 * frequency equal to at least four times the external clock frequency.
803 * @note An internal clock source must be present when a digital filter is
804 * required for external clock.
805 * @rmtoll CFGR CKFLT LL_LPTIM_ConfigClock\n
806 * CFGR CKPOL LL_LPTIM_ConfigClock
807 * @param LPTIMx Low-Power Timer instance
808 * @param ClockFilter This parameter can be one of the following values:
809 * @arg @ref LL_LPTIM_CLK_FILTER_NONE
810 * @arg @ref LL_LPTIM_CLK_FILTER_2
811 * @arg @ref LL_LPTIM_CLK_FILTER_4
812 * @arg @ref LL_LPTIM_CLK_FILTER_8
813 * @param ClockPolarity This parameter can be one of the following values:
814 * @arg @ref LL_LPTIM_CLK_POLARITY_RISING
815 * @arg @ref LL_LPTIM_CLK_POLARITY_FALLING
816 * @arg @ref LL_LPTIM_CLK_POLARITY_RISING_FALLING
817 * @retval None
818 */
LL_LPTIM_ConfigClock(LPTIM_TypeDef * LPTIMx,uint32_t ClockFilter,uint32_t ClockPolarity)819 __STATIC_INLINE void LL_LPTIM_ConfigClock(LPTIM_TypeDef *LPTIMx, uint32_t ClockFilter, uint32_t ClockPolarity)
820 {
821 MODIFY_REG(LPTIMx->CFGR, LPTIM_CFGR_CKFLT | LPTIM_CFGR_CKPOL, ClockFilter | ClockPolarity);
822 }
823
824 /**
825 * @brief Get actual clock polarity
826 * @rmtoll CFGR CKPOL LL_LPTIM_GetClockPolarity
827 * @param LPTIMx Low-Power Timer instance
828 * @retval Returned value can be one of the following values:
829 * @arg @ref LL_LPTIM_CLK_POLARITY_RISING
830 * @arg @ref LL_LPTIM_CLK_POLARITY_FALLING
831 * @arg @ref LL_LPTIM_CLK_POLARITY_RISING_FALLING
832 */
LL_LPTIM_GetClockPolarity(const LPTIM_TypeDef * LPTIMx)833 __STATIC_INLINE uint32_t LL_LPTIM_GetClockPolarity(const LPTIM_TypeDef *LPTIMx)
834 {
835 return (uint32_t)(READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_CKPOL));
836 }
837
838 /**
839 * @brief Get actual clock digital filter
840 * @rmtoll CFGR CKFLT LL_LPTIM_GetClockFilter
841 * @param LPTIMx Low-Power Timer instance
842 * @retval Returned value can be one of the following values:
843 * @arg @ref LL_LPTIM_CLK_FILTER_NONE
844 * @arg @ref LL_LPTIM_CLK_FILTER_2
845 * @arg @ref LL_LPTIM_CLK_FILTER_4
846 * @arg @ref LL_LPTIM_CLK_FILTER_8
847 */
LL_LPTIM_GetClockFilter(const LPTIM_TypeDef * LPTIMx)848 __STATIC_INLINE uint32_t LL_LPTIM_GetClockFilter(const LPTIM_TypeDef *LPTIMx)
849 {
850 return (uint32_t)(READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_CKFLT));
851 }
852
853 /**
854 * @}
855 */
856
857 /** @defgroup LPTIM_LL_EF_Encoder_Mode Encoder Mode
858 * @{
859 */
860
861 /**
862 * @brief Configure the encoder mode.
863 * @note This function must be called when the LPTIM instance is disabled.
864 * @rmtoll CFGR CKPOL LL_LPTIM_SetEncoderMode
865 * @param LPTIMx Low-Power Timer instance
866 * @param EncoderMode This parameter can be one of the following values:
867 * @arg @ref LL_LPTIM_ENCODER_MODE_RISING
868 * @arg @ref LL_LPTIM_ENCODER_MODE_FALLING
869 * @arg @ref LL_LPTIM_ENCODER_MODE_RISING_FALLING
870 * @retval None
871 */
LL_LPTIM_SetEncoderMode(LPTIM_TypeDef * LPTIMx,uint32_t EncoderMode)872 __STATIC_INLINE void LL_LPTIM_SetEncoderMode(LPTIM_TypeDef *LPTIMx, uint32_t EncoderMode)
873 {
874 MODIFY_REG(LPTIMx->CFGR, LPTIM_CFGR_CKPOL, EncoderMode);
875 }
876
877 /**
878 * @brief Get actual encoder mode.
879 * @rmtoll CFGR CKPOL LL_LPTIM_GetEncoderMode
880 * @param LPTIMx Low-Power Timer instance
881 * @retval Returned value can be one of the following values:
882 * @arg @ref LL_LPTIM_ENCODER_MODE_RISING
883 * @arg @ref LL_LPTIM_ENCODER_MODE_FALLING
884 * @arg @ref LL_LPTIM_ENCODER_MODE_RISING_FALLING
885 */
LL_LPTIM_GetEncoderMode(const LPTIM_TypeDef * LPTIMx)886 __STATIC_INLINE uint32_t LL_LPTIM_GetEncoderMode(const LPTIM_TypeDef *LPTIMx)
887 {
888 return (uint32_t)(READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_CKPOL));
889 }
890
891 /**
892 * @brief Enable the encoder mode
893 * @note This function must be called when the LPTIM instance is disabled.
894 * @note In this mode the LPTIM instance must be clocked by an internal clock
895 * source. Also, the prescaler division ratio must be equal to 1.
896 * @note LPTIM instance must be configured in continuous mode prior enabling
897 * the encoder mode.
898 * @rmtoll CFGR ENC LL_LPTIM_EnableEncoderMode
899 * @param LPTIMx Low-Power Timer instance
900 * @retval None
901 */
LL_LPTIM_EnableEncoderMode(LPTIM_TypeDef * LPTIMx)902 __STATIC_INLINE void LL_LPTIM_EnableEncoderMode(LPTIM_TypeDef *LPTIMx)
903 {
904 SET_BIT(LPTIMx->CFGR, LPTIM_CFGR_ENC);
905 }
906
907 /**
908 * @brief Disable the encoder mode
909 * @note This function must be called when the LPTIM instance is disabled.
910 * @rmtoll CFGR ENC LL_LPTIM_DisableEncoderMode
911 * @param LPTIMx Low-Power Timer instance
912 * @retval None
913 */
LL_LPTIM_DisableEncoderMode(LPTIM_TypeDef * LPTIMx)914 __STATIC_INLINE void LL_LPTIM_DisableEncoderMode(LPTIM_TypeDef *LPTIMx)
915 {
916 CLEAR_BIT(LPTIMx->CFGR, LPTIM_CFGR_ENC);
917 }
918
919 /**
920 * @brief Indicates whether the LPTIM operates in encoder mode.
921 * @rmtoll CFGR ENC LL_LPTIM_IsEnabledEncoderMode
922 * @param LPTIMx Low-Power Timer instance
923 * @retval State of bit (1 or 0).
924 */
LL_LPTIM_IsEnabledEncoderMode(const LPTIM_TypeDef * LPTIMx)925 __STATIC_INLINE uint32_t LL_LPTIM_IsEnabledEncoderMode(const LPTIM_TypeDef *LPTIMx)
926 {
927 return (((READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_ENC) == LPTIM_CFGR_ENC) ? 1UL : 0UL));
928 }
929
930 /**
931 * @}
932 */
933
934 /** @defgroup LPTIM_LL_EF_FLAG_Management FLAG Management
935 * @{
936 */
937
938 /**
939 * @brief Clear the compare match flag (CMPMCF)
940 * @rmtoll ICR CMPMCF LL_LPTIM_ClearFLAG_CMPM
941 * @param LPTIMx Low-Power Timer instance
942 * @retval None
943 */
LL_LPTIM_ClearFLAG_CMPM(LPTIM_TypeDef * LPTIMx)944 __STATIC_INLINE void LL_LPTIM_ClearFLAG_CMPM(LPTIM_TypeDef *LPTIMx)
945 {
946 SET_BIT(LPTIMx->ICR, LPTIM_ICR_CMPMCF);
947 }
948
949 /**
950 * @brief Inform application whether a compare match interrupt has occurred.
951 * @rmtoll ISR CMPM LL_LPTIM_IsActiveFlag_CMPM
952 * @param LPTIMx Low-Power Timer instance
953 * @retval State of bit (1 or 0).
954 */
LL_LPTIM_IsActiveFlag_CMPM(const LPTIM_TypeDef * LPTIMx)955 __STATIC_INLINE uint32_t LL_LPTIM_IsActiveFlag_CMPM(const LPTIM_TypeDef *LPTIMx)
956 {
957 return (((READ_BIT(LPTIMx->ISR, LPTIM_ISR_CMPM) == LPTIM_ISR_CMPM) ? 1UL : 0UL));
958 }
959
960 /**
961 * @brief Clear the autoreload match flag (ARRMCF)
962 * @rmtoll ICR ARRMCF LL_LPTIM_ClearFLAG_ARRM
963 * @param LPTIMx Low-Power Timer instance
964 * @retval None
965 */
LL_LPTIM_ClearFLAG_ARRM(LPTIM_TypeDef * LPTIMx)966 __STATIC_INLINE void LL_LPTIM_ClearFLAG_ARRM(LPTIM_TypeDef *LPTIMx)
967 {
968 SET_BIT(LPTIMx->ICR, LPTIM_ICR_ARRMCF);
969 }
970
971 /**
972 * @brief Inform application whether a autoreload match interrupt has occurred.
973 * @rmtoll ISR ARRM LL_LPTIM_IsActiveFlag_ARRM
974 * @param LPTIMx Low-Power Timer instance
975 * @retval State of bit (1 or 0).
976 */
LL_LPTIM_IsActiveFlag_ARRM(const LPTIM_TypeDef * LPTIMx)977 __STATIC_INLINE uint32_t LL_LPTIM_IsActiveFlag_ARRM(const LPTIM_TypeDef *LPTIMx)
978 {
979 return (((READ_BIT(LPTIMx->ISR, LPTIM_ISR_ARRM) == LPTIM_ISR_ARRM) ? 1UL : 0UL));
980 }
981
982 /**
983 * @brief Clear the external trigger valid edge flag(EXTTRIGCF).
984 * @rmtoll ICR EXTTRIGCF LL_LPTIM_ClearFlag_EXTTRIG
985 * @param LPTIMx Low-Power Timer instance
986 * @retval None
987 */
LL_LPTIM_ClearFlag_EXTTRIG(LPTIM_TypeDef * LPTIMx)988 __STATIC_INLINE void LL_LPTIM_ClearFlag_EXTTRIG(LPTIM_TypeDef *LPTIMx)
989 {
990 SET_BIT(LPTIMx->ICR, LPTIM_ICR_EXTTRIGCF);
991 }
992
993 /**
994 * @brief Inform application whether a valid edge on the selected external trigger input has occurred.
995 * @rmtoll ISR EXTTRIG LL_LPTIM_IsActiveFlag_EXTTRIG
996 * @param LPTIMx Low-Power Timer instance
997 * @retval State of bit (1 or 0).
998 */
LL_LPTIM_IsActiveFlag_EXTTRIG(const LPTIM_TypeDef * LPTIMx)999 __STATIC_INLINE uint32_t LL_LPTIM_IsActiveFlag_EXTTRIG(const LPTIM_TypeDef *LPTIMx)
1000 {
1001 return (((READ_BIT(LPTIMx->ISR, LPTIM_ISR_EXTTRIG) == LPTIM_ISR_EXTTRIG) ? 1UL : 0UL));
1002 }
1003
1004 /**
1005 * @brief Clear the compare register update interrupt flag (CMPOKCF).
1006 * @rmtoll ICR CMPOKCF LL_LPTIM_ClearFlag_CMPOK
1007 * @param LPTIMx Low-Power Timer instance
1008 * @retval None
1009 */
LL_LPTIM_ClearFlag_CMPOK(LPTIM_TypeDef * LPTIMx)1010 __STATIC_INLINE void LL_LPTIM_ClearFlag_CMPOK(LPTIM_TypeDef *LPTIMx)
1011 {
1012 SET_BIT(LPTIMx->ICR, LPTIM_ICR_CMPOKCF);
1013 }
1014
1015 /**
1016 * @brief Informs application whether the APB bus write operation to the LPTIMx_CMP register has been successfully
1017 completed. If so, a new one can be initiated.
1018 * @rmtoll ISR CMPOK LL_LPTIM_IsActiveFlag_CMPOK
1019 * @param LPTIMx Low-Power Timer instance
1020 * @retval State of bit (1 or 0).
1021 */
LL_LPTIM_IsActiveFlag_CMPOK(const LPTIM_TypeDef * LPTIMx)1022 __STATIC_INLINE uint32_t LL_LPTIM_IsActiveFlag_CMPOK(const LPTIM_TypeDef *LPTIMx)
1023 {
1024 return (((READ_BIT(LPTIMx->ISR, LPTIM_ISR_CMPOK) == LPTIM_ISR_CMPOK) ? 1UL : 0UL));
1025 }
1026
1027 /**
1028 * @brief Clear the autoreload register update interrupt flag (ARROKCF).
1029 * @rmtoll ICR ARROKCF LL_LPTIM_ClearFlag_ARROK
1030 * @param LPTIMx Low-Power Timer instance
1031 * @retval None
1032 */
LL_LPTIM_ClearFlag_ARROK(LPTIM_TypeDef * LPTIMx)1033 __STATIC_INLINE void LL_LPTIM_ClearFlag_ARROK(LPTIM_TypeDef *LPTIMx)
1034 {
1035 SET_BIT(LPTIMx->ICR, LPTIM_ICR_ARROKCF);
1036 }
1037
1038 /**
1039 * @brief Informs application whether the APB bus write operation to the LPTIMx_ARR register has been successfully
1040 completed. If so, a new one can be initiated.
1041 * @rmtoll ISR ARROK LL_LPTIM_IsActiveFlag_ARROK
1042 * @param LPTIMx Low-Power Timer instance
1043 * @retval State of bit (1 or 0).
1044 */
LL_LPTIM_IsActiveFlag_ARROK(const LPTIM_TypeDef * LPTIMx)1045 __STATIC_INLINE uint32_t LL_LPTIM_IsActiveFlag_ARROK(const LPTIM_TypeDef *LPTIMx)
1046 {
1047 return (((READ_BIT(LPTIMx->ISR, LPTIM_ISR_ARROK) == LPTIM_ISR_ARROK) ? 1UL : 0UL));
1048 }
1049
1050 /**
1051 * @brief Clear the counter direction change to up interrupt flag (UPCF).
1052 * @rmtoll ICR UPCF LL_LPTIM_ClearFlag_UP
1053 * @param LPTIMx Low-Power Timer instance
1054 * @retval None
1055 */
LL_LPTIM_ClearFlag_UP(LPTIM_TypeDef * LPTIMx)1056 __STATIC_INLINE void LL_LPTIM_ClearFlag_UP(LPTIM_TypeDef *LPTIMx)
1057 {
1058 SET_BIT(LPTIMx->ICR, LPTIM_ICR_UPCF);
1059 }
1060
1061 /**
1062 * @brief Informs the application whether the counter direction has changed from down to up (when the LPTIM instance
1063 operates in encoder mode).
1064 * @rmtoll ISR UP LL_LPTIM_IsActiveFlag_UP
1065 * @param LPTIMx Low-Power Timer instance
1066 * @retval State of bit (1 or 0).
1067 */
LL_LPTIM_IsActiveFlag_UP(const LPTIM_TypeDef * LPTIMx)1068 __STATIC_INLINE uint32_t LL_LPTIM_IsActiveFlag_UP(const LPTIM_TypeDef *LPTIMx)
1069 {
1070 return (((READ_BIT(LPTIMx->ISR, LPTIM_ISR_UP) == LPTIM_ISR_UP) ? 1UL : 0UL));
1071 }
1072
1073 /**
1074 * @brief Clear the counter direction change to down interrupt flag (DOWNCF).
1075 * @rmtoll ICR DOWNCF LL_LPTIM_ClearFlag_DOWN
1076 * @param LPTIMx Low-Power Timer instance
1077 * @retval None
1078 */
LL_LPTIM_ClearFlag_DOWN(LPTIM_TypeDef * LPTIMx)1079 __STATIC_INLINE void LL_LPTIM_ClearFlag_DOWN(LPTIM_TypeDef *LPTIMx)
1080 {
1081 SET_BIT(LPTIMx->ICR, LPTIM_ICR_DOWNCF);
1082 }
1083
1084 /**
1085 * @brief Informs the application whether the counter direction has changed from up to down (when the LPTIM instance
1086 operates in encoder mode).
1087 * @rmtoll ISR DOWN LL_LPTIM_IsActiveFlag_DOWN
1088 * @param LPTIMx Low-Power Timer instance
1089 * @retval State of bit (1 or 0).
1090 */
LL_LPTIM_IsActiveFlag_DOWN(const LPTIM_TypeDef * LPTIMx)1091 __STATIC_INLINE uint32_t LL_LPTIM_IsActiveFlag_DOWN(const LPTIM_TypeDef *LPTIMx)
1092 {
1093 return (((READ_BIT(LPTIMx->ISR, LPTIM_ISR_DOWN) == LPTIM_ISR_DOWN) ? 1UL : 0UL));
1094 }
1095
1096 /**
1097 * @}
1098 */
1099
1100 /** @defgroup LPTIM_LL_EF_IT_Management Interrupt Management
1101 * @{
1102 */
1103
1104 /**
1105 * @brief Enable compare match interrupt (CMPMIE).
1106 * @rmtoll IER CMPMIE LL_LPTIM_EnableIT_CMPM
1107 * @param LPTIMx Low-Power Timer instance
1108 * @retval None
1109 */
LL_LPTIM_EnableIT_CMPM(LPTIM_TypeDef * LPTIMx)1110 __STATIC_INLINE void LL_LPTIM_EnableIT_CMPM(LPTIM_TypeDef *LPTIMx)
1111 {
1112 SET_BIT(LPTIMx->IER, LPTIM_IER_CMPMIE);
1113 }
1114
1115 /**
1116 * @brief Disable compare match interrupt (CMPMIE).
1117 * @rmtoll IER CMPMIE LL_LPTIM_DisableIT_CMPM
1118 * @param LPTIMx Low-Power Timer instance
1119 * @retval None
1120 */
LL_LPTIM_DisableIT_CMPM(LPTIM_TypeDef * LPTIMx)1121 __STATIC_INLINE void LL_LPTIM_DisableIT_CMPM(LPTIM_TypeDef *LPTIMx)
1122 {
1123 CLEAR_BIT(LPTIMx->IER, LPTIM_IER_CMPMIE);
1124 }
1125
1126 /**
1127 * @brief Indicates whether the compare match interrupt (CMPMIE) is enabled.
1128 * @rmtoll IER CMPMIE LL_LPTIM_IsEnabledIT_CMPM
1129 * @param LPTIMx Low-Power Timer instance
1130 * @retval State of bit (1 or 0).
1131 */
LL_LPTIM_IsEnabledIT_CMPM(const LPTIM_TypeDef * LPTIMx)1132 __STATIC_INLINE uint32_t LL_LPTIM_IsEnabledIT_CMPM(const LPTIM_TypeDef *LPTIMx)
1133 {
1134 return (((READ_BIT(LPTIMx->IER, LPTIM_IER_CMPMIE) == LPTIM_IER_CMPMIE) ? 1UL : 0UL));
1135 }
1136
1137 /**
1138 * @brief Enable autoreload match interrupt (ARRMIE).
1139 * @rmtoll IER ARRMIE LL_LPTIM_EnableIT_ARRM
1140 * @param LPTIMx Low-Power Timer instance
1141 * @retval None
1142 */
LL_LPTIM_EnableIT_ARRM(LPTIM_TypeDef * LPTIMx)1143 __STATIC_INLINE void LL_LPTIM_EnableIT_ARRM(LPTIM_TypeDef *LPTIMx)
1144 {
1145 SET_BIT(LPTIMx->IER, LPTIM_IER_ARRMIE);
1146 }
1147
1148 /**
1149 * @brief Disable autoreload match interrupt (ARRMIE).
1150 * @rmtoll IER ARRMIE LL_LPTIM_DisableIT_ARRM
1151 * @param LPTIMx Low-Power Timer instance
1152 * @retval None
1153 */
LL_LPTIM_DisableIT_ARRM(LPTIM_TypeDef * LPTIMx)1154 __STATIC_INLINE void LL_LPTIM_DisableIT_ARRM(LPTIM_TypeDef *LPTIMx)
1155 {
1156 CLEAR_BIT(LPTIMx->IER, LPTIM_IER_ARRMIE);
1157 }
1158
1159 /**
1160 * @brief Indicates whether the autoreload match interrupt (ARRMIE) is enabled.
1161 * @rmtoll IER ARRMIE LL_LPTIM_IsEnabledIT_ARRM
1162 * @param LPTIMx Low-Power Timer instance
1163 * @retval State of bit (1 or 0).
1164 */
LL_LPTIM_IsEnabledIT_ARRM(const LPTIM_TypeDef * LPTIMx)1165 __STATIC_INLINE uint32_t LL_LPTIM_IsEnabledIT_ARRM(const LPTIM_TypeDef *LPTIMx)
1166 {
1167 return (((READ_BIT(LPTIMx->IER, LPTIM_IER_ARRMIE) == LPTIM_IER_ARRMIE) ? 1UL : 0UL));
1168 }
1169
1170 /**
1171 * @brief Enable external trigger valid edge interrupt (EXTTRIGIE).
1172 * @rmtoll IER EXTTRIGIE LL_LPTIM_EnableIT_EXTTRIG
1173 * @param LPTIMx Low-Power Timer instance
1174 * @retval None
1175 */
LL_LPTIM_EnableIT_EXTTRIG(LPTIM_TypeDef * LPTIMx)1176 __STATIC_INLINE void LL_LPTIM_EnableIT_EXTTRIG(LPTIM_TypeDef *LPTIMx)
1177 {
1178 SET_BIT(LPTIMx->IER, LPTIM_IER_EXTTRIGIE);
1179 }
1180
1181 /**
1182 * @brief Disable external trigger valid edge interrupt (EXTTRIGIE).
1183 * @rmtoll IER EXTTRIGIE LL_LPTIM_DisableIT_EXTTRIG
1184 * @param LPTIMx Low-Power Timer instance
1185 * @retval None
1186 */
LL_LPTIM_DisableIT_EXTTRIG(LPTIM_TypeDef * LPTIMx)1187 __STATIC_INLINE void LL_LPTIM_DisableIT_EXTTRIG(LPTIM_TypeDef *LPTIMx)
1188 {
1189 CLEAR_BIT(LPTIMx->IER, LPTIM_IER_EXTTRIGIE);
1190 }
1191
1192 /**
1193 * @brief Indicates external trigger valid edge interrupt (EXTTRIGIE) is enabled.
1194 * @rmtoll IER EXTTRIGIE LL_LPTIM_IsEnabledIT_EXTTRIG
1195 * @param LPTIMx Low-Power Timer instance
1196 * @retval State of bit (1 or 0).
1197 */
LL_LPTIM_IsEnabledIT_EXTTRIG(const LPTIM_TypeDef * LPTIMx)1198 __STATIC_INLINE uint32_t LL_LPTIM_IsEnabledIT_EXTTRIG(const LPTIM_TypeDef *LPTIMx)
1199 {
1200 return (((READ_BIT(LPTIMx->IER, LPTIM_IER_EXTTRIGIE) == LPTIM_IER_EXTTRIGIE) ? 1UL : 0UL));
1201 }
1202
1203 /**
1204 * @brief Enable compare register write completed interrupt (CMPOKIE).
1205 * @rmtoll IER CMPOKIE LL_LPTIM_EnableIT_CMPOK
1206 * @param LPTIMx Low-Power Timer instance
1207 * @retval None
1208 */
LL_LPTIM_EnableIT_CMPOK(LPTIM_TypeDef * LPTIMx)1209 __STATIC_INLINE void LL_LPTIM_EnableIT_CMPOK(LPTIM_TypeDef *LPTIMx)
1210 {
1211 SET_BIT(LPTIMx->IER, LPTIM_IER_CMPOKIE);
1212 }
1213
1214 /**
1215 * @brief Disable compare register write completed interrupt (CMPOKIE).
1216 * @rmtoll IER CMPOKIE LL_LPTIM_DisableIT_CMPOK
1217 * @param LPTIMx Low-Power Timer instance
1218 * @retval None
1219 */
LL_LPTIM_DisableIT_CMPOK(LPTIM_TypeDef * LPTIMx)1220 __STATIC_INLINE void LL_LPTIM_DisableIT_CMPOK(LPTIM_TypeDef *LPTIMx)
1221 {
1222 CLEAR_BIT(LPTIMx->IER, LPTIM_IER_CMPOKIE);
1223 }
1224
1225 /**
1226 * @brief Indicates whether the compare register write completed interrupt (CMPOKIE) is enabled.
1227 * @rmtoll IER CMPOKIE LL_LPTIM_IsEnabledIT_CMPOK
1228 * @param LPTIMx Low-Power Timer instance
1229 * @retval State of bit (1 or 0).
1230 */
LL_LPTIM_IsEnabledIT_CMPOK(const LPTIM_TypeDef * LPTIMx)1231 __STATIC_INLINE uint32_t LL_LPTIM_IsEnabledIT_CMPOK(const LPTIM_TypeDef *LPTIMx)
1232 {
1233 return (((READ_BIT(LPTIMx->IER, LPTIM_IER_CMPOKIE) == LPTIM_IER_CMPOKIE) ? 1UL : 0UL));
1234 }
1235
1236 /**
1237 * @brief Enable autoreload register write completed interrupt (ARROKIE).
1238 * @rmtoll IER ARROKIE LL_LPTIM_EnableIT_ARROK
1239 * @param LPTIMx Low-Power Timer instance
1240 * @retval None
1241 */
LL_LPTIM_EnableIT_ARROK(LPTIM_TypeDef * LPTIMx)1242 __STATIC_INLINE void LL_LPTIM_EnableIT_ARROK(LPTIM_TypeDef *LPTIMx)
1243 {
1244 SET_BIT(LPTIMx->IER, LPTIM_IER_ARROKIE);
1245 }
1246
1247 /**
1248 * @brief Disable autoreload register write completed interrupt (ARROKIE).
1249 * @rmtoll IER ARROKIE LL_LPTIM_DisableIT_ARROK
1250 * @param LPTIMx Low-Power Timer instance
1251 * @retval None
1252 */
LL_LPTIM_DisableIT_ARROK(LPTIM_TypeDef * LPTIMx)1253 __STATIC_INLINE void LL_LPTIM_DisableIT_ARROK(LPTIM_TypeDef *LPTIMx)
1254 {
1255 CLEAR_BIT(LPTIMx->IER, LPTIM_IER_ARROKIE);
1256 }
1257
1258 /**
1259 * @brief Indicates whether the autoreload register write completed interrupt (ARROKIE) is enabled.
1260 * @rmtoll IER ARROKIE LL_LPTIM_IsEnabledIT_ARROK
1261 * @param LPTIMx Low-Power Timer instance
1262 * @retval State of bit(1 or 0).
1263 */
LL_LPTIM_IsEnabledIT_ARROK(const LPTIM_TypeDef * LPTIMx)1264 __STATIC_INLINE uint32_t LL_LPTIM_IsEnabledIT_ARROK(const LPTIM_TypeDef *LPTIMx)
1265 {
1266 return (((READ_BIT(LPTIMx->IER, LPTIM_IER_ARROKIE) == LPTIM_IER_ARROKIE) ? 1UL : 0UL));
1267 }
1268
1269 /**
1270 * @brief Enable direction change to up interrupt (UPIE).
1271 * @rmtoll IER UPIE LL_LPTIM_EnableIT_UP
1272 * @param LPTIMx Low-Power Timer instance
1273 * @retval None
1274 */
LL_LPTIM_EnableIT_UP(LPTIM_TypeDef * LPTIMx)1275 __STATIC_INLINE void LL_LPTIM_EnableIT_UP(LPTIM_TypeDef *LPTIMx)
1276 {
1277 SET_BIT(LPTIMx->IER, LPTIM_IER_UPIE);
1278 }
1279
1280 /**
1281 * @brief Disable direction change to up interrupt (UPIE).
1282 * @rmtoll IER UPIE LL_LPTIM_DisableIT_UP
1283 * @param LPTIMx Low-Power Timer instance
1284 * @retval None
1285 */
LL_LPTIM_DisableIT_UP(LPTIM_TypeDef * LPTIMx)1286 __STATIC_INLINE void LL_LPTIM_DisableIT_UP(LPTIM_TypeDef *LPTIMx)
1287 {
1288 CLEAR_BIT(LPTIMx->IER, LPTIM_IER_UPIE);
1289 }
1290
1291 /**
1292 * @brief Indicates whether the direction change to up interrupt (UPIE) is enabled.
1293 * @rmtoll IER UPIE LL_LPTIM_IsEnabledIT_UP
1294 * @param LPTIMx Low-Power Timer instance
1295 * @retval State of bit(1 or 0).
1296 */
LL_LPTIM_IsEnabledIT_UP(const LPTIM_TypeDef * LPTIMx)1297 __STATIC_INLINE uint32_t LL_LPTIM_IsEnabledIT_UP(const LPTIM_TypeDef *LPTIMx)
1298 {
1299 return (((READ_BIT(LPTIMx->IER, LPTIM_IER_UPIE) == LPTIM_IER_UPIE) ? 1UL : 0UL));
1300 }
1301
1302 /**
1303 * @brief Enable direction change to down interrupt (DOWNIE).
1304 * @rmtoll IER DOWNIE LL_LPTIM_EnableIT_DOWN
1305 * @param LPTIMx Low-Power Timer instance
1306 * @retval None
1307 */
LL_LPTIM_EnableIT_DOWN(LPTIM_TypeDef * LPTIMx)1308 __STATIC_INLINE void LL_LPTIM_EnableIT_DOWN(LPTIM_TypeDef *LPTIMx)
1309 {
1310 SET_BIT(LPTIMx->IER, LPTIM_IER_DOWNIE);
1311 }
1312
1313 /**
1314 * @brief Disable direction change to down interrupt (DOWNIE).
1315 * @rmtoll IER DOWNIE LL_LPTIM_DisableIT_DOWN
1316 * @param LPTIMx Low-Power Timer instance
1317 * @retval None
1318 */
LL_LPTIM_DisableIT_DOWN(LPTIM_TypeDef * LPTIMx)1319 __STATIC_INLINE void LL_LPTIM_DisableIT_DOWN(LPTIM_TypeDef *LPTIMx)
1320 {
1321 CLEAR_BIT(LPTIMx->IER, LPTIM_IER_DOWNIE);
1322 }
1323
1324 /**
1325 * @brief Indicates whether the direction change to down interrupt (DOWNIE) is enabled.
1326 * @rmtoll IER DOWNIE LL_LPTIM_IsEnabledIT_DOWN
1327 * @param LPTIMx Low-Power Timer instance
1328 * @retval State of bit(1 or 0).
1329 */
LL_LPTIM_IsEnabledIT_DOWN(const LPTIM_TypeDef * LPTIMx)1330 __STATIC_INLINE uint32_t LL_LPTIM_IsEnabledIT_DOWN(const LPTIM_TypeDef *LPTIMx)
1331 {
1332 return ((READ_BIT(LPTIMx->IER, LPTIM_IER_DOWNIE) == LPTIM_IER_DOWNIE) ? 1UL : 0UL);
1333 }
1334
1335 /**
1336 * @}
1337 */
1338
1339 /**
1340 * @}
1341 */
1342
1343 /**
1344 * @}
1345 */
1346
1347 #endif /* LPTIM1 */
1348
1349 /**
1350 * @}
1351 */
1352
1353 #ifdef __cplusplus
1354 }
1355 #endif
1356
1357 #endif /* STM32F7xx_LL_LPTIM_H */
1358
