1 /** 2 ****************************************************************************** 3 * @file stm32f7xx_hal_spdifrx.h 4 * @author MCD Application Team 5 * @brief Header file of SPDIFRX HAL module. 6 ****************************************************************************** 7 * @attention 8 * 9 * Copyright (c) 2017 STMicroelectronics. 10 * All rights reserved. 11 * 12 * This software is licensed under terms that can be found in the LICENSE file 13 * in the root directory of this software component. 14 * If no LICENSE file comes with this software, it is provided AS-IS. 15 * 16 ****************************************************************************** 17 */ 18 19 /* Define to prevent recursive inclusion -------------------------------------*/ 20 #ifndef STM32F7xx_HAL_SPDIFRX_H 21 #define STM32F7xx_HAL_SPDIFRX_H 22 23 #ifdef __cplusplus 24 extern "C" { 25 #endif 26 27 /* Includes ------------------------------------------------------------------*/ 28 #include "stm32f7xx_hal_def.h" 29 30 31 /** @addtogroup STM32F7xx_HAL_Driver 32 * @{ 33 */ 34 #if defined (SPDIFRX) 35 36 /** @addtogroup SPDIFRX 37 * @{ 38 */ 39 40 /* Exported types ------------------------------------------------------------*/ 41 /** @defgroup SPDIFRX_Exported_Types SPDIFRX Exported Types 42 * @{ 43 */ 44 45 /** 46 * @brief SPDIFRX Init structure definition 47 */ 48 typedef struct 49 { 50 uint32_t InputSelection; /*!< Specifies the SPDIF input selection. 51 This parameter can be a value of @ref SPDIFRX_Input_Selection */ 52 53 uint32_t Retries; /*!< Specifies the Maximum allowed re-tries during synchronization phase. 54 This parameter can be a value of @ref SPDIFRX_Max_Retries */ 55 56 uint32_t WaitForActivity; /*!< Specifies the wait for activity on SPDIF selected input. 57 This parameter can be a value of @ref SPDIFRX_Wait_For_Activity. */ 58 59 uint32_t ChannelSelection; /*!< Specifies whether the control flow will take the channel status from channel A or B. 60 This parameter can be a value of @ref SPDIFRX_Channel_Selection */ 61 62 uint32_t DataFormat; /*!< Specifies the Data samples format (LSB, MSB, ...). 63 This parameter can be a value of @ref SPDIFRX_Data_Format */ 64 65 uint32_t StereoMode; /*!< Specifies whether the peripheral is in stereo or mono mode. 66 This parameter can be a value of @ref SPDIFRX_Stereo_Mode */ 67 68 uint32_t PreambleTypeMask; /*!< Specifies whether The preamble type bits are copied or not into the received frame. 69 This parameter can be a value of @ref SPDIFRX_PT_Mask */ 70 71 uint32_t ChannelStatusMask; /*!< Specifies whether the channel status and user bits are copied or not into the received frame. 72 This parameter can be a value of @ref SPDIFRX_ChannelStatus_Mask */ 73 74 uint32_t ValidityBitMask; /*!< Specifies whether the validity bit is copied or not into the received frame. 75 This parameter can be a value of @ref SPDIFRX_V_Mask */ 76 77 uint32_t ParityErrorMask; /*!< Specifies whether the parity error bit is copied or not into the received frame. 78 This parameter can be a value of @ref SPDIFRX_PE_Mask */ 79 } SPDIFRX_InitTypeDef; 80 81 /** 82 * @brief SPDIFRX SetDataFormat structure definition 83 */ 84 typedef struct 85 { 86 uint32_t DataFormat; /*!< Specifies the Data samples format (LSB, MSB, ...). 87 This parameter can be a value of @ref SPDIFRX_Data_Format */ 88 89 uint32_t StereoMode; /*!< Specifies whether the peripheral is in stereo or mono mode. 90 This parameter can be a value of @ref SPDIFRX_Stereo_Mode */ 91 92 uint32_t PreambleTypeMask; /*!< Specifies whether The preamble type bits are copied or not into the received frame. 93 This parameter can be a value of @ref SPDIFRX_PT_Mask */ 94 95 uint32_t ChannelStatusMask; /*!< Specifies whether the channel status and user bits are copied or not into the received frame. 96 This parameter can be a value of @ref SPDIFRX_ChannelStatus_Mask */ 97 98 uint32_t ValidityBitMask; /*!< Specifies whether the validity bit is copied or not into the received frame. 99 This parameter can be a value of @ref SPDIFRX_V_Mask */ 100 101 uint32_t ParityErrorMask; /*!< Specifies whether the parity error bit is copied or not into the received frame. 102 This parameter can be a value of @ref SPDIFRX_PE_Mask */ 103 104 } SPDIFRX_SetDataFormatTypeDef; 105 106 /** 107 * @brief HAL State structures definition 108 */ 109 typedef enum 110 { 111 HAL_SPDIFRX_STATE_RESET = 0x00U, /*!< SPDIFRX not yet initialized or disabled */ 112 HAL_SPDIFRX_STATE_READY = 0x01U, /*!< SPDIFRX initialized and ready for use */ 113 HAL_SPDIFRX_STATE_BUSY = 0x02U, /*!< SPDIFRX internal process is ongoing */ 114 HAL_SPDIFRX_STATE_BUSY_RX = 0x03U, /*!< SPDIFRX internal Data Flow RX process is ongoing */ 115 HAL_SPDIFRX_STATE_BUSY_CX = 0x04U, /*!< SPDIFRX internal Control Flow RX process is ongoing */ 116 HAL_SPDIFRX_STATE_ERROR = 0x07U /*!< SPDIFRX error state */ 117 } HAL_SPDIFRX_StateTypeDef; 118 119 /** 120 * @brief SPDIFRX handle Structure definition 121 */ 122 #if (USE_HAL_SPDIFRX_REGISTER_CALLBACKS == 1) 123 typedef struct __SPDIFRX_HandleTypeDef 124 #else 125 typedef struct 126 #endif /* USE_HAL_SPDIFRX_REGISTER_CALLBACKS */ 127 { 128 SPDIFRX_TypeDef *Instance; /* SPDIFRX registers base address */ 129 130 SPDIFRX_InitTypeDef Init; /* SPDIFRX communication parameters */ 131 132 uint32_t *pRxBuffPtr; /* Pointer to SPDIFRX Rx transfer buffer */ 133 134 uint32_t *pCsBuffPtr; /* Pointer to SPDIFRX Cx transfer buffer */ 135 136 __IO uint16_t RxXferSize; /* SPDIFRX Rx transfer size */ 137 138 __IO uint16_t RxXferCount; /* SPDIFRX Rx transfer counter 139 (This field is initialized at the 140 same value as transfer size at the 141 beginning of the transfer and 142 decremented when a sample is received. 143 NbSamplesReceived = RxBufferSize-RxBufferCount) */ 144 145 __IO uint16_t CsXferSize; /* SPDIFRX Rx transfer size */ 146 147 __IO uint16_t CsXferCount; /* SPDIFRX Rx transfer counter 148 (This field is initialized at the 149 same value as transfer size at the 150 beginning of the transfer and 151 decremented when a sample is received. 152 NbSamplesReceived = RxBufferSize-RxBufferCount) */ 153 154 DMA_HandleTypeDef *hdmaCsRx; /* SPDIFRX EC60958_channel_status and user_information DMA handle parameters */ 155 156 DMA_HandleTypeDef *hdmaDrRx; /* SPDIFRX Rx DMA handle parameters */ 157 158 __IO HAL_LockTypeDef Lock; /* SPDIFRX locking object */ 159 160 __IO HAL_SPDIFRX_StateTypeDef State; /* SPDIFRX communication state */ 161 162 __IO uint32_t ErrorCode; /* SPDIFRX Error code */ 163 164 #if (USE_HAL_SPDIFRX_REGISTER_CALLBACKS == 1) 165 void (*RxHalfCpltCallback)(struct __SPDIFRX_HandleTypeDef *hspdif); /*!< SPDIFRX Data flow half completed callback */ 166 void (*RxCpltCallback)(struct __SPDIFRX_HandleTypeDef *hspdif); /*!< SPDIFRX Data flow completed callback */ 167 void (*CxHalfCpltCallback)(struct __SPDIFRX_HandleTypeDef *hspdif); /*!< SPDIFRX Control flow half completed callback */ 168 void (*CxCpltCallback)(struct __SPDIFRX_HandleTypeDef *hspdif); /*!< SPDIFRX Control flow completed callback */ 169 void (*ErrorCallback)(struct __SPDIFRX_HandleTypeDef *hspdif); /*!< SPDIFRX error callback */ 170 void (* MspInitCallback)(struct __SPDIFRX_HandleTypeDef *hspdif); /*!< SPDIFRX Msp Init callback */ 171 void (* MspDeInitCallback)(struct __SPDIFRX_HandleTypeDef *hspdif); /*!< SPDIFRX Msp DeInit callback */ 172 #endif /* USE_HAL_SPDIFRX_REGISTER_CALLBACKS */ 173 174 } SPDIFRX_HandleTypeDef; 175 /** 176 * @} 177 */ 178 179 #if (USE_HAL_SPDIFRX_REGISTER_CALLBACKS == 1) 180 /** 181 * @brief HAL SPDIFRX Callback ID enumeration definition 182 */ 183 typedef enum 184 { 185 HAL_SPDIFRX_RX_HALF_CB_ID = 0x00U, /*!< SPDIFRX Data flow half completed callback ID */ 186 HAL_SPDIFRX_RX_CPLT_CB_ID = 0x01U, /*!< SPDIFRX Data flow completed callback */ 187 HAL_SPDIFRX_CX_HALF_CB_ID = 0x02U, /*!< SPDIFRX Control flow half completed callback */ 188 HAL_SPDIFRX_CX_CPLT_CB_ID = 0x03U, /*!< SPDIFRX Control flow completed callback */ 189 HAL_SPDIFRX_ERROR_CB_ID = 0x04U, /*!< SPDIFRX error callback */ 190 HAL_SPDIFRX_MSPINIT_CB_ID = 0x05U, /*!< SPDIFRX Msp Init callback ID */ 191 HAL_SPDIFRX_MSPDEINIT_CB_ID = 0x06U /*!< SPDIFRX Msp DeInit callback ID */ 192 } HAL_SPDIFRX_CallbackIDTypeDef; 193 194 /** 195 * @brief HAL SPDIFRX Callback pointer definition 196 */ 197 typedef void (*pSPDIFRX_CallbackTypeDef)(SPDIFRX_HandleTypeDef *hspdif); /*!< pointer to an SPDIFRX callback function */ 198 #endif /* USE_HAL_SPDIFRX_REGISTER_CALLBACKS */ 199 200 /* Exported constants --------------------------------------------------------*/ 201 /** @defgroup SPDIFRX_Exported_Constants SPDIFRX Exported Constants 202 * @{ 203 */ 204 /** @defgroup SPDIFRX_ErrorCode SPDIFRX Error Code 205 * @{ 206 */ 207 #define HAL_SPDIFRX_ERROR_NONE ((uint32_t)0x00000000U) /*!< No error */ 208 #define HAL_SPDIFRX_ERROR_TIMEOUT ((uint32_t)0x00000001U) /*!< Timeout error */ 209 #define HAL_SPDIFRX_ERROR_OVR ((uint32_t)0x00000002U) /*!< OVR error */ 210 #define HAL_SPDIFRX_ERROR_PE ((uint32_t)0x00000004U) /*!< Parity error */ 211 #define HAL_SPDIFRX_ERROR_DMA ((uint32_t)0x00000008U) /*!< DMA transfer error */ 212 #define HAL_SPDIFRX_ERROR_UNKNOWN ((uint32_t)0x00000010U) /*!< Unknown Error error */ 213 #if (USE_HAL_SPDIFRX_REGISTER_CALLBACKS == 1) 214 #define HAL_SPDIFRX_ERROR_INVALID_CALLBACK ((uint32_t)0x00000020U) /*!< Invalid Callback error */ 215 #endif /* USE_HAL_SPDIFRX_REGISTER_CALLBACKS */ 216 /** 217 * @} 218 */ 219 220 /** @defgroup SPDIFRX_Input_Selection SPDIFRX Input Selection 221 * @{ 222 */ 223 #define SPDIFRX_INPUT_IN0 ((uint32_t)0x00000000U) 224 #define SPDIFRX_INPUT_IN1 ((uint32_t)0x00010000U) 225 #define SPDIFRX_INPUT_IN2 ((uint32_t)0x00020000U) 226 #define SPDIFRX_INPUT_IN3 ((uint32_t)0x00030000U) 227 /** 228 * @} 229 */ 230 231 /** @defgroup SPDIFRX_Max_Retries SPDIFRX Maximum Retries 232 * @{ 233 */ 234 #define SPDIFRX_MAXRETRIES_NONE ((uint32_t)0x00000000U) 235 #define SPDIFRX_MAXRETRIES_3 ((uint32_t)0x00001000U) 236 #define SPDIFRX_MAXRETRIES_15 ((uint32_t)0x00002000U) 237 #define SPDIFRX_MAXRETRIES_63 ((uint32_t)0x00003000U) 238 /** 239 * @} 240 */ 241 242 /** @defgroup SPDIFRX_Wait_For_Activity SPDIFRX Wait For Activity 243 * @{ 244 */ 245 #define SPDIFRX_WAITFORACTIVITY_OFF ((uint32_t)0x00000000U) 246 #define SPDIFRX_WAITFORACTIVITY_ON ((uint32_t)SPDIFRX_CR_WFA) 247 /** 248 * @} 249 */ 250 251 /** @defgroup SPDIFRX_PT_Mask SPDIFRX Preamble Type Mask 252 * @{ 253 */ 254 #define SPDIFRX_PREAMBLETYPEMASK_OFF ((uint32_t)0x00000000U) 255 #define SPDIFRX_PREAMBLETYPEMASK_ON ((uint32_t)SPDIFRX_CR_PTMSK) 256 /** 257 * @} 258 */ 259 260 /** @defgroup SPDIFRX_ChannelStatus_Mask SPDIFRX Channel Status Mask 261 * @{ 262 */ 263 #define SPDIFRX_CHANNELSTATUS_OFF ((uint32_t)0x00000000U) /* The channel status and user bits are copied into the SPDIF_DR */ 264 #define SPDIFRX_CHANNELSTATUS_ON ((uint32_t)SPDIFRX_CR_CUMSK) /* The channel status and user bits are not copied into the SPDIF_DR, zeros are written instead*/ 265 /** 266 * @} 267 */ 268 269 /** @defgroup SPDIFRX_V_Mask SPDIFRX Validity Mask 270 * @{ 271 */ 272 #define SPDIFRX_VALIDITYMASK_OFF ((uint32_t)0x00000000U) 273 #define SPDIFRX_VALIDITYMASK_ON ((uint32_t)SPDIFRX_CR_VMSK) 274 /** 275 * @} 276 */ 277 278 /** @defgroup SPDIFRX_PE_Mask SPDIFRX Parity Error Mask 279 * @{ 280 */ 281 #define SPDIFRX_PARITYERRORMASK_OFF ((uint32_t)0x00000000U) 282 #define SPDIFRX_PARITYERRORMASK_ON ((uint32_t)SPDIFRX_CR_PMSK) 283 /** 284 * @} 285 */ 286 287 /** @defgroup SPDIFRX_Channel_Selection SPDIFRX Channel Selection 288 * @{ 289 */ 290 #define SPDIFRX_CHANNEL_A ((uint32_t)0x00000000U) 291 #define SPDIFRX_CHANNEL_B ((uint32_t)SPDIFRX_CR_CHSEL) 292 /** 293 * @} 294 */ 295 296 /** @defgroup SPDIFRX_Data_Format SPDIFRX Data Format 297 * @{ 298 */ 299 #define SPDIFRX_DATAFORMAT_LSB ((uint32_t)0x00000000U) 300 #define SPDIFRX_DATAFORMAT_MSB ((uint32_t)0x00000010U) 301 #define SPDIFRX_DATAFORMAT_32BITS ((uint32_t)0x00000020U) 302 /** 303 * @} 304 */ 305 306 /** @defgroup SPDIFRX_Stereo_Mode SPDIFRX Stereo Mode 307 * @{ 308 */ 309 #define SPDIFRX_STEREOMODE_DISABLE ((uint32_t)0x00000000U) 310 #define SPDIFRX_STEREOMODE_ENABLE ((uint32_t)SPDIFRX_CR_RXSTEO) 311 /** 312 * @} 313 */ 314 315 /** @defgroup SPDIFRX_State SPDIFRX State 316 * @{ 317 */ 318 319 #define SPDIFRX_STATE_IDLE ((uint32_t)0xFFFFFFFCU) 320 #define SPDIFRX_STATE_SYNC ((uint32_t)0x00000001U) 321 #define SPDIFRX_STATE_RCV ((uint32_t)SPDIFRX_CR_SPDIFEN) 322 /** 323 * @} 324 */ 325 326 /** @defgroup SPDIFRX_Interrupts_Definition SPDIFRX Interrupts Definition 327 * @{ 328 */ 329 #define SPDIFRX_IT_RXNE ((uint32_t)SPDIFRX_IMR_RXNEIE) 330 #define SPDIFRX_IT_CSRNE ((uint32_t)SPDIFRX_IMR_CSRNEIE) 331 #define SPDIFRX_IT_PERRIE ((uint32_t)SPDIFRX_IMR_PERRIE) 332 #define SPDIFRX_IT_OVRIE ((uint32_t)SPDIFRX_IMR_OVRIE) 333 #define SPDIFRX_IT_SBLKIE ((uint32_t)SPDIFRX_IMR_SBLKIE) 334 #define SPDIFRX_IT_SYNCDIE ((uint32_t)SPDIFRX_IMR_SYNCDIE) 335 #define SPDIFRX_IT_IFEIE ((uint32_t)SPDIFRX_IMR_IFEIE ) 336 /** 337 * @} 338 */ 339 340 /** @defgroup SPDIFRX_Flags_Definition SPDIFRX Flags Definition 341 * @{ 342 */ 343 #define SPDIFRX_FLAG_RXNE ((uint32_t)SPDIFRX_SR_RXNE) 344 #define SPDIFRX_FLAG_CSRNE ((uint32_t)SPDIFRX_SR_CSRNE) 345 #define SPDIFRX_FLAG_PERR ((uint32_t)SPDIFRX_SR_PERR) 346 #define SPDIFRX_FLAG_OVR ((uint32_t)SPDIFRX_SR_OVR) 347 #define SPDIFRX_FLAG_SBD ((uint32_t)SPDIFRX_SR_SBD) 348 #define SPDIFRX_FLAG_SYNCD ((uint32_t)SPDIFRX_SR_SYNCD) 349 #define SPDIFRX_FLAG_FERR ((uint32_t)SPDIFRX_SR_FERR) 350 #define SPDIFRX_FLAG_SERR ((uint32_t)SPDIFRX_SR_SERR) 351 #define SPDIFRX_FLAG_TERR ((uint32_t)SPDIFRX_SR_TERR) 352 /** 353 * @} 354 */ 355 356 /** 357 * @} 358 */ 359 360 /* Exported macros -----------------------------------------------------------*/ 361 /** @defgroup SPDIFRX_Exported_macros SPDIFRX Exported Macros 362 * @{ 363 */ 364 365 /** @brief Reset SPDIFRX handle state 366 * @param __HANDLE__ SPDIFRX handle. 367 * @retval None 368 */ 369 #if (USE_HAL_SPDIFRX_REGISTER_CALLBACKS == 1) 370 #define __HAL_SPDIFRX_RESET_HANDLE_STATE(__HANDLE__) do{\ 371 (__HANDLE__)->State = HAL_SPDIFRX_STATE_RESET;\ 372 (__HANDLE__)->MspInitCallback = NULL;\ 373 (__HANDLE__)->MspDeInitCallback = NULL;\ 374 }while(0) 375 #else 376 #define __HAL_SPDIFRX_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_SPDIFRX_STATE_RESET) 377 #endif /* USE_HAL_SPDIFRX_REGISTER_CALLBACKS */ 378 379 /** @brief Disable the specified SPDIFRX peripheral (IDLE State). 380 * @param __HANDLE__ specifies the SPDIFRX Handle. 381 * @retval None 382 */ 383 #define __HAL_SPDIFRX_IDLE(__HANDLE__) ((__HANDLE__)->Instance->CR &= SPDIFRX_STATE_IDLE) 384 385 /** @brief Enable the specified SPDIFRX peripheral (SYNC State). 386 * @param __HANDLE__ specifies the SPDIFRX Handle. 387 * @retval None 388 */ 389 #define __HAL_SPDIFRX_SYNC(__HANDLE__) ((__HANDLE__)->Instance->CR |= SPDIFRX_STATE_SYNC) 390 391 392 /** @brief Enable the specified SPDIFRX peripheral (RCV State). 393 * @param __HANDLE__ specifies the SPDIFRX Handle. 394 * @retval None 395 */ 396 #define __HAL_SPDIFRX_RCV(__HANDLE__) ((__HANDLE__)->Instance->CR |= SPDIFRX_STATE_RCV) 397 398 399 /** @brief Enable or disable the specified SPDIFRX interrupts. 400 * @param __HANDLE__ specifies the SPDIFRX Handle. 401 * @param __INTERRUPT__ specifies the interrupt source to enable or disable. 402 * This parameter can be one of the following values: 403 * @arg SPDIFRX_IT_RXNE 404 * @arg SPDIFRX_IT_CSRNE 405 * @arg SPDIFRX_IT_PERRIE 406 * @arg SPDIFRX_IT_OVRIE 407 * @arg SPDIFRX_IT_SBLKIE 408 * @arg SPDIFRX_IT_SYNCDIE 409 * @arg SPDIFRX_IT_IFEIE 410 * @retval None 411 */ 412 #define __HAL_SPDIFRX_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->IMR |= (__INTERRUPT__)) 413 #define __HAL_SPDIFRX_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->IMR\ 414 &= (uint16_t)(~(__INTERRUPT__))) 415 416 /** @brief Checks if the specified SPDIFRX interrupt source is enabled or disabled. 417 * @param __HANDLE__ specifies the SPDIFRX Handle. 418 * @param __INTERRUPT__ specifies the SPDIFRX interrupt source to check. 419 * This parameter can be one of the following values: 420 * @arg SPDIFRX_IT_RXNE 421 * @arg SPDIFRX_IT_CSRNE 422 * @arg SPDIFRX_IT_PERRIE 423 * @arg SPDIFRX_IT_OVRIE 424 * @arg SPDIFRX_IT_SBLKIE 425 * @arg SPDIFRX_IT_SYNCDIE 426 * @arg SPDIFRX_IT_IFEIE 427 * @retval The new state of __IT__ (TRUE or FALSE). 428 */ 429 #define __HAL_SPDIFRX_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->IMR\ 430 & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET) 431 432 /** @brief Checks whether the specified SPDIFRX flag is set or not. 433 * @param __HANDLE__ specifies the SPDIFRX Handle. 434 * @param __FLAG__ specifies the flag to check. 435 * This parameter can be one of the following values: 436 * @arg SPDIFRX_FLAG_RXNE 437 * @arg SPDIFRX_FLAG_CSRNE 438 * @arg SPDIFRX_FLAG_PERR 439 * @arg SPDIFRX_FLAG_OVR 440 * @arg SPDIFRX_FLAG_SBD 441 * @arg SPDIFRX_FLAG_SYNCD 442 * @arg SPDIFRX_FLAG_FERR 443 * @arg SPDIFRX_FLAG_SERR 444 * @arg SPDIFRX_FLAG_TERR 445 * @retval The new state of __FLAG__ (TRUE or FALSE). 446 */ 447 #define __HAL_SPDIFRX_GET_FLAG(__HANDLE__, __FLAG__) (((((__HANDLE__)->Instance->SR)\ 448 & (__FLAG__)) == (__FLAG__)) ? SET : RESET) 449 450 /** @brief Clears the specified SPDIFRX SR flag, in setting the proper IFCR register bit. 451 * @param __HANDLE__ specifies the USART Handle. 452 * @param __IT_CLEAR__ specifies the interrupt clear register flag that needs to be set 453 * to clear the corresponding interrupt 454 * This parameter can be one of the following values: 455 * @arg SPDIFRX_FLAG_PERR 456 * @arg SPDIFRX_FLAG_OVR 457 * @arg SPDIFRX_SR_SBD 458 * @arg SPDIFRX_SR_SYNCD 459 * @retval None 460 */ 461 #define __HAL_SPDIFRX_CLEAR_IT(__HANDLE__, __IT_CLEAR__) ((__HANDLE__)->Instance->IFCR = (uint32_t)(__IT_CLEAR__)) 462 463 /** 464 * @} 465 */ 466 467 /* Exported functions --------------------------------------------------------*/ 468 /** @addtogroup SPDIFRX_Exported_Functions 469 * @{ 470 */ 471 472 /** @addtogroup SPDIFRX_Exported_Functions_Group1 473 * @{ 474 */ 475 /* Initialization/de-initialization functions **********************************/ 476 HAL_StatusTypeDef HAL_SPDIFRX_Init(SPDIFRX_HandleTypeDef *hspdif); 477 HAL_StatusTypeDef HAL_SPDIFRX_DeInit(SPDIFRX_HandleTypeDef *hspdif); 478 void HAL_SPDIFRX_MspInit(SPDIFRX_HandleTypeDef *hspdif); 479 void HAL_SPDIFRX_MspDeInit(SPDIFRX_HandleTypeDef *hspdif); 480 HAL_StatusTypeDef HAL_SPDIFRX_SetDataFormat(SPDIFRX_HandleTypeDef *hspdif, SPDIFRX_SetDataFormatTypeDef sDataFormat); 481 482 /* Callbacks Register/UnRegister functions ***********************************/ 483 #if (USE_HAL_SPDIFRX_REGISTER_CALLBACKS == 1) 484 HAL_StatusTypeDef HAL_SPDIFRX_RegisterCallback(SPDIFRX_HandleTypeDef *hspdif, HAL_SPDIFRX_CallbackIDTypeDef CallbackID, 485 pSPDIFRX_CallbackTypeDef pCallback); 486 HAL_StatusTypeDef HAL_SPDIFRX_UnRegisterCallback(SPDIFRX_HandleTypeDef *hspdif, 487 HAL_SPDIFRX_CallbackIDTypeDef CallbackID); 488 #endif /* USE_HAL_SPDIFRX_REGISTER_CALLBACKS */ 489 /** 490 * @} 491 */ 492 493 /** @addtogroup SPDIFRX_Exported_Functions_Group2 494 * @{ 495 */ 496 /* I/O operation functions ***************************************************/ 497 /* Blocking mode: Polling */ 498 HAL_StatusTypeDef HAL_SPDIFRX_ReceiveDataFlow(SPDIFRX_HandleTypeDef *hspdif, uint32_t *pData, uint16_t Size, 499 uint32_t Timeout); 500 HAL_StatusTypeDef HAL_SPDIFRX_ReceiveControlFlow(SPDIFRX_HandleTypeDef *hspdif, uint32_t *pData, uint16_t Size, 501 uint32_t Timeout); 502 503 /* Non-Blocking mode: Interrupt */ 504 HAL_StatusTypeDef HAL_SPDIFRX_ReceiveControlFlow_IT(SPDIFRX_HandleTypeDef *hspdif, uint32_t *pData, uint16_t Size); 505 HAL_StatusTypeDef HAL_SPDIFRX_ReceiveDataFlow_IT(SPDIFRX_HandleTypeDef *hspdif, uint32_t *pData, uint16_t Size); 506 void HAL_SPDIFRX_IRQHandler(SPDIFRX_HandleTypeDef *hspdif); 507 508 /* Non-Blocking mode: DMA */ 509 HAL_StatusTypeDef HAL_SPDIFRX_ReceiveControlFlow_DMA(SPDIFRX_HandleTypeDef *hspdif, uint32_t *pData, uint16_t Size); 510 HAL_StatusTypeDef HAL_SPDIFRX_ReceiveDataFlow_DMA(SPDIFRX_HandleTypeDef *hspdif, uint32_t *pData, uint16_t Size); 511 HAL_StatusTypeDef HAL_SPDIFRX_DMAStop(SPDIFRX_HandleTypeDef *hspdif); 512 513 /* Callbacks used in non blocking modes (Interrupt and DMA) *******************/ 514 void HAL_SPDIFRX_RxHalfCpltCallback(SPDIFRX_HandleTypeDef *hspdif); 515 void HAL_SPDIFRX_RxCpltCallback(SPDIFRX_HandleTypeDef *hspdif); 516 void HAL_SPDIFRX_ErrorCallback(SPDIFRX_HandleTypeDef *hspdif); 517 void HAL_SPDIFRX_CxHalfCpltCallback(SPDIFRX_HandleTypeDef *hspdif); 518 void HAL_SPDIFRX_CxCpltCallback(SPDIFRX_HandleTypeDef *hspdif); 519 /** 520 * @} 521 */ 522 523 /** @addtogroup SPDIFRX_Exported_Functions_Group3 524 * @{ 525 */ 526 /* Peripheral Control and State functions ************************************/ 527 HAL_SPDIFRX_StateTypeDef HAL_SPDIFRX_GetState(SPDIFRX_HandleTypeDef const *const hspdif); 528 uint32_t HAL_SPDIFRX_GetError(SPDIFRX_HandleTypeDef const *const hspdif); 529 /** 530 * @} 531 */ 532 533 /** 534 * @} 535 */ 536 /* Private types -------------------------------------------------------------*/ 537 /* Private variables ---------------------------------------------------------*/ 538 /* Private constants ---------------------------------------------------------*/ 539 /* Private macros ------------------------------------------------------------*/ 540 /** @defgroup SPDIFRX_Private_Macros SPDIFRX Private Macros 541 * @{ 542 */ 543 #define IS_SPDIFRX_INPUT_SELECT(INPUT) (((INPUT) == SPDIFRX_INPUT_IN1) || \ 544 ((INPUT) == SPDIFRX_INPUT_IN2) || \ 545 ((INPUT) == SPDIFRX_INPUT_IN3) || \ 546 ((INPUT) == SPDIFRX_INPUT_IN0)) 547 548 #define IS_SPDIFRX_MAX_RETRIES(RET) (((RET) == SPDIFRX_MAXRETRIES_NONE) || \ 549 ((RET) == SPDIFRX_MAXRETRIES_3) || \ 550 ((RET) == SPDIFRX_MAXRETRIES_15) || \ 551 ((RET) == SPDIFRX_MAXRETRIES_63)) 552 553 #define IS_SPDIFRX_WAIT_FOR_ACTIVITY(VAL) (((VAL) == SPDIFRX_WAITFORACTIVITY_ON) || \ 554 ((VAL) == SPDIFRX_WAITFORACTIVITY_OFF)) 555 556 #define IS_PREAMBLE_TYPE_MASK(VAL) (((VAL) == SPDIFRX_PREAMBLETYPEMASK_ON) || \ 557 ((VAL) == SPDIFRX_PREAMBLETYPEMASK_OFF)) 558 559 #define IS_VALIDITY_MASK(VAL) (((VAL) == SPDIFRX_VALIDITYMASK_OFF) || \ 560 ((VAL) == SPDIFRX_VALIDITYMASK_ON)) 561 562 #define IS_PARITY_ERROR_MASK(VAL) (((VAL) == SPDIFRX_PARITYERRORMASK_OFF) || \ 563 ((VAL) == SPDIFRX_PARITYERRORMASK_ON)) 564 565 #define IS_SPDIFRX_CHANNEL(CHANNEL) (((CHANNEL) == SPDIFRX_CHANNEL_A) || \ 566 ((CHANNEL) == SPDIFRX_CHANNEL_B)) 567 568 #define IS_SPDIFRX_DATA_FORMAT(FORMAT) (((FORMAT) == SPDIFRX_DATAFORMAT_LSB) || \ 569 ((FORMAT) == SPDIFRX_DATAFORMAT_MSB) || \ 570 ((FORMAT) == SPDIFRX_DATAFORMAT_32BITS)) 571 572 #define IS_STEREO_MODE(MODE) (((MODE) == SPDIFRX_STEREOMODE_DISABLE) || \ 573 ((MODE) == SPDIFRX_STEREOMODE_ENABLE)) 574 575 #define IS_CHANNEL_STATUS_MASK(VAL) (((VAL) == SPDIFRX_CHANNELSTATUS_ON) || \ 576 ((VAL) == SPDIFRX_CHANNELSTATUS_OFF)) 577 578 /** 579 * @} 580 */ 581 582 /* Private functions ---------------------------------------------------------*/ 583 /** @defgroup SPDIFRX_Private_Functions SPDIFRX Private Functions 584 * @{ 585 */ 586 /** 587 * @} 588 */ 589 590 /** 591 * @} 592 */ 593 #endif /* SPDIFRX */ 594 /** 595 * @} 596 */ 597 598 599 #ifdef __cplusplus 600 } 601 #endif 602 603 604 #endif /* STM32F7xx_HAL_SPDIFRX_H */ 605
