1 /** 2 ****************************************************************************** 3 * @file stm32f7xx_hal_sdram.h 4 * @author MCD Application Team 5 * @brief Header file of SDRAM HAL module. 6 ****************************************************************************** 7 * @attention 8 * 9 * Copyright (c) 2017 STMicroelectronics. 10 * All rights reserved. 11 * 12 * This software is licensed under terms that can be found in the LICENSE file 13 * in the root directory of this software component. 14 * If no LICENSE file comes with this software, it is provided AS-IS. 15 * 16 ****************************************************************************** 17 */ 18 19 /* Define to prevent recursive inclusion -------------------------------------*/ 20 #ifndef STM32F7xx_HAL_SDRAM_H 21 #define STM32F7xx_HAL_SDRAM_H 22 23 #ifdef __cplusplus 24 extern "C" { 25 #endif 26 27 28 /* Includes ------------------------------------------------------------------*/ 29 #include "stm32f7xx_ll_fmc.h" 30 31 /** @addtogroup STM32F7xx_HAL_Driver 32 * @{ 33 */ 34 35 /** @addtogroup SDRAM 36 * @{ 37 */ 38 39 /* Exported typedef ----------------------------------------------------------*/ 40 41 /** @defgroup SDRAM_Exported_Types SDRAM Exported Types 42 * @{ 43 */ 44 45 /** 46 * @brief HAL SDRAM State structure definition 47 */ 48 typedef enum 49 { 50 HAL_SDRAM_STATE_RESET = 0x00U, /*!< SDRAM not yet initialized or disabled */ 51 HAL_SDRAM_STATE_READY = 0x01U, /*!< SDRAM initialized and ready for use */ 52 HAL_SDRAM_STATE_BUSY = 0x02U, /*!< SDRAM internal process is ongoing */ 53 HAL_SDRAM_STATE_ERROR = 0x03U, /*!< SDRAM error state */ 54 HAL_SDRAM_STATE_WRITE_PROTECTED = 0x04U, /*!< SDRAM device write protected */ 55 HAL_SDRAM_STATE_PRECHARGED = 0x05U /*!< SDRAM device precharged */ 56 57 } HAL_SDRAM_StateTypeDef; 58 59 /** 60 * @brief SDRAM handle Structure definition 61 */ 62 #if (USE_HAL_SDRAM_REGISTER_CALLBACKS == 1) 63 typedef struct __SDRAM_HandleTypeDef 64 #else 65 typedef struct 66 #endif /* USE_HAL_SDRAM_REGISTER_CALLBACKS */ 67 { 68 FMC_SDRAM_TypeDef *Instance; /*!< Register base address */ 69 70 FMC_SDRAM_InitTypeDef Init; /*!< SDRAM device configuration parameters */ 71 72 __IO HAL_SDRAM_StateTypeDef State; /*!< SDRAM access state */ 73 74 HAL_LockTypeDef Lock; /*!< SDRAM locking object */ 75 76 DMA_HandleTypeDef *hdma; /*!< Pointer DMA handler */ 77 78 #if (USE_HAL_SDRAM_REGISTER_CALLBACKS == 1) 79 void (* MspInitCallback)(struct __SDRAM_HandleTypeDef *hsdram); /*!< SDRAM Msp Init callback */ 80 void (* MspDeInitCallback)(struct __SDRAM_HandleTypeDef *hsdram); /*!< SDRAM Msp DeInit callback */ 81 void (* RefreshErrorCallback)(struct __SDRAM_HandleTypeDef *hsdram); /*!< SDRAM Refresh Error callback */ 82 void (* DmaXferCpltCallback)(DMA_HandleTypeDef *hdma); /*!< SDRAM DMA Xfer Complete callback */ 83 void (* DmaXferErrorCallback)(DMA_HandleTypeDef *hdma); /*!< SDRAM DMA Xfer Error callback */ 84 #endif /* USE_HAL_SDRAM_REGISTER_CALLBACKS */ 85 } SDRAM_HandleTypeDef; 86 87 #if (USE_HAL_SDRAM_REGISTER_CALLBACKS == 1) 88 /** 89 * @brief HAL SDRAM Callback ID enumeration definition 90 */ 91 typedef enum 92 { 93 HAL_SDRAM_MSP_INIT_CB_ID = 0x00U, /*!< SDRAM MspInit Callback ID */ 94 HAL_SDRAM_MSP_DEINIT_CB_ID = 0x01U, /*!< SDRAM MspDeInit Callback ID */ 95 HAL_SDRAM_REFRESH_ERR_CB_ID = 0x02U, /*!< SDRAM Refresh Error Callback ID */ 96 HAL_SDRAM_DMA_XFER_CPLT_CB_ID = 0x03U, /*!< SDRAM DMA Xfer Complete Callback ID */ 97 HAL_SDRAM_DMA_XFER_ERR_CB_ID = 0x04U /*!< SDRAM DMA Xfer Error Callback ID */ 98 } HAL_SDRAM_CallbackIDTypeDef; 99 100 /** 101 * @brief HAL SDRAM Callback pointer definition 102 */ 103 typedef void (*pSDRAM_CallbackTypeDef)(SDRAM_HandleTypeDef *hsdram); 104 typedef void (*pSDRAM_DmaCallbackTypeDef)(DMA_HandleTypeDef *hdma); 105 #endif /* USE_HAL_SDRAM_REGISTER_CALLBACKS */ 106 /** 107 * @} 108 */ 109 110 /* Exported constants --------------------------------------------------------*/ 111 /* Exported macro ------------------------------------------------------------*/ 112 113 /** @defgroup SDRAM_Exported_Macros SDRAM Exported Macros 114 * @{ 115 */ 116 117 /** @brief Reset SDRAM handle state 118 * @param __HANDLE__ specifies the SDRAM handle. 119 * @retval None 120 */ 121 #if (USE_HAL_SDRAM_REGISTER_CALLBACKS == 1) 122 #define __HAL_SDRAM_RESET_HANDLE_STATE(__HANDLE__) do { \ 123 (__HANDLE__)->State = HAL_SDRAM_STATE_RESET; \ 124 (__HANDLE__)->MspInitCallback = NULL; \ 125 (__HANDLE__)->MspDeInitCallback = NULL; \ 126 } while(0) 127 #else 128 #define __HAL_SDRAM_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_SDRAM_STATE_RESET) 129 #endif /* USE_HAL_SDRAM_REGISTER_CALLBACKS */ 130 /** 131 * @} 132 */ 133 134 /* Exported functions --------------------------------------------------------*/ 135 136 /** @addtogroup SDRAM_Exported_Functions SDRAM Exported Functions 137 * @{ 138 */ 139 140 /** @addtogroup SDRAM_Exported_Functions_Group1 141 * @{ 142 */ 143 144 /* Initialization/de-initialization functions *********************************/ 145 HAL_StatusTypeDef HAL_SDRAM_Init(SDRAM_HandleTypeDef *hsdram, FMC_SDRAM_TimingTypeDef *Timing); 146 HAL_StatusTypeDef HAL_SDRAM_DeInit(SDRAM_HandleTypeDef *hsdram); 147 void HAL_SDRAM_MspInit(SDRAM_HandleTypeDef *hsdram); 148 void HAL_SDRAM_MspDeInit(SDRAM_HandleTypeDef *hsdram); 149 150 void HAL_SDRAM_IRQHandler(SDRAM_HandleTypeDef *hsdram); 151 void HAL_SDRAM_RefreshErrorCallback(SDRAM_HandleTypeDef *hsdram); 152 void HAL_SDRAM_DMA_XferCpltCallback(DMA_HandleTypeDef *hdma); 153 void HAL_SDRAM_DMA_XferErrorCallback(DMA_HandleTypeDef *hdma); 154 155 /** 156 * @} 157 */ 158 159 /** @addtogroup SDRAM_Exported_Functions_Group2 160 * @{ 161 */ 162 /* I/O operation functions ****************************************************/ 163 HAL_StatusTypeDef HAL_SDRAM_Read_8b(SDRAM_HandleTypeDef *hsdram, uint32_t *pAddress, uint8_t *pDstBuffer, 164 uint32_t BufferSize); 165 HAL_StatusTypeDef HAL_SDRAM_Write_8b(SDRAM_HandleTypeDef *hsdram, uint32_t *pAddress, uint8_t *pSrcBuffer, 166 uint32_t BufferSize); 167 HAL_StatusTypeDef HAL_SDRAM_Read_16b(SDRAM_HandleTypeDef *hsdram, uint32_t *pAddress, uint16_t *pDstBuffer, 168 uint32_t BufferSize); 169 HAL_StatusTypeDef HAL_SDRAM_Write_16b(SDRAM_HandleTypeDef *hsdram, uint32_t *pAddress, uint16_t *pSrcBuffer, 170 uint32_t BufferSize); 171 HAL_StatusTypeDef HAL_SDRAM_Read_32b(SDRAM_HandleTypeDef *hsdram, uint32_t *pAddress, uint32_t *pDstBuffer, 172 uint32_t BufferSize); 173 HAL_StatusTypeDef HAL_SDRAM_Write_32b(SDRAM_HandleTypeDef *hsdram, uint32_t *pAddress, uint32_t *pSrcBuffer, 174 uint32_t BufferSize); 175 176 HAL_StatusTypeDef HAL_SDRAM_Read_DMA(SDRAM_HandleTypeDef *hsdram, uint32_t *pAddress, uint32_t *pDstBuffer, 177 uint32_t BufferSize); 178 HAL_StatusTypeDef HAL_SDRAM_Write_DMA(SDRAM_HandleTypeDef *hsdram, uint32_t *pAddress, uint32_t *pSrcBuffer, 179 uint32_t BufferSize); 180 181 #if (USE_HAL_SDRAM_REGISTER_CALLBACKS == 1) 182 /* SDRAM callback registering/unregistering */ 183 HAL_StatusTypeDef HAL_SDRAM_RegisterCallback(SDRAM_HandleTypeDef *hsdram, HAL_SDRAM_CallbackIDTypeDef CallbackId, 184 pSDRAM_CallbackTypeDef pCallback); 185 HAL_StatusTypeDef HAL_SDRAM_UnRegisterCallback(SDRAM_HandleTypeDef *hsdram, HAL_SDRAM_CallbackIDTypeDef CallbackId); 186 HAL_StatusTypeDef HAL_SDRAM_RegisterDmaCallback(SDRAM_HandleTypeDef *hsdram, HAL_SDRAM_CallbackIDTypeDef CallbackId, 187 pSDRAM_DmaCallbackTypeDef pCallback); 188 #endif /* USE_HAL_SDRAM_REGISTER_CALLBACKS */ 189 190 /** 191 * @} 192 */ 193 194 /** @addtogroup SDRAM_Exported_Functions_Group3 195 * @{ 196 */ 197 /* SDRAM Control functions *****************************************************/ 198 HAL_StatusTypeDef HAL_SDRAM_WriteProtection_Enable(SDRAM_HandleTypeDef *hsdram); 199 HAL_StatusTypeDef HAL_SDRAM_WriteProtection_Disable(SDRAM_HandleTypeDef *hsdram); 200 HAL_StatusTypeDef HAL_SDRAM_SendCommand(SDRAM_HandleTypeDef *hsdram, FMC_SDRAM_CommandTypeDef *Command, 201 uint32_t Timeout); 202 HAL_StatusTypeDef HAL_SDRAM_ProgramRefreshRate(SDRAM_HandleTypeDef *hsdram, uint32_t RefreshRate); 203 HAL_StatusTypeDef HAL_SDRAM_SetAutoRefreshNumber(SDRAM_HandleTypeDef *hsdram, uint32_t AutoRefreshNumber); 204 uint32_t HAL_SDRAM_GetModeStatus(SDRAM_HandleTypeDef *hsdram); 205 206 /** 207 * @} 208 */ 209 210 /** @addtogroup SDRAM_Exported_Functions_Group4 211 * @{ 212 */ 213 /* SDRAM State functions ********************************************************/ 214 HAL_SDRAM_StateTypeDef HAL_SDRAM_GetState(SDRAM_HandleTypeDef *hsdram); 215 /** 216 * @} 217 */ 218 219 /** 220 * @} 221 */ 222 223 /** 224 * @} 225 */ 226 227 /** 228 * @} 229 */ 230 231 232 #ifdef __cplusplus 233 } 234 #endif 235 236 #endif /* STM32F7xx_HAL_SDRAM_H */ 237
