1 /** 2 ****************************************************************************** 3 * @file stm32f7xx_hal_sai.h 4 * @author MCD Application Team 5 * @brief Header file of SAI HAL module. 6 ****************************************************************************** 7 * @attention 8 * 9 * Copyright (c) 2017 STMicroelectronics. 10 * All rights reserved. 11 * 12 * This software is licensed under terms that can be found in the LICENSE file 13 * in the root directory of this software component. 14 * If no LICENSE file comes with this software, it is provided AS-IS. 15 * 16 ****************************************************************************** 17 */ 18 19 /* Define to prevent recursive inclusion -------------------------------------*/ 20 #ifndef __STM32F7xx_HAL_SAI_H 21 #define __STM32F7xx_HAL_SAI_H 22 23 #ifdef __cplusplus 24 extern "C" { 25 #endif 26 27 28 /* Includes ------------------------------------------------------------------*/ 29 #include "stm32f7xx_hal_def.h" 30 31 /** @addtogroup STM32F7xx_HAL_Driver 32 * @{ 33 */ 34 35 /** @addtogroup SAI 36 * @{ 37 */ 38 39 /* Exported types ------------------------------------------------------------*/ 40 /** @defgroup SAI_Exported_Types SAI Exported Types 41 * @{ 42 */ 43 44 /** 45 * @brief HAL State structures definition 46 */ 47 typedef enum 48 { 49 HAL_SAI_STATE_RESET = 0x00U, /*!< SAI not yet initialized or disabled */ 50 HAL_SAI_STATE_READY = 0x01U, /*!< SAI initialized and ready for use */ 51 HAL_SAI_STATE_BUSY = 0x02U, /*!< SAI internal process is ongoing */ 52 HAL_SAI_STATE_BUSY_TX = 0x12U, /*!< Data transmission process is ongoing */ 53 HAL_SAI_STATE_BUSY_RX = 0x22U, /*!< Data reception process is ongoing */ 54 } HAL_SAI_StateTypeDef; 55 56 /** 57 * @brief SAI Callback prototype 58 */ 59 typedef void (*SAIcallback)(void); 60 61 /** @defgroup SAI_Init_Structure_definition SAI Init Structure definition 62 * @brief SAI Init Structure definition 63 * @{ 64 */ 65 typedef struct 66 { 67 uint32_t AudioMode; /*!< Specifies the SAI Block audio Mode. 68 This parameter can be a value of @ref SAI_Block_Mode */ 69 70 uint32_t Synchro; /*!< Specifies SAI Block synchronization 71 This parameter can be a value of @ref SAI_Block_Synchronization */ 72 73 uint32_t SynchroExt; /*!< Specifies SAI external output synchronization, this setup is common 74 for BlockA and BlockB 75 This parameter can be a value of @ref SAI_Block_SyncExt 76 @note: If both audio blocks of same SAI are used, this parameter has 77 to be set to the same value for each audio block */ 78 79 uint32_t OutputDrive; /*!< Specifies when SAI Block outputs are driven. 80 This parameter can be a value of @ref SAI_Block_Output_Drive 81 @note this value has to be set before enabling the audio block 82 but after the audio block configuration. */ 83 84 uint32_t NoDivider; /*!< Specifies whether master clock will be divided or not. 85 This parameter can be a value of @ref SAI_Block_NoDivider 86 @note: If bit NODIV in the SAI_xCR1 register is cleared, the frame length 87 should be aligned to a number equal to a power of 2, from 8 to 256. 88 If bit NODIV in the SAI_xCR1 register is set, the frame length can 89 take any of the values without constraint since the input clock of 90 the audio block should be equal to the bit clock. 91 There is no MCLK_x clock which can be output. */ 92 93 uint32_t FIFOThreshold; /*!< Specifies SAI Block FIFO threshold. 94 This parameter can be a value of @ref SAI_Block_Fifo_Threshold */ 95 96 uint32_t AudioFrequency; /*!< Specifies the audio frequency sampling. 97 This parameter can be a value of @ref SAI_Audio_Frequency */ 98 99 uint32_t Mckdiv; /*!< Specifies the master clock divider. 100 This parameter must be a number between Min_Data = 0 and Max_Data = 15. 101 @note This parameter is used only if AudioFrequency is set to 102 SAI_AUDIO_FREQUENCY_MCKDIV otherwise it is internally computed. */ 103 104 uint32_t MonoStereoMode; /*!< Specifies if the mono or stereo mode is selected. 105 This parameter can be a value of @ref SAI_Mono_Stereo_Mode */ 106 107 uint32_t CompandingMode; /*!< Specifies the companding mode type. 108 This parameter can be a value of @ref SAI_Block_Companding_Mode */ 109 110 uint32_t TriState; /*!< Specifies the companding mode type. 111 This parameter can be a value of @ref SAI_TRIState_Management */ 112 113 /* This part of the structure is automatically filled if your are using the high level initialisation 114 function HAL_SAI_InitProtocol */ 115 116 uint32_t Protocol; /*!< Specifies the SAI Block protocol. 117 This parameter can be a value of @ref SAI_Block_Protocol */ 118 119 uint32_t DataSize; /*!< Specifies the SAI Block data size. 120 This parameter can be a value of @ref SAI_Block_Data_Size */ 121 122 uint32_t FirstBit; /*!< Specifies whether data transfers start from MSB or LSB bit. 123 This parameter can be a value of @ref SAI_Block_MSB_LSB_transmission */ 124 125 uint32_t ClockStrobing; /*!< Specifies the SAI Block clock strobing edge sensitivity. 126 This parameter can be a value of @ref SAI_Block_Clock_Strobing */ 127 } SAI_InitTypeDef; 128 /** 129 * @} 130 */ 131 132 /** @defgroup SAI_Frame_Structure_definition SAI Frame Structure definition 133 * @brief SAI Frame Init structure definition 134 * @note For SPDIF and AC97 protocol, these parameters are not used (set by hardware). 135 * @{ 136 */ 137 typedef struct 138 { 139 140 uint32_t FrameLength; /*!< Specifies the Frame length, the number of SCK clocks for each audio frame. 141 This parameter must be a number between Min_Data = 8 and Max_Data = 256. 142 @note: If master clock MCLK_x pin is declared as an output, the frame length 143 should be aligned to a number equal to power of 2 in order to keep 144 in an audio frame, an integer number of MCLK pulses by bit Clock. */ 145 146 uint32_t ActiveFrameLength; /*!< Specifies the Frame synchronization active level length. 147 This Parameter specifies the length in number of bit clock (SCK + 1) 148 of the active level of FS signal in audio frame. 149 This parameter must be a number between Min_Data = 1 and Max_Data = 128 */ 150 151 uint32_t FSDefinition; /*!< Specifies the Frame synchronization definition. 152 This parameter can be a value of @ref SAI_Block_FS_Definition */ 153 154 uint32_t FSPolarity; /*!< Specifies the Frame synchronization Polarity. 155 This parameter can be a value of @ref SAI_Block_FS_Polarity */ 156 157 uint32_t FSOffset; /*!< Specifies the Frame synchronization Offset. 158 This parameter can be a value of @ref SAI_Block_FS_Offset */ 159 160 } SAI_FrameInitTypeDef; 161 /** 162 * @} 163 */ 164 165 /** @defgroup SAI_Slot_Structure_definition SAI Slot Structure definition 166 * @brief SAI Block Slot Init Structure definition 167 * @note For SPDIF protocol, these parameters are not used (set by hardware). 168 * @note For AC97 protocol, only SlotActive parameter is used (the others are set by hardware). 169 * @{ 170 */ 171 typedef struct 172 { 173 uint32_t FirstBitOffset; /*!< Specifies the position of first data transfer bit in the slot. 174 This parameter must be a number between Min_Data = 0 and Max_Data = 24 */ 175 176 uint32_t SlotSize; /*!< Specifies the Slot Size. 177 This parameter can be a value of @ref SAI_Block_Slot_Size */ 178 179 uint32_t SlotNumber; /*!< Specifies the number of slot in the audio frame. 180 This parameter must be a number between Min_Data = 1 and Max_Data = 16 */ 181 182 uint32_t SlotActive; /*!< Specifies the slots in audio frame that will be activated. 183 This parameter can be a value of @ref SAI_Block_Slot_Active */ 184 } SAI_SlotInitTypeDef; 185 /** 186 * @} 187 */ 188 189 /** @defgroup SAI_Handle_Structure_definition SAI Handle Structure definition 190 * @brief SAI handle Structure definition 191 * @{ 192 */ 193 typedef struct __SAI_HandleTypeDef 194 { 195 SAI_Block_TypeDef *Instance; /*!< SAI Blockx registers base address */ 196 197 SAI_InitTypeDef Init; /*!< SAI communication parameters */ 198 199 SAI_FrameInitTypeDef FrameInit; /*!< SAI Frame configuration parameters */ 200 201 SAI_SlotInitTypeDef SlotInit; /*!< SAI Slot configuration parameters */ 202 203 uint8_t *pBuffPtr; /*!< Pointer to SAI transfer Buffer */ 204 205 uint16_t XferSize; /*!< SAI transfer size */ 206 207 uint16_t XferCount; /*!< SAI transfer counter */ 208 209 DMA_HandleTypeDef *hdmatx; /*!< SAI Tx DMA handle parameters */ 210 211 DMA_HandleTypeDef *hdmarx; /*!< SAI Rx DMA handle parameters */ 212 213 SAIcallback mutecallback; /*!< SAI mute callback */ 214 215 void (*InterruptServiceRoutine)(struct __SAI_HandleTypeDef *hsai); /* function pointer for IRQ handler */ 216 217 HAL_LockTypeDef Lock; /*!< SAI locking object */ 218 219 __IO HAL_SAI_StateTypeDef State; /*!< SAI communication state */ 220 221 __IO uint32_t ErrorCode; /*!< SAI Error code */ 222 223 #if (USE_HAL_SAI_REGISTER_CALLBACKS == 1) 224 void (*RxCpltCallback)(struct __SAI_HandleTypeDef *hsai); /*!< SAI receive complete callback */ 225 void (*RxHalfCpltCallback)(struct __SAI_HandleTypeDef *hsai); /*!< SAI receive half complete callback */ 226 void (*TxCpltCallback)(struct __SAI_HandleTypeDef *hsai); /*!< SAI transmit complete callback */ 227 void (*TxHalfCpltCallback)(struct __SAI_HandleTypeDef *hsai); /*!< SAI transmit half complete callback */ 228 void (*ErrorCallback)(struct __SAI_HandleTypeDef *hsai); /*!< SAI error callback */ 229 void (*MspInitCallback)(struct __SAI_HandleTypeDef *hsai); /*!< SAI MSP init callback */ 230 void (*MspDeInitCallback)(struct __SAI_HandleTypeDef *hsai); /*!< SAI MSP de-init callback */ 231 #endif 232 } SAI_HandleTypeDef; 233 /** 234 * @} 235 */ 236 237 #if (USE_HAL_SAI_REGISTER_CALLBACKS == 1) 238 /** 239 * @brief SAI callback ID enumeration definition 240 */ 241 typedef enum 242 { 243 HAL_SAI_RX_COMPLETE_CB_ID = 0x00U, /*!< SAI receive complete callback ID */ 244 HAL_SAI_RX_HALFCOMPLETE_CB_ID = 0x01U, /*!< SAI receive half complete callback ID */ 245 HAL_SAI_TX_COMPLETE_CB_ID = 0x02U, /*!< SAI transmit complete callback ID */ 246 HAL_SAI_TX_HALFCOMPLETE_CB_ID = 0x03U, /*!< SAI transmit half complete callback ID */ 247 HAL_SAI_ERROR_CB_ID = 0x04U, /*!< SAI error callback ID */ 248 HAL_SAI_MSPINIT_CB_ID = 0x05U, /*!< SAI MSP init callback ID */ 249 HAL_SAI_MSPDEINIT_CB_ID = 0x06U /*!< SAI MSP de-init callback ID */ 250 } HAL_SAI_CallbackIDTypeDef; 251 252 /** 253 * @brief SAI callback pointer definition 254 */ 255 typedef void (*pSAI_CallbackTypeDef)(SAI_HandleTypeDef *hsai); 256 #endif 257 258 /** 259 * @} 260 */ 261 262 /* Exported constants --------------------------------------------------------*/ 263 264 /** @defgroup SAI_Exported_Constants SAI Exported Constants 265 * @{ 266 */ 267 268 /** @defgroup SAI_Error_Code SAI Error Code 269 * @{ 270 */ 271 #define HAL_SAI_ERROR_NONE ((uint32_t)0x00000000U) /*!< No error */ 272 #define HAL_SAI_ERROR_OVR ((uint32_t)0x00000001U) /*!< Overrun Error */ 273 #define HAL_SAI_ERROR_UDR ((uint32_t)0x00000002U) /*!< Underrun error */ 274 #define HAL_SAI_ERROR_AFSDET ((uint32_t)0x00000004U) /*!< Anticipated Frame synchronisation detection */ 275 #define HAL_SAI_ERROR_LFSDET ((uint32_t)0x00000008U) /*!< Late Frame synchronisation detection */ 276 #define HAL_SAI_ERROR_CNREADY ((uint32_t)0x00000010U) /*!< codec not ready */ 277 #define HAL_SAI_ERROR_WCKCFG ((uint32_t)0x00000020U) /*!< Wrong clock configuration */ 278 #define HAL_SAI_ERROR_TIMEOUT ((uint32_t)0x00000040U) /*!< Timeout error */ 279 #define HAL_SAI_ERROR_DMA ((uint32_t)0x00000080U) /*!< DMA error */ 280 #if (USE_HAL_SAI_REGISTER_CALLBACKS == 1) 281 #define HAL_SAI_ERROR_INVALID_CALLBACK 0x00000100U /*!< Invalid callback error */ 282 #endif 283 /** 284 * @} 285 */ 286 287 /** @defgroup SAI_Block_SyncExt SAI External synchronisation 288 * @{ 289 */ 290 #define SAI_SYNCEXT_DISABLE 0 291 #define SAI_SYNCEXT_OUTBLOCKA_ENABLE 1 292 #define SAI_SYNCEXT_OUTBLOCKB_ENABLE 2 293 /** 294 * @} 295 */ 296 297 /** @defgroup SAI_Protocol SAI Supported protocol 298 * @{ 299 */ 300 #define SAI_I2S_STANDARD 0 301 #define SAI_I2S_MSBJUSTIFIED 1 302 #define SAI_I2S_LSBJUSTIFIED 2 303 #define SAI_PCM_LONG 3 304 #define SAI_PCM_SHORT 4 305 /** 306 * @} 307 */ 308 309 /** @defgroup SAI_Protocol_DataSize SAI protocol data size 310 * @{ 311 */ 312 #define SAI_PROTOCOL_DATASIZE_16BIT 0 313 #define SAI_PROTOCOL_DATASIZE_16BITEXTENDED 1 314 #define SAI_PROTOCOL_DATASIZE_24BIT 2 315 #define SAI_PROTOCOL_DATASIZE_32BIT 3 316 /** 317 * @} 318 */ 319 320 /** @defgroup SAI_Audio_Frequency SAI Audio Frequency 321 * @{ 322 */ 323 #define SAI_AUDIO_FREQUENCY_192K ((uint32_t)192000U) 324 #define SAI_AUDIO_FREQUENCY_96K ((uint32_t)96000U) 325 #define SAI_AUDIO_FREQUENCY_48K ((uint32_t)48000U) 326 #define SAI_AUDIO_FREQUENCY_44K ((uint32_t)44100U) 327 #define SAI_AUDIO_FREQUENCY_32K ((uint32_t)32000U) 328 #define SAI_AUDIO_FREQUENCY_22K ((uint32_t)22050U) 329 #define SAI_AUDIO_FREQUENCY_16K ((uint32_t)16000U) 330 #define SAI_AUDIO_FREQUENCY_11K ((uint32_t)11025U) 331 #define SAI_AUDIO_FREQUENCY_8K ((uint32_t)8000U) 332 #define SAI_AUDIO_FREQUENCY_MCKDIV ((uint32_t)0U) 333 /** 334 * @} 335 */ 336 337 /** @defgroup SAI_Block_Mode SAI Block Mode 338 * @{ 339 */ 340 #define SAI_MODEMASTER_TX ((uint32_t)0x00000000U) 341 #define SAI_MODEMASTER_RX ((uint32_t)SAI_xCR1_MODE_0) 342 #define SAI_MODESLAVE_TX ((uint32_t)SAI_xCR1_MODE_1) 343 #define SAI_MODESLAVE_RX ((uint32_t)(SAI_xCR1_MODE_1 | SAI_xCR1_MODE_0)) 344 345 /** 346 * @} 347 */ 348 349 /** @defgroup SAI_Block_Protocol SAI Block Protocol 350 * @{ 351 */ 352 #define SAI_FREE_PROTOCOL ((uint32_t)0x00000000U) 353 #define SAI_SPDIF_PROTOCOL ((uint32_t)SAI_xCR1_PRTCFG_0) 354 #define SAI_AC97_PROTOCOL ((uint32_t)SAI_xCR1_PRTCFG_1) 355 /** 356 * @} 357 */ 358 359 /** @defgroup SAI_Block_Data_Size SAI Block Data Size 360 * @{ 361 */ 362 #define SAI_DATASIZE_8 ((uint32_t)SAI_xCR1_DS_1) 363 #define SAI_DATASIZE_10 ((uint32_t)(SAI_xCR1_DS_1 | SAI_xCR1_DS_0)) 364 #define SAI_DATASIZE_16 ((uint32_t)SAI_xCR1_DS_2) 365 #define SAI_DATASIZE_20 ((uint32_t)(SAI_xCR1_DS_2 | SAI_xCR1_DS_0)) 366 #define SAI_DATASIZE_24 ((uint32_t)(SAI_xCR1_DS_2 | SAI_xCR1_DS_1)) 367 #define SAI_DATASIZE_32 ((uint32_t)(SAI_xCR1_DS_2 | SAI_xCR1_DS_1 | SAI_xCR1_DS_0)) 368 /** 369 * @} 370 */ 371 372 /** @defgroup SAI_Block_MSB_LSB_transmission SAI Block MSB LSB transmission 373 * @{ 374 */ 375 #define SAI_FIRSTBIT_MSB ((uint32_t)0x00000000U) 376 #define SAI_FIRSTBIT_LSB ((uint32_t)SAI_xCR1_LSBFIRST) 377 /** 378 * @} 379 */ 380 381 /** @defgroup SAI_Block_Clock_Strobing SAI Block Clock Strobing 382 * @{ 383 */ 384 #define SAI_CLOCKSTROBING_FALLINGEDGE 0 385 #define SAI_CLOCKSTROBING_RISINGEDGE 1 386 /** 387 * @} 388 */ 389 390 /** @defgroup SAI_Block_Synchronization SAI Block Synchronization 391 * @{ 392 */ 393 #define SAI_ASYNCHRONOUS 0 /*!< Asynchronous */ 394 #define SAI_SYNCHRONOUS 1 /*!< Synchronous with other block of same SAI */ 395 #define SAI_SYNCHRONOUS_EXT_SAI1 2 /*!< Synchronous with other SAI, SAI1 */ 396 #define SAI_SYNCHRONOUS_EXT_SAI2 3 /*!< Synchronous with other SAI, SAI2 */ 397 /** 398 * @} 399 */ 400 401 /** @defgroup SAI_Block_Output_Drive SAI Block Output Drive 402 * @{ 403 */ 404 #define SAI_OUTPUTDRIVE_DISABLE ((uint32_t)0x00000000U) 405 #define SAI_OUTPUTDRIVE_ENABLE ((uint32_t)SAI_xCR1_OUTDRIV) 406 /** 407 * @} 408 */ 409 410 /** @defgroup SAI_Block_NoDivider SAI Block NoDivider 411 * @{ 412 */ 413 #define SAI_MASTERDIVIDER_ENABLE ((uint32_t)0x00000000U) 414 #define SAI_MASTERDIVIDER_DISABLE ((uint32_t)SAI_xCR1_NODIV) 415 /** 416 * @} 417 */ 418 419 /** @defgroup SAI_Block_FS_Definition SAI Block FS Definition 420 * @{ 421 */ 422 #define SAI_FS_STARTFRAME ((uint32_t)0x00000000U) 423 #define SAI_FS_CHANNEL_IDENTIFICATION ((uint32_t)SAI_xFRCR_FSDEF) 424 /** 425 * @} 426 */ 427 428 /** @defgroup SAI_Block_FS_Polarity SAI Block FS Polarity 429 * @{ 430 */ 431 #define SAI_FS_ACTIVE_LOW ((uint32_t)0x00000000U) 432 #define SAI_FS_ACTIVE_HIGH ((uint32_t)SAI_xFRCR_FSPOL) 433 /** 434 * @} 435 */ 436 437 /** @defgroup SAI_Block_FS_Offset SAI Block FS Offset 438 * @{ 439 */ 440 #define SAI_FS_FIRSTBIT ((uint32_t)0x00000000U) 441 #define SAI_FS_BEFOREFIRSTBIT ((uint32_t)SAI_xFRCR_FSOFF) 442 /** 443 * @} 444 */ 445 446 /** @defgroup SAI_Block_Slot_Size SAI Block Slot Size 447 * @{ 448 */ 449 #define SAI_SLOTSIZE_DATASIZE ((uint32_t)0x00000000U) 450 #define SAI_SLOTSIZE_16B ((uint32_t)SAI_xSLOTR_SLOTSZ_0) 451 #define SAI_SLOTSIZE_32B ((uint32_t)SAI_xSLOTR_SLOTSZ_1) 452 /** 453 * @} 454 */ 455 456 /** @defgroup SAI_Block_Slot_Active SAI Block Slot Active 457 * @{ 458 */ 459 #define SAI_SLOT_NOTACTIVE ((uint32_t)0x00000000U) 460 #define SAI_SLOTACTIVE_0 ((uint32_t)0x00000001U) 461 #define SAI_SLOTACTIVE_1 ((uint32_t)0x00000002U) 462 #define SAI_SLOTACTIVE_2 ((uint32_t)0x00000004U) 463 #define SAI_SLOTACTIVE_3 ((uint32_t)0x00000008U) 464 #define SAI_SLOTACTIVE_4 ((uint32_t)0x00000010U) 465 #define SAI_SLOTACTIVE_5 ((uint32_t)0x00000020U) 466 #define SAI_SLOTACTIVE_6 ((uint32_t)0x00000040U) 467 #define SAI_SLOTACTIVE_7 ((uint32_t)0x00000080U) 468 #define SAI_SLOTACTIVE_8 ((uint32_t)0x00000100U) 469 #define SAI_SLOTACTIVE_9 ((uint32_t)0x00000200U) 470 #define SAI_SLOTACTIVE_10 ((uint32_t)0x00000400U) 471 #define SAI_SLOTACTIVE_11 ((uint32_t)0x00000800U) 472 #define SAI_SLOTACTIVE_12 ((uint32_t)0x00001000U) 473 #define SAI_SLOTACTIVE_13 ((uint32_t)0x00002000U) 474 #define SAI_SLOTACTIVE_14 ((uint32_t)0x00004000U) 475 #define SAI_SLOTACTIVE_15 ((uint32_t)0x00008000U) 476 #define SAI_SLOTACTIVE_ALL ((uint32_t)0x0000FFFFU) 477 /** 478 * @} 479 */ 480 481 /** @defgroup SAI_Mono_Stereo_Mode SAI Mono Stereo Mode 482 * @{ 483 */ 484 #define SAI_STEREOMODE ((uint32_t)0x00000000U) 485 #define SAI_MONOMODE ((uint32_t)SAI_xCR1_MONO) 486 /** 487 * @} 488 */ 489 490 /** @defgroup SAI_TRIState_Management SAI TRIState Management 491 * @{ 492 */ 493 #define SAI_OUTPUT_NOTRELEASED ((uint32_t)0x00000000U) 494 #define SAI_OUTPUT_RELEASED ((uint32_t)SAI_xCR2_TRIS) 495 /** 496 * @} 497 */ 498 499 /** @defgroup SAI_Block_Fifo_Threshold SAI Block Fifo Threshold 500 * @{ 501 */ 502 #define SAI_FIFOTHRESHOLD_EMPTY ((uint32_t)0x00000000U) 503 #define SAI_FIFOTHRESHOLD_1QF ((uint32_t)(SAI_xCR2_FTH_0)) 504 #define SAI_FIFOTHRESHOLD_HF ((uint32_t)(SAI_xCR2_FTH_1)) 505 #define SAI_FIFOTHRESHOLD_3QF ((uint32_t)(SAI_xCR2_FTH_1 | SAI_xCR2_FTH_0)) 506 #define SAI_FIFOTHRESHOLD_FULL ((uint32_t)(SAI_xCR2_FTH_2)) 507 /** 508 * @} 509 */ 510 511 /** @defgroup SAI_Block_Companding_Mode SAI Block Companding Mode 512 * @{ 513 */ 514 #define SAI_NOCOMPANDING ((uint32_t)0x00000000U) 515 #define SAI_ULAW_1CPL_COMPANDING ((uint32_t)(SAI_xCR2_COMP_1)) 516 #define SAI_ALAW_1CPL_COMPANDING ((uint32_t)(SAI_xCR2_COMP_1 | SAI_xCR2_COMP_0)) 517 #define SAI_ULAW_2CPL_COMPANDING ((uint32_t)(SAI_xCR2_COMP_1 | SAI_xCR2_CPL)) 518 #define SAI_ALAW_2CPL_COMPANDING ((uint32_t)(SAI_xCR2_COMP_1 | SAI_xCR2_COMP_0 | SAI_xCR2_CPL)) 519 /** 520 * @} 521 */ 522 523 /** @defgroup SAI_Block_Mute_Value SAI Block Mute Value 524 * @{ 525 */ 526 #define SAI_ZERO_VALUE ((uint32_t)0x00000000U) 527 #define SAI_LAST_SENT_VALUE ((uint32_t)SAI_xCR2_MUTEVAL) 528 /** 529 * @} 530 */ 531 532 /** @defgroup SAI_Block_Interrupts_Definition SAI Block Interrupts Definition 533 * @{ 534 */ 535 #define SAI_IT_OVRUDR ((uint32_t)SAI_xIMR_OVRUDRIE) 536 #define SAI_IT_MUTEDET ((uint32_t)SAI_xIMR_MUTEDETIE) 537 #define SAI_IT_WCKCFG ((uint32_t)SAI_xIMR_WCKCFGIE) 538 #define SAI_IT_FREQ ((uint32_t)SAI_xIMR_FREQIE) 539 #define SAI_IT_CNRDY ((uint32_t)SAI_xIMR_CNRDYIE) 540 #define SAI_IT_AFSDET ((uint32_t)SAI_xIMR_AFSDETIE) 541 #define SAI_IT_LFSDET ((uint32_t)SAI_xIMR_LFSDETIE) 542 /** 543 * @} 544 */ 545 546 /** @defgroup SAI_Block_Flags_Definition SAI Block Flags Definition 547 * @{ 548 */ 549 #define SAI_FLAG_OVRUDR ((uint32_t)SAI_xSR_OVRUDR) 550 #define SAI_FLAG_MUTEDET ((uint32_t)SAI_xSR_MUTEDET) 551 #define SAI_FLAG_WCKCFG ((uint32_t)SAI_xSR_WCKCFG) 552 #define SAI_FLAG_FREQ ((uint32_t)SAI_xSR_FREQ) 553 #define SAI_FLAG_CNRDY ((uint32_t)SAI_xSR_CNRDY) 554 #define SAI_FLAG_AFSDET ((uint32_t)SAI_xSR_AFSDET) 555 #define SAI_FLAG_LFSDET ((uint32_t)SAI_xSR_LFSDET) 556 /** 557 * @} 558 */ 559 560 /** @defgroup SAI_Block_Fifo_Status_Level SAI Block Fifo Status Level 561 * @{ 562 */ 563 #define SAI_FIFOSTATUS_EMPTY ((uint32_t)0x00000000U) 564 #define SAI_FIFOSTATUS_LESS1QUARTERFULL ((uint32_t)0x00010000U) 565 #define SAI_FIFOSTATUS_1QUARTERFULL ((uint32_t)0x00020000U) 566 #define SAI_FIFOSTATUS_HALFFULL ((uint32_t)0x00030000U) 567 #define SAI_FIFOSTATUS_3QUARTERFULL ((uint32_t)0x00040000U) 568 #define SAI_FIFOSTATUS_FULL ((uint32_t)0x00050000U) 569 /** 570 * @} 571 */ 572 573 /** 574 * @} 575 */ 576 577 /* Exported macro ------------------------------------------------------------*/ 578 /** @defgroup SAI_Exported_Macros SAI Exported Macros 579 * @brief macros to handle interrupts and specific configurations 580 * @{ 581 */ 582 583 /** @brief Reset SAI handle state. 584 * @param __HANDLE__ specifies the SAI Handle. 585 * @retval None 586 */ 587 #if (USE_HAL_SAI_REGISTER_CALLBACKS == 1) 588 #define __HAL_SAI_RESET_HANDLE_STATE(__HANDLE__) do{ \ 589 (__HANDLE__)->State = HAL_SAI_STATE_RESET; \ 590 (__HANDLE__)->MspInitCallback = NULL; \ 591 (__HANDLE__)->MspDeInitCallback = NULL; \ 592 } while(0U) 593 #else 594 #define __HAL_SAI_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_SAI_STATE_RESET) 595 #endif /* USE_HAL_SAI_REGISTER_CALLBACKS */ 596 597 /** @brief Enable or disable the specified SAI interrupts. 598 * @param __HANDLE__ specifies the SAI Handle. 599 * @param __INTERRUPT__ specifies the interrupt source to enable or disable. 600 * This parameter can be one of the following values: 601 * @arg SAI_IT_OVRUDR: Overrun underrun interrupt enable 602 * @arg SAI_IT_MUTEDET: Mute detection interrupt enable 603 * @arg SAI_IT_WCKCFG: Wrong Clock Configuration interrupt enable 604 * @arg SAI_IT_FREQ: FIFO request interrupt enable 605 * @arg SAI_IT_CNRDY: Codec not ready interrupt enable 606 * @arg SAI_IT_AFSDET: Anticipated frame synchronization detection interrupt enable 607 * @arg SAI_IT_LFSDET: Late frame synchronization detection interrupt enable 608 * @retval None 609 */ 610 #define __HAL_SAI_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->IMR |= (__INTERRUPT__)) 611 #define __HAL_SAI_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->IMR &= (~(__INTERRUPT__))) 612 613 /** @brief Check whether the specified SAI interrupt source is enabled or not. 614 * @param __HANDLE__ specifies the SAI Handle. 615 * @param __INTERRUPT__ specifies the SAI interrupt source to check. 616 * This parameter can be one of the following values: 617 * @arg SAI_IT_OVRUDR: Overrun underrun interrupt enable 618 * @arg SAI_IT_MUTEDET: Mute detection interrupt enable 619 * @arg SAI_IT_WCKCFG: Wrong Clock Configuration interrupt enable 620 * @arg SAI_IT_FREQ: FIFO request interrupt enable 621 * @arg SAI_IT_CNRDY: Codec not ready interrupt enable 622 * @arg SAI_IT_AFSDET: Anticipated frame synchronization detection interrupt enable 623 * @arg SAI_IT_LFSDET: Late frame synchronization detection interrupt enable 624 * @retval The new state of __INTERRUPT__ (TRUE or FALSE). 625 */ 626 #define __HAL_SAI_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->IMR & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET) 627 628 /** @brief Check whether the specified SAI flag is set or not. 629 * @param __HANDLE__ specifies the SAI Handle. 630 * @param __FLAG__ specifies the flag to check. 631 * This parameter can be one of the following values: 632 * @arg SAI_FLAG_OVRUDR: Overrun underrun flag. 633 * @arg SAI_FLAG_MUTEDET: Mute detection flag. 634 * @arg SAI_FLAG_WCKCFG: Wrong Clock Configuration flag. 635 * @arg SAI_FLAG_FREQ: FIFO request flag. 636 * @arg SAI_FLAG_CNRDY: Codec not ready flag. 637 * @arg SAI_FLAG_AFSDET: Anticipated frame synchronization detection flag. 638 * @arg SAI_FLAG_LFSDET: Late frame synchronization detection flag. 639 * @retval The new state of __FLAG__ (TRUE or FALSE). 640 */ 641 #define __HAL_SAI_GET_FLAG(__HANDLE__, __FLAG__) ((((__HANDLE__)->Instance->SR) & (__FLAG__)) == (__FLAG__)) 642 643 /** @brief Clear the specified SAI pending flag. 644 * @param __HANDLE__ specifies the SAI Handle. 645 * @param __FLAG__ specifies the flag to check. 646 * This parameter can be any combination of the following values: 647 * @arg SAI_FLAG_OVRUDR: Clear Overrun underrun 648 * @arg SAI_FLAG_MUTEDET: Clear Mute detection 649 * @arg SAI_FLAG_WCKCFG: Clear Wrong Clock Configuration 650 * @arg SAI_FLAG_FREQ: Clear FIFO request 651 * @arg SAI_FLAG_CNRDY: Clear Codec not ready 652 * @arg SAI_FLAG_AFSDET: Clear Anticipated frame synchronization detection 653 * @arg SAI_FLAG_LFSDET: Clear Late frame synchronization detection 654 * 655 * @retval None 656 */ 657 #define __HAL_SAI_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->CLRFR = (__FLAG__)) 658 659 #define __HAL_SAI_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 |= SAI_xCR1_SAIEN) 660 #define __HAL_SAI_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 &= ~SAI_xCR1_SAIEN) 661 662 /** 663 * @} 664 */ 665 666 /* Exported functions --------------------------------------------------------*/ 667 /** @addtogroup SAI_Exported_Functions 668 * @{ 669 */ 670 671 /* Initialization/de-initialization functions ********************************/ 672 /** @addtogroup SAI_Exported_Functions_Group1 673 * @{ 674 */ 675 HAL_StatusTypeDef HAL_SAI_InitProtocol(SAI_HandleTypeDef *hsai, uint32_t protocol, uint32_t datasize, uint32_t nbslot); 676 HAL_StatusTypeDef HAL_SAI_Init(SAI_HandleTypeDef *hsai); 677 HAL_StatusTypeDef HAL_SAI_DeInit(SAI_HandleTypeDef *hsai); 678 void HAL_SAI_MspInit(SAI_HandleTypeDef *hsai); 679 void HAL_SAI_MspDeInit(SAI_HandleTypeDef *hsai); 680 681 #if (USE_HAL_SAI_REGISTER_CALLBACKS == 1) 682 /* SAI callbacks register/unregister functions ********************************/ 683 HAL_StatusTypeDef HAL_SAI_RegisterCallback(SAI_HandleTypeDef *hsai, 684 HAL_SAI_CallbackIDTypeDef CallbackID, 685 pSAI_CallbackTypeDef pCallback); 686 HAL_StatusTypeDef HAL_SAI_UnRegisterCallback(SAI_HandleTypeDef *hsai, 687 HAL_SAI_CallbackIDTypeDef CallbackID); 688 #endif 689 /** 690 * @} 691 */ 692 693 /* I/O operation functions ***************************************************/ 694 695 /** @addtogroup SAI_Exported_Functions_Group2 696 * @{ 697 */ 698 /* Blocking mode: Polling */ 699 HAL_StatusTypeDef HAL_SAI_Transmit(SAI_HandleTypeDef *hsai, uint8_t *pData, uint16_t Size, uint32_t Timeout); 700 HAL_StatusTypeDef HAL_SAI_Receive(SAI_HandleTypeDef *hsai, uint8_t *pData, uint16_t Size, uint32_t Timeout); 701 702 /* Non-Blocking mode: Interrupt */ 703 HAL_StatusTypeDef HAL_SAI_Transmit_IT(SAI_HandleTypeDef *hsai, uint8_t *pData, uint16_t Size); 704 HAL_StatusTypeDef HAL_SAI_Receive_IT(SAI_HandleTypeDef *hsai, uint8_t *pData, uint16_t Size); 705 706 /* Non-Blocking mode: DMA */ 707 HAL_StatusTypeDef HAL_SAI_Transmit_DMA(SAI_HandleTypeDef *hsai, uint8_t *pData, uint16_t Size); 708 HAL_StatusTypeDef HAL_SAI_Receive_DMA(SAI_HandleTypeDef *hsai, uint8_t *pData, uint16_t Size); 709 HAL_StatusTypeDef HAL_SAI_DMAPause(SAI_HandleTypeDef *hsai); 710 HAL_StatusTypeDef HAL_SAI_DMAResume(SAI_HandleTypeDef *hsai); 711 HAL_StatusTypeDef HAL_SAI_DMAStop(SAI_HandleTypeDef *hsai); 712 713 /* Abort function */ 714 HAL_StatusTypeDef HAL_SAI_Abort(SAI_HandleTypeDef *hsai); 715 716 /* Mute management */ 717 HAL_StatusTypeDef HAL_SAI_EnableTxMuteMode(SAI_HandleTypeDef *hsai, uint16_t val); 718 HAL_StatusTypeDef HAL_SAI_DisableTxMuteMode(SAI_HandleTypeDef *hsai); 719 HAL_StatusTypeDef HAL_SAI_EnableRxMuteMode(SAI_HandleTypeDef *hsai, SAIcallback callback, uint16_t counter); 720 HAL_StatusTypeDef HAL_SAI_DisableRxMuteMode(SAI_HandleTypeDef *hsai); 721 722 /* SAI IRQHandler and Callbacks used in non blocking modes (Interrupt and DMA) */ 723 void HAL_SAI_IRQHandler(SAI_HandleTypeDef *hsai); 724 void HAL_SAI_TxHalfCpltCallback(SAI_HandleTypeDef *hsai); 725 void HAL_SAI_TxCpltCallback(SAI_HandleTypeDef *hsai); 726 void HAL_SAI_RxHalfCpltCallback(SAI_HandleTypeDef *hsai); 727 void HAL_SAI_RxCpltCallback(SAI_HandleTypeDef *hsai); 728 void HAL_SAI_ErrorCallback(SAI_HandleTypeDef *hsai); 729 /** 730 * @} 731 */ 732 733 /** @addtogroup SAI_Exported_Functions_Group3 734 * @{ 735 */ 736 /* Peripheral State functions ************************************************/ 737 HAL_SAI_StateTypeDef HAL_SAI_GetState(const SAI_HandleTypeDef *hsai); 738 uint32_t HAL_SAI_GetError(const SAI_HandleTypeDef *hsai); 739 /** 740 * @} 741 */ 742 743 /** 744 * @} 745 */ 746 747 /* Private macros ------------------------------------------------------------*/ 748 /** @addtogroup SAI_Private_Macros 749 * @{ 750 */ 751 #define IS_SAI_BLOCK_SYNCEXT(STATE) (((STATE) == SAI_SYNCEXT_DISABLE) ||\ 752 ((STATE) == SAI_SYNCEXT_OUTBLOCKA_ENABLE) ||\ 753 ((STATE) == SAI_SYNCEXT_OUTBLOCKB_ENABLE)) 754 755 #define IS_SAI_SUPPORTED_PROTOCOL(PROTOCOL) (((PROTOCOL) == SAI_I2S_STANDARD) ||\ 756 ((PROTOCOL) == SAI_I2S_MSBJUSTIFIED) ||\ 757 ((PROTOCOL) == SAI_I2S_LSBJUSTIFIED) ||\ 758 ((PROTOCOL) == SAI_PCM_LONG) ||\ 759 ((PROTOCOL) == SAI_PCM_SHORT)) 760 761 #define IS_SAI_PROTOCOL_DATASIZE(DATASIZE) (((DATASIZE) == SAI_PROTOCOL_DATASIZE_16BIT) ||\ 762 ((DATASIZE) == SAI_PROTOCOL_DATASIZE_16BITEXTENDED) ||\ 763 ((DATASIZE) == SAI_PROTOCOL_DATASIZE_24BIT) ||\ 764 ((DATASIZE) == SAI_PROTOCOL_DATASIZE_32BIT)) 765 766 #define IS_SAI_AUDIO_FREQUENCY(AUDIO) (((AUDIO) == SAI_AUDIO_FREQUENCY_192K) || ((AUDIO) == SAI_AUDIO_FREQUENCY_96K) || \ 767 ((AUDIO) == SAI_AUDIO_FREQUENCY_48K) || ((AUDIO) == SAI_AUDIO_FREQUENCY_44K) || \ 768 ((AUDIO) == SAI_AUDIO_FREQUENCY_32K) || ((AUDIO) == SAI_AUDIO_FREQUENCY_22K) || \ 769 ((AUDIO) == SAI_AUDIO_FREQUENCY_16K) || ((AUDIO) == SAI_AUDIO_FREQUENCY_11K) || \ 770 ((AUDIO) == SAI_AUDIO_FREQUENCY_8K) || ((AUDIO) == SAI_AUDIO_FREQUENCY_MCKDIV)) 771 772 #define IS_SAI_BLOCK_MODE(MODE) (((MODE) == SAI_MODEMASTER_TX) || \ 773 ((MODE) == SAI_MODEMASTER_RX) || \ 774 ((MODE) == SAI_MODESLAVE_TX) || \ 775 ((MODE) == SAI_MODESLAVE_RX)) 776 777 #define IS_SAI_BLOCK_PROTOCOL(PROTOCOL) (((PROTOCOL) == SAI_FREE_PROTOCOL) || \ 778 ((PROTOCOL) == SAI_AC97_PROTOCOL) || \ 779 ((PROTOCOL) == SAI_SPDIF_PROTOCOL)) 780 781 #define IS_SAI_BLOCK_DATASIZE(DATASIZE) (((DATASIZE) == SAI_DATASIZE_8) || \ 782 ((DATASIZE) == SAI_DATASIZE_10) || \ 783 ((DATASIZE) == SAI_DATASIZE_16) || \ 784 ((DATASIZE) == SAI_DATASIZE_20) || \ 785 ((DATASIZE) == SAI_DATASIZE_24) || \ 786 ((DATASIZE) == SAI_DATASIZE_32)) 787 788 #define IS_SAI_BLOCK_FIRST_BIT(BIT) (((BIT) == SAI_FIRSTBIT_MSB) || \ 789 ((BIT) == SAI_FIRSTBIT_LSB)) 790 791 #define IS_SAI_BLOCK_CLOCK_STROBING(CLOCK) (((CLOCK) == SAI_CLOCKSTROBING_FALLINGEDGE) || \ 792 ((CLOCK) == SAI_CLOCKSTROBING_RISINGEDGE)) 793 794 #define IS_SAI_BLOCK_SYNCHRO(SYNCHRO) (((SYNCHRO) == SAI_ASYNCHRONOUS) || \ 795 ((SYNCHRO) == SAI_SYNCHRONOUS) || \ 796 ((SYNCHRO) == SAI_SYNCHRONOUS_EXT_SAI1) || \ 797 ((SYNCHRO) == SAI_SYNCHRONOUS_EXT_SAI2)) 798 799 #define IS_SAI_BLOCK_OUTPUT_DRIVE(DRIVE) (((DRIVE) == SAI_OUTPUTDRIVE_DISABLE) || \ 800 ((DRIVE) == SAI_OUTPUTDRIVE_ENABLE)) 801 802 #define IS_SAI_BLOCK_NODIVIDER(NODIVIDER) (((NODIVIDER) == SAI_MASTERDIVIDER_ENABLE) || \ 803 ((NODIVIDER) == SAI_MASTERDIVIDER_DISABLE)) 804 805 #define IS_SAI_BLOCK_MUTE_COUNTER(COUNTER) ((COUNTER) <= 63) 806 807 #define IS_SAI_BLOCK_MUTE_VALUE(VALUE) (((VALUE) == SAI_ZERO_VALUE) || \ 808 ((VALUE) == SAI_LAST_SENT_VALUE)) 809 810 #define IS_SAI_BLOCK_COMPANDING_MODE(MODE) (((MODE) == SAI_NOCOMPANDING) || \ 811 ((MODE) == SAI_ULAW_1CPL_COMPANDING) || \ 812 ((MODE) == SAI_ALAW_1CPL_COMPANDING) || \ 813 ((MODE) == SAI_ULAW_2CPL_COMPANDING) || \ 814 ((MODE) == SAI_ALAW_2CPL_COMPANDING)) 815 816 #define IS_SAI_BLOCK_FIFO_THRESHOLD(THRESHOLD) (((THRESHOLD) == SAI_FIFOTHRESHOLD_EMPTY) || \ 817 ((THRESHOLD) == SAI_FIFOTHRESHOLD_1QF) || \ 818 ((THRESHOLD) == SAI_FIFOTHRESHOLD_HF) || \ 819 ((THRESHOLD) == SAI_FIFOTHRESHOLD_3QF) || \ 820 ((THRESHOLD) == SAI_FIFOTHRESHOLD_FULL)) 821 822 #define IS_SAI_BLOCK_TRISTATE_MANAGEMENT(STATE) (((STATE) == SAI_OUTPUT_NOTRELEASED) ||\ 823 ((STATE) == SAI_OUTPUT_RELEASED)) 824 825 #define IS_SAI_MONO_STEREO_MODE(MODE) (((MODE) == SAI_MONOMODE) ||\ 826 ((MODE) == SAI_STEREOMODE)) 827 828 #define IS_SAI_SLOT_ACTIVE(ACTIVE) ((ACTIVE) <= SAI_SLOTACTIVE_ALL) 829 830 #define IS_SAI_BLOCK_SLOT_NUMBER(NUMBER) ((1 <= (NUMBER)) && ((NUMBER) <= 16)) 831 832 #define IS_SAI_BLOCK_SLOT_SIZE(SIZE) (((SIZE) == SAI_SLOTSIZE_DATASIZE) || \ 833 ((SIZE) == SAI_SLOTSIZE_16B) || \ 834 ((SIZE) == SAI_SLOTSIZE_32B)) 835 836 #define IS_SAI_BLOCK_FIRSTBIT_OFFSET(OFFSET) ((OFFSET) <= 24) 837 838 #define IS_SAI_BLOCK_FS_OFFSET(OFFSET) (((OFFSET) == SAI_FS_FIRSTBIT) || \ 839 ((OFFSET) == SAI_FS_BEFOREFIRSTBIT)) 840 841 #define IS_SAI_BLOCK_FS_POLARITY(POLARITY) (((POLARITY) == SAI_FS_ACTIVE_LOW) || \ 842 ((POLARITY) == SAI_FS_ACTIVE_HIGH)) 843 844 #define IS_SAI_BLOCK_FS_DEFINITION(DEFINITION) (((DEFINITION) == SAI_FS_STARTFRAME) || \ 845 ((DEFINITION) == SAI_FS_CHANNEL_IDENTIFICATION)) 846 847 #define IS_SAI_BLOCK_MASTER_DIVIDER(DIVIDER) ((DIVIDER) <= 15U) 848 849 #define IS_SAI_BLOCK_FRAME_LENGTH(LENGTH) ((8 <= (LENGTH)) && ((LENGTH) <= 256)) 850 851 #define IS_SAI_BLOCK_ACTIVE_FRAME(LENGTH) ((1 <= (LENGTH)) && ((LENGTH) <= 128)) 852 853 /** 854 * @} 855 */ 856 857 /* Private functions ---------------------------------------------------------*/ 858 /** @defgroup SAI_Private_Functions SAI Private Functions 859 * @{ 860 */ 861 862 /** 863 * @} 864 */ 865 866 /** 867 * @} 868 */ 869 870 /** 871 * @} 872 */ 873 874 #ifdef __cplusplus 875 } 876 #endif 877 878 #endif /* __STM32F7xx_HAL_SAI_H */ 879 880
