1 /** 2 ****************************************************************************** 3 * @file stm32f7xx_hal_pwr.h 4 * @author MCD Application Team 5 * @brief Header file of PWR HAL module. 6 ****************************************************************************** 7 * @attention 8 * 9 * Copyright (c) 2017 STMicroelectronics. 10 * All rights reserved. 11 * 12 * This software is licensed under terms that can be found in the LICENSE file 13 * in the root directory of this software component. 14 * If no LICENSE file comes with this software, it is provided AS-IS. 15 * 16 ****************************************************************************** 17 */ 18 19 /* Define to prevent recursive inclusion -------------------------------------*/ 20 #ifndef __STM32F7xx_HAL_PWR_H 21 #define __STM32F7xx_HAL_PWR_H 22 23 #ifdef __cplusplus 24 extern "C" { 25 #endif 26 27 /* Includes ------------------------------------------------------------------*/ 28 #include "stm32f7xx_hal_def.h" 29 30 /** @addtogroup STM32F7xx_HAL_Driver 31 * @{ 32 */ 33 34 /** @addtogroup PWR 35 * @{ 36 */ 37 38 /* Exported types ------------------------------------------------------------*/ 39 40 /** @defgroup PWR_Exported_Types PWR Exported Types 41 * @{ 42 */ 43 44 /** 45 * @brief PWR PVD configuration structure definition 46 */ 47 typedef struct 48 { 49 uint32_t PVDLevel; /*!< PVDLevel: Specifies the PVD detection level. 50 This parameter can be a value of @ref PWR_PVD_detection_level */ 51 52 uint32_t Mode; /*!< Mode: Specifies the operating mode for the selected pins. 53 This parameter can be a value of @ref PWR_PVD_Mode */ 54 }PWR_PVDTypeDef; 55 56 /** 57 * @} 58 */ 59 60 /* Exported constants --------------------------------------------------------*/ 61 /** @defgroup PWR_Exported_Constants PWR Exported Constants 62 * @{ 63 */ 64 65 /** @defgroup PWR_PVD_detection_level PWR PVD detection level 66 * @{ 67 */ 68 #define PWR_PVDLEVEL_0 PWR_CR1_PLS_LEV0 69 #define PWR_PVDLEVEL_1 PWR_CR1_PLS_LEV1 70 #define PWR_PVDLEVEL_2 PWR_CR1_PLS_LEV2 71 #define PWR_PVDLEVEL_3 PWR_CR1_PLS_LEV3 72 #define PWR_PVDLEVEL_4 PWR_CR1_PLS_LEV4 73 #define PWR_PVDLEVEL_5 PWR_CR1_PLS_LEV5 74 #define PWR_PVDLEVEL_6 PWR_CR1_PLS_LEV6 75 #define PWR_PVDLEVEL_7 PWR_CR1_PLS_LEV7/* External input analog voltage 76 (Compare internally to VREFINT) */ 77 78 /** 79 * @} 80 */ 81 82 /** @defgroup PWR_PVD_Mode PWR PVD Mode 83 * @{ 84 */ 85 #define PWR_PVD_MODE_NORMAL ((uint32_t)0x00000000U) /*!< basic mode is used */ 86 #define PWR_PVD_MODE_IT_RISING ((uint32_t)0x00010001U) /*!< External Interrupt Mode with Rising edge trigger detection */ 87 #define PWR_PVD_MODE_IT_FALLING ((uint32_t)0x00010002U) /*!< External Interrupt Mode with Falling edge trigger detection */ 88 #define PWR_PVD_MODE_IT_RISING_FALLING ((uint32_t)0x00010003U) /*!< External Interrupt Mode with Rising/Falling edge trigger detection */ 89 #define PWR_PVD_MODE_EVENT_RISING ((uint32_t)0x00020001U) /*!< Event Mode with Rising edge trigger detection */ 90 #define PWR_PVD_MODE_EVENT_FALLING ((uint32_t)0x00020002U) /*!< Event Mode with Falling edge trigger detection */ 91 #define PWR_PVD_MODE_EVENT_RISING_FALLING ((uint32_t)0x00020003U) /*!< Event Mode with Rising/Falling edge trigger detection */ 92 /** 93 * @} 94 */ 95 96 /** @defgroup PWR_Regulator_state_in_STOP_mode PWR Regulator state in SLEEP/STOP mode 97 * @{ 98 */ 99 #define PWR_MAINREGULATOR_ON ((uint32_t)0x00000000U) 100 #define PWR_LOWPOWERREGULATOR_ON PWR_CR1_LPDS 101 /** 102 * @} 103 */ 104 105 /** @defgroup PWR_SLEEP_mode_entry PWR SLEEP mode entry 106 * @{ 107 */ 108 #define PWR_SLEEPENTRY_WFI ((uint8_t)0x01U) 109 #define PWR_SLEEPENTRY_WFE ((uint8_t)0x02U) 110 /** 111 * @} 112 */ 113 114 /** @defgroup PWR_STOP_mode_entry PWR STOP mode entry 115 * @{ 116 */ 117 #define PWR_STOPENTRY_WFI ((uint8_t)0x01U) 118 #define PWR_STOPENTRY_WFE ((uint8_t)0x02U) 119 /** 120 * @} 121 */ 122 123 /** @defgroup PWR_Regulator_Voltage_Scale PWR Regulator Voltage Scale 124 * @{ 125 */ 126 #define PWR_REGULATOR_VOLTAGE_SCALE1 PWR_CR1_VOS 127 #define PWR_REGULATOR_VOLTAGE_SCALE2 PWR_CR1_VOS_1 128 #define PWR_REGULATOR_VOLTAGE_SCALE3 PWR_CR1_VOS_0 129 /** 130 * @} 131 */ 132 133 /** @defgroup PWR_Flag PWR Flag 134 * @{ 135 */ 136 #define PWR_FLAG_WU PWR_CSR1_WUIF 137 #define PWR_FLAG_SB PWR_CSR1_SBF 138 #define PWR_FLAG_PVDO PWR_CSR1_PVDO 139 #define PWR_FLAG_BRR PWR_CSR1_BRR 140 #define PWR_FLAG_VOSRDY PWR_CSR1_VOSRDY 141 /** 142 * @} 143 */ 144 145 /** 146 * @} 147 */ 148 149 /* Exported macro ------------------------------------------------------------*/ 150 /** @defgroup PWR_Exported_Macro PWR Exported Macro 151 * @{ 152 */ 153 154 /** @brief macros configure the main internal regulator output voltage. 155 * @param __REGULATOR__ specifies the regulator output voltage to achieve 156 * a tradeoff between performance and power consumption when the device does 157 * not operate at the maximum frequency (refer to the datasheets for more details). 158 * This parameter can be one of the following values: 159 * @arg PWR_REGULATOR_VOLTAGE_SCALE1: Regulator voltage output Scale 1 mode 160 * @arg PWR_REGULATOR_VOLTAGE_SCALE2: Regulator voltage output Scale 2 mode 161 * @arg PWR_REGULATOR_VOLTAGE_SCALE3: Regulator voltage output Scale 3 mode 162 * @retval None 163 */ 164 #define __HAL_PWR_VOLTAGESCALING_CONFIG(__REGULATOR__) do { \ 165 __IO uint32_t tmpreg; \ 166 MODIFY_REG(PWR->CR1, PWR_CR1_VOS, (__REGULATOR__)); \ 167 /* Delay after an RCC peripheral clock enabling */ \ 168 tmpreg = READ_BIT(PWR->CR1, PWR_CR1_VOS); \ 169 UNUSED(tmpreg); \ 170 } while(0) 171 172 /** @brief Check PWR flag is set or not. 173 * @param __FLAG__ specifies the flag to check. 174 * This parameter can be one of the following values: 175 * @arg PWR_FLAG_WU: Wake Up flag. This flag indicates that a wakeup event 176 * was received on the internal wakeup line in standby mode (RTC alarm (Alarm A or Alarm B), 177 * RTC Tamper event, RTC TimeStamp event or RTC Wakeup)). 178 * @arg PWR_FLAG_SB: StandBy flag. This flag indicates that the system was 179 * resumed from StandBy mode. 180 * @arg PWR_FLAG_PVDO: PVD Output. This flag is valid only if PVD is enabled 181 * by the HAL_PWR_EnablePVD() function. The PVD is stopped by Standby mode 182 * For this reason, this bit is equal to 0 after Standby or reset 183 * until the PVDE bit is set. 184 * @arg PWR_FLAG_BRR: Backup regulator ready flag. This bit is not reset 185 * when the device wakes up from Standby mode or by a system reset 186 * or power reset. 187 * @arg PWR_FLAG_VOSRDY: This flag indicates that the Regulator voltage 188 * scaling output selection is ready. 189 * @retval The new state of __FLAG__ (TRUE or FALSE). 190 */ 191 #define __HAL_PWR_GET_FLAG(__FLAG__) ((PWR->CSR1 & (__FLAG__)) == (__FLAG__)) 192 193 /** @brief Clear the PWR's pending flags. 194 * @param __FLAG__ specifies the flag to clear. 195 * This parameter can be one of the following values: 196 * @arg PWR_FLAG_SB: StandBy flag 197 */ 198 #define __HAL_PWR_CLEAR_FLAG(__FLAG__) (PWR->CR1 |= (__FLAG__) << 2) 199 200 /** 201 * @brief Enable the PVD Exti Line 16. 202 * @retval None. 203 */ 204 #define __HAL_PWR_PVD_EXTI_ENABLE_IT() (EXTI->IMR |= (PWR_EXTI_LINE_PVD)) 205 206 /** 207 * @brief Disable the PVD EXTI Line 16. 208 * @retval None. 209 */ 210 #define __HAL_PWR_PVD_EXTI_DISABLE_IT() (EXTI->IMR &= ~(PWR_EXTI_LINE_PVD)) 211 212 /** 213 * @brief Enable event on PVD Exti Line 16. 214 * @retval None. 215 */ 216 #define __HAL_PWR_PVD_EXTI_ENABLE_EVENT() (EXTI->EMR |= (PWR_EXTI_LINE_PVD)) 217 218 /** 219 * @brief Disable event on PVD Exti Line 16. 220 * @retval None. 221 */ 222 #define __HAL_PWR_PVD_EXTI_DISABLE_EVENT() (EXTI->EMR &= ~(PWR_EXTI_LINE_PVD)) 223 224 /** 225 * @brief Enable the PVD Extended Interrupt Rising Trigger. 226 * @retval None. 227 */ 228 #define __HAL_PWR_PVD_EXTI_ENABLE_RISING_EDGE() SET_BIT(EXTI->RTSR, PWR_EXTI_LINE_PVD) 229 230 /** 231 * @brief Disable the PVD Extended Interrupt Rising Trigger. 232 * @retval None. 233 */ 234 #define __HAL_PWR_PVD_EXTI_DISABLE_RISING_EDGE() CLEAR_BIT(EXTI->RTSR, PWR_EXTI_LINE_PVD) 235 236 /** 237 * @brief Enable the PVD Extended Interrupt Falling Trigger. 238 * @retval None. 239 */ 240 #define __HAL_PWR_PVD_EXTI_ENABLE_FALLING_EDGE() SET_BIT(EXTI->FTSR, PWR_EXTI_LINE_PVD) 241 242 243 /** 244 * @brief Disable the PVD Extended Interrupt Falling Trigger. 245 * @retval None. 246 */ 247 #define __HAL_PWR_PVD_EXTI_DISABLE_FALLING_EDGE() CLEAR_BIT(EXTI->FTSR, PWR_EXTI_LINE_PVD) 248 249 250 /** 251 * @brief PVD EXTI line configuration: set rising & falling edge trigger. 252 * @retval None. 253 */ 254 #define __HAL_PWR_PVD_EXTI_ENABLE_RISING_FALLING_EDGE() __HAL_PWR_PVD_EXTI_ENABLE_RISING_EDGE();__HAL_PWR_PVD_EXTI_ENABLE_FALLING_EDGE(); 255 256 /** 257 * @brief Disable the PVD Extended Interrupt Rising & Falling Trigger. 258 * @retval None. 259 */ 260 #define __HAL_PWR_PVD_EXTI_DISABLE_RISING_FALLING_EDGE() __HAL_PWR_PVD_EXTI_DISABLE_RISING_EDGE();__HAL_PWR_PVD_EXTI_DISABLE_FALLING_EDGE(); 261 262 /** 263 * @brief checks whether the specified PVD Exti interrupt flag is set or not. 264 * @retval EXTI PVD Line Status. 265 */ 266 #define __HAL_PWR_PVD_EXTI_GET_FLAG() (EXTI->PR & (PWR_EXTI_LINE_PVD)) 267 268 /** 269 * @brief Clear the PVD Exti flag. 270 * @retval None. 271 */ 272 #define __HAL_PWR_PVD_EXTI_CLEAR_FLAG() (EXTI->PR = (PWR_EXTI_LINE_PVD)) 273 274 /** 275 * @brief Generates a Software interrupt on PVD EXTI line. 276 * @retval None 277 */ 278 #define __HAL_PWR_PVD_EXTI_GENERATE_SWIT() (EXTI->SWIER |= (PWR_EXTI_LINE_PVD)) 279 280 /** 281 * @} 282 */ 283 284 /* Include PWR HAL Extension module */ 285 #include "stm32f7xx_hal_pwr_ex.h" 286 287 /* Exported functions --------------------------------------------------------*/ 288 /** @addtogroup PWR_Exported_Functions PWR Exported Functions 289 * @{ 290 */ 291 292 /** @addtogroup PWR_Exported_Functions_Group1 Initialization and de-initialization functions 293 * @{ 294 */ 295 /* Initialization and de-initialization functions *****************************/ 296 void HAL_PWR_DeInit(void); 297 void HAL_PWR_EnableBkUpAccess(void); 298 void HAL_PWR_DisableBkUpAccess(void); 299 /** 300 * @} 301 */ 302 303 /** @addtogroup PWR_Exported_Functions_Group2 Peripheral Control functions 304 * @{ 305 */ 306 /* Peripheral Control functions **********************************************/ 307 /* PVD configuration */ 308 void HAL_PWR_ConfigPVD(PWR_PVDTypeDef *sConfigPVD); 309 void HAL_PWR_EnablePVD(void); 310 void HAL_PWR_DisablePVD(void); 311 312 /* WakeUp pins configuration */ 313 void HAL_PWR_EnableWakeUpPin(uint32_t WakeUpPinPolarity); 314 void HAL_PWR_DisableWakeUpPin(uint32_t WakeUpPinx); 315 316 /* Low Power modes entry */ 317 void HAL_PWR_EnterSTOPMode(uint32_t Regulator, uint8_t STOPEntry); 318 void HAL_PWR_EnterSLEEPMode(uint32_t Regulator, uint8_t SLEEPEntry); 319 void HAL_PWR_EnterSTANDBYMode(void); 320 321 /* Power PVD IRQ Handler */ 322 void HAL_PWR_PVD_IRQHandler(void); 323 void HAL_PWR_PVDCallback(void); 324 325 /* Cortex System Control functions *******************************************/ 326 void HAL_PWR_EnableSleepOnExit(void); 327 void HAL_PWR_DisableSleepOnExit(void); 328 void HAL_PWR_EnableSEVOnPend(void); 329 void HAL_PWR_DisableSEVOnPend(void); 330 /** 331 * @} 332 */ 333 334 /** 335 * @} 336 */ 337 338 /* Private types -------------------------------------------------------------*/ 339 /* Private variables ---------------------------------------------------------*/ 340 /* Private constants ---------------------------------------------------------*/ 341 /** @defgroup PWR_Private_Constants PWR Private Constants 342 * @{ 343 */ 344 345 /** @defgroup PWR_PVD_EXTI_Line PWR PVD EXTI Line 346 * @{ 347 */ 348 #define PWR_EXTI_LINE_PVD ((uint32_t)EXTI_IMR_IM16) /*!< External interrupt line 16 Connected to the PVD EXTI Line */ 349 /** 350 * @} 351 */ 352 353 /** 354 * @} 355 */ 356 /* Private macros ------------------------------------------------------------*/ 357 /** @defgroup PWR_Private_Macros PWR Private Macros 358 * @{ 359 */ 360 361 /** @defgroup PWR_IS_PWR_Definitions PWR Private macros to check input parameters 362 * @{ 363 */ 364 #define IS_PWR_PVD_LEVEL(LEVEL) (((LEVEL) == PWR_PVDLEVEL_0) || ((LEVEL) == PWR_PVDLEVEL_1)|| \ 365 ((LEVEL) == PWR_PVDLEVEL_2) || ((LEVEL) == PWR_PVDLEVEL_3)|| \ 366 ((LEVEL) == PWR_PVDLEVEL_4) || ((LEVEL) == PWR_PVDLEVEL_5)|| \ 367 ((LEVEL) == PWR_PVDLEVEL_6) || ((LEVEL) == PWR_PVDLEVEL_7)) 368 #define IS_PWR_PVD_MODE(MODE) (((MODE) == PWR_PVD_MODE_IT_RISING)|| ((MODE) == PWR_PVD_MODE_IT_FALLING) || \ 369 ((MODE) == PWR_PVD_MODE_IT_RISING_FALLING) || ((MODE) == PWR_PVD_MODE_EVENT_RISING) || \ 370 ((MODE) == PWR_PVD_MODE_EVENT_FALLING) || ((MODE) == PWR_PVD_MODE_EVENT_RISING_FALLING) || \ 371 ((MODE) == PWR_PVD_MODE_NORMAL)) 372 #define IS_PWR_REGULATOR(REGULATOR) (((REGULATOR) == PWR_MAINREGULATOR_ON) || \ 373 ((REGULATOR) == PWR_LOWPOWERREGULATOR_ON)) 374 #define IS_PWR_SLEEP_ENTRY(ENTRY) (((ENTRY) == PWR_SLEEPENTRY_WFI) || ((ENTRY) == PWR_SLEEPENTRY_WFE)) 375 #define IS_PWR_STOP_ENTRY(ENTRY) (((ENTRY) == PWR_STOPENTRY_WFI) || ((ENTRY) == PWR_STOPENTRY_WFE)) 376 #define IS_PWR_REGULATOR_VOLTAGE(VOLTAGE) (((VOLTAGE) == PWR_REGULATOR_VOLTAGE_SCALE1) || \ 377 ((VOLTAGE) == PWR_REGULATOR_VOLTAGE_SCALE2) || \ 378 ((VOLTAGE) == PWR_REGULATOR_VOLTAGE_SCALE3)) 379 380 /** 381 * @} 382 */ 383 384 /** 385 * @} 386 */ 387 388 /** 389 * @} 390 */ 391 392 /** 393 * @} 394 */ 395 396 #ifdef __cplusplus 397 } 398 #endif 399 400 401 #endif /* __STM32F7xx_HAL_PWR_H */ 402 403
