1 /** 2 ****************************************************************************** 3 * @file stm32f7xx_hal_flash_ex.h 4 * @author MCD Application Team 5 * @brief Header file of FLASH HAL Extension module. 6 ****************************************************************************** 7 * @attention 8 * 9 * Copyright (c) 2017 STMicroelectronics. 10 * All rights reserved. 11 * 12 * This software is licensed under terms that can be found in the LICENSE file in 13 * the root directory of this software component. 14 * If no LICENSE file comes with this software, it is provided AS-IS. 15 ****************************************************************************** 16 */ 17 18 /* Define to prevent recursive inclusion -------------------------------------*/ 19 #ifndef __STM32F7xx_HAL_FLASH_EX_H 20 #define __STM32F7xx_HAL_FLASH_EX_H 21 22 #ifdef __cplusplus 23 extern "C" { 24 #endif 25 26 /* Includes ------------------------------------------------------------------*/ 27 #include "stm32f7xx_hal_def.h" 28 29 /** @addtogroup STM32F7xx_HAL_Driver 30 * @{ 31 */ 32 33 /** @addtogroup FLASHEx 34 * @{ 35 */ 36 37 /* Exported types ------------------------------------------------------------*/ 38 /** @defgroup FLASHEx_Exported_Types FLASH Exported Types 39 * @{ 40 */ 41 42 /** 43 * @brief FLASH Erase structure definition 44 */ 45 typedef struct 46 { 47 uint32_t TypeErase; /*!< Mass erase or sector Erase. 48 This parameter can be a value of @ref FLASHEx_Type_Erase */ 49 50 #if defined (FLASH_OPTCR_nDBANK) 51 uint32_t Banks; /*!< Select banks to erase when Mass erase is enabled. 52 This parameter must be a value of @ref FLASHEx_Banks */ 53 #endif /* FLASH_OPTCR_nDBANK */ 54 55 uint32_t Sector; /*!< Initial FLASH sector to erase when Mass erase is disabled 56 This parameter must be a value of @ref FLASHEx_Sectors */ 57 58 uint32_t NbSectors; /*!< Number of sectors to be erased. 59 This parameter must be a value between 1 and (max number of sectors - value of Initial sector)*/ 60 61 uint32_t VoltageRange;/*!< The device voltage range which defines the erase parallelism 62 This parameter must be a value of @ref FLASHEx_Voltage_Range */ 63 64 } FLASH_EraseInitTypeDef; 65 66 /** 67 * @brief FLASH Option Bytes Program structure definition 68 */ 69 typedef struct 70 { 71 uint32_t OptionType; /*!< Option byte to be configured. 72 This parameter can be a value of @ref FLASHEx_Option_Type */ 73 74 uint32_t WRPState; /*!< Write protection activation or deactivation. 75 This parameter can be a value of @ref FLASHEx_WRP_State */ 76 77 uint32_t WRPSector; /*!< Specifies the sector(s) to be write protected. 78 The value of this parameter depend on device used within the same series */ 79 80 uint32_t RDPLevel; /*!< Set the read protection level. 81 This parameter can be a value of @ref FLASHEx_Option_Bytes_Read_Protection */ 82 83 uint32_t BORLevel; /*!< Set the BOR Level. 84 This parameter can be a value of @ref FLASHEx_BOR_Reset_Level */ 85 86 uint32_t USERConfig; /*!< Program the FLASH User Option Byte: WWDG_SW / IWDG_SW / RST_STOP / RST_STDBY / 87 IWDG_FREEZE_STOP / IWDG_FREEZE_SANDBY / nDBANK / nDBOOT. 88 nDBANK / nDBOOT are only available for STM32F76xxx/STM32F77xxx devices */ 89 90 uint32_t BootAddr0; /*!< Boot base address when Boot pin = 0. 91 This parameter can be a value of @ref FLASHEx_Boot_Address */ 92 93 uint32_t BootAddr1; /*!< Boot base address when Boot pin = 1. 94 This parameter can be a value of @ref FLASHEx_Boot_Address */ 95 96 #if defined (FLASH_OPTCR2_PCROP) 97 uint32_t PCROPSector; /*!< Set the PCROP sector. 98 This parameter can be a value of @ref FLASHEx_Option_Bytes_PCROP_Sectors */ 99 100 uint32_t PCROPRdp; /*!< Set the PCROP_RDP option. 101 This parameter can be a value of @ref FLASHEx_Option_Bytes_PCROP_RDP */ 102 #endif /* FLASH_OPTCR2_PCROP */ 103 104 } FLASH_OBProgramInitTypeDef; 105 106 /** 107 * @} 108 */ 109 /* Exported constants --------------------------------------------------------*/ 110 111 /** @defgroup FLASHEx_Exported_Constants FLASH Exported Constants 112 * @{ 113 */ 114 115 /** @defgroup FLASHEx_Type_Erase FLASH Type Erase 116 * @{ 117 */ 118 #define FLASH_TYPEERASE_SECTORS ((uint32_t)0x00U) /*!< Sectors erase only */ 119 #define FLASH_TYPEERASE_MASSERASE ((uint32_t)0x01U) /*!< Flash Mass erase activation */ 120 /** 121 * @} 122 */ 123 124 /** @defgroup FLASHEx_Voltage_Range FLASH Voltage Range 125 * @{ 126 */ 127 #define FLASH_VOLTAGE_RANGE_1 ((uint32_t)0x00U) /*!< Device operating range: 1.8V to 2.1V */ 128 #define FLASH_VOLTAGE_RANGE_2 ((uint32_t)0x01U) /*!< Device operating range: 2.1V to 2.7V */ 129 #define FLASH_VOLTAGE_RANGE_3 ((uint32_t)0x02U) /*!< Device operating range: 2.7V to 3.6V */ 130 #define FLASH_VOLTAGE_RANGE_4 ((uint32_t)0x03U) /*!< Device operating range: 2.7V to 3.6V + External Vpp */ 131 /** 132 * @} 133 */ 134 135 /** @defgroup FLASHEx_WRP_State FLASH WRP State 136 * @{ 137 */ 138 #define OB_WRPSTATE_DISABLE ((uint32_t)0x00U) /*!< Disable the write protection of the desired bank 1 sectors */ 139 #define OB_WRPSTATE_ENABLE ((uint32_t)0x01U) /*!< Enable the write protection of the desired bank 1 sectors */ 140 /** 141 * @} 142 */ 143 144 /** @defgroup FLASHEx_Option_Type FLASH Option Type 145 * @{ 146 */ 147 #define OPTIONBYTE_WRP ((uint32_t)0x01U) /*!< WRP option byte configuration */ 148 #define OPTIONBYTE_RDP ((uint32_t)0x02U) /*!< RDP option byte configuration */ 149 #define OPTIONBYTE_USER ((uint32_t)0x04U) /*!< USER option byte configuration */ 150 #define OPTIONBYTE_BOR ((uint32_t)0x08U) /*!< BOR option byte configuration */ 151 #define OPTIONBYTE_BOOTADDR_0 ((uint32_t)0x10U) /*!< Boot 0 Address configuration */ 152 #define OPTIONBYTE_BOOTADDR_1 ((uint32_t)0x20U) /*!< Boot 1 Address configuration */ 153 #if defined (FLASH_OPTCR2_PCROP) 154 #define OPTIONBYTE_PCROP ((uint32_t)0x40U) /*!< PCROP configuration */ 155 #define OPTIONBYTE_PCROP_RDP ((uint32_t)0x80U) /*!< PCROP_RDP configuration */ 156 #endif /* FLASH_OPTCR2_PCROP */ 157 /** 158 * @} 159 */ 160 161 /** @defgroup FLASHEx_Option_Bytes_Read_Protection FLASH Option Bytes Read Protection 162 * @{ 163 */ 164 #define OB_RDP_LEVEL_0 ((uint8_t)0xAAU) 165 #define OB_RDP_LEVEL_1 ((uint8_t)0x55U) 166 #define OB_RDP_LEVEL_2 ((uint8_t)0xCCU) /*!< Warning: When enabling read protection level 2 167 it s no more possible to go back to level 1 or 0 */ 168 /** 169 * @} 170 */ 171 172 /** @defgroup FLASHEx_Option_Bytes_WWatchdog FLASH Option Bytes WWatchdog 173 * @{ 174 */ 175 #define OB_WWDG_SW ((uint32_t)0x10U) /*!< Software WWDG selected */ 176 #define OB_WWDG_HW ((uint32_t)0x00U) /*!< Hardware WWDG selected */ 177 /** 178 * @} 179 */ 180 181 182 /** @defgroup FLASHEx_Option_Bytes_IWatchdog FLASH Option Bytes IWatchdog 183 * @{ 184 */ 185 #define OB_IWDG_SW ((uint32_t)0x20U) /*!< Software IWDG selected */ 186 #define OB_IWDG_HW ((uint32_t)0x00U) /*!< Hardware IWDG selected */ 187 /** 188 * @} 189 */ 190 191 /** @defgroup FLASHEx_Option_Bytes_nRST_STOP FLASH Option Bytes nRST_STOP 192 * @{ 193 */ 194 #define OB_STOP_NO_RST ((uint32_t)0x40U) /*!< No reset generated when entering in STOP */ 195 #define OB_STOP_RST ((uint32_t)0x00U) /*!< Reset generated when entering in STOP */ 196 /** 197 * @} 198 */ 199 200 /** @defgroup FLASHEx_Option_Bytes_nRST_STDBY FLASH Option Bytes nRST_STDBY 201 * @{ 202 */ 203 #define OB_STDBY_NO_RST ((uint32_t)0x80U) /*!< No reset generated when entering in STANDBY */ 204 #define OB_STDBY_RST ((uint32_t)0x00U) /*!< Reset generated when entering in STANDBY */ 205 /** 206 * @} 207 */ 208 209 /** @defgroup FLASHEx_Option_Bytes_IWDG_FREEZE_STOP FLASH IWDG Counter Freeze in STOP 210 * @{ 211 */ 212 #define OB_IWDG_STOP_FREEZE ((uint32_t)0x00000000U) /*!< Freeze IWDG counter in STOP mode */ 213 #define OB_IWDG_STOP_ACTIVE ((uint32_t)0x80000000U) /*!< IWDG counter active in STOP mode */ 214 /** 215 * @} 216 */ 217 218 /** @defgroup FLASHEx_Option_Bytes_IWDG_FREEZE_SANDBY FLASH IWDG Counter Freeze in STANDBY 219 * @{ 220 */ 221 #define OB_IWDG_STDBY_FREEZE ((uint32_t)0x00000000U) /*!< Freeze IWDG counter in STANDBY mode */ 222 #define OB_IWDG_STDBY_ACTIVE ((uint32_t)0x40000000U) /*!< IWDG counter active in STANDBY mode */ 223 /** 224 * @} 225 */ 226 227 /** @defgroup FLASHEx_BOR_Reset_Level FLASH BOR Reset Level 228 * @{ 229 */ 230 #define OB_BOR_LEVEL3 ((uint32_t)0x00U) /*!< Supply voltage ranges from 2.70 to 3.60 V */ 231 #define OB_BOR_LEVEL2 ((uint32_t)0x04U) /*!< Supply voltage ranges from 2.40 to 2.70 V */ 232 #define OB_BOR_LEVEL1 ((uint32_t)0x08U) /*!< Supply voltage ranges from 2.10 to 2.40 V */ 233 #define OB_BOR_OFF ((uint32_t)0x0CU) /*!< Supply voltage ranges from 1.62 to 2.10 V */ 234 /** 235 * @} 236 */ 237 238 #if defined (FLASH_OPTCR_nDBOOT) 239 /** @defgroup FLASHEx_Option_Bytes_nDBOOT FLASH Option Bytes nDBOOT 240 * @{ 241 */ 242 #define OB_DUAL_BOOT_DISABLE ((uint32_t)0x10000000U) /* !< Dual Boot disable. Boot according to boot address option */ 243 #define OB_DUAL_BOOT_ENABLE ((uint32_t)0x00000000U) /* !< Dual Boot enable. Boot always from system memory if boot address in flash 244 (Dual bank Boot mode), or RAM if Boot address option in RAM */ 245 /** 246 * @} 247 */ 248 #endif /* FLASH_OPTCR_nDBOOT */ 249 250 #if defined (FLASH_OPTCR_nDBANK) 251 /** @defgroup FLASHEx_Option_Bytes_nDBank FLASH Single Bank or Dual Bank 252 * @{ 253 */ 254 #define OB_NDBANK_SINGLE_BANK ((uint32_t)0x20000000U) /*!< NDBANK bit is set : Single Bank mode */ 255 #define OB_NDBANK_DUAL_BANK ((uint32_t)0x00000000U) /*!< NDBANK bit is reset : Dual Bank mode */ 256 /** 257 * @} 258 */ 259 #endif /* FLASH_OPTCR_nDBANK */ 260 261 /** @defgroup FLASHEx_Boot_Address FLASH Boot Address 262 * @{ 263 */ 264 #define OB_BOOTADDR_ITCM_RAM ((uint32_t)0x0000U) /*!< Boot from ITCM RAM (0x00000000) */ 265 #define OB_BOOTADDR_SYSTEM ((uint32_t)0x0040U) /*!< Boot from System memory bootloader (0x00100000) */ 266 #define OB_BOOTADDR_ITCM_FLASH ((uint32_t)0x0080U) /*!< Boot from Flash on ITCM interface (0x00200000) */ 267 #define OB_BOOTADDR_AXIM_FLASH ((uint32_t)0x2000U) /*!< Boot from Flash on AXIM interface (0x08000000) */ 268 #define OB_BOOTADDR_DTCM_RAM ((uint32_t)0x8000U) /*!< Boot from DTCM RAM (0x20000000) */ 269 #define OB_BOOTADDR_SRAM1 ((uint32_t)0x8004U) /*!< Boot from SRAM1 (0x20010000) */ 270 #if (SRAM2_BASE == 0x2003C000U) 271 #define OB_BOOTADDR_SRAM2 ((uint32_t)0x800FU) /*!< Boot from SRAM2 (0x2003C000) */ 272 #else 273 #define OB_BOOTADDR_SRAM2 ((uint32_t)0x8013U) /*!< Boot from SRAM2 (0x2004C000) */ 274 #endif /* SRAM2_BASE == 0x2003C000U */ 275 /** 276 * @} 277 */ 278 279 /** @defgroup FLASH_Latency FLASH Latency 280 * @{ 281 */ 282 #define FLASH_LATENCY_0 FLASH_ACR_LATENCY_0WS /*!< FLASH Zero Latency cycle */ 283 #define FLASH_LATENCY_1 FLASH_ACR_LATENCY_1WS /*!< FLASH One Latency cycle */ 284 #define FLASH_LATENCY_2 FLASH_ACR_LATENCY_2WS /*!< FLASH Two Latency cycles */ 285 #define FLASH_LATENCY_3 FLASH_ACR_LATENCY_3WS /*!< FLASH Three Latency cycles */ 286 #define FLASH_LATENCY_4 FLASH_ACR_LATENCY_4WS /*!< FLASH Four Latency cycles */ 287 #define FLASH_LATENCY_5 FLASH_ACR_LATENCY_5WS /*!< FLASH Five Latency cycles */ 288 #define FLASH_LATENCY_6 FLASH_ACR_LATENCY_6WS /*!< FLASH Six Latency cycles */ 289 #define FLASH_LATENCY_7 FLASH_ACR_LATENCY_7WS /*!< FLASH Seven Latency cycles */ 290 #define FLASH_LATENCY_8 FLASH_ACR_LATENCY_8WS /*!< FLASH Eight Latency cycles */ 291 #define FLASH_LATENCY_9 FLASH_ACR_LATENCY_9WS /*!< FLASH Nine Latency cycles */ 292 #define FLASH_LATENCY_10 FLASH_ACR_LATENCY_10WS /*!< FLASH Ten Latency cycles */ 293 #define FLASH_LATENCY_11 FLASH_ACR_LATENCY_11WS /*!< FLASH Eleven Latency cycles */ 294 #define FLASH_LATENCY_12 FLASH_ACR_LATENCY_12WS /*!< FLASH Twelve Latency cycles */ 295 #define FLASH_LATENCY_13 FLASH_ACR_LATENCY_13WS /*!< FLASH Thirteen Latency cycles */ 296 #define FLASH_LATENCY_14 FLASH_ACR_LATENCY_14WS /*!< FLASH Fourteen Latency cycles */ 297 #define FLASH_LATENCY_15 FLASH_ACR_LATENCY_15WS /*!< FLASH Fifteen Latency cycles */ 298 /** 299 * @} 300 */ 301 302 #if defined (FLASH_OPTCR_nDBANK) 303 /** @defgroup FLASHEx_Banks FLASH Banks 304 * @{ 305 */ 306 #define FLASH_BANK_1 ((uint32_t)0x01U) /*!< Bank 1 */ 307 #define FLASH_BANK_2 ((uint32_t)0x02U) /*!< Bank 2 */ 308 #define FLASH_BANK_BOTH ((uint32_t)(FLASH_BANK_1 | FLASH_BANK_2)) /*!< Bank1 and Bank2 */ 309 /** 310 * @} 311 */ 312 #endif /* FLASH_OPTCR_nDBANK */ 313 314 /** @defgroup FLASHEx_MassErase_bit FLASH Mass Erase bit 315 * @{ 316 */ 317 #if defined (FLASH_OPTCR_nDBANK) 318 #define FLASH_MER_BIT (FLASH_CR_MER1 | FLASH_CR_MER2) /*!< 2 MER bits */ 319 #else 320 #define FLASH_MER_BIT (FLASH_CR_MER) /*!< only 1 MER bit */ 321 #endif /* FLASH_OPTCR_nDBANK */ 322 /** 323 * @} 324 */ 325 326 /** @defgroup FLASHEx_Sectors FLASH Sectors 327 * @{ 328 */ 329 #if (FLASH_SECTOR_TOTAL == 24) 330 #define FLASH_SECTOR_8 ((uint32_t)8U) /*!< Sector Number 8 */ 331 #define FLASH_SECTOR_9 ((uint32_t)9U) /*!< Sector Number 9 */ 332 #define FLASH_SECTOR_10 ((uint32_t)10U) /*!< Sector Number 10 */ 333 #define FLASH_SECTOR_11 ((uint32_t)11U) /*!< Sector Number 11 */ 334 #define FLASH_SECTOR_12 ((uint32_t)12U) /*!< Sector Number 12 */ 335 #define FLASH_SECTOR_13 ((uint32_t)13U) /*!< Sector Number 13 */ 336 #define FLASH_SECTOR_14 ((uint32_t)14U) /*!< Sector Number 14 */ 337 #define FLASH_SECTOR_15 ((uint32_t)15U) /*!< Sector Number 15 */ 338 #define FLASH_SECTOR_16 ((uint32_t)16U) /*!< Sector Number 16 */ 339 #define FLASH_SECTOR_17 ((uint32_t)17U) /*!< Sector Number 17 */ 340 #define FLASH_SECTOR_18 ((uint32_t)18U) /*!< Sector Number 18 */ 341 #define FLASH_SECTOR_19 ((uint32_t)19U) /*!< Sector Number 19 */ 342 #define FLASH_SECTOR_20 ((uint32_t)20U) /*!< Sector Number 20 */ 343 #define FLASH_SECTOR_21 ((uint32_t)21U) /*!< Sector Number 21 */ 344 #define FLASH_SECTOR_22 ((uint32_t)22U) /*!< Sector Number 22 */ 345 #define FLASH_SECTOR_23 ((uint32_t)23U) /*!< Sector Number 23 */ 346 #endif /* FLASH_SECTOR_TOTAL == 24 */ 347 /** 348 * @} 349 */ 350 351 #if (FLASH_SECTOR_TOTAL == 24) 352 /** @defgroup FLASHEx_Option_Bytes_Write_Protection FLASH Option Bytes Write Protection 353 * @note For Single Bank mode, use OB_WRP_SECTOR_x defines: In fact, in FLASH_OPTCR register, 354 * nWRP[11:0] bits contain the value of the write-protection option bytes for sectors 0 to 11. 355 * For Dual Bank mode, use OB_WRP_DB_SECTOR_x defines: In fact, in FLASH_OPTCR register, 356 * nWRP[11:0] bits are divided on two groups, one group dedicated for bank 1 and 357 * a second one dedicated for bank 2 (nWRP[i] activates Write protection on sector 2*i and 2*i+1). 358 * This behavior is applicable only for STM32F76xxx / STM32F77xxx devices. 359 * @{ 360 */ 361 /* Single Bank Sectors */ 362 #define OB_WRP_SECTOR_0 ((uint32_t)0x00010000U) /*!< Write protection of Single Bank Sector0 */ 363 #define OB_WRP_SECTOR_1 ((uint32_t)0x00020000U) /*!< Write protection of Single Bank Sector1 */ 364 #define OB_WRP_SECTOR_2 ((uint32_t)0x00040000U) /*!< Write protection of Single Bank Sector2 */ 365 #define OB_WRP_SECTOR_3 ((uint32_t)0x00080000U) /*!< Write protection of Single Bank Sector3 */ 366 #define OB_WRP_SECTOR_4 ((uint32_t)0x00100000U) /*!< Write protection of Single Bank Sector4 */ 367 #define OB_WRP_SECTOR_5 ((uint32_t)0x00200000U) /*!< Write protection of Single Bank Sector5 */ 368 #define OB_WRP_SECTOR_6 ((uint32_t)0x00400000U) /*!< Write protection of Single Bank Sector6 */ 369 #define OB_WRP_SECTOR_7 ((uint32_t)0x00800000U) /*!< Write protection of Single Bank Sector7 */ 370 #define OB_WRP_SECTOR_8 ((uint32_t)0x01000000U) /*!< Write protection of Single Bank Sector8 */ 371 #define OB_WRP_SECTOR_9 ((uint32_t)0x02000000U) /*!< Write protection of Single Bank Sector9 */ 372 #define OB_WRP_SECTOR_10 ((uint32_t)0x04000000U) /*!< Write protection of Single Bank Sector10 */ 373 #define OB_WRP_SECTOR_11 ((uint32_t)0x08000000U) /*!< Write protection of Single Bank Sector11 */ 374 #define OB_WRP_SECTOR_All ((uint32_t)0x0FFF0000U) /*!< Write protection of all Sectors for Single Bank Flash */ 375 376 /* Dual Bank Sectors */ 377 #define OB_WRP_DB_SECTOR_0 ((uint32_t)0x00010000U) /*!< Write protection of Dual Bank Sector0 */ 378 #define OB_WRP_DB_SECTOR_1 ((uint32_t)0x00010000U) /*!< Write protection of Dual Bank Sector1 */ 379 #define OB_WRP_DB_SECTOR_2 ((uint32_t)0x00020000U) /*!< Write protection of Dual Bank Sector2 */ 380 #define OB_WRP_DB_SECTOR_3 ((uint32_t)0x00020000U) /*!< Write protection of Dual Bank Sector3 */ 381 #define OB_WRP_DB_SECTOR_4 ((uint32_t)0x00040000U) /*!< Write protection of Dual Bank Sector4 */ 382 #define OB_WRP_DB_SECTOR_5 ((uint32_t)0x00040000U) /*!< Write protection of Dual Bank Sector5 */ 383 #define OB_WRP_DB_SECTOR_6 ((uint32_t)0x00080000U) /*!< Write protection of Dual Bank Sector6 */ 384 #define OB_WRP_DB_SECTOR_7 ((uint32_t)0x00080000U) /*!< Write protection of Dual Bank Sector7 */ 385 #define OB_WRP_DB_SECTOR_8 ((uint32_t)0x00100000U) /*!< Write protection of Dual Bank Sector8 */ 386 #define OB_WRP_DB_SECTOR_9 ((uint32_t)0x00100000U) /*!< Write protection of Dual Bank Sector9 */ 387 #define OB_WRP_DB_SECTOR_10 ((uint32_t)0x00200000U) /*!< Write protection of Dual Bank Sector10 */ 388 #define OB_WRP_DB_SECTOR_11 ((uint32_t)0x00200000U) /*!< Write protection of Dual Bank Sector11 */ 389 #define OB_WRP_DB_SECTOR_12 ((uint32_t)0x00400000U) /*!< Write protection of Dual Bank Sector12 */ 390 #define OB_WRP_DB_SECTOR_13 ((uint32_t)0x00400000U) /*!< Write protection of Dual Bank Sector13 */ 391 #define OB_WRP_DB_SECTOR_14 ((uint32_t)0x00800000U) /*!< Write protection of Dual Bank Sector14 */ 392 #define OB_WRP_DB_SECTOR_15 ((uint32_t)0x00800000U) /*!< Write protection of Dual Bank Sector15 */ 393 #define OB_WRP_DB_SECTOR_16 ((uint32_t)0x01000000U) /*!< Write protection of Dual Bank Sector16 */ 394 #define OB_WRP_DB_SECTOR_17 ((uint32_t)0x01000000U) /*!< Write protection of Dual Bank Sector17 */ 395 #define OB_WRP_DB_SECTOR_18 ((uint32_t)0x02000000U) /*!< Write protection of Dual Bank Sector18 */ 396 #define OB_WRP_DB_SECTOR_19 ((uint32_t)0x02000000U) /*!< Write protection of Dual Bank Sector19 */ 397 #define OB_WRP_DB_SECTOR_20 ((uint32_t)0x04000000U) /*!< Write protection of Dual Bank Sector20 */ 398 #define OB_WRP_DB_SECTOR_21 ((uint32_t)0x04000000U) /*!< Write protection of Dual Bank Sector21 */ 399 #define OB_WRP_DB_SECTOR_22 ((uint32_t)0x08000000U) /*!< Write protection of Dual Bank Sector22 */ 400 #define OB_WRP_DB_SECTOR_23 ((uint32_t)0x08000000U) /*!< Write protection of Dual Bank Sector23 */ 401 #define OB_WRP_DB_SECTOR_All ((uint32_t)0x0FFF0000U) /*!< Write protection of all Sectors for Dual Bank Flash */ 402 /** 403 * @} 404 */ 405 #endif /* FLASH_SECTOR_TOTAL == 24 */ 406 407 #if (FLASH_SECTOR_TOTAL == 8) 408 /** @defgroup FLASHEx_Option_Bytes_Write_Protection FLASH Option Bytes Write Protection 409 * @{ 410 */ 411 #define OB_WRP_SECTOR_0 ((uint32_t)0x00010000U) /*!< Write protection of Sector0 */ 412 #define OB_WRP_SECTOR_1 ((uint32_t)0x00020000U) /*!< Write protection of Sector1 */ 413 #define OB_WRP_SECTOR_2 ((uint32_t)0x00040000U) /*!< Write protection of Sector2 */ 414 #define OB_WRP_SECTOR_3 ((uint32_t)0x00080000U) /*!< Write protection of Sector3 */ 415 #define OB_WRP_SECTOR_4 ((uint32_t)0x00100000U) /*!< Write protection of Sector4 */ 416 #define OB_WRP_SECTOR_5 ((uint32_t)0x00200000U) /*!< Write protection of Sector5 */ 417 #define OB_WRP_SECTOR_6 ((uint32_t)0x00400000U) /*!< Write protection of Sector6 */ 418 #define OB_WRP_SECTOR_7 ((uint32_t)0x00800000U) /*!< Write protection of Sector7 */ 419 #define OB_WRP_SECTOR_All ((uint32_t)0x00FF0000U) /*!< Write protection of all Sectors */ 420 /** 421 * @} 422 */ 423 #endif /* FLASH_SECTOR_TOTAL == 8 */ 424 425 #if (FLASH_SECTOR_TOTAL == 4) 426 /** @defgroup FLASHEx_Option_Bytes_Write_Protection FLASH Option Bytes Write Protection 427 * @{ 428 */ 429 #define OB_WRP_SECTOR_0 ((uint32_t)0x00010000U) /*!< Write protection of Sector0 */ 430 #define OB_WRP_SECTOR_1 ((uint32_t)0x00020000U) /*!< Write protection of Sector1 */ 431 #define OB_WRP_SECTOR_2 ((uint32_t)0x00040000U) /*!< Write protection of Sector2 */ 432 #define OB_WRP_SECTOR_3 ((uint32_t)0x00080000U) /*!< Write protection of Sector3 */ 433 #define OB_WRP_SECTOR_All ((uint32_t)0x000F0000U) /*!< Write protection of all Sectors */ 434 /** 435 * @} 436 */ 437 #endif /* FLASH_SECTOR_TOTAL == 4 */ 438 439 #if (FLASH_SECTOR_TOTAL == 2) 440 /** @defgroup FLASHEx_Option_Bytes_Write_Protection FLASH Option Bytes Write Protection 441 * @{ 442 */ 443 #define OB_WRP_SECTOR_0 ((uint32_t)0x00010000U) /*!< Write protection of Sector0 */ 444 #define OB_WRP_SECTOR_1 ((uint32_t)0x00020000U) /*!< Write protection of Sector1 */ 445 #define OB_WRP_SECTOR_All ((uint32_t)0x00030000U) /*!< Write protection of all Sectors */ 446 /** 447 * @} 448 */ 449 #endif /* FLASH_SECTOR_TOTAL == 2 */ 450 451 #if defined (FLASH_OPTCR2_PCROP) 452 #if (FLASH_SECTOR_TOTAL == 8) 453 /** @defgroup FLASHEx_Option_Bytes_PCROP_Sectors FLASH Option Bytes PCROP Sectors 454 * @{ 455 */ 456 #define OB_PCROP_SECTOR_0 ((uint32_t)0x00000001U) /*!< PC Readout protection of Sector0 */ 457 #define OB_PCROP_SECTOR_1 ((uint32_t)0x00000002U) /*!< PC Readout protection of Sector1 */ 458 #define OB_PCROP_SECTOR_2 ((uint32_t)0x00000004U) /*!< PC Readout protection of Sector2 */ 459 #define OB_PCROP_SECTOR_3 ((uint32_t)0x00000008U) /*!< PC Readout protection of Sector3 */ 460 #define OB_PCROP_SECTOR_4 ((uint32_t)0x00000010U) /*!< PC Readout protection of Sector4 */ 461 #define OB_PCROP_SECTOR_5 ((uint32_t)0x00000020U) /*!< PC Readout protection of Sector5 */ 462 #define OB_PCROP_SECTOR_6 ((uint32_t)0x00000040U) /*!< PC Readout protection of Sector6 */ 463 #define OB_PCROP_SECTOR_7 ((uint32_t)0x00000080U) /*!< PC Readout protection of Sector7 */ 464 #define OB_PCROP_SECTOR_All ((uint32_t)0x000000FFU) /*!< PC Readout protection of all Sectors */ 465 /** 466 * @} 467 */ 468 #endif /* FLASH_SECTOR_TOTAL == 8 */ 469 470 #if (FLASH_SECTOR_TOTAL == 4) 471 /** @defgroup FLASHEx_Option_Bytes_PCROP_Sectors FLASH Option Bytes PCROP Sectors 472 * @{ 473 */ 474 #define OB_PCROP_SECTOR_0 ((uint32_t)0x00000001U) /*!< PC Readout protection of Sector0 */ 475 #define OB_PCROP_SECTOR_1 ((uint32_t)0x00000002U) /*!< PC Readout protection of Sector1 */ 476 #define OB_PCROP_SECTOR_2 ((uint32_t)0x00000004U) /*!< PC Readout protection of Sector2 */ 477 #define OB_PCROP_SECTOR_3 ((uint32_t)0x00000008U) /*!< PC Readout protection of Sector3 */ 478 #define OB_PCROP_SECTOR_All ((uint32_t)0x0000000FU) /*!< PC Readout protection of all Sectors */ 479 /** 480 * @} 481 */ 482 #endif /* FLASH_SECTOR_TOTAL == 4 */ 483 484 /** @defgroup FLASHEx_Option_Bytes_PCROP_RDP FLASH Option Bytes PCROP_RDP Bit 485 * @{ 486 */ 487 #define OB_PCROP_RDP_ENABLE ((uint32_t)0x80000000U) /*!< PCROP_RDP Enable */ 488 #define OB_PCROP_RDP_DISABLE ((uint32_t)0x00000000U) /*!< PCROP_RDP Disable */ 489 /** 490 * @} 491 */ 492 #endif /* FLASH_OPTCR2_PCROP */ 493 494 /** 495 * @} 496 */ 497 498 /* Exported macro ------------------------------------------------------------*/ 499 /** @defgroup FLASH_Exported_Macros FLASH Exported Macros 500 * @{ 501 */ 502 /** 503 * @brief Calculate the FLASH Boot Base Address (BOOT_ADD0 or BOOT_ADD1) 504 * @note Returned value BOOT_ADDx[15:0] corresponds to boot address [29:14]. 505 * @param __ADDRESS__ FLASH Boot Address (in the range 0x0000 0000 to 0x2004 FFFF with a granularity of 16KB) 506 * @retval The FLASH Boot Base Address 507 */ 508 #define __HAL_FLASH_CALC_BOOT_BASE_ADR(__ADDRESS__) ((__ADDRESS__) >> 14) 509 /** 510 * @} 511 */ 512 513 /* Exported functions --------------------------------------------------------*/ 514 /** @addtogroup FLASHEx_Exported_Functions 515 * @{ 516 */ 517 518 /** @addtogroup FLASHEx_Exported_Functions_Group1 519 * @{ 520 */ 521 /* Extension Program operation functions *************************************/ 522 HAL_StatusTypeDef HAL_FLASHEx_Erase(FLASH_EraseInitTypeDef *pEraseInit, uint32_t *SectorError); 523 HAL_StatusTypeDef HAL_FLASHEx_Erase_IT(FLASH_EraseInitTypeDef *pEraseInit); 524 HAL_StatusTypeDef HAL_FLASHEx_OBProgram(FLASH_OBProgramInitTypeDef *pOBInit); 525 void HAL_FLASHEx_OBGetConfig(FLASH_OBProgramInitTypeDef *pOBInit); 526 527 /** 528 * @} 529 */ 530 531 /** 532 * @} 533 */ 534 /* Private types -------------------------------------------------------------*/ 535 /* Private variables ---------------------------------------------------------*/ 536 /* Private constants ---------------------------------------------------------*/ 537 /* Private macros ------------------------------------------------------------*/ 538 /** @defgroup FLASHEx_Private_Macros FLASH Private Macros 539 * @{ 540 */ 541 542 /** @defgroup FLASHEx_IS_FLASH_Definitions FLASH Private macros to check input parameters 543 * @{ 544 */ 545 546 #define IS_FLASH_TYPEERASE(VALUE)(((VALUE) == FLASH_TYPEERASE_SECTORS) || \ 547 ((VALUE) == FLASH_TYPEERASE_MASSERASE)) 548 549 #define IS_VOLTAGERANGE(RANGE)(((RANGE) == FLASH_VOLTAGE_RANGE_1) || \ 550 ((RANGE) == FLASH_VOLTAGE_RANGE_2) || \ 551 ((RANGE) == FLASH_VOLTAGE_RANGE_3) || \ 552 ((RANGE) == FLASH_VOLTAGE_RANGE_4)) 553 554 #define IS_WRPSTATE(VALUE)(((VALUE) == OB_WRPSTATE_DISABLE) || \ 555 ((VALUE) == OB_WRPSTATE_ENABLE)) 556 557 #if defined (FLASH_OPTCR2_PCROP) 558 #define IS_OPTIONBYTE(VALUE)(((VALUE) <= (OPTIONBYTE_WRP | OPTIONBYTE_RDP | OPTIONBYTE_USER |\ 559 OPTIONBYTE_BOR | OPTIONBYTE_BOOTADDR_0 | OPTIONBYTE_BOOTADDR_1 |\ 560 OPTIONBYTE_PCROP | OPTIONBYTE_PCROP_RDP))) 561 #else 562 #define IS_OPTIONBYTE(VALUE)(((VALUE) <= (OPTIONBYTE_WRP | OPTIONBYTE_RDP | OPTIONBYTE_USER |\ 563 OPTIONBYTE_BOR | OPTIONBYTE_BOOTADDR_0 | OPTIONBYTE_BOOTADDR_1))) 564 #endif /* FLASH_OPTCR2_PCROP */ 565 566 #define IS_OB_BOOT_ADDRESS(ADDRESS) ((ADDRESS) <= 0x8013) 567 568 #define IS_OB_RDP_LEVEL(LEVEL) (((LEVEL) == OB_RDP_LEVEL_0) ||\ 569 ((LEVEL) == OB_RDP_LEVEL_1) ||\ 570 ((LEVEL) == OB_RDP_LEVEL_2)) 571 572 #define IS_OB_WWDG_SOURCE(SOURCE) (((SOURCE) == OB_WWDG_SW) || ((SOURCE) == OB_WWDG_HW)) 573 574 #define IS_OB_IWDG_SOURCE(SOURCE) (((SOURCE) == OB_IWDG_SW) || ((SOURCE) == OB_IWDG_HW)) 575 576 #define IS_OB_STOP_SOURCE(SOURCE) (((SOURCE) == OB_STOP_NO_RST) || ((SOURCE) == OB_STOP_RST)) 577 578 #define IS_OB_STDBY_SOURCE(SOURCE) (((SOURCE) == OB_STDBY_NO_RST) || ((SOURCE) == OB_STDBY_RST)) 579 580 #define IS_OB_IWDG_STOP_FREEZE(FREEZE) (((FREEZE) == OB_IWDG_STOP_FREEZE) || ((FREEZE) == OB_IWDG_STOP_ACTIVE)) 581 582 #define IS_OB_IWDG_STDBY_FREEZE(FREEZE) (((FREEZE) == OB_IWDG_STDBY_FREEZE) || ((FREEZE) == OB_IWDG_STDBY_ACTIVE)) 583 584 #define IS_OB_BOR_LEVEL(LEVEL) (((LEVEL) == OB_BOR_LEVEL1) || ((LEVEL) == OB_BOR_LEVEL2) ||\ 585 ((LEVEL) == OB_BOR_LEVEL3) || ((LEVEL) == OB_BOR_OFF)) 586 587 #define IS_FLASH_LATENCY(LATENCY) (((LATENCY) == FLASH_LATENCY_0) || \ 588 ((LATENCY) == FLASH_LATENCY_1) || \ 589 ((LATENCY) == FLASH_LATENCY_2) || \ 590 ((LATENCY) == FLASH_LATENCY_3) || \ 591 ((LATENCY) == FLASH_LATENCY_4) || \ 592 ((LATENCY) == FLASH_LATENCY_5) || \ 593 ((LATENCY) == FLASH_LATENCY_6) || \ 594 ((LATENCY) == FLASH_LATENCY_7) || \ 595 ((LATENCY) == FLASH_LATENCY_8) || \ 596 ((LATENCY) == FLASH_LATENCY_9) || \ 597 ((LATENCY) == FLASH_LATENCY_10) || \ 598 ((LATENCY) == FLASH_LATENCY_11) || \ 599 ((LATENCY) == FLASH_LATENCY_12) || \ 600 ((LATENCY) == FLASH_LATENCY_13) || \ 601 ((LATENCY) == FLASH_LATENCY_14) || \ 602 ((LATENCY) == FLASH_LATENCY_15)) 603 604 #define IS_FLASH_ADDRESS(ADDRESS) ((((ADDRESS) >= FLASH_BASE) && ((ADDRESS) <= FLASH_END)) || \ 605 (((ADDRESS) >= FLASH_OTP_BASE) && ((ADDRESS) <= FLASH_OTP_END))) 606 #define IS_FLASH_NBSECTORS(NBSECTORS) (((NBSECTORS) != 0U) && ((NBSECTORS) <= FLASH_SECTOR_TOTAL)) 607 608 #if (FLASH_SECTOR_TOTAL == 8) 609 #define IS_FLASH_SECTOR(SECTOR) (((SECTOR) == FLASH_SECTOR_0) || ((SECTOR) == FLASH_SECTOR_1) ||\ 610 ((SECTOR) == FLASH_SECTOR_2) || ((SECTOR) == FLASH_SECTOR_3) ||\ 611 ((SECTOR) == FLASH_SECTOR_4) || ((SECTOR) == FLASH_SECTOR_5) ||\ 612 ((SECTOR) == FLASH_SECTOR_6) || ((SECTOR) == FLASH_SECTOR_7)) 613 614 #define IS_OB_WRP_SECTOR(SECTOR) ((((SECTOR) & 0xFF00FFFFU) == 0x00000000U) && ((SECTOR) != 0x00000000U)) 615 #endif /* FLASH_SECTOR_TOTAL == 8 */ 616 617 #if (FLASH_SECTOR_TOTAL == 24) 618 #define IS_FLASH_SECTOR(SECTOR) (((SECTOR) == FLASH_SECTOR_0) || ((SECTOR) == FLASH_SECTOR_1) ||\ 619 ((SECTOR) == FLASH_SECTOR_2) || ((SECTOR) == FLASH_SECTOR_3) ||\ 620 ((SECTOR) == FLASH_SECTOR_4) || ((SECTOR) == FLASH_SECTOR_5) ||\ 621 ((SECTOR) == FLASH_SECTOR_6) || ((SECTOR) == FLASH_SECTOR_7) ||\ 622 ((SECTOR) == FLASH_SECTOR_8) || ((SECTOR) == FLASH_SECTOR_9) ||\ 623 ((SECTOR) == FLASH_SECTOR_10) || ((SECTOR) == FLASH_SECTOR_11) ||\ 624 ((SECTOR) == FLASH_SECTOR_12) || ((SECTOR) == FLASH_SECTOR_13) ||\ 625 ((SECTOR) == FLASH_SECTOR_14) || ((SECTOR) == FLASH_SECTOR_15) ||\ 626 ((SECTOR) == FLASH_SECTOR_16) || ((SECTOR) == FLASH_SECTOR_17) ||\ 627 ((SECTOR) == FLASH_SECTOR_18) || ((SECTOR) == FLASH_SECTOR_19) ||\ 628 ((SECTOR) == FLASH_SECTOR_20) || ((SECTOR) == FLASH_SECTOR_21) ||\ 629 ((SECTOR) == FLASH_SECTOR_22) || ((SECTOR) == FLASH_SECTOR_23)) 630 631 #define IS_OB_WRP_SECTOR(SECTOR) ((((SECTOR) & 0xF000FFFFU) == 0x00000000U) && ((SECTOR) != 0x00000000U)) 632 #endif /* FLASH_SECTOR_TOTAL == 24 */ 633 634 #if (FLASH_SECTOR_TOTAL == 4) 635 #define IS_FLASH_SECTOR(SECTOR) (((SECTOR) == FLASH_SECTOR_0) || ((SECTOR) == FLASH_SECTOR_1) ||\ 636 ((SECTOR) == FLASH_SECTOR_2) || ((SECTOR) == FLASH_SECTOR_3)) 637 638 #define IS_OB_WRP_SECTOR(SECTOR) ((((SECTOR) & 0xFFF0FFFFU) == 0x00000000U) && ((SECTOR) != 0x00000000U)) 639 #endif /* FLASH_SECTOR_TOTAL == 4 */ 640 641 #if (FLASH_SECTOR_TOTAL == 2) 642 #define IS_FLASH_SECTOR(SECTOR) (((SECTOR) == FLASH_SECTOR_0) || ((SECTOR) == FLASH_SECTOR_1)) 643 644 #define IS_OB_WRP_SECTOR(SECTOR) ((((SECTOR) & 0xFFFCFFFFU) == 0x00000000U) && ((SECTOR) != 0x00000000U)) 645 #endif /* FLASH_SECTOR_TOTAL == 2 */ 646 647 #if defined (FLASH_OPTCR_nDBANK) 648 #define IS_OB_NDBANK(VALUE) (((VALUE) == OB_NDBANK_SINGLE_BANK) || \ 649 ((VALUE) == OB_NDBANK_DUAL_BANK)) 650 651 #define IS_FLASH_BANK(BANK) (((BANK) == FLASH_BANK_1) || \ 652 ((BANK) == FLASH_BANK_2) || \ 653 ((BANK) == FLASH_BANK_BOTH)) 654 #endif /* FLASH_OPTCR_nDBANK */ 655 656 #if defined (FLASH_OPTCR_nDBOOT) 657 #define IS_OB_NDBOOT(VALUE) (((VALUE) == OB_DUAL_BOOT_DISABLE) || \ 658 ((VALUE) == OB_DUAL_BOOT_ENABLE)) 659 #endif /* FLASH_OPTCR_nDBOOT */ 660 661 #if defined (FLASH_OPTCR2_PCROP) 662 #define IS_OB_PCROP_SECTOR(SECTOR) (((SECTOR) & (uint32_t)0xFFFFFF00U) == 0x00000000U) 663 #define IS_OB_PCROP_RDP_VALUE(VALUE) (((VALUE) == OB_PCROP_RDP_DISABLE) || \ 664 ((VALUE) == OB_PCROP_RDP_ENABLE)) 665 #endif /* FLASH_OPTCR2_PCROP */ 666 667 /** 668 * @} 669 */ 670 671 /** 672 * @} 673 */ 674 675 /* Private functions ---------------------------------------------------------*/ 676 /** @defgroup FLASHEx_Private_Functions FLASH Private Functions 677 * @{ 678 */ 679 void FLASH_Erase_Sector(uint32_t Sector, uint8_t VoltageRange); 680 /** 681 * @} 682 */ 683 684 /** 685 * @} 686 */ 687 688 /** 689 * @} 690 */ 691 692 #ifdef __cplusplus 693 } 694 #endif 695 696 #endif /* __STM32F7xx_HAL_FLASH_EX_H */ 697 698
