1 /**
2 ******************************************************************************
3 * @file stm32f4xx_hal_lptim.c
4 * @author MCD Application Team
5 * @brief LPTIM HAL module driver.
6 * This file provides firmware functions to manage the following
7 * functionalities of the Low Power Timer (LPTIM) peripheral:
8 * + Initialization and de-initialization functions.
9 * + Start/Stop operation functions in polling mode.
10 * + Start/Stop operation functions in interrupt mode.
11 * + Reading operation functions.
12 * + Peripheral State functions.
13 *
14 ******************************************************************************
15 * @attention
16 *
17 * Copyright (c) 2016 STMicroelectronics.
18 * All rights reserved.
19 *
20 * This software is licensed under terms that can be found in the LICENSE file
21 * in the root directory of this software component.
22 * If no LICENSE file comes with this software, it is provided AS-IS.
23 *
24 ******************************************************************************
25 @verbatim
26 ==============================================================================
27 ##### How to use this driver #####
28 ==============================================================================
29 [..]
30 The LPTIM HAL driver can be used as follows:
31
32 (#)Initialize the LPTIM low level resources by implementing the
33 HAL_LPTIM_MspInit():
34 (++) Enable the LPTIM interface clock using __HAL_RCC_LPTIMx_CLK_ENABLE().
35 (++) In case of using interrupts (e.g. HAL_LPTIM_PWM_Start_IT()):
36 (+++) Configure the LPTIM interrupt priority using HAL_NVIC_SetPriority().
37 (+++) Enable the LPTIM IRQ handler using HAL_NVIC_EnableIRQ().
38 (+++) In LPTIM IRQ handler, call HAL_LPTIM_IRQHandler().
39
40 (#)Initialize the LPTIM HAL using HAL_LPTIM_Init(). This function
41 configures mainly:
42 (++) The instance: LPTIM1.
43 (++) Clock: the counter clock.
44 (+++) Source : it can be either the ULPTIM input (IN1) or one of
45 the internal clock; (APB, LSE or LSI).
46 (+++) Prescaler: select the clock divider.
47 (++) UltraLowPowerClock : To be used only if the ULPTIM is selected
48 as counter clock source.
49 (+++) Polarity: polarity of the active edge for the counter unit
50 if the ULPTIM input is selected.
51 (+++) SampleTime: clock sampling time to configure the clock glitch
52 filter.
53 (++) Trigger: How the counter start.
54 (+++) Source: trigger can be software or one of the hardware triggers.
55 (+++) ActiveEdge : only for hardware trigger.
56 (+++) SampleTime : trigger sampling time to configure the trigger
57 glitch filter.
58 (++) OutputPolarity : 2 opposite polarities are possible.
59 (++) UpdateMode: specifies whether the update of the autoreload and
60 the compare values is done immediately or after the end of current
61 period.
62
63 (#)Six modes are available:
64
65 (++) PWM Mode: To generate a PWM signal with specified period and pulse,
66 call HAL_LPTIM_PWM_Start() or HAL_LPTIM_PWM_Start_IT() for interruption
67 mode.
68
69 (++) One Pulse Mode: To generate pulse with specified width in response
70 to a stimulus, call HAL_LPTIM_OnePulse_Start() or
71 HAL_LPTIM_OnePulse_Start_IT() for interruption mode.
72
73 (++) Set once Mode: In this mode, the output changes the level (from
74 low level to high level if the output polarity is configured high, else
75 the opposite) when a compare match occurs. To start this mode, call
76 HAL_LPTIM_SetOnce_Start() or HAL_LPTIM_SetOnce_Start_IT() for
77 interruption mode.
78
79 (++) Encoder Mode: To use the encoder interface call
80 HAL_LPTIM_Encoder_Start() or HAL_LPTIM_Encoder_Start_IT() for
81 interruption mode. Only available for LPTIM1 instance.
82
83 (++) Time out Mode: an active edge on one selected trigger input rests
84 the counter. The first trigger event will start the timer, any
85 successive trigger event will reset the counter and the timer will
86 restart. To start this mode call HAL_LPTIM_TimeOut_Start_IT() or
87 HAL_LPTIM_TimeOut_Start_IT() for interruption mode.
88
89 (++) Counter Mode: counter can be used to count external events on
90 the LPTIM Input1 or it can be used to count internal clock cycles.
91 To start this mode, call HAL_LPTIM_Counter_Start() or
92 HAL_LPTIM_Counter_Start_IT() for interruption mode.
93
94
95 (#) User can stop any process by calling the corresponding API:
96 HAL_LPTIM_Xxx_Stop() or HAL_LPTIM_Xxx_Stop_IT() if the process is
97 already started in interruption mode.
98
99 (#) De-initialize the LPTIM peripheral using HAL_LPTIM_DeInit().
100
101 *** Callback registration ***
102 =============================================
103 [..]
104 The compilation define USE_HAL_LPTIM_REGISTER_CALLBACKS when set to 1
105 allows the user to configure dynamically the driver callbacks.
106 [..]
107 Use Function HAL_LPTIM_RegisterCallback() to register a callback.
108 HAL_LPTIM_RegisterCallback() takes as parameters the HAL peripheral handle,
109 the Callback ID and a pointer to the user callback function.
110 [..]
111 Use function HAL_LPTIM_UnRegisterCallback() to reset a callback to the
112 default weak function.
113 HAL_LPTIM_UnRegisterCallback takes as parameters the HAL peripheral handle,
114 and the Callback ID.
115 [..]
116 These functions allow to register/unregister following callbacks:
117
118 (+) MspInitCallback : LPTIM Base Msp Init Callback.
119 (+) MspDeInitCallback : LPTIM Base Msp DeInit Callback.
120 (+) CompareMatchCallback : Compare match Callback.
121 (+) AutoReloadMatchCallback : Auto-reload match Callback.
122 (+) TriggerCallback : External trigger event detection Callback.
123 (+) CompareWriteCallback : Compare register write complete Callback.
124 (+) AutoReloadWriteCallback : Auto-reload register write complete Callback.
125 (+) DirectionUpCallback : Up-counting direction change Callback.
126 (+) DirectionDownCallback : Down-counting direction change Callback.
127
128 [..]
129 By default, after the Init and when the state is HAL_LPTIM_STATE_RESET
130 all interrupt callbacks are set to the corresponding weak functions:
131 examples HAL_LPTIM_TriggerCallback(), HAL_LPTIM_CompareMatchCallback().
132
133 [..]
134 Exception done for MspInit and MspDeInit functions that are reset to the legacy weak
135 functionalities in the Init/DeInit only when these callbacks are null
136 (not registered beforehand). If not, MspInit or MspDeInit are not null, the Init/DeInit
137 keep and use the user MspInit/MspDeInit callbacks (registered beforehand)
138
139 [..]
140 Callbacks can be registered/unregistered in HAL_LPTIM_STATE_READY state only.
141 Exception done MspInit/MspDeInit that can be registered/unregistered
142 in HAL_LPTIM_STATE_READY or HAL_LPTIM_STATE_RESET state,
143 thus registered (user) MspInit/DeInit callbacks can be used during the Init/DeInit.
144 In that case first register the MspInit/MspDeInit user callbacks
145 using HAL_LPTIM_RegisterCallback() before calling DeInit or Init function.
146
147 [..]
148 When The compilation define USE_HAL_LPTIM_REGISTER_CALLBACKS is set to 0 or
149 not defined, the callback registration feature is not available and all callbacks
150 are set to the corresponding weak functions.
151
152 @endverbatim
153 ******************************************************************************
154 */
155
156 /* Includes ------------------------------------------------------------------*/
157 #include "stm32f4xx_hal.h"
158
159 /** @addtogroup STM32F4xx_HAL_Driver
160 * @{
161 */
162
163 /** @defgroup LPTIM LPTIM
164 * @brief LPTIM HAL module driver.
165 * @{
166 */
167
168 #ifdef HAL_LPTIM_MODULE_ENABLED
169
170 #if defined (LPTIM1)
171
172 /* Private typedef -----------------------------------------------------------*/
173 /* Private define ------------------------------------------------------------*/
174 /** @addtogroup LPTIM_Private_Constants
175 * @{
176 */
177 #define TIMEOUT 1000UL /* Timeout is 1s */
178 /**
179 * @}
180 */
181
182 /* Private macro -------------------------------------------------------------*/
183 /* Private variables ---------------------------------------------------------*/
184 /* Private function prototypes -----------------------------------------------*/
185 #if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1)
186 static void LPTIM_ResetCallback(LPTIM_HandleTypeDef *lptim);
187 #endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */
188 static HAL_StatusTypeDef LPTIM_WaitForFlag(LPTIM_HandleTypeDef *hlptim, uint32_t flag);
189
190 /* Exported functions --------------------------------------------------------*/
191
192 /** @defgroup LPTIM_Exported_Functions LPTIM Exported Functions
193 * @{
194 */
195
196 /** @defgroup LPTIM_Exported_Functions_Group1 Initialization/de-initialization functions
197 * @brief Initialization and Configuration functions.
198 *
199 @verbatim
200 ==============================================================================
201 ##### Initialization and de-initialization functions #####
202 ==============================================================================
203 [..] This section provides functions allowing to:
204 (+) Initialize the LPTIM according to the specified parameters in the
205 LPTIM_InitTypeDef and initialize the associated handle.
206 (+) DeInitialize the LPTIM peripheral.
207 (+) Initialize the LPTIM MSP.
208 (+) DeInitialize the LPTIM MSP.
209
210 @endverbatim
211 * @{
212 */
213
214 /**
215 * @brief Initialize the LPTIM according to the specified parameters in the
216 * LPTIM_InitTypeDef and initialize the associated handle.
217 * @param hlptim LPTIM handle
218 * @retval HAL status
219 */
HAL_LPTIM_Init(LPTIM_HandleTypeDef * hlptim)220 HAL_StatusTypeDef HAL_LPTIM_Init(LPTIM_HandleTypeDef *hlptim)
221 {
222 uint32_t tmpcfgr;
223
224 /* Check the LPTIM handle allocation */
225 if (hlptim == NULL)
226 {
227 return HAL_ERROR;
228 }
229
230 /* Check the parameters */
231 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
232
233 assert_param(IS_LPTIM_CLOCK_SOURCE(hlptim->Init.Clock.Source));
234 assert_param(IS_LPTIM_CLOCK_PRESCALER(hlptim->Init.Clock.Prescaler));
235 if ((hlptim->Init.Clock.Source == LPTIM_CLOCKSOURCE_ULPTIM)
236 || (hlptim->Init.CounterSource == LPTIM_COUNTERSOURCE_EXTERNAL))
237 {
238 assert_param(IS_LPTIM_CLOCK_POLARITY(hlptim->Init.UltraLowPowerClock.Polarity));
239 assert_param(IS_LPTIM_CLOCK_SAMPLE_TIME(hlptim->Init.UltraLowPowerClock.SampleTime));
240 }
241 assert_param(IS_LPTIM_TRG_SOURCE(hlptim->Init.Trigger.Source));
242 if (hlptim->Init.Trigger.Source != LPTIM_TRIGSOURCE_SOFTWARE)
243 {
244 assert_param(IS_LPTIM_EXT_TRG_POLARITY(hlptim->Init.Trigger.ActiveEdge));
245 assert_param(IS_LPTIM_TRIG_SAMPLE_TIME(hlptim->Init.Trigger.SampleTime));
246 }
247 assert_param(IS_LPTIM_OUTPUT_POLARITY(hlptim->Init.OutputPolarity));
248 assert_param(IS_LPTIM_UPDATE_MODE(hlptim->Init.UpdateMode));
249 assert_param(IS_LPTIM_COUNTER_SOURCE(hlptim->Init.CounterSource));
250
251 if (hlptim->State == HAL_LPTIM_STATE_RESET)
252 {
253 /* Allocate lock resource and initialize it */
254 hlptim->Lock = HAL_UNLOCKED;
255
256 #if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1)
257 /* Reset interrupt callbacks to legacy weak callbacks */
258 LPTIM_ResetCallback(hlptim);
259
260 if (hlptim->MspInitCallback == NULL)
261 {
262 hlptim->MspInitCallback = HAL_LPTIM_MspInit;
263 }
264
265 /* Init the low level hardware : GPIO, CLOCK, NVIC */
266 hlptim->MspInitCallback(hlptim);
267 #else
268 /* Init the low level hardware : GPIO, CLOCK, NVIC */
269 HAL_LPTIM_MspInit(hlptim);
270 #endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */
271 }
272
273 /* Change the LPTIM state */
274 hlptim->State = HAL_LPTIM_STATE_BUSY;
275
276 /* Get the LPTIMx CFGR value */
277 tmpcfgr = hlptim->Instance->CFGR;
278
279 if ((hlptim->Init.Clock.Source == LPTIM_CLOCKSOURCE_ULPTIM)
280 || (hlptim->Init.CounterSource == LPTIM_COUNTERSOURCE_EXTERNAL))
281 {
282 tmpcfgr &= (uint32_t)(~(LPTIM_CFGR_CKPOL | LPTIM_CFGR_CKFLT));
283 }
284 if (hlptim->Init.Trigger.Source != LPTIM_TRIGSOURCE_SOFTWARE)
285 {
286 tmpcfgr &= (uint32_t)(~(LPTIM_CFGR_TRGFLT | LPTIM_CFGR_TRIGSEL));
287 }
288
289 /* Clear CKSEL, PRESC, TRIGEN, TRGFLT, WAVPOL, PRELOAD & COUNTMODE bits */
290 tmpcfgr &= (uint32_t)(~(LPTIM_CFGR_CKSEL | LPTIM_CFGR_TRIGEN | LPTIM_CFGR_PRELOAD |
291 LPTIM_CFGR_WAVPOL | LPTIM_CFGR_PRESC | LPTIM_CFGR_COUNTMODE));
292
293 /* Set initialization parameters */
294 tmpcfgr |= (hlptim->Init.Clock.Source |
295 hlptim->Init.Clock.Prescaler |
296 hlptim->Init.OutputPolarity |
297 hlptim->Init.UpdateMode |
298 hlptim->Init.CounterSource);
299
300 /* Glitch filters for internal triggers and external inputs are configured
301 * only if an internal clock source is provided to the LPTIM
302 */
303 if (hlptim->Init.Clock.Source == LPTIM_CLOCKSOURCE_APBCLOCK_LPOSC)
304 {
305 tmpcfgr |= (hlptim->Init.Trigger.SampleTime |
306 hlptim->Init.UltraLowPowerClock.SampleTime);
307 }
308
309 /* Configure LPTIM external clock polarity and digital filter */
310 if ((hlptim->Init.Clock.Source == LPTIM_CLOCKSOURCE_ULPTIM)
311 || (hlptim->Init.CounterSource == LPTIM_COUNTERSOURCE_EXTERNAL))
312 {
313 tmpcfgr |= (hlptim->Init.UltraLowPowerClock.Polarity |
314 hlptim->Init.UltraLowPowerClock.SampleTime);
315 }
316
317 /* Configure LPTIM external trigger */
318 if (hlptim->Init.Trigger.Source != LPTIM_TRIGSOURCE_SOFTWARE)
319 {
320 /* Enable External trigger and set the trigger source */
321 tmpcfgr |= (hlptim->Init.Trigger.Source |
322 hlptim->Init.Trigger.ActiveEdge |
323 hlptim->Init.Trigger.SampleTime);
324 }
325
326 /* Write to LPTIMx CFGR */
327 hlptim->Instance->CFGR = tmpcfgr;
328
329 /* Change the LPTIM state */
330 hlptim->State = HAL_LPTIM_STATE_READY;
331
332 /* Return function status */
333 return HAL_OK;
334 }
335
336 /**
337 * @brief DeInitialize the LPTIM peripheral.
338 * @param hlptim LPTIM handle
339 * @retval HAL status
340 */
HAL_LPTIM_DeInit(LPTIM_HandleTypeDef * hlptim)341 HAL_StatusTypeDef HAL_LPTIM_DeInit(LPTIM_HandleTypeDef *hlptim)
342 {
343 /* Check the LPTIM handle allocation */
344 if (hlptim == NULL)
345 {
346 return HAL_ERROR;
347 }
348
349 /* Change the LPTIM state */
350 hlptim->State = HAL_LPTIM_STATE_BUSY;
351
352 /* Disable the LPTIM Peripheral Clock */
353 __HAL_LPTIM_DISABLE(hlptim);
354
355 if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
356 {
357 return HAL_TIMEOUT;
358 }
359
360 #if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1)
361 if (hlptim->MspDeInitCallback == NULL)
362 {
363 hlptim->MspDeInitCallback = HAL_LPTIM_MspDeInit;
364 }
365
366 /* DeInit the low level hardware: CLOCK, NVIC.*/
367 hlptim->MspDeInitCallback(hlptim);
368 #else
369 /* DeInit the low level hardware: CLOCK, NVIC.*/
370 HAL_LPTIM_MspDeInit(hlptim);
371 #endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */
372
373 /* Change the LPTIM state */
374 hlptim->State = HAL_LPTIM_STATE_RESET;
375
376 /* Release Lock */
377 __HAL_UNLOCK(hlptim);
378
379 /* Return function status */
380 return HAL_OK;
381 }
382
383 /**
384 * @brief Initialize the LPTIM MSP.
385 * @param hlptim LPTIM handle
386 * @retval None
387 */
HAL_LPTIM_MspInit(LPTIM_HandleTypeDef * hlptim)388 __weak void HAL_LPTIM_MspInit(LPTIM_HandleTypeDef *hlptim)
389 {
390 /* Prevent unused argument(s) compilation warning */
391 UNUSED(hlptim);
392
393 /* NOTE : This function should not be modified, when the callback is needed,
394 the HAL_LPTIM_MspInit could be implemented in the user file
395 */
396 }
397
398 /**
399 * @brief DeInitialize LPTIM MSP.
400 * @param hlptim LPTIM handle
401 * @retval None
402 */
HAL_LPTIM_MspDeInit(LPTIM_HandleTypeDef * hlptim)403 __weak void HAL_LPTIM_MspDeInit(LPTIM_HandleTypeDef *hlptim)
404 {
405 /* Prevent unused argument(s) compilation warning */
406 UNUSED(hlptim);
407
408 /* NOTE : This function should not be modified, when the callback is needed,
409 the HAL_LPTIM_MspDeInit could be implemented in the user file
410 */
411 }
412
413 /**
414 * @}
415 */
416
417 /** @defgroup LPTIM_Exported_Functions_Group2 LPTIM Start-Stop operation functions
418 * @brief Start-Stop operation functions.
419 *
420 @verbatim
421 ==============================================================================
422 ##### LPTIM Start Stop operation functions #####
423 ==============================================================================
424 [..] This section provides functions allowing to:
425 (+) Start the PWM mode.
426 (+) Stop the PWM mode.
427 (+) Start the One pulse mode.
428 (+) Stop the One pulse mode.
429 (+) Start the Set once mode.
430 (+) Stop the Set once mode.
431 (+) Start the Encoder mode.
432 (+) Stop the Encoder mode.
433 (+) Start the Timeout mode.
434 (+) Stop the Timeout mode.
435 (+) Start the Counter mode.
436 (+) Stop the Counter mode.
437
438
439 @endverbatim
440 * @{
441 */
442
443 /**
444 * @brief Start the LPTIM PWM generation.
445 * @param hlptim LPTIM handle
446 * @param Period Specifies the Autoreload value.
447 * This parameter must be a value between 0x0001 and 0xFFFF.
448 * @param Pulse Specifies the compare value.
449 * This parameter must be a value between 0x0000 and 0xFFFF.
450 * @retval HAL status
451 */
HAL_LPTIM_PWM_Start(LPTIM_HandleTypeDef * hlptim,uint32_t Period,uint32_t Pulse)452 HAL_StatusTypeDef HAL_LPTIM_PWM_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Pulse)
453 {
454 /* Check the parameters */
455 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
456 assert_param(IS_LPTIM_PERIOD(Period));
457 assert_param(IS_LPTIM_PULSE(Pulse));
458
459 /* Set the LPTIM state */
460 hlptim->State = HAL_LPTIM_STATE_BUSY;
461
462 /* Reset WAVE bit to set PWM mode */
463 hlptim->Instance->CFGR &= ~LPTIM_CFGR_WAVE;
464
465 /* Enable the Peripheral */
466 __HAL_LPTIM_ENABLE(hlptim);
467
468 /* Clear flag */
469 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_ARROK);
470
471 /* Load the period value in the autoreload register */
472 __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period);
473
474 /* Wait for the completion of the write operation to the LPTIM_ARR register */
475 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_ARROK) == HAL_TIMEOUT)
476 {
477 return HAL_TIMEOUT;
478 }
479
480 /* Clear flag */
481 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_CMPOK);
482
483 /* Load the pulse value in the compare register */
484 __HAL_LPTIM_COMPARE_SET(hlptim, Pulse);
485
486 /* Wait for the completion of the write operation to the LPTIM_CMP register */
487 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_CMPOK) == HAL_TIMEOUT)
488 {
489 return HAL_TIMEOUT;
490 }
491
492 /* Start timer in continuous mode */
493 __HAL_LPTIM_START_CONTINUOUS(hlptim);
494
495 /* Change the LPTIM state */
496 hlptim->State = HAL_LPTIM_STATE_READY;
497
498 /* Return function status */
499 return HAL_OK;
500 }
501
502 /**
503 * @brief Stop the LPTIM PWM generation.
504 * @param hlptim LPTIM handle
505 * @retval HAL status
506 */
HAL_LPTIM_PWM_Stop(LPTIM_HandleTypeDef * hlptim)507 HAL_StatusTypeDef HAL_LPTIM_PWM_Stop(LPTIM_HandleTypeDef *hlptim)
508 {
509 /* Check the parameters */
510 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
511
512 /* Change the LPTIM state */
513 hlptim->State = HAL_LPTIM_STATE_BUSY;
514
515 /* Disable the Peripheral */
516 __HAL_LPTIM_DISABLE(hlptim);
517
518 if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
519 {
520 return HAL_TIMEOUT;
521 }
522
523 /* Change the LPTIM state */
524 hlptim->State = HAL_LPTIM_STATE_READY;
525
526 /* Return function status */
527 return HAL_OK;
528 }
529
530 /**
531 * @brief Start the LPTIM PWM generation in interrupt mode.
532 * @param hlptim LPTIM handle
533 * @param Period Specifies the Autoreload value.
534 * This parameter must be a value between 0x0001 and 0xFFFF
535 * @param Pulse Specifies the compare value.
536 * This parameter must be a value between 0x0000 and 0xFFFF
537 * @retval HAL status
538 */
HAL_LPTIM_PWM_Start_IT(LPTIM_HandleTypeDef * hlptim,uint32_t Period,uint32_t Pulse)539 HAL_StatusTypeDef HAL_LPTIM_PWM_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Pulse)
540 {
541 /* Check the parameters */
542 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
543 assert_param(IS_LPTIM_PERIOD(Period));
544 assert_param(IS_LPTIM_PULSE(Pulse));
545
546 /* Set the LPTIM state */
547 hlptim->State = HAL_LPTIM_STATE_BUSY;
548
549 /* Reset WAVE bit to set PWM mode */
550 hlptim->Instance->CFGR &= ~LPTIM_CFGR_WAVE;
551
552 /* Enable the Peripheral */
553 __HAL_LPTIM_ENABLE(hlptim);
554
555 /* Clear flag */
556 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_ARROK);
557
558 /* Load the period value in the autoreload register */
559 __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period);
560
561 /* Wait for the completion of the write operation to the LPTIM_ARR register */
562 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_ARROK) == HAL_TIMEOUT)
563 {
564 return HAL_TIMEOUT;
565 }
566
567 /* Clear flag */
568 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_CMPOK);
569
570 /* Load the pulse value in the compare register */
571 __HAL_LPTIM_COMPARE_SET(hlptim, Pulse);
572
573 /* Wait for the completion of the write operation to the LPTIM_CMP register */
574 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_CMPOK) == HAL_TIMEOUT)
575 {
576 return HAL_TIMEOUT;
577 }
578
579 /* Disable the Peripheral */
580 __HAL_LPTIM_DISABLE(hlptim);
581
582 if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
583 {
584 return HAL_TIMEOUT;
585 }
586
587 /* Enable Autoreload write complete interrupt */
588 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_ARROK);
589
590 /* Enable Compare write complete interrupt */
591 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_CMPOK);
592
593 /* Enable Autoreload match interrupt */
594 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_ARRM);
595
596 /* Enable Compare match interrupt */
597 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_CMPM);
598
599 /* If external trigger source is used, then enable external trigger interrupt */
600 if ((hlptim->Init.Trigger.Source) != LPTIM_TRIGSOURCE_SOFTWARE)
601 {
602 /* Enable external trigger interrupt */
603 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_EXTTRIG);
604 }
605
606 /* Enable the Peripheral */
607 __HAL_LPTIM_ENABLE(hlptim);
608
609 /* Start timer in continuous mode */
610 __HAL_LPTIM_START_CONTINUOUS(hlptim);
611
612 /* Change the LPTIM state */
613 hlptim->State = HAL_LPTIM_STATE_READY;
614
615 /* Return function status */
616 return HAL_OK;
617 }
618
619 /**
620 * @brief Stop the LPTIM PWM generation in interrupt mode.
621 * @param hlptim LPTIM handle
622 * @retval HAL status
623 */
HAL_LPTIM_PWM_Stop_IT(LPTIM_HandleTypeDef * hlptim)624 HAL_StatusTypeDef HAL_LPTIM_PWM_Stop_IT(LPTIM_HandleTypeDef *hlptim)
625 {
626 /* Check the parameters */
627 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
628
629 /* Change the LPTIM state */
630 hlptim->State = HAL_LPTIM_STATE_BUSY;
631
632 /* Disable the Peripheral */
633 __HAL_LPTIM_DISABLE(hlptim);
634
635 if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
636 {
637 return HAL_TIMEOUT;
638 }
639
640 /* Disable Autoreload write complete interrupt */
641 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_ARROK);
642
643 /* Disable Compare write complete interrupt */
644 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_CMPOK);
645
646 /* Disable Autoreload match interrupt */
647 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_ARRM);
648
649 /* Disable Compare match interrupt */
650 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_CMPM);
651
652 /* If external trigger source is used, then disable external trigger interrupt */
653 if ((hlptim->Init.Trigger.Source) != LPTIM_TRIGSOURCE_SOFTWARE)
654 {
655 /* Disable external trigger interrupt */
656 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_EXTTRIG);
657 }
658
659 /* Change the LPTIM state */
660 hlptim->State = HAL_LPTIM_STATE_READY;
661
662 /* Return function status */
663 return HAL_OK;
664 }
665
666 /**
667 * @brief Start the LPTIM One pulse generation.
668 * @param hlptim LPTIM handle
669 * @param Period Specifies the Autoreload value.
670 * This parameter must be a value between 0x0001 and 0xFFFF.
671 * @param Pulse Specifies the compare value.
672 * This parameter must be a value between 0x0000 and 0xFFFF.
673 * @retval HAL status
674 */
HAL_LPTIM_OnePulse_Start(LPTIM_HandleTypeDef * hlptim,uint32_t Period,uint32_t Pulse)675 HAL_StatusTypeDef HAL_LPTIM_OnePulse_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Pulse)
676 {
677 /* Check the parameters */
678 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
679 assert_param(IS_LPTIM_PERIOD(Period));
680 assert_param(IS_LPTIM_PULSE(Pulse));
681
682 /* Set the LPTIM state */
683 hlptim->State = HAL_LPTIM_STATE_BUSY;
684
685 /* Reset WAVE bit to set one pulse mode */
686 hlptim->Instance->CFGR &= ~LPTIM_CFGR_WAVE;
687
688 /* Enable the Peripheral */
689 __HAL_LPTIM_ENABLE(hlptim);
690
691 /* Clear flag */
692 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_ARROK);
693
694 /* Load the period value in the autoreload register */
695 __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period);
696
697 /* Wait for the completion of the write operation to the LPTIM_ARR register */
698 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_ARROK) == HAL_TIMEOUT)
699 {
700 return HAL_TIMEOUT;
701 }
702
703 /* Clear flag */
704 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_CMPOK);
705
706 /* Load the pulse value in the compare register */
707 __HAL_LPTIM_COMPARE_SET(hlptim, Pulse);
708
709 /* Wait for the completion of the write operation to the LPTIM_CMP register */
710 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_CMPOK) == HAL_TIMEOUT)
711 {
712 return HAL_TIMEOUT;
713 }
714
715 /* Start timer in single (one shot) mode */
716 __HAL_LPTIM_START_SINGLE(hlptim);
717
718 /* Change the LPTIM state */
719 hlptim->State = HAL_LPTIM_STATE_READY;
720
721 /* Return function status */
722 return HAL_OK;
723 }
724
725 /**
726 * @brief Stop the LPTIM One pulse generation.
727 * @param hlptim LPTIM handle
728 * @retval HAL status
729 */
HAL_LPTIM_OnePulse_Stop(LPTIM_HandleTypeDef * hlptim)730 HAL_StatusTypeDef HAL_LPTIM_OnePulse_Stop(LPTIM_HandleTypeDef *hlptim)
731 {
732 /* Check the parameters */
733 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
734
735 /* Set the LPTIM state */
736 hlptim->State = HAL_LPTIM_STATE_BUSY;
737
738 /* Disable the Peripheral */
739 __HAL_LPTIM_DISABLE(hlptim);
740
741 if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
742 {
743 return HAL_TIMEOUT;
744 }
745
746 /* Change the LPTIM state */
747 hlptim->State = HAL_LPTIM_STATE_READY;
748
749 /* Return function status */
750 return HAL_OK;
751 }
752
753 /**
754 * @brief Start the LPTIM One pulse generation in interrupt mode.
755 * @param hlptim LPTIM handle
756 * @param Period Specifies the Autoreload value.
757 * This parameter must be a value between 0x0001 and 0xFFFF.
758 * @param Pulse Specifies the compare value.
759 * This parameter must be a value between 0x0000 and 0xFFFF.
760 * @retval HAL status
761 */
HAL_LPTIM_OnePulse_Start_IT(LPTIM_HandleTypeDef * hlptim,uint32_t Period,uint32_t Pulse)762 HAL_StatusTypeDef HAL_LPTIM_OnePulse_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Pulse)
763 {
764 /* Check the parameters */
765 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
766 assert_param(IS_LPTIM_PERIOD(Period));
767 assert_param(IS_LPTIM_PULSE(Pulse));
768
769 /* Set the LPTIM state */
770 hlptim->State = HAL_LPTIM_STATE_BUSY;
771
772 /* Reset WAVE bit to set one pulse mode */
773 hlptim->Instance->CFGR &= ~LPTIM_CFGR_WAVE;
774
775 /* Enable the Peripheral */
776 __HAL_LPTIM_ENABLE(hlptim);
777
778 /* Clear flag */
779 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_ARROK);
780
781 /* Load the period value in the autoreload register */
782 __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period);
783
784 /* Wait for the completion of the write operation to the LPTIM_ARR register */
785 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_ARROK) == HAL_TIMEOUT)
786 {
787 return HAL_TIMEOUT;
788 }
789
790 /* Clear flag */
791 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_CMPOK);
792
793 /* Load the pulse value in the compare register */
794 __HAL_LPTIM_COMPARE_SET(hlptim, Pulse);
795
796 /* Wait for the completion of the write operation to the LPTIM_CMP register */
797 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_CMPOK) == HAL_TIMEOUT)
798 {
799 return HAL_TIMEOUT;
800 }
801
802 /* Disable the Peripheral */
803 __HAL_LPTIM_DISABLE(hlptim);
804
805 if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
806 {
807 return HAL_TIMEOUT;
808 }
809
810 /* Enable Autoreload write complete interrupt */
811 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_ARROK);
812
813 /* Enable Compare write complete interrupt */
814 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_CMPOK);
815
816 /* Enable Autoreload match interrupt */
817 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_ARRM);
818
819 /* Enable Compare match interrupt */
820 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_CMPM);
821
822 /* If external trigger source is used, then enable external trigger interrupt */
823 if ((hlptim->Init.Trigger.Source) != LPTIM_TRIGSOURCE_SOFTWARE)
824 {
825 /* Enable external trigger interrupt */
826 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_EXTTRIG);
827 }
828
829 /* Enable the Peripheral */
830 __HAL_LPTIM_ENABLE(hlptim);
831
832 /* Start timer in single (one shot) mode */
833 __HAL_LPTIM_START_SINGLE(hlptim);
834
835 /* Change the LPTIM state */
836 hlptim->State = HAL_LPTIM_STATE_READY;
837
838 /* Return function status */
839 return HAL_OK;
840 }
841
842 /**
843 * @brief Stop the LPTIM One pulse generation in interrupt mode.
844 * @param hlptim LPTIM handle
845 * @retval HAL status
846 */
HAL_LPTIM_OnePulse_Stop_IT(LPTIM_HandleTypeDef * hlptim)847 HAL_StatusTypeDef HAL_LPTIM_OnePulse_Stop_IT(LPTIM_HandleTypeDef *hlptim)
848 {
849 /* Check the parameters */
850 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
851
852 /* Set the LPTIM state */
853 hlptim->State = HAL_LPTIM_STATE_BUSY;
854
855
856 /* Disable the Peripheral */
857 __HAL_LPTIM_DISABLE(hlptim);
858
859 if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
860 {
861 return HAL_TIMEOUT;
862 }
863
864 /* Disable Autoreload write complete interrupt */
865 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_ARROK);
866
867 /* Disable Compare write complete interrupt */
868 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_CMPOK);
869
870 /* Disable Autoreload match interrupt */
871 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_ARRM);
872
873 /* Disable Compare match interrupt */
874 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_CMPM);
875
876 /* If external trigger source is used, then disable external trigger interrupt */
877 if ((hlptim->Init.Trigger.Source) != LPTIM_TRIGSOURCE_SOFTWARE)
878 {
879 /* Disable external trigger interrupt */
880 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_EXTTRIG);
881 }
882
883 /* Change the LPTIM state */
884 hlptim->State = HAL_LPTIM_STATE_READY;
885
886 /* Return function status */
887 return HAL_OK;
888 }
889
890 /**
891 * @brief Start the LPTIM in Set once mode.
892 * @param hlptim LPTIM handle
893 * @param Period Specifies the Autoreload value.
894 * This parameter must be a value between 0x0001 and 0xFFFF.
895 * @param Pulse Specifies the compare value.
896 * This parameter must be a value between 0x0000 and 0xFFFF.
897 * @retval HAL status
898 */
HAL_LPTIM_SetOnce_Start(LPTIM_HandleTypeDef * hlptim,uint32_t Period,uint32_t Pulse)899 HAL_StatusTypeDef HAL_LPTIM_SetOnce_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Pulse)
900 {
901 /* Check the parameters */
902 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
903 assert_param(IS_LPTIM_PERIOD(Period));
904 assert_param(IS_LPTIM_PULSE(Pulse));
905
906 /* Set the LPTIM state */
907 hlptim->State = HAL_LPTIM_STATE_BUSY;
908
909 /* Set WAVE bit to enable the set once mode */
910 hlptim->Instance->CFGR |= LPTIM_CFGR_WAVE;
911
912 /* Enable the Peripheral */
913 __HAL_LPTIM_ENABLE(hlptim);
914
915 /* Clear flag */
916 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_ARROK);
917
918 /* Load the period value in the autoreload register */
919 __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period);
920
921 /* Wait for the completion of the write operation to the LPTIM_ARR register */
922 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_ARROK) == HAL_TIMEOUT)
923 {
924 return HAL_TIMEOUT;
925 }
926
927 /* Clear flag */
928 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_CMPOK);
929
930 /* Load the pulse value in the compare register */
931 __HAL_LPTIM_COMPARE_SET(hlptim, Pulse);
932
933 /* Wait for the completion of the write operation to the LPTIM_CMP register */
934 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_CMPOK) == HAL_TIMEOUT)
935 {
936 return HAL_TIMEOUT;
937 }
938
939 /* Start timer in single (one shot) mode */
940 __HAL_LPTIM_START_SINGLE(hlptim);
941
942 /* Change the LPTIM state */
943 hlptim->State = HAL_LPTIM_STATE_READY;
944
945 /* Return function status */
946 return HAL_OK;
947 }
948
949 /**
950 * @brief Stop the LPTIM Set once mode.
951 * @param hlptim LPTIM handle
952 * @retval HAL status
953 */
HAL_LPTIM_SetOnce_Stop(LPTIM_HandleTypeDef * hlptim)954 HAL_StatusTypeDef HAL_LPTIM_SetOnce_Stop(LPTIM_HandleTypeDef *hlptim)
955 {
956 /* Check the parameters */
957 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
958
959 /* Set the LPTIM state */
960 hlptim->State = HAL_LPTIM_STATE_BUSY;
961
962 /* Disable the Peripheral */
963 __HAL_LPTIM_DISABLE(hlptim);
964
965 if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
966 {
967 return HAL_TIMEOUT;
968 }
969
970 /* Change the LPTIM state */
971 hlptim->State = HAL_LPTIM_STATE_READY;
972
973 /* Return function status */
974 return HAL_OK;
975 }
976
977 /**
978 * @brief Start the LPTIM Set once mode in interrupt mode.
979 * @param hlptim LPTIM handle
980 * @param Period Specifies the Autoreload value.
981 * This parameter must be a value between 0x0000 and 0xFFFF.
982 * @param Pulse Specifies the compare value.
983 * This parameter must be a value between 0x0000 and 0xFFFF.
984 * @retval HAL status
985 */
HAL_LPTIM_SetOnce_Start_IT(LPTIM_HandleTypeDef * hlptim,uint32_t Period,uint32_t Pulse)986 HAL_StatusTypeDef HAL_LPTIM_SetOnce_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Pulse)
987 {
988 /* Check the parameters */
989 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
990 assert_param(IS_LPTIM_PERIOD(Period));
991 assert_param(IS_LPTIM_PULSE(Pulse));
992
993 /* Set the LPTIM state */
994 hlptim->State = HAL_LPTIM_STATE_BUSY;
995
996 /* Set WAVE bit to enable the set once mode */
997 hlptim->Instance->CFGR |= LPTIM_CFGR_WAVE;
998
999 /* Enable the Peripheral */
1000 __HAL_LPTIM_ENABLE(hlptim);
1001
1002 /* Clear flag */
1003 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_ARROK);
1004
1005 /* Load the period value in the autoreload register */
1006 __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period);
1007
1008 /* Wait for the completion of the write operation to the LPTIM_ARR register */
1009 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_ARROK) == HAL_TIMEOUT)
1010 {
1011 return HAL_TIMEOUT;
1012 }
1013
1014 /* Clear flag */
1015 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_CMPOK);
1016
1017 /* Load the pulse value in the compare register */
1018 __HAL_LPTIM_COMPARE_SET(hlptim, Pulse);
1019
1020 /* Wait for the completion of the write operation to the LPTIM_CMP register */
1021 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_CMPOK) == HAL_TIMEOUT)
1022 {
1023 return HAL_TIMEOUT;
1024 }
1025
1026 /* Disable the Peripheral */
1027 __HAL_LPTIM_DISABLE(hlptim);
1028
1029 if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
1030 {
1031 return HAL_TIMEOUT;
1032 }
1033
1034 /* Enable Autoreload write complete interrupt */
1035 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_ARROK);
1036
1037 /* Enable Compare write complete interrupt */
1038 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_CMPOK);
1039
1040 /* Enable Autoreload match interrupt */
1041 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_ARRM);
1042
1043 /* Enable Compare match interrupt */
1044 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_CMPM);
1045
1046 /* If external trigger source is used, then enable external trigger interrupt */
1047 if ((hlptim->Init.Trigger.Source) != LPTIM_TRIGSOURCE_SOFTWARE)
1048 {
1049 /* Enable external trigger interrupt */
1050 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_EXTTRIG);
1051 }
1052
1053 /* Enable the Peripheral */
1054 __HAL_LPTIM_ENABLE(hlptim);
1055
1056 /* Start timer in single (one shot) mode */
1057 __HAL_LPTIM_START_SINGLE(hlptim);
1058
1059 /* Change the LPTIM state */
1060 hlptim->State = HAL_LPTIM_STATE_READY;
1061
1062 /* Return function status */
1063 return HAL_OK;
1064 }
1065
1066 /**
1067 * @brief Stop the LPTIM Set once mode in interrupt mode.
1068 * @param hlptim LPTIM handle
1069 * @retval HAL status
1070 */
HAL_LPTIM_SetOnce_Stop_IT(LPTIM_HandleTypeDef * hlptim)1071 HAL_StatusTypeDef HAL_LPTIM_SetOnce_Stop_IT(LPTIM_HandleTypeDef *hlptim)
1072 {
1073 /* Check the parameters */
1074 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
1075
1076 /* Set the LPTIM state */
1077 hlptim->State = HAL_LPTIM_STATE_BUSY;
1078
1079 /* Disable the Peripheral */
1080 __HAL_LPTIM_DISABLE(hlptim);
1081
1082 if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
1083 {
1084 return HAL_TIMEOUT;
1085 }
1086
1087 /* Disable Autoreload write complete interrupt */
1088 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_ARROK);
1089
1090 /* Disable Compare write complete interrupt */
1091 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_CMPOK);
1092
1093 /* Disable Autoreload match interrupt */
1094 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_ARRM);
1095
1096 /* Disable Compare match interrupt */
1097 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_CMPM);
1098
1099 /* If external trigger source is used, then disable external trigger interrupt */
1100 if ((hlptim->Init.Trigger.Source) != LPTIM_TRIGSOURCE_SOFTWARE)
1101 {
1102 /* Disable external trigger interrupt */
1103 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_EXTTRIG);
1104 }
1105
1106 /* Change the LPTIM state */
1107 hlptim->State = HAL_LPTIM_STATE_READY;
1108
1109 /* Return function status */
1110 return HAL_OK;
1111 }
1112
1113 /**
1114 * @brief Start the Encoder interface.
1115 * @param hlptim LPTIM handle
1116 * @param Period Specifies the Autoreload value.
1117 * This parameter must be a value between 0x0001 and 0xFFFF.
1118 * @retval HAL status
1119 */
HAL_LPTIM_Encoder_Start(LPTIM_HandleTypeDef * hlptim,uint32_t Period)1120 HAL_StatusTypeDef HAL_LPTIM_Encoder_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Period)
1121 {
1122 uint32_t tmpcfgr;
1123
1124 /* Check the parameters */
1125 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
1126 assert_param(IS_LPTIM_PERIOD(Period));
1127 assert_param(hlptim->Init.Clock.Source == LPTIM_CLOCKSOURCE_APBCLOCK_LPOSC);
1128 assert_param(hlptim->Init.Clock.Prescaler == LPTIM_PRESCALER_DIV1);
1129 assert_param(IS_LPTIM_CLOCK_POLARITY(hlptim->Init.UltraLowPowerClock.Polarity));
1130
1131 /* Set the LPTIM state */
1132 hlptim->State = HAL_LPTIM_STATE_BUSY;
1133
1134 /* Get the LPTIMx CFGR value */
1135 tmpcfgr = hlptim->Instance->CFGR;
1136
1137 /* Clear CKPOL bits */
1138 tmpcfgr &= (uint32_t)(~LPTIM_CFGR_CKPOL);
1139
1140 /* Set Input polarity */
1141 tmpcfgr |= hlptim->Init.UltraLowPowerClock.Polarity;
1142
1143 /* Write to LPTIMx CFGR */
1144 hlptim->Instance->CFGR = tmpcfgr;
1145
1146 /* Set ENC bit to enable the encoder interface */
1147 hlptim->Instance->CFGR |= LPTIM_CFGR_ENC;
1148
1149 /* Enable the Peripheral */
1150 __HAL_LPTIM_ENABLE(hlptim);
1151
1152 /* Clear flag */
1153 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_ARROK);
1154
1155 /* Load the period value in the autoreload register */
1156 __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period);
1157
1158 /* Wait for the completion of the write operation to the LPTIM_ARR register */
1159 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_ARROK) == HAL_TIMEOUT)
1160 {
1161 return HAL_TIMEOUT;
1162 }
1163
1164 /* Start timer in continuous mode */
1165 __HAL_LPTIM_START_CONTINUOUS(hlptim);
1166
1167 /* Change the LPTIM state */
1168 hlptim->State = HAL_LPTIM_STATE_READY;
1169
1170 /* Return function status */
1171 return HAL_OK;
1172 }
1173
1174 /**
1175 * @brief Stop the Encoder interface.
1176 * @param hlptim LPTIM handle
1177 * @retval HAL status
1178 */
HAL_LPTIM_Encoder_Stop(LPTIM_HandleTypeDef * hlptim)1179 HAL_StatusTypeDef HAL_LPTIM_Encoder_Stop(LPTIM_HandleTypeDef *hlptim)
1180 {
1181 /* Check the parameters */
1182 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
1183
1184 /* Set the LPTIM state */
1185 hlptim->State = HAL_LPTIM_STATE_BUSY;
1186
1187 /* Disable the Peripheral */
1188 __HAL_LPTIM_DISABLE(hlptim);
1189
1190 if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
1191 {
1192 return HAL_TIMEOUT;
1193 }
1194
1195 /* Reset ENC bit to disable the encoder interface */
1196 hlptim->Instance->CFGR &= ~LPTIM_CFGR_ENC;
1197
1198 /* Change the LPTIM state */
1199 hlptim->State = HAL_LPTIM_STATE_READY;
1200
1201 /* Return function status */
1202 return HAL_OK;
1203 }
1204
1205 /**
1206 * @brief Start the Encoder interface in interrupt mode.
1207 * @param hlptim LPTIM handle
1208 * @param Period Specifies the Autoreload value.
1209 * This parameter must be a value between 0x0000 and 0xFFFF.
1210 * @retval HAL status
1211 */
HAL_LPTIM_Encoder_Start_IT(LPTIM_HandleTypeDef * hlptim,uint32_t Period)1212 HAL_StatusTypeDef HAL_LPTIM_Encoder_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Period)
1213 {
1214 uint32_t tmpcfgr;
1215
1216 /* Check the parameters */
1217 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
1218 assert_param(IS_LPTIM_PERIOD(Period));
1219 assert_param(hlptim->Init.Clock.Source == LPTIM_CLOCKSOURCE_APBCLOCK_LPOSC);
1220 assert_param(hlptim->Init.Clock.Prescaler == LPTIM_PRESCALER_DIV1);
1221 assert_param(IS_LPTIM_CLOCK_POLARITY(hlptim->Init.UltraLowPowerClock.Polarity));
1222
1223 /* Set the LPTIM state */
1224 hlptim->State = HAL_LPTIM_STATE_BUSY;
1225
1226 /* Configure edge sensitivity for encoder mode */
1227 /* Get the LPTIMx CFGR value */
1228 tmpcfgr = hlptim->Instance->CFGR;
1229
1230 /* Clear CKPOL bits */
1231 tmpcfgr &= (uint32_t)(~LPTIM_CFGR_CKPOL);
1232
1233 /* Set Input polarity */
1234 tmpcfgr |= hlptim->Init.UltraLowPowerClock.Polarity;
1235
1236 /* Write to LPTIMx CFGR */
1237 hlptim->Instance->CFGR = tmpcfgr;
1238
1239 /* Set ENC bit to enable the encoder interface */
1240 hlptim->Instance->CFGR |= LPTIM_CFGR_ENC;
1241
1242 /* Enable the Peripheral */
1243 __HAL_LPTIM_ENABLE(hlptim);
1244
1245 /* Clear flag */
1246 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_ARROK);
1247
1248 /* Load the period value in the autoreload register */
1249 __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period);
1250
1251 /* Wait for the completion of the write operation to the LPTIM_ARR register */
1252 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_ARROK) == HAL_TIMEOUT)
1253 {
1254 return HAL_TIMEOUT;
1255 }
1256
1257 /* Disable the Peripheral */
1258 __HAL_LPTIM_DISABLE(hlptim);
1259
1260 if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
1261 {
1262 return HAL_TIMEOUT;
1263 }
1264
1265 /* Enable "switch to down direction" interrupt */
1266 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_DOWN);
1267
1268 /* Enable "switch to up direction" interrupt */
1269 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_UP);
1270
1271 /* Enable the Peripheral */
1272 __HAL_LPTIM_ENABLE(hlptim);
1273
1274 /* Start timer in continuous mode */
1275 __HAL_LPTIM_START_CONTINUOUS(hlptim);
1276
1277 /* Change the LPTIM state */
1278 hlptim->State = HAL_LPTIM_STATE_READY;
1279
1280 /* Return function status */
1281 return HAL_OK;
1282 }
1283
1284 /**
1285 * @brief Stop the Encoder interface in interrupt mode.
1286 * @param hlptim LPTIM handle
1287 * @retval HAL status
1288 */
HAL_LPTIM_Encoder_Stop_IT(LPTIM_HandleTypeDef * hlptim)1289 HAL_StatusTypeDef HAL_LPTIM_Encoder_Stop_IT(LPTIM_HandleTypeDef *hlptim)
1290 {
1291 /* Check the parameters */
1292 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
1293
1294 /* Set the LPTIM state */
1295 hlptim->State = HAL_LPTIM_STATE_BUSY;
1296
1297 /* Disable the Peripheral */
1298 __HAL_LPTIM_DISABLE(hlptim);
1299
1300 if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
1301 {
1302 return HAL_TIMEOUT;
1303 }
1304
1305 /* Reset ENC bit to disable the encoder interface */
1306 hlptim->Instance->CFGR &= ~LPTIM_CFGR_ENC;
1307
1308 /* Disable "switch to down direction" interrupt */
1309 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_DOWN);
1310
1311 /* Disable "switch to up direction" interrupt */
1312 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_UP);
1313
1314 /* Change the LPTIM state */
1315 hlptim->State = HAL_LPTIM_STATE_READY;
1316
1317 /* Return function status */
1318 return HAL_OK;
1319 }
1320
1321 /**
1322 * @brief Start the Timeout function.
1323 * @note The first trigger event will start the timer, any successive
1324 * trigger event will reset the counter and the timer restarts.
1325 * @param hlptim LPTIM handle
1326 * @param Period Specifies the Autoreload value.
1327 * This parameter must be a value between 0x0001 and 0xFFFF.
1328 * @param Timeout Specifies the TimeOut value to reset the counter.
1329 * This parameter must be a value between 0x0000 and 0xFFFF.
1330 * @retval HAL status
1331 */
HAL_LPTIM_TimeOut_Start(LPTIM_HandleTypeDef * hlptim,uint32_t Period,uint32_t Timeout)1332 HAL_StatusTypeDef HAL_LPTIM_TimeOut_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Timeout)
1333 {
1334 /* Check the parameters */
1335 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
1336 assert_param(IS_LPTIM_PERIOD(Period));
1337 assert_param(IS_LPTIM_PULSE(Timeout));
1338
1339 /* Set the LPTIM state */
1340 hlptim->State = HAL_LPTIM_STATE_BUSY;
1341
1342 /* Set TIMOUT bit to enable the timeout function */
1343 hlptim->Instance->CFGR |= LPTIM_CFGR_TIMOUT;
1344
1345 /* Enable the Peripheral */
1346 __HAL_LPTIM_ENABLE(hlptim);
1347
1348 /* Clear flag */
1349 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_ARROK);
1350
1351 /* Load the period value in the autoreload register */
1352 __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period);
1353
1354 /* Wait for the completion of the write operation to the LPTIM_ARR register */
1355 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_ARROK) == HAL_TIMEOUT)
1356 {
1357 return HAL_TIMEOUT;
1358 }
1359
1360 /* Clear flag */
1361 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_CMPOK);
1362
1363 /* Load the Timeout value in the compare register */
1364 __HAL_LPTIM_COMPARE_SET(hlptim, Timeout);
1365
1366 /* Wait for the completion of the write operation to the LPTIM_CMP register */
1367 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_CMPOK) == HAL_TIMEOUT)
1368 {
1369 return HAL_TIMEOUT;
1370 }
1371
1372 /* Start timer in continuous mode */
1373 __HAL_LPTIM_START_CONTINUOUS(hlptim);
1374
1375 /* Change the LPTIM state */
1376 hlptim->State = HAL_LPTIM_STATE_READY;
1377
1378 /* Return function status */
1379 return HAL_OK;
1380 }
1381
1382 /**
1383 * @brief Stop the Timeout function.
1384 * @param hlptim LPTIM handle
1385 * @retval HAL status
1386 */
HAL_LPTIM_TimeOut_Stop(LPTIM_HandleTypeDef * hlptim)1387 HAL_StatusTypeDef HAL_LPTIM_TimeOut_Stop(LPTIM_HandleTypeDef *hlptim)
1388 {
1389 /* Check the parameters */
1390 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
1391
1392 /* Set the LPTIM state */
1393 hlptim->State = HAL_LPTIM_STATE_BUSY;
1394
1395 /* Disable the Peripheral */
1396 __HAL_LPTIM_DISABLE(hlptim);
1397
1398 if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
1399 {
1400 return HAL_TIMEOUT;
1401 }
1402
1403 /* Reset TIMOUT bit to enable the timeout function */
1404 hlptim->Instance->CFGR &= ~LPTIM_CFGR_TIMOUT;
1405
1406 /* Change the LPTIM state */
1407 hlptim->State = HAL_LPTIM_STATE_READY;
1408
1409 /* Return function status */
1410 return HAL_OK;
1411 }
1412
1413 /**
1414 * @brief Start the Timeout function in interrupt mode.
1415 * @note The first trigger event will start the timer, any successive
1416 * trigger event will reset the counter and the timer restarts.
1417 * @param hlptim LPTIM handle
1418 * @param Period Specifies the Autoreload value.
1419 * This parameter must be a value between 0x0001 and 0xFFFF.
1420 * @param Timeout Specifies the TimeOut value to reset the counter.
1421 * This parameter must be a value between 0x0000 and 0xFFFF.
1422 * @retval HAL status
1423 */
HAL_LPTIM_TimeOut_Start_IT(LPTIM_HandleTypeDef * hlptim,uint32_t Period,uint32_t Timeout)1424 HAL_StatusTypeDef HAL_LPTIM_TimeOut_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Timeout)
1425 {
1426 /* Check the parameters */
1427 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
1428 assert_param(IS_LPTIM_PERIOD(Period));
1429 assert_param(IS_LPTIM_PULSE(Timeout));
1430
1431 /* Set the LPTIM state */
1432 hlptim->State = HAL_LPTIM_STATE_BUSY;
1433
1434 /* Enable EXTI Line interrupt on the LPTIM Wake-up Timer */
1435 __HAL_LPTIM_WAKEUPTIMER_EXTI_ENABLE_IT();
1436 #if defined(EXTI_IMR_MR23)
1437 /* Enable rising edge trigger on the LPTIM Wake-up Timer Exti line */
1438 __HAL_LPTIM_WAKEUPTIMER_EXTI_ENABLE_RISING_EDGE();
1439 #endif /* EXTI_IMR_MR23 */
1440
1441 /* Set TIMOUT bit to enable the timeout function */
1442 hlptim->Instance->CFGR |= LPTIM_CFGR_TIMOUT;
1443
1444 /* Enable the Peripheral */
1445 __HAL_LPTIM_ENABLE(hlptim);
1446
1447 /* Clear flag */
1448 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_ARROK);
1449
1450 /* Load the period value in the autoreload register */
1451 __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period);
1452
1453 /* Wait for the completion of the write operation to the LPTIM_ARR register */
1454 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_ARROK) == HAL_TIMEOUT)
1455 {
1456 return HAL_TIMEOUT;
1457 }
1458
1459 /* Clear flag */
1460 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_CMPOK);
1461
1462 /* Load the Timeout value in the compare register */
1463 __HAL_LPTIM_COMPARE_SET(hlptim, Timeout);
1464
1465 /* Wait for the completion of the write operation to the LPTIM_CMP register */
1466 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_CMPOK) == HAL_TIMEOUT)
1467 {
1468 return HAL_TIMEOUT;
1469 }
1470
1471 /* Disable the Peripheral */
1472 __HAL_LPTIM_DISABLE(hlptim);
1473
1474 if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
1475 {
1476 return HAL_TIMEOUT;
1477 }
1478
1479 /* Enable Compare match interrupt */
1480 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_CMPM);
1481
1482 /* Enable the Peripheral */
1483 __HAL_LPTIM_ENABLE(hlptim);
1484
1485 /* Start timer in continuous mode */
1486 __HAL_LPTIM_START_CONTINUOUS(hlptim);
1487
1488 /* Change the LPTIM state */
1489 hlptim->State = HAL_LPTIM_STATE_READY;
1490
1491 /* Return function status */
1492 return HAL_OK;
1493 }
1494
1495 /**
1496 * @brief Stop the Timeout function in interrupt mode.
1497 * @param hlptim LPTIM handle
1498 * @retval HAL status
1499 */
HAL_LPTIM_TimeOut_Stop_IT(LPTIM_HandleTypeDef * hlptim)1500 HAL_StatusTypeDef HAL_LPTIM_TimeOut_Stop_IT(LPTIM_HandleTypeDef *hlptim)
1501 {
1502 /* Check the parameters */
1503 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
1504
1505 #if defined(EXTI_IMR_MR23)
1506 /* Disable rising edge trigger on the LPTIM Wake-up Timer Exti line */
1507 __HAL_LPTIM_WAKEUPTIMER_EXTI_DISABLE_RISING_EDGE();
1508 #endif /* EXTI_IMR_MR23 */
1509
1510 /* Disable EXTI Line interrupt on the LPTIM Wake-up Timer */
1511 __HAL_LPTIM_WAKEUPTIMER_EXTI_DISABLE_IT();
1512
1513 /* Set the LPTIM state */
1514 hlptim->State = HAL_LPTIM_STATE_BUSY;
1515
1516 /* Disable the Peripheral */
1517 __HAL_LPTIM_DISABLE(hlptim);
1518
1519 if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
1520 {
1521 return HAL_TIMEOUT;
1522 }
1523
1524 /* Reset TIMOUT bit to enable the timeout function */
1525 hlptim->Instance->CFGR &= ~LPTIM_CFGR_TIMOUT;
1526
1527 /* Disable Compare match interrupt */
1528 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_CMPM);
1529
1530 /* Change the LPTIM state */
1531 hlptim->State = HAL_LPTIM_STATE_READY;
1532
1533 /* Return function status */
1534 return HAL_OK;
1535 }
1536
1537 /**
1538 * @brief Start the Counter mode.
1539 * @param hlptim LPTIM handle
1540 * @param Period Specifies the Autoreload value.
1541 * This parameter must be a value between 0x0001 and 0xFFFF.
1542 * @retval HAL status
1543 */
HAL_LPTIM_Counter_Start(LPTIM_HandleTypeDef * hlptim,uint32_t Period)1544 HAL_StatusTypeDef HAL_LPTIM_Counter_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Period)
1545 {
1546 /* Check the parameters */
1547 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
1548 assert_param(IS_LPTIM_PERIOD(Period));
1549
1550 /* Set the LPTIM state */
1551 hlptim->State = HAL_LPTIM_STATE_BUSY;
1552
1553 /* If clock source is not ULPTIM clock and counter source is external, then it must not be prescaled */
1554 if ((hlptim->Init.Clock.Source != LPTIM_CLOCKSOURCE_ULPTIM)
1555 && (hlptim->Init.CounterSource == LPTIM_COUNTERSOURCE_EXTERNAL))
1556 {
1557 /* Check if clock is prescaled */
1558 assert_param(IS_LPTIM_CLOCK_PRESCALERDIV1(hlptim->Init.Clock.Prescaler));
1559 /* Set clock prescaler to 0 */
1560 hlptim->Instance->CFGR &= ~LPTIM_CFGR_PRESC;
1561 }
1562
1563 /* Enable the Peripheral */
1564 __HAL_LPTIM_ENABLE(hlptim);
1565
1566 /* Clear flag */
1567 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_ARROK);
1568
1569 /* Load the period value in the autoreload register */
1570 __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period);
1571
1572 /* Wait for the completion of the write operation to the LPTIM_ARR register */
1573 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_ARROK) == HAL_TIMEOUT)
1574 {
1575 return HAL_TIMEOUT;
1576 }
1577
1578 /* Start timer in continuous mode */
1579 __HAL_LPTIM_START_CONTINUOUS(hlptim);
1580
1581 /* Change the LPTIM state */
1582 hlptim->State = HAL_LPTIM_STATE_READY;
1583
1584 /* Return function status */
1585 return HAL_OK;
1586 }
1587
1588 /**
1589 * @brief Stop the Counter mode.
1590 * @param hlptim LPTIM handle
1591 * @retval HAL status
1592 */
HAL_LPTIM_Counter_Stop(LPTIM_HandleTypeDef * hlptim)1593 HAL_StatusTypeDef HAL_LPTIM_Counter_Stop(LPTIM_HandleTypeDef *hlptim)
1594 {
1595 /* Check the parameters */
1596 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
1597
1598 /* Set the LPTIM state */
1599 hlptim->State = HAL_LPTIM_STATE_BUSY;
1600
1601 /* Disable the Peripheral */
1602 __HAL_LPTIM_DISABLE(hlptim);
1603
1604 if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
1605 {
1606 return HAL_TIMEOUT;
1607 }
1608
1609 /* Change the LPTIM state */
1610 hlptim->State = HAL_LPTIM_STATE_READY;
1611
1612 /* Return function status */
1613 return HAL_OK;
1614 }
1615
1616 /**
1617 * @brief Start the Counter mode in interrupt mode.
1618 * @param hlptim LPTIM handle
1619 * @param Period Specifies the Autoreload value.
1620 * This parameter must be a value between 0x0001 and 0xFFFF.
1621 * @retval HAL status
1622 */
HAL_LPTIM_Counter_Start_IT(LPTIM_HandleTypeDef * hlptim,uint32_t Period)1623 HAL_StatusTypeDef HAL_LPTIM_Counter_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Period)
1624 {
1625 /* Check the parameters */
1626 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
1627 assert_param(IS_LPTIM_PERIOD(Period));
1628
1629 /* Set the LPTIM state */
1630 hlptim->State = HAL_LPTIM_STATE_BUSY;
1631
1632 /* Enable EXTI Line interrupt on the LPTIM Wake-up Timer */
1633 __HAL_LPTIM_WAKEUPTIMER_EXTI_ENABLE_IT();
1634 #if defined(EXTI_IMR_MR23)
1635 /* Enable rising edge trigger on the LPTIM Wake-up Timer Exti line */
1636 __HAL_LPTIM_WAKEUPTIMER_EXTI_ENABLE_RISING_EDGE();
1637 #endif /* EXTI_IMR_MR23 */
1638
1639 /* If clock source is not ULPTIM clock and counter source is external, then it must not be prescaled */
1640 if ((hlptim->Init.Clock.Source != LPTIM_CLOCKSOURCE_ULPTIM)
1641 && (hlptim->Init.CounterSource == LPTIM_COUNTERSOURCE_EXTERNAL))
1642 {
1643 /* Check if clock is prescaled */
1644 assert_param(IS_LPTIM_CLOCK_PRESCALERDIV1(hlptim->Init.Clock.Prescaler));
1645 /* Set clock prescaler to 0 */
1646 hlptim->Instance->CFGR &= ~LPTIM_CFGR_PRESC;
1647 }
1648
1649 /* Enable the Peripheral */
1650 __HAL_LPTIM_ENABLE(hlptim);
1651
1652 /* Clear flag */
1653 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_ARROK);
1654
1655 /* Load the period value in the autoreload register */
1656 __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period);
1657
1658 /* Wait for the completion of the write operation to the LPTIM_ARR register */
1659 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_ARROK) == HAL_TIMEOUT)
1660 {
1661 return HAL_TIMEOUT;
1662 }
1663
1664 /* Disable the Peripheral */
1665 __HAL_LPTIM_DISABLE(hlptim);
1666
1667 if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
1668 {
1669 return HAL_TIMEOUT;
1670 }
1671
1672 /* Enable Autoreload write complete interrupt */
1673 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_ARROK);
1674
1675 /* Enable Autoreload match interrupt */
1676 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_ARRM);
1677
1678 /* Enable the Peripheral */
1679 __HAL_LPTIM_ENABLE(hlptim);
1680
1681 /* Start timer in continuous mode */
1682 __HAL_LPTIM_START_CONTINUOUS(hlptim);
1683
1684 /* Change the LPTIM state */
1685 hlptim->State = HAL_LPTIM_STATE_READY;
1686
1687 /* Return function status */
1688 return HAL_OK;
1689 }
1690
1691 /**
1692 * @brief Stop the Counter mode in interrupt mode.
1693 * @param hlptim LPTIM handle
1694 * @retval HAL status
1695 */
HAL_LPTIM_Counter_Stop_IT(LPTIM_HandleTypeDef * hlptim)1696 HAL_StatusTypeDef HAL_LPTIM_Counter_Stop_IT(LPTIM_HandleTypeDef *hlptim)
1697 {
1698 /* Check the parameters */
1699 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
1700
1701 #if defined(EXTI_IMR_MR23)
1702 /* Disable rising edge trigger on the LPTIM Wake-up Timer Exti line */
1703 __HAL_LPTIM_WAKEUPTIMER_EXTI_DISABLE_RISING_EDGE();
1704 #endif /* EXTI_IMR_MR23 */
1705
1706 /* Disable EXTI Line interrupt on the LPTIM Wake-up Timer */
1707 __HAL_LPTIM_WAKEUPTIMER_EXTI_DISABLE_IT();
1708
1709 /* Set the LPTIM state */
1710 hlptim->State = HAL_LPTIM_STATE_BUSY;
1711
1712 /* Disable the Peripheral */
1713 __HAL_LPTIM_DISABLE(hlptim);
1714
1715 if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
1716 {
1717 return HAL_TIMEOUT;
1718 }
1719
1720 /* Disable Autoreload write complete interrupt */
1721 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_ARROK);
1722
1723 /* Disable Autoreload match interrupt */
1724 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_ARRM);
1725 /* Change the LPTIM state */
1726 hlptim->State = HAL_LPTIM_STATE_READY;
1727
1728 /* Return function status */
1729 return HAL_OK;
1730 }
1731
1732 /**
1733 * @}
1734 */
1735
1736 /** @defgroup LPTIM_Exported_Functions_Group3 LPTIM Read operation functions
1737 * @brief Read operation functions.
1738 *
1739 @verbatim
1740 ==============================================================================
1741 ##### LPTIM Read operation functions #####
1742 ==============================================================================
1743 [..] This section provides LPTIM Reading functions.
1744 (+) Read the counter value.
1745 (+) Read the period (Auto-reload) value.
1746 (+) Read the pulse (Compare)value.
1747 @endverbatim
1748 * @{
1749 */
1750
1751 /**
1752 * @brief Return the current counter value.
1753 * @param hlptim LPTIM handle
1754 * @retval Counter value.
1755 */
HAL_LPTIM_ReadCounter(LPTIM_HandleTypeDef * hlptim)1756 uint32_t HAL_LPTIM_ReadCounter(LPTIM_HandleTypeDef *hlptim)
1757 {
1758 /* Check the parameters */
1759 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
1760
1761 return (hlptim->Instance->CNT);
1762 }
1763
1764 /**
1765 * @brief Return the current Autoreload (Period) value.
1766 * @param hlptim LPTIM handle
1767 * @retval Autoreload value.
1768 */
HAL_LPTIM_ReadAutoReload(LPTIM_HandleTypeDef * hlptim)1769 uint32_t HAL_LPTIM_ReadAutoReload(LPTIM_HandleTypeDef *hlptim)
1770 {
1771 /* Check the parameters */
1772 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
1773
1774 return (hlptim->Instance->ARR);
1775 }
1776
1777 /**
1778 * @brief Return the current Compare (Pulse) value.
1779 * @param hlptim LPTIM handle
1780 * @retval Compare value.
1781 */
HAL_LPTIM_ReadCompare(LPTIM_HandleTypeDef * hlptim)1782 uint32_t HAL_LPTIM_ReadCompare(LPTIM_HandleTypeDef *hlptim)
1783 {
1784 /* Check the parameters */
1785 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
1786
1787 return (hlptim->Instance->CMP);
1788 }
1789
1790 /**
1791 * @}
1792 */
1793
1794 /** @defgroup LPTIM_Exported_Functions_Group4 LPTIM IRQ handler and callbacks
1795 * @brief LPTIM IRQ handler.
1796 *
1797 @verbatim
1798 ==============================================================================
1799 ##### LPTIM IRQ handler and callbacks #####
1800 ==============================================================================
1801 [..] This section provides LPTIM IRQ handler and callback functions called within
1802 the IRQ handler:
1803 (+) LPTIM interrupt request handler
1804 (+) Compare match Callback
1805 (+) Auto-reload match Callback
1806 (+) External trigger event detection Callback
1807 (+) Compare register write complete Callback
1808 (+) Auto-reload register write complete Callback
1809 (+) Up-counting direction change Callback
1810 (+) Down-counting direction change Callback
1811
1812 @endverbatim
1813 * @{
1814 */
1815
1816 /**
1817 * @brief Handle LPTIM interrupt request.
1818 * @param hlptim LPTIM handle
1819 * @retval None
1820 */
HAL_LPTIM_IRQHandler(LPTIM_HandleTypeDef * hlptim)1821 void HAL_LPTIM_IRQHandler(LPTIM_HandleTypeDef *hlptim)
1822 {
1823 /* Compare match interrupt */
1824 if (__HAL_LPTIM_GET_FLAG(hlptim, LPTIM_FLAG_CMPM) != RESET)
1825 {
1826 if (__HAL_LPTIM_GET_IT_SOURCE(hlptim, LPTIM_IT_CMPM) != RESET)
1827 {
1828 /* Clear Compare match flag */
1829 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_CMPM);
1830
1831 /* Compare match Callback */
1832 #if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1)
1833 hlptim->CompareMatchCallback(hlptim);
1834 #else
1835 HAL_LPTIM_CompareMatchCallback(hlptim);
1836 #endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */
1837 }
1838 }
1839
1840 /* Autoreload match interrupt */
1841 if (__HAL_LPTIM_GET_FLAG(hlptim, LPTIM_FLAG_ARRM) != RESET)
1842 {
1843 if (__HAL_LPTIM_GET_IT_SOURCE(hlptim, LPTIM_IT_ARRM) != RESET)
1844 {
1845 /* Clear Autoreload match flag */
1846 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_ARRM);
1847
1848 /* Autoreload match Callback */
1849 #if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1)
1850 hlptim->AutoReloadMatchCallback(hlptim);
1851 #else
1852 HAL_LPTIM_AutoReloadMatchCallback(hlptim);
1853 #endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */
1854 }
1855 }
1856
1857 /* Trigger detected interrupt */
1858 if (__HAL_LPTIM_GET_FLAG(hlptim, LPTIM_FLAG_EXTTRIG) != RESET)
1859 {
1860 if (__HAL_LPTIM_GET_IT_SOURCE(hlptim, LPTIM_IT_EXTTRIG) != RESET)
1861 {
1862 /* Clear Trigger detected flag */
1863 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_EXTTRIG);
1864
1865 /* Trigger detected callback */
1866 #if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1)
1867 hlptim->TriggerCallback(hlptim);
1868 #else
1869 HAL_LPTIM_TriggerCallback(hlptim);
1870 #endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */
1871 }
1872 }
1873
1874 /* Compare write interrupt */
1875 if (__HAL_LPTIM_GET_FLAG(hlptim, LPTIM_FLAG_CMPOK) != RESET)
1876 {
1877 if (__HAL_LPTIM_GET_IT_SOURCE(hlptim, LPTIM_IT_CMPOK) != RESET)
1878 {
1879 /* Clear Compare write flag */
1880 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_CMPOK);
1881
1882 /* Compare write Callback */
1883 #if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1)
1884 hlptim->CompareWriteCallback(hlptim);
1885 #else
1886 HAL_LPTIM_CompareWriteCallback(hlptim);
1887 #endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */
1888 }
1889 }
1890
1891 /* Autoreload write interrupt */
1892 if (__HAL_LPTIM_GET_FLAG(hlptim, LPTIM_FLAG_ARROK) != RESET)
1893 {
1894 if (__HAL_LPTIM_GET_IT_SOURCE(hlptim, LPTIM_IT_ARROK) != RESET)
1895 {
1896 /* Clear Autoreload write flag */
1897 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_ARROK);
1898
1899 /* Autoreload write Callback */
1900 #if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1)
1901 hlptim->AutoReloadWriteCallback(hlptim);
1902 #else
1903 HAL_LPTIM_AutoReloadWriteCallback(hlptim);
1904 #endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */
1905 }
1906 }
1907
1908 /* Direction counter changed from Down to Up interrupt */
1909 if (__HAL_LPTIM_GET_FLAG(hlptim, LPTIM_FLAG_UP) != RESET)
1910 {
1911 if (__HAL_LPTIM_GET_IT_SOURCE(hlptim, LPTIM_IT_UP) != RESET)
1912 {
1913 /* Clear Direction counter changed from Down to Up flag */
1914 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_UP);
1915
1916 /* Direction counter changed from Down to Up Callback */
1917 #if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1)
1918 hlptim->DirectionUpCallback(hlptim);
1919 #else
1920 HAL_LPTIM_DirectionUpCallback(hlptim);
1921 #endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */
1922 }
1923 }
1924
1925 /* Direction counter changed from Up to Down interrupt */
1926 if (__HAL_LPTIM_GET_FLAG(hlptim, LPTIM_FLAG_DOWN) != RESET)
1927 {
1928 if (__HAL_LPTIM_GET_IT_SOURCE(hlptim, LPTIM_IT_DOWN) != RESET)
1929 {
1930 /* Clear Direction counter changed from Up to Down flag */
1931 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_DOWN);
1932
1933 /* Direction counter changed from Up to Down Callback */
1934 #if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1)
1935 hlptim->DirectionDownCallback(hlptim);
1936 #else
1937 HAL_LPTIM_DirectionDownCallback(hlptim);
1938 #endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */
1939 }
1940 }
1941 #if defined(EXTI_IMR_MR23)
1942 __HAL_LPTIM_WAKEUPTIMER_EXTI_CLEAR_FLAG();
1943 #endif /* EXTI_IMR_MR23 */
1944 }
1945
1946 /**
1947 * @brief Compare match callback in non-blocking mode.
1948 * @param hlptim LPTIM handle
1949 * @retval None
1950 */
HAL_LPTIM_CompareMatchCallback(LPTIM_HandleTypeDef * hlptim)1951 __weak void HAL_LPTIM_CompareMatchCallback(LPTIM_HandleTypeDef *hlptim)
1952 {
1953 /* Prevent unused argument(s) compilation warning */
1954 UNUSED(hlptim);
1955
1956 /* NOTE : This function should not be modified, when the callback is needed,
1957 the HAL_LPTIM_CompareMatchCallback could be implemented in the user file
1958 */
1959 }
1960
1961 /**
1962 * @brief Autoreload match callback in non-blocking mode.
1963 * @param hlptim LPTIM handle
1964 * @retval None
1965 */
HAL_LPTIM_AutoReloadMatchCallback(LPTIM_HandleTypeDef * hlptim)1966 __weak void HAL_LPTIM_AutoReloadMatchCallback(LPTIM_HandleTypeDef *hlptim)
1967 {
1968 /* Prevent unused argument(s) compilation warning */
1969 UNUSED(hlptim);
1970
1971 /* NOTE : This function should not be modified, when the callback is needed,
1972 the HAL_LPTIM_AutoReloadMatchCallback could be implemented in the user file
1973 */
1974 }
1975
1976 /**
1977 * @brief Trigger detected callback in non-blocking mode.
1978 * @param hlptim LPTIM handle
1979 * @retval None
1980 */
HAL_LPTIM_TriggerCallback(LPTIM_HandleTypeDef * hlptim)1981 __weak void HAL_LPTIM_TriggerCallback(LPTIM_HandleTypeDef *hlptim)
1982 {
1983 /* Prevent unused argument(s) compilation warning */
1984 UNUSED(hlptim);
1985
1986 /* NOTE : This function should not be modified, when the callback is needed,
1987 the HAL_LPTIM_TriggerCallback could be implemented in the user file
1988 */
1989 }
1990
1991 /**
1992 * @brief Compare write callback in non-blocking mode.
1993 * @param hlptim LPTIM handle
1994 * @retval None
1995 */
HAL_LPTIM_CompareWriteCallback(LPTIM_HandleTypeDef * hlptim)1996 __weak void HAL_LPTIM_CompareWriteCallback(LPTIM_HandleTypeDef *hlptim)
1997 {
1998 /* Prevent unused argument(s) compilation warning */
1999 UNUSED(hlptim);
2000
2001 /* NOTE : This function should not be modified, when the callback is needed,
2002 the HAL_LPTIM_CompareWriteCallback could be implemented in the user file
2003 */
2004 }
2005
2006 /**
2007 * @brief Autoreload write callback in non-blocking mode.
2008 * @param hlptim LPTIM handle
2009 * @retval None
2010 */
HAL_LPTIM_AutoReloadWriteCallback(LPTIM_HandleTypeDef * hlptim)2011 __weak void HAL_LPTIM_AutoReloadWriteCallback(LPTIM_HandleTypeDef *hlptim)
2012 {
2013 /* Prevent unused argument(s) compilation warning */
2014 UNUSED(hlptim);
2015
2016 /* NOTE : This function should not be modified, when the callback is needed,
2017 the HAL_LPTIM_AutoReloadWriteCallback could be implemented in the user file
2018 */
2019 }
2020
2021 /**
2022 * @brief Direction counter changed from Down to Up callback in non-blocking mode.
2023 * @param hlptim LPTIM handle
2024 * @retval None
2025 */
HAL_LPTIM_DirectionUpCallback(LPTIM_HandleTypeDef * hlptim)2026 __weak void HAL_LPTIM_DirectionUpCallback(LPTIM_HandleTypeDef *hlptim)
2027 {
2028 /* Prevent unused argument(s) compilation warning */
2029 UNUSED(hlptim);
2030
2031 /* NOTE : This function should not be modified, when the callback is needed,
2032 the HAL_LPTIM_DirectionUpCallback could be implemented in the user file
2033 */
2034 }
2035
2036 /**
2037 * @brief Direction counter changed from Up to Down callback in non-blocking mode.
2038 * @param hlptim LPTIM handle
2039 * @retval None
2040 */
HAL_LPTIM_DirectionDownCallback(LPTIM_HandleTypeDef * hlptim)2041 __weak void HAL_LPTIM_DirectionDownCallback(LPTIM_HandleTypeDef *hlptim)
2042 {
2043 /* Prevent unused argument(s) compilation warning */
2044 UNUSED(hlptim);
2045
2046 /* NOTE : This function should not be modified, when the callback is needed,
2047 the HAL_LPTIM_DirectionDownCallback could be implemented in the user file
2048 */
2049 }
2050
2051 #if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1)
2052 /**
2053 * @brief Register a User LPTIM callback to be used instead of the weak predefined callback
2054 * @param hlptim LPTIM handle
2055 * @param CallbackID ID of the callback to be registered
2056 * This parameter can be one of the following values:
2057 * @arg @ref HAL_LPTIM_MSPINIT_CB_ID LPTIM Base Msp Init Callback ID
2058 * @arg @ref HAL_LPTIM_MSPDEINIT_CB_ID LPTIM Base Msp DeInit Callback ID
2059 * @arg @ref HAL_LPTIM_COMPARE_MATCH_CB_ID Compare match Callback ID
2060 * @arg @ref HAL_LPTIM_AUTORELOAD_MATCH_CB_ID Auto-reload match Callback ID
2061 * @arg @ref HAL_LPTIM_TRIGGER_CB_ID External trigger event detection Callback ID
2062 * @arg @ref HAL_LPTIM_COMPARE_WRITE_CB_ID Compare register write complete Callback ID
2063 * @arg @ref HAL_LPTIM_AUTORELOAD_WRITE_CB_ID Auto-reload register write complete Callback ID
2064 * @arg @ref HAL_LPTIM_DIRECTION_UP_CB_ID Up-counting direction change Callback ID
2065 * @arg @ref HAL_LPTIM_DIRECTION_DOWN_CB_ID Down-counting direction change Callback ID
2066 * @param pCallback pointer to the callback function
2067 * @retval status
2068 */
HAL_LPTIM_RegisterCallback(LPTIM_HandleTypeDef * hlptim,HAL_LPTIM_CallbackIDTypeDef CallbackID,pLPTIM_CallbackTypeDef pCallback)2069 HAL_StatusTypeDef HAL_LPTIM_RegisterCallback(LPTIM_HandleTypeDef *hlptim,
2070 HAL_LPTIM_CallbackIDTypeDef CallbackID,
2071 pLPTIM_CallbackTypeDef pCallback)
2072 {
2073 HAL_StatusTypeDef status = HAL_OK;
2074
2075 if (pCallback == NULL)
2076 {
2077 return HAL_ERROR;
2078 }
2079
2080 /* Process locked */
2081 __HAL_LOCK(hlptim);
2082
2083 if (hlptim->State == HAL_LPTIM_STATE_READY)
2084 {
2085 switch (CallbackID)
2086 {
2087 case HAL_LPTIM_MSPINIT_CB_ID :
2088 hlptim->MspInitCallback = pCallback;
2089 break;
2090
2091 case HAL_LPTIM_MSPDEINIT_CB_ID :
2092 hlptim->MspDeInitCallback = pCallback;
2093 break;
2094
2095 case HAL_LPTIM_COMPARE_MATCH_CB_ID :
2096 hlptim->CompareMatchCallback = pCallback;
2097 break;
2098
2099 case HAL_LPTIM_AUTORELOAD_MATCH_CB_ID :
2100 hlptim->AutoReloadMatchCallback = pCallback;
2101 break;
2102
2103 case HAL_LPTIM_TRIGGER_CB_ID :
2104 hlptim->TriggerCallback = pCallback;
2105 break;
2106
2107 case HAL_LPTIM_COMPARE_WRITE_CB_ID :
2108 hlptim->CompareWriteCallback = pCallback;
2109 break;
2110
2111 case HAL_LPTIM_AUTORELOAD_WRITE_CB_ID :
2112 hlptim->AutoReloadWriteCallback = pCallback;
2113 break;
2114
2115 case HAL_LPTIM_DIRECTION_UP_CB_ID :
2116 hlptim->DirectionUpCallback = pCallback;
2117 break;
2118
2119 case HAL_LPTIM_DIRECTION_DOWN_CB_ID :
2120 hlptim->DirectionDownCallback = pCallback;
2121 break;
2122
2123 default :
2124 /* Return error status */
2125 status = HAL_ERROR;
2126 break;
2127 }
2128 }
2129 else if (hlptim->State == HAL_LPTIM_STATE_RESET)
2130 {
2131 switch (CallbackID)
2132 {
2133 case HAL_LPTIM_MSPINIT_CB_ID :
2134 hlptim->MspInitCallback = pCallback;
2135 break;
2136
2137 case HAL_LPTIM_MSPDEINIT_CB_ID :
2138 hlptim->MspDeInitCallback = pCallback;
2139 break;
2140
2141 default :
2142 /* Return error status */
2143 status = HAL_ERROR;
2144 break;
2145 }
2146 }
2147 else
2148 {
2149 /* Return error status */
2150 status = HAL_ERROR;
2151 }
2152
2153 /* Release Lock */
2154 __HAL_UNLOCK(hlptim);
2155
2156 return status;
2157 }
2158
2159 /**
2160 * @brief Unregister a LPTIM callback
2161 * LLPTIM callback is redirected to the weak predefined callback
2162 * @param hlptim LPTIM handle
2163 * @param CallbackID ID of the callback to be unregistered
2164 * This parameter can be one of the following values:
2165 * @arg @ref HAL_LPTIM_MSPINIT_CB_ID LPTIM Base Msp Init Callback ID
2166 * @arg @ref HAL_LPTIM_MSPDEINIT_CB_ID LPTIM Base Msp DeInit Callback ID
2167 * @arg @ref HAL_LPTIM_COMPARE_MATCH_CB_ID Compare match Callback ID
2168 * @arg @ref HAL_LPTIM_AUTORELOAD_MATCH_CB_ID Auto-reload match Callback ID
2169 * @arg @ref HAL_LPTIM_TRIGGER_CB_ID External trigger event detection Callback ID
2170 * @arg @ref HAL_LPTIM_COMPARE_WRITE_CB_ID Compare register write complete Callback ID
2171 * @arg @ref HAL_LPTIM_AUTORELOAD_WRITE_CB_ID Auto-reload register write complete Callback ID
2172 * @arg @ref HAL_LPTIM_DIRECTION_UP_CB_ID Up-counting direction change Callback ID
2173 * @arg @ref HAL_LPTIM_DIRECTION_DOWN_CB_ID Down-counting direction change Callback ID
2174 * @retval status
2175 */
HAL_LPTIM_UnRegisterCallback(LPTIM_HandleTypeDef * hlptim,HAL_LPTIM_CallbackIDTypeDef CallbackID)2176 HAL_StatusTypeDef HAL_LPTIM_UnRegisterCallback(LPTIM_HandleTypeDef *hlptim,
2177 HAL_LPTIM_CallbackIDTypeDef CallbackID)
2178 {
2179 HAL_StatusTypeDef status = HAL_OK;
2180
2181 /* Process locked */
2182 __HAL_LOCK(hlptim);
2183
2184 if (hlptim->State == HAL_LPTIM_STATE_READY)
2185 {
2186 switch (CallbackID)
2187 {
2188 case HAL_LPTIM_MSPINIT_CB_ID :
2189 /* Legacy weak MspInit Callback */
2190 hlptim->MspInitCallback = HAL_LPTIM_MspInit;
2191 break;
2192
2193 case HAL_LPTIM_MSPDEINIT_CB_ID :
2194 /* Legacy weak Msp DeInit Callback */
2195 hlptim->MspDeInitCallback = HAL_LPTIM_MspDeInit;
2196 break;
2197
2198 case HAL_LPTIM_COMPARE_MATCH_CB_ID :
2199 /* Legacy weak Compare match Callback */
2200 hlptim->CompareMatchCallback = HAL_LPTIM_CompareMatchCallback;
2201 break;
2202
2203 case HAL_LPTIM_AUTORELOAD_MATCH_CB_ID :
2204 /* Legacy weak Auto-reload match Callback */
2205 hlptim->AutoReloadMatchCallback = HAL_LPTIM_AutoReloadMatchCallback;
2206 break;
2207
2208 case HAL_LPTIM_TRIGGER_CB_ID :
2209 /* Legacy weak External trigger event detection Callback */
2210 hlptim->TriggerCallback = HAL_LPTIM_TriggerCallback;
2211 break;
2212
2213 case HAL_LPTIM_COMPARE_WRITE_CB_ID :
2214 /* Legacy weak Compare register write complete Callback */
2215 hlptim->CompareWriteCallback = HAL_LPTIM_CompareWriteCallback;
2216 break;
2217
2218 case HAL_LPTIM_AUTORELOAD_WRITE_CB_ID :
2219 /* Legacy weak Auto-reload register write complete Callback */
2220 hlptim->AutoReloadWriteCallback = HAL_LPTIM_AutoReloadWriteCallback;
2221 break;
2222
2223 case HAL_LPTIM_DIRECTION_UP_CB_ID :
2224 /* Legacy weak Up-counting direction change Callback */
2225 hlptim->DirectionUpCallback = HAL_LPTIM_DirectionUpCallback;
2226 break;
2227
2228 case HAL_LPTIM_DIRECTION_DOWN_CB_ID :
2229 /* Legacy weak Down-counting direction change Callback */
2230 hlptim->DirectionDownCallback = HAL_LPTIM_DirectionDownCallback;
2231 break;
2232
2233 default :
2234 /* Return error status */
2235 status = HAL_ERROR;
2236 break;
2237 }
2238 }
2239 else if (hlptim->State == HAL_LPTIM_STATE_RESET)
2240 {
2241 switch (CallbackID)
2242 {
2243 case HAL_LPTIM_MSPINIT_CB_ID :
2244 /* Legacy weak MspInit Callback */
2245 hlptim->MspInitCallback = HAL_LPTIM_MspInit;
2246 break;
2247
2248 case HAL_LPTIM_MSPDEINIT_CB_ID :
2249 /* Legacy weak Msp DeInit Callback */
2250 hlptim->MspDeInitCallback = HAL_LPTIM_MspDeInit;
2251 break;
2252
2253 default :
2254 /* Return error status */
2255 status = HAL_ERROR;
2256 break;
2257 }
2258 }
2259 else
2260 {
2261 /* Return error status */
2262 status = HAL_ERROR;
2263 }
2264
2265 /* Release Lock */
2266 __HAL_UNLOCK(hlptim);
2267
2268 return status;
2269 }
2270 #endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */
2271
2272 /**
2273 * @}
2274 */
2275
2276 /** @defgroup LPTIM_Group5 Peripheral State functions
2277 * @brief Peripheral State functions.
2278 *
2279 @verbatim
2280 ==============================================================================
2281 ##### Peripheral State functions #####
2282 ==============================================================================
2283 [..]
2284 This subsection permits to get in run-time the status of the peripheral.
2285
2286 @endverbatim
2287 * @{
2288 */
2289
2290 /**
2291 * @brief Return the LPTIM handle state.
2292 * @param hlptim LPTIM handle
2293 * @retval HAL state
2294 */
HAL_LPTIM_GetState(LPTIM_HandleTypeDef * hlptim)2295 HAL_LPTIM_StateTypeDef HAL_LPTIM_GetState(LPTIM_HandleTypeDef *hlptim)
2296 {
2297 /* Return LPTIM handle state */
2298 return hlptim->State;
2299 }
2300
2301 /**
2302 * @}
2303 */
2304
2305
2306 /**
2307 * @}
2308 */
2309
2310 /* Private functions ---------------------------------------------------------*/
2311
2312 /** @defgroup LPTIM_Private_Functions LPTIM Private Functions
2313 * @{
2314 */
2315 #if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1)
2316 /**
2317 * @brief Reset interrupt callbacks to the legacy weak callbacks.
2318 * @param lptim pointer to a LPTIM_HandleTypeDef structure that contains
2319 * the configuration information for LPTIM module.
2320 * @retval None
2321 */
LPTIM_ResetCallback(LPTIM_HandleTypeDef * lptim)2322 static void LPTIM_ResetCallback(LPTIM_HandleTypeDef *lptim)
2323 {
2324 /* Reset the LPTIM callback to the legacy weak callbacks */
2325 lptim->CompareMatchCallback = HAL_LPTIM_CompareMatchCallback;
2326 lptim->AutoReloadMatchCallback = HAL_LPTIM_AutoReloadMatchCallback;
2327 lptim->TriggerCallback = HAL_LPTIM_TriggerCallback;
2328 lptim->CompareWriteCallback = HAL_LPTIM_CompareWriteCallback;
2329 lptim->AutoReloadWriteCallback = HAL_LPTIM_AutoReloadWriteCallback;
2330 lptim->DirectionUpCallback = HAL_LPTIM_DirectionUpCallback;
2331 lptim->DirectionDownCallback = HAL_LPTIM_DirectionDownCallback;
2332 }
2333 #endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */
2334
2335 /**
2336 * @brief LPTimer Wait for flag set
2337 * @param hlptim pointer to a LPTIM_HandleTypeDef structure that contains
2338 * the configuration information for LPTIM module.
2339 * @param flag The lptim flag
2340 * @retval HAL status
2341 */
LPTIM_WaitForFlag(LPTIM_HandleTypeDef * hlptim,uint32_t flag)2342 static HAL_StatusTypeDef LPTIM_WaitForFlag(LPTIM_HandleTypeDef *hlptim, uint32_t flag)
2343 {
2344 HAL_StatusTypeDef result = HAL_OK;
2345 uint32_t count = TIMEOUT * (SystemCoreClock / 20UL / 1000UL);
2346 do
2347 {
2348 count--;
2349 if (count == 0UL)
2350 {
2351 result = HAL_TIMEOUT;
2352 }
2353 } while ((!(__HAL_LPTIM_GET_FLAG((hlptim), (flag)))) && (count != 0UL));
2354
2355 return result;
2356 }
2357
2358 /**
2359 * @brief Disable LPTIM HW instance.
2360 * @param hlptim pointer to a LPTIM_HandleTypeDef structure that contains
2361 * the configuration information for LPTIM module.
2362 * @note The following sequence is required to solve LPTIM disable HW limitation.
2363 * Please check Errata Sheet ES0335 for more details under "MCU may remain
2364 * stuck in LPTIM interrupt when entering Stop mode" section.
2365 * @retval None
2366 */
LPTIM_Disable(LPTIM_HandleTypeDef * hlptim)2367 void LPTIM_Disable(LPTIM_HandleTypeDef *hlptim)
2368 {
2369 uint32_t tmpclksource = 0;
2370 uint32_t tmpIER;
2371 uint32_t tmpCFGR;
2372 uint32_t tmpCMP;
2373 uint32_t tmpARR;
2374 uint32_t primask_bit;
2375 uint32_t tmpOR;
2376
2377 /* Enter critical section */
2378 primask_bit = __get_PRIMASK();
2379 __set_PRIMASK(1) ;
2380
2381 /*********** Save LPTIM Config ***********/
2382 /* Save LPTIM source clock */
2383 switch ((uint32_t)hlptim->Instance)
2384 {
2385 case LPTIM1_BASE:
2386 tmpclksource = __HAL_RCC_GET_LPTIM1_SOURCE();
2387 break;
2388 default:
2389 break;
2390 }
2391
2392 /* Save LPTIM configuration registers */
2393 tmpIER = hlptim->Instance->IER;
2394 tmpCFGR = hlptim->Instance->CFGR;
2395 tmpCMP = hlptim->Instance->CMP;
2396 tmpARR = hlptim->Instance->ARR;
2397 tmpOR = hlptim->Instance->OR;
2398
2399 /*********** Reset LPTIM ***********/
2400 switch ((uint32_t)hlptim->Instance)
2401 {
2402 case LPTIM1_BASE:
2403 __HAL_RCC_LPTIM1_FORCE_RESET();
2404 __HAL_RCC_LPTIM1_RELEASE_RESET();
2405 break;
2406 default:
2407 break;
2408 }
2409
2410 /*********** Restore LPTIM Config ***********/
2411 if ((tmpCMP != 0UL) || (tmpARR != 0UL))
2412 {
2413 /* Force LPTIM source kernel clock from APB */
2414 switch ((uint32_t)hlptim->Instance)
2415 {
2416 case LPTIM1_BASE:
2417 __HAL_RCC_LPTIM1_CONFIG(RCC_LPTIM1CLKSOURCE_PCLK1);
2418 break;
2419 default:
2420 break;
2421 }
2422
2423 if (tmpCMP != 0UL)
2424 {
2425 /* Restore CMP register (LPTIM should be enabled first) */
2426 hlptim->Instance->CR |= LPTIM_CR_ENABLE;
2427 hlptim->Instance->CMP = tmpCMP;
2428
2429 /* Wait for the completion of the write operation to the LPTIM_CMP register */
2430 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_CMPOK) == HAL_TIMEOUT)
2431 {
2432 hlptim->State = HAL_LPTIM_STATE_TIMEOUT;
2433 }
2434 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_CMPOK);
2435 }
2436
2437 if (tmpARR != 0UL)
2438 {
2439 /* Restore ARR register (LPTIM should be enabled first) */
2440 hlptim->Instance->CR |= LPTIM_CR_ENABLE;
2441 hlptim->Instance->ARR = tmpARR;
2442
2443 /* Wait for the completion of the write operation to the LPTIM_ARR register */
2444 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_ARROK) == HAL_TIMEOUT)
2445 {
2446 hlptim->State = HAL_LPTIM_STATE_TIMEOUT;
2447 }
2448
2449 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_ARROK);
2450 }
2451
2452 /* Restore LPTIM source kernel clock */
2453 switch ((uint32_t)hlptim->Instance)
2454 {
2455 case LPTIM1_BASE:
2456 __HAL_RCC_LPTIM1_CONFIG(tmpclksource);
2457 break;
2458 default:
2459 break;
2460 }
2461 }
2462
2463 /* Restore configuration registers (LPTIM should be disabled first) */
2464 hlptim->Instance->CR &= ~(LPTIM_CR_ENABLE);
2465 hlptim->Instance->IER = tmpIER;
2466 hlptim->Instance->CFGR = tmpCFGR;
2467 hlptim->Instance->OR = tmpOR;
2468
2469 /* Exit critical section: restore previous priority mask */
2470 __set_PRIMASK(primask_bit);
2471 }
2472 /**
2473 * @}
2474 */
2475 #endif /* LPTIM1 */
2476
2477 #endif /* HAL_LPTIM_MODULE_ENABLED */
2478 /**
2479 * @}
2480 */
2481
2482 /**
2483 * @}
2484 */
2485
