1 /**
2 ******************************************************************************
3 * @file stm32f4xx_ll_dma2d.h
4 * @author MCD Application Team
5 * @brief Header file of DMA2D LL module.
6 ******************************************************************************
7 * @attention
8 *
9 * Copyright (c) 2016 STMicroelectronics.
10 * All rights reserved.
11 *
12 * This software is licensed under terms that can be found in the LICENSE file
13 * in the root directory of this software component.
14 * If no LICENSE file comes with this software, it is provided AS-IS.
15 *
16 ******************************************************************************
17 */
18
19 /* Define to prevent recursive inclusion -------------------------------------*/
20 #ifndef STM32F4xx_LL_DMA2D_H
21 #define STM32F4xx_LL_DMA2D_H
22
23 #ifdef __cplusplus
24 extern "C" {
25 #endif
26
27 /* Includes ------------------------------------------------------------------*/
28 #include "stm32f4xx.h"
29
30 /** @addtogroup STM32F4xx_LL_Driver
31 * @{
32 */
33
34 #if defined (DMA2D)
35
36 /** @defgroup DMA2D_LL DMA2D
37 * @{
38 */
39
40 /* Private types -------------------------------------------------------------*/
41 /* Private variables ---------------------------------------------------------*/
42 /* Private constants ---------------------------------------------------------*/
43 /* Private macros ------------------------------------------------------------*/
44 #if defined(USE_FULL_LL_DRIVER)
45 /** @defgroup DMA2D_LL_Private_Macros DMA2D Private Macros
46 * @{
47 */
48
49 /**
50 * @}
51 */
52 #endif /*USE_FULL_LL_DRIVER*/
53
54 /* Exported types ------------------------------------------------------------*/
55 #if defined(USE_FULL_LL_DRIVER)
56 /** @defgroup DMA2D_LL_ES_Init_Struct DMA2D Exported Init structures
57 * @{
58 */
59
60 /**
61 * @brief LL DMA2D Init Structure Definition
62 */
63 typedef struct
64 {
65 uint32_t Mode; /*!< Specifies the DMA2D transfer mode.
66 - This parameter can be one value of @ref DMA2D_LL_EC_MODE.
67
68 This parameter can be modified afterwards,
69 using unitary function @ref LL_DMA2D_SetMode(). */
70
71 uint32_t ColorMode; /*!< Specifies the color format of the output image.
72 - This parameter can be one value of @ref DMA2D_LL_EC_OUTPUT_COLOR_MODE.
73
74 This parameter can be modified afterwards using,
75 unitary function @ref LL_DMA2D_SetOutputColorMode(). */
76
77 uint32_t OutputBlue; /*!< Specifies the Blue value of the output image.
78 - This parameter must be a number between:
79 Min_Data = 0x00 and Max_Data = 0xFF if ARGB8888 color mode is selected.
80 - This parameter must be a number between:
81 Min_Data = 0x00 and Max_Data = 0xFF if RGB888 color mode is selected.
82 - This parameter must be a number between:
83 Min_Data = 0x00 and Max_Data = 0x1F if RGB565 color mode is selected.
84 - This parameter must be a number between:
85 Min_Data = 0x00 and Max_Data = 0x1F if ARGB1555 color mode is selected.
86 - This parameter must be a number between:
87 Min_Data = 0x00 and Max_Data = 0x0F if ARGB4444 color mode is selected.
88
89 This parameter can be modified afterwards,
90 using unitary function @ref LL_DMA2D_SetOutputColor() or configuration
91 function @ref LL_DMA2D_ConfigOutputColor(). */
92
93 uint32_t OutputGreen; /*!< Specifies the Green value of the output image.
94 - This parameter must be a number between:
95 Min_Data = 0x00 and Max_Data = 0xFF if ARGB8888 color mode is selected.
96 - This parameter must be a number between:
97 Min_Data = 0x00 and Max_Data = 0xFF if RGB888 color mode is selected.
98 - This parameter must be a number between:
99 Min_Data = 0x00 and Max_Data = 0x3F if RGB565 color mode is selected.
100 - This parameter must be a number between:
101 Min_Data = 0x00 and Max_Data = 0x1F if ARGB1555 color mode is selected.
102 - This parameter must be a number between:
103 Min_Data = 0x00 and Max_Data = 0x0F if ARGB4444 color mode is selected.
104
105 This parameter can be modified afterwards
106 using unitary function @ref LL_DMA2D_SetOutputColor() or configuration
107 function @ref LL_DMA2D_ConfigOutputColor(). */
108
109 uint32_t OutputRed; /*!< Specifies the Red value of the output image.
110 - This parameter must be a number between:
111 Min_Data = 0x00 and Max_Data = 0xFF if ARGB8888 color mode is selected.
112 - This parameter must be a number between:
113 Min_Data = 0x00 and Max_Data = 0xFF if RGB888 color mode is selected.
114 - This parameter must be a number between:
115 Min_Data = 0x00 and Max_Data = 0x1F if RGB565 color mode is selected.
116 - This parameter must be a number between:
117 Min_Data = 0x00 and Max_Data = 0x1F if ARGB1555 color mode is selected.
118 - This parameter must be a number between:
119 Min_Data = 0x00 and Max_Data = 0x0F if ARGB4444 color mode is selected.
120
121 This parameter can be modified afterwards
122 using unitary function @ref LL_DMA2D_SetOutputColor() or configuration
123 function @ref LL_DMA2D_ConfigOutputColor(). */
124
125 uint32_t OutputAlpha; /*!< Specifies the Alpha channel of the output image.
126 - This parameter must be a number between:
127 Min_Data = 0x00 and Max_Data = 0xFF if ARGB8888 color mode is selected.
128 - This parameter must be a number between:
129 Min_Data = 0x00 and Max_Data = 0x01 if ARGB1555 color mode is selected.
130 - This parameter must be a number between:
131 Min_Data = 0x00 and Max_Data = 0x0F if ARGB4444 color mode is selected.
132 - This parameter is not considered if RGB888 or RGB565 color mode is selected.
133
134 This parameter can be modified afterwards using,
135 unitary function @ref LL_DMA2D_SetOutputColor() or configuration
136 function @ref LL_DMA2D_ConfigOutputColor(). */
137
138 uint32_t OutputMemoryAddress; /*!< Specifies the memory address.
139 - This parameter must be a number between:
140 Min_Data = 0x0000 and Max_Data = 0xFFFFFFFF.
141
142 This parameter can be modified afterwards,
143 using unitary function @ref LL_DMA2D_SetOutputMemAddr(). */
144
145
146
147 uint32_t LineOffset; /*!< Specifies the output line offset value.
148 - This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0x3FFF.
149
150 This parameter can be modified afterwards,
151 using unitary function @ref LL_DMA2D_SetLineOffset(). */
152
153 uint32_t NbrOfLines; /*!< Specifies the number of lines of the area to be transferred.
154 - This parameter must be a number between:
155 Min_Data = 0x0000 and Max_Data = 0xFFFF.
156
157 This parameter can be modified afterwards,
158 using unitary function @ref LL_DMA2D_SetNbrOfLines(). */
159
160 uint32_t NbrOfPixelsPerLines; /*!< Specifies the number of pixels per lines of the area to be transferred.
161 - This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0x3FFF.
162
163 This parameter can be modified afterwards using,
164 unitary function @ref LL_DMA2D_SetNbrOfPixelsPerLines(). */
165
166
167 } LL_DMA2D_InitTypeDef;
168
169 /**
170 * @brief LL DMA2D Layer Configuration Structure Definition
171 */
172 typedef struct
173 {
174 uint32_t MemoryAddress; /*!< Specifies the foreground or background memory address.
175 - This parameter must be a number between:
176 Min_Data = 0x0000 and Max_Data = 0xFFFFFFFF.
177
178 This parameter can be modified afterwards using unitary functions
179 - @ref LL_DMA2D_FGND_SetMemAddr() for foreground layer,
180 - @ref LL_DMA2D_BGND_SetMemAddr() for background layer. */
181
182 uint32_t LineOffset; /*!< Specifies the foreground or background line offset value.
183 - This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0x3FFF.
184
185 This parameter can be modified afterwards using unitary functions
186 - @ref LL_DMA2D_FGND_SetLineOffset() for foreground layer,
187 - @ref LL_DMA2D_BGND_SetLineOffset() for background layer. */
188
189 uint32_t ColorMode; /*!< Specifies the foreground or background color mode.
190 - This parameter can be one value of @ref DMA2D_LL_EC_INPUT_COLOR_MODE.
191
192 This parameter can be modified afterwards using unitary functions
193 - @ref LL_DMA2D_FGND_SetColorMode() for foreground layer,
194 - @ref LL_DMA2D_BGND_SetColorMode() for background layer. */
195
196 uint32_t CLUTColorMode; /*!< Specifies the foreground or background CLUT color mode.
197 - This parameter can be one value of @ref DMA2D_LL_EC_CLUT_COLOR_MODE.
198
199 This parameter can be modified afterwards using unitary functions
200 - @ref LL_DMA2D_FGND_SetCLUTColorMode() for foreground layer,
201 - @ref LL_DMA2D_BGND_SetCLUTColorMode() for background layer. */
202
203 uint32_t CLUTSize; /*!< Specifies the foreground or background CLUT size.
204 - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF.
205
206 This parameter can be modified afterwards using unitary functions
207 - @ref LL_DMA2D_FGND_SetCLUTSize() for foreground layer,
208 - @ref LL_DMA2D_BGND_SetCLUTSize() for background layer. */
209
210 uint32_t AlphaMode; /*!< Specifies the foreground or background alpha mode.
211 - This parameter can be one value of @ref DMA2D_LL_EC_ALPHA_MODE.
212
213 This parameter can be modified afterwards using unitary functions
214 - @ref LL_DMA2D_FGND_SetAlphaMode() for foreground layer,
215 - @ref LL_DMA2D_BGND_SetAlphaMode() for background layer. */
216
217 uint32_t Alpha; /*!< Specifies the foreground or background Alpha value.
218 - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF.
219
220 This parameter can be modified afterwards using unitary functions
221 - @ref LL_DMA2D_FGND_SetAlpha() for foreground layer,
222 - @ref LL_DMA2D_BGND_SetAlpha() for background layer. */
223
224 uint32_t Blue; /*!< Specifies the foreground or background Blue color value.
225 - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF.
226
227 This parameter can be modified afterwards using unitary functions
228 - @ref LL_DMA2D_FGND_SetBlueColor() for foreground layer,
229 - @ref LL_DMA2D_BGND_SetBlueColor() for background layer. */
230
231 uint32_t Green; /*!< Specifies the foreground or background Green color value.
232 - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF.
233
234 This parameter can be modified afterwards using unitary functions
235 - @ref LL_DMA2D_FGND_SetGreenColor() for foreground layer,
236 - @ref LL_DMA2D_BGND_SetGreenColor() for background layer. */
237
238 uint32_t Red; /*!< Specifies the foreground or background Red color value.
239 - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF.
240
241 This parameter can be modified afterwards using unitary functions
242 - @ref LL_DMA2D_FGND_SetRedColor() for foreground layer,
243 - @ref LL_DMA2D_BGND_SetRedColor() for background layer. */
244
245 uint32_t CLUTMemoryAddress; /*!< Specifies the foreground or background CLUT memory address.
246 - This parameter must be a number between:
247 Min_Data = 0x0000 and Max_Data = 0xFFFFFFFF.
248
249 This parameter can be modified afterwards using unitary functions
250 - @ref LL_DMA2D_FGND_SetCLUTMemAddr() for foreground layer,
251 - @ref LL_DMA2D_BGND_SetCLUTMemAddr() for background layer. */
252
253
254
255 } LL_DMA2D_LayerCfgTypeDef;
256
257 /**
258 * @brief LL DMA2D Output Color Structure Definition
259 */
260 typedef struct
261 {
262 uint32_t ColorMode; /*!< Specifies the color format of the output image.
263 - This parameter can be one value of @ref DMA2D_LL_EC_OUTPUT_COLOR_MODE.
264
265 This parameter can be modified afterwards using
266 unitary function @ref LL_DMA2D_SetOutputColorMode(). */
267
268 uint32_t OutputBlue; /*!< Specifies the Blue value of the output image.
269 - This parameter must be a number between:
270 Min_Data = 0x00 and Max_Data = 0xFF if ARGB8888 color mode is selected.
271 - This parameter must be a number between:
272 Min_Data = 0x00 and Max_Data = 0xFF if RGB888 color mode is selected.
273 - This parameter must be a number between:
274 Min_Data = 0x00 and Max_Data = 0x1F if RGB565 color mode is selected.
275 - This parameter must be a number between:
276 Min_Data = 0x00 and Max_Data = 0x1F if ARGB1555 color mode is selected.
277 - This parameter must be a number between:
278 Min_Data = 0x00 and Max_Data = 0x0F if ARGB4444 color mode is selected.
279
280 This parameter can be modified afterwards using,
281 unitary function @ref LL_DMA2D_SetOutputColor() or configuration
282 function @ref LL_DMA2D_ConfigOutputColor(). */
283
284 uint32_t OutputGreen; /*!< Specifies the Green value of the output image.
285 - This parameter must be a number between:
286 Min_Data = 0x00 and Max_Data = 0xFF if ARGB8888 color mode is selected.
287 - This parameter must be a number between
288 Min_Data = 0x00 and Max_Data = 0xFF if RGB888 color mode is selected.
289 - This parameter must be a number between:
290 Min_Data = 0x00 and Max_Data = 0x3F if RGB565 color mode is selected.
291 - This parameter must be a number between:
292 Min_Data = 0x00 and Max_Data = 0x1F if ARGB1555 color mode is selected.
293 - This parameter must be a number between:
294 Min_Data = 0x00 and Max_Data = 0x0F if ARGB4444 color mode is selected.
295
296 This parameter can be modified afterwards,
297 using unitary function @ref LL_DMA2D_SetOutputColor() or configuration
298 function @ref LL_DMA2D_ConfigOutputColor(). */
299
300 uint32_t OutputRed; /*!< Specifies the Red value of the output image.
301 - This parameter must be a number between:
302 Min_Data = 0x00 and Max_Data = 0xFF if ARGB8888 color mode is selected.
303 - This parameter must be a number between:
304 Min_Data = 0x00 and Max_Data = 0xFF if RGB888 color mode is selected.
305 - This parameter must be a number between:
306 Min_Data = 0x00 and Max_Data = 0x1F if RGB565 color mode is selected.
307 - This parameter must be a number between:
308 Min_Data = 0x00 and Max_Data = 0x1F if ARGB1555 color mode is selected.
309 - This parameter must be a number between:
310 Min_Data = 0x00 and Max_Data = 0x0F if ARGB4444 color mode is selected.
311
312 This parameter can be modified afterwards,
313 using unitary function @ref LL_DMA2D_SetOutputColor() or configuration
314 function @ref LL_DMA2D_ConfigOutputColor(). */
315
316 uint32_t OutputAlpha; /*!< Specifies the Alpha channel of the output image.
317 - This parameter must be a number between:
318 Min_Data = 0x00 and Max_Data = 0xFF if ARGB8888 color mode is selected.
319 - This parameter must be a number between:
320 Min_Data = 0x00 and Max_Data = 0x01 if ARGB1555 color mode is selected.
321 - This parameter must be a number between:
322 Min_Data = 0x00 and Max_Data = 0x0F if ARGB4444 color mode is selected.
323 - This parameter is not considered if RGB888 or RGB565 color mode is selected.
324
325 This parameter can be modified afterwards,
326 using unitary function @ref LL_DMA2D_SetOutputColor() or configuration
327 function @ref LL_DMA2D_ConfigOutputColor(). */
328
329 } LL_DMA2D_ColorTypeDef;
330
331 /**
332 * @}
333 */
334 #endif /* USE_FULL_LL_DRIVER */
335
336 /* Exported constants --------------------------------------------------------*/
337 /** @defgroup DMA2D_LL_Exported_Constants DMA2D Exported Constants
338 * @{
339 */
340
341 /** @defgroup DMA2D_LL_EC_GET_FLAG Get Flags Defines
342 * @brief Flags defines which can be used with LL_DMA2D_ReadReg function
343 * @{
344 */
345 #define LL_DMA2D_FLAG_CEIF DMA2D_ISR_CEIF /*!< Configuration Error Interrupt Flag */
346 #define LL_DMA2D_FLAG_CTCIF DMA2D_ISR_CTCIF /*!< CLUT Transfer Complete Interrupt Flag */
347 #define LL_DMA2D_FLAG_CAEIF DMA2D_ISR_CAEIF /*!< CLUT Access Error Interrupt Flag */
348 #define LL_DMA2D_FLAG_TWIF DMA2D_ISR_TWIF /*!< Transfer Watermark Interrupt Flag */
349 #define LL_DMA2D_FLAG_TCIF DMA2D_ISR_TCIF /*!< Transfer Complete Interrupt Flag */
350 #define LL_DMA2D_FLAG_TEIF DMA2D_ISR_TEIF /*!< Transfer Error Interrupt Flag */
351 /**
352 * @}
353 */
354
355 /** @defgroup DMA2D_LL_EC_IT IT Defines
356 * @brief IT defines which can be used with LL_DMA2D_ReadReg and LL_DMA2D_WriteReg functions
357 * @{
358 */
359 #define LL_DMA2D_IT_CEIE DMA2D_CR_CEIE /*!< Configuration Error Interrupt */
360 #define LL_DMA2D_IT_CTCIE DMA2D_CR_CTCIE /*!< CLUT Transfer Complete Interrupt */
361 #define LL_DMA2D_IT_CAEIE DMA2D_CR_CAEIE /*!< CLUT Access Error Interrupt */
362 #define LL_DMA2D_IT_TWIE DMA2D_CR_TWIE /*!< Transfer Watermark Interrupt */
363 #define LL_DMA2D_IT_TCIE DMA2D_CR_TCIE /*!< Transfer Complete Interrupt */
364 #define LL_DMA2D_IT_TEIE DMA2D_CR_TEIE /*!< Transfer Error Interrupt */
365 /**
366 * @}
367 */
368
369 /** @defgroup DMA2D_LL_EC_MODE Mode
370 * @{
371 */
372 #define LL_DMA2D_MODE_M2M 0x00000000U /*!< DMA2D memory to memory transfer mode */
373 #define LL_DMA2D_MODE_M2M_PFC DMA2D_CR_MODE_0 /*!< DMA2D memory to memory with pixel format conversion transfer mode */
374 #define LL_DMA2D_MODE_M2M_BLEND DMA2D_CR_MODE_1 /*!< DMA2D memory to memory with blending transfer mode */
375 #define LL_DMA2D_MODE_R2M DMA2D_CR_MODE /*!< DMA2D register to memory transfer mode */
376 /**
377 * @}
378 */
379
380 /** @defgroup DMA2D_LL_EC_OUTPUT_COLOR_MODE Output Color Mode
381 * @{
382 */
383 #define LL_DMA2D_OUTPUT_MODE_ARGB8888 0x00000000U /*!< ARGB8888 */
384 #define LL_DMA2D_OUTPUT_MODE_RGB888 DMA2D_OPFCCR_CM_0 /*!< RGB888 */
385 #define LL_DMA2D_OUTPUT_MODE_RGB565 DMA2D_OPFCCR_CM_1 /*!< RGB565 */
386 #define LL_DMA2D_OUTPUT_MODE_ARGB1555 (DMA2D_OPFCCR_CM_0|DMA2D_OPFCCR_CM_1) /*!< ARGB1555 */
387 #define LL_DMA2D_OUTPUT_MODE_ARGB4444 DMA2D_OPFCCR_CM_2 /*!< ARGB4444 */
388 /**
389 * @}
390 */
391
392 /** @defgroup DMA2D_LL_EC_INPUT_COLOR_MODE Input Color Mode
393 * @{
394 */
395 #define LL_DMA2D_INPUT_MODE_ARGB8888 0x00000000U /*!< ARGB8888 */
396 #define LL_DMA2D_INPUT_MODE_RGB888 DMA2D_FGPFCCR_CM_0 /*!< RGB888 */
397 #define LL_DMA2D_INPUT_MODE_RGB565 DMA2D_FGPFCCR_CM_1 /*!< RGB565 */
398 #define LL_DMA2D_INPUT_MODE_ARGB1555 (DMA2D_FGPFCCR_CM_0|DMA2D_FGPFCCR_CM_1) /*!< ARGB1555 */
399 #define LL_DMA2D_INPUT_MODE_ARGB4444 DMA2D_FGPFCCR_CM_2 /*!< ARGB4444 */
400 #define LL_DMA2D_INPUT_MODE_L8 (DMA2D_FGPFCCR_CM_0|DMA2D_FGPFCCR_CM_2) /*!< L8 */
401 #define LL_DMA2D_INPUT_MODE_AL44 (DMA2D_FGPFCCR_CM_1|DMA2D_FGPFCCR_CM_2) /*!< AL44 */
402 #define LL_DMA2D_INPUT_MODE_AL88 (DMA2D_FGPFCCR_CM_0|DMA2D_FGPFCCR_CM_1|DMA2D_FGPFCCR_CM_2) /*!< AL88 */
403 #define LL_DMA2D_INPUT_MODE_L4 DMA2D_FGPFCCR_CM_3 /*!< L4 */
404 #define LL_DMA2D_INPUT_MODE_A8 (DMA2D_FGPFCCR_CM_0|DMA2D_FGPFCCR_CM_3) /*!< A8 */
405 #define LL_DMA2D_INPUT_MODE_A4 (DMA2D_FGPFCCR_CM_1|DMA2D_FGPFCCR_CM_3) /*!< A4 */
406 /**
407 * @}
408 */
409
410 /** @defgroup DMA2D_LL_EC_ALPHA_MODE Alpha Mode
411 * @{
412 */
413 #define LL_DMA2D_ALPHA_MODE_NO_MODIF 0x00000000U /*!< No modification of the alpha channel value */
414 #define LL_DMA2D_ALPHA_MODE_REPLACE DMA2D_FGPFCCR_AM_0 /*!< Replace original alpha channel value by
415 programmed alpha value */
416 #define LL_DMA2D_ALPHA_MODE_COMBINE DMA2D_FGPFCCR_AM_1 /*!< Replace original alpha channel value by
417 programmed alpha value with,
418 original alpha channel value */
419 /**
420 * @}
421 */
422
423
424
425
426 /** @defgroup DMA2D_LL_EC_CLUT_COLOR_MODE CLUT Color Mode
427 * @{
428 */
429 #define LL_DMA2D_CLUT_COLOR_MODE_ARGB8888 0x00000000U /*!< ARGB8888 */
430 #define LL_DMA2D_CLUT_COLOR_MODE_RGB888 DMA2D_FGPFCCR_CCM /*!< RGB888 */
431 /**
432 * @}
433 */
434
435
436 /**
437 * @}
438 */
439
440 /* Exported macro ------------------------------------------------------------*/
441 /** @defgroup DMA2D_LL_Exported_Macros DMA2D Exported Macros
442 * @{
443 */
444
445 /** @defgroup DMA2D_LL_EM_WRITE_READ Common Write and read registers Macros
446 * @{
447 */
448
449 /**
450 * @brief Write a value in DMA2D register.
451 * @param __INSTANCE__ DMA2D Instance
452 * @param __REG__ Register to be written
453 * @param __VALUE__ Value to be written in the register
454 * @retval None
455 */
456 #define LL_DMA2D_WriteReg(__INSTANCE__, __REG__, __VALUE__) WRITE_REG((__INSTANCE__)->__REG__, (__VALUE__))
457
458 /**
459 * @brief Read a value in DMA2D register.
460 * @param __INSTANCE__ DMA2D Instance
461 * @param __REG__ Register to be read
462 * @retval Register value
463 */
464 #define LL_DMA2D_ReadReg(__INSTANCE__, __REG__) READ_REG((__INSTANCE__)->__REG__)
465 /**
466 * @}
467 */
468
469 /**
470 * @}
471 */
472
473 /* Exported functions --------------------------------------------------------*/
474 /** @defgroup DMA2D_LL_Exported_Functions DMA2D Exported Functions
475 * @{
476 */
477
478 /** @defgroup DMA2D_LL_EF_Configuration Configuration Functions
479 * @{
480 */
481
482 /**
483 * @brief Start a DMA2D transfer.
484 * @rmtoll CR START LL_DMA2D_Start
485 * @param DMA2Dx DMA2D Instance
486 * @retval None
487 */
LL_DMA2D_Start(DMA2D_TypeDef * DMA2Dx)488 __STATIC_INLINE void LL_DMA2D_Start(DMA2D_TypeDef *DMA2Dx)
489 {
490 SET_BIT(DMA2Dx->CR, DMA2D_CR_START);
491 }
492
493 /**
494 * @brief Indicate if a DMA2D transfer is ongoing.
495 * @rmtoll CR START LL_DMA2D_IsTransferOngoing
496 * @param DMA2Dx DMA2D Instance
497 * @retval State of bit (1 or 0).
498 */
LL_DMA2D_IsTransferOngoing(DMA2D_TypeDef * DMA2Dx)499 __STATIC_INLINE uint32_t LL_DMA2D_IsTransferOngoing(DMA2D_TypeDef *DMA2Dx)
500 {
501 return ((READ_BIT(DMA2Dx->CR, DMA2D_CR_START) == (DMA2D_CR_START)) ? 1UL : 0UL);
502 }
503
504 /**
505 * @brief Suspend DMA2D transfer.
506 * @note This API can be used to suspend automatic foreground or background CLUT loading.
507 * @rmtoll CR SUSP LL_DMA2D_Suspend
508 * @param DMA2Dx DMA2D Instance
509 * @retval None
510 */
LL_DMA2D_Suspend(DMA2D_TypeDef * DMA2Dx)511 __STATIC_INLINE void LL_DMA2D_Suspend(DMA2D_TypeDef *DMA2Dx)
512 {
513 MODIFY_REG(DMA2Dx->CR, DMA2D_CR_SUSP | DMA2D_CR_START, DMA2D_CR_SUSP);
514 }
515
516 /**
517 * @brief Resume DMA2D transfer.
518 * @note This API can be used to resume automatic foreground or background CLUT loading.
519 * @rmtoll CR SUSP LL_DMA2D_Resume
520 * @param DMA2Dx DMA2D Instance
521 * @retval None
522 */
LL_DMA2D_Resume(DMA2D_TypeDef * DMA2Dx)523 __STATIC_INLINE void LL_DMA2D_Resume(DMA2D_TypeDef *DMA2Dx)
524 {
525 CLEAR_BIT(DMA2Dx->CR, DMA2D_CR_SUSP | DMA2D_CR_START);
526 }
527
528 /**
529 * @brief Indicate if DMA2D transfer is suspended.
530 * @note This API can be used to indicate whether or not automatic foreground or
531 * background CLUT loading is suspended.
532 * @rmtoll CR SUSP LL_DMA2D_IsSuspended
533 * @param DMA2Dx DMA2D Instance
534 * @retval State of bit (1 or 0).
535 */
LL_DMA2D_IsSuspended(DMA2D_TypeDef * DMA2Dx)536 __STATIC_INLINE uint32_t LL_DMA2D_IsSuspended(DMA2D_TypeDef *DMA2Dx)
537 {
538 return ((READ_BIT(DMA2Dx->CR, DMA2D_CR_SUSP) == (DMA2D_CR_SUSP)) ? 1UL : 0UL);
539 }
540
541 /**
542 * @brief Abort DMA2D transfer.
543 * @note This API can be used to abort automatic foreground or background CLUT loading.
544 * @rmtoll CR ABORT LL_DMA2D_Abort
545 * @param DMA2Dx DMA2D Instance
546 * @retval None
547 */
LL_DMA2D_Abort(DMA2D_TypeDef * DMA2Dx)548 __STATIC_INLINE void LL_DMA2D_Abort(DMA2D_TypeDef *DMA2Dx)
549 {
550 MODIFY_REG(DMA2Dx->CR, DMA2D_CR_ABORT | DMA2D_CR_START, DMA2D_CR_ABORT);
551 }
552
553 /**
554 * @brief Indicate if DMA2D transfer is aborted.
555 * @note This API can be used to indicate whether or not automatic foreground or
556 * background CLUT loading is aborted.
557 * @rmtoll CR ABORT LL_DMA2D_IsAborted
558 * @param DMA2Dx DMA2D Instance
559 * @retval State of bit (1 or 0).
560 */
LL_DMA2D_IsAborted(DMA2D_TypeDef * DMA2Dx)561 __STATIC_INLINE uint32_t LL_DMA2D_IsAborted(DMA2D_TypeDef *DMA2Dx)
562 {
563 return ((READ_BIT(DMA2Dx->CR, DMA2D_CR_ABORT) == (DMA2D_CR_ABORT)) ? 1UL : 0UL);
564 }
565
566 /**
567 * @brief Set DMA2D mode.
568 * @rmtoll CR MODE LL_DMA2D_SetMode
569 * @param DMA2Dx DMA2D Instance
570 * @param Mode This parameter can be one of the following values:
571 * @arg @ref LL_DMA2D_MODE_M2M
572 * @arg @ref LL_DMA2D_MODE_M2M_PFC
573 * @arg @ref LL_DMA2D_MODE_M2M_BLEND
574 * @arg @ref LL_DMA2D_MODE_R2M
575 * @retval None
576 */
LL_DMA2D_SetMode(DMA2D_TypeDef * DMA2Dx,uint32_t Mode)577 __STATIC_INLINE void LL_DMA2D_SetMode(DMA2D_TypeDef *DMA2Dx, uint32_t Mode)
578 {
579 MODIFY_REG(DMA2Dx->CR, DMA2D_CR_MODE, Mode);
580 }
581
582 /**
583 * @brief Return DMA2D mode
584 * @rmtoll CR MODE LL_DMA2D_GetMode
585 * @param DMA2Dx DMA2D Instance
586 * @retval Returned value can be one of the following values:
587 * @arg @ref LL_DMA2D_MODE_M2M
588 * @arg @ref LL_DMA2D_MODE_M2M_PFC
589 * @arg @ref LL_DMA2D_MODE_M2M_BLEND
590 * @arg @ref LL_DMA2D_MODE_R2M
591 */
LL_DMA2D_GetMode(DMA2D_TypeDef * DMA2Dx)592 __STATIC_INLINE uint32_t LL_DMA2D_GetMode(DMA2D_TypeDef *DMA2Dx)
593 {
594 return (uint32_t)(READ_BIT(DMA2Dx->CR, DMA2D_CR_MODE));
595 }
596
597 /**
598 * @brief Set DMA2D output color mode.
599 * @rmtoll OPFCCR CM LL_DMA2D_SetOutputColorMode
600 * @param DMA2Dx DMA2D Instance
601 * @param ColorMode This parameter can be one of the following values:
602 * @arg @ref LL_DMA2D_OUTPUT_MODE_ARGB8888
603 * @arg @ref LL_DMA2D_OUTPUT_MODE_RGB888
604 * @arg @ref LL_DMA2D_OUTPUT_MODE_RGB565
605 * @arg @ref LL_DMA2D_OUTPUT_MODE_ARGB1555
606 * @arg @ref LL_DMA2D_OUTPUT_MODE_ARGB4444
607 * @retval None
608 */
LL_DMA2D_SetOutputColorMode(DMA2D_TypeDef * DMA2Dx,uint32_t ColorMode)609 __STATIC_INLINE void LL_DMA2D_SetOutputColorMode(DMA2D_TypeDef *DMA2Dx, uint32_t ColorMode)
610 {
611 MODIFY_REG(DMA2Dx->OPFCCR, DMA2D_OPFCCR_CM, ColorMode);
612 }
613
614 /**
615 * @brief Return DMA2D output color mode.
616 * @rmtoll OPFCCR CM LL_DMA2D_GetOutputColorMode
617 * @param DMA2Dx DMA2D Instance
618 * @retval Returned value can be one of the following values:
619 * @arg @ref LL_DMA2D_OUTPUT_MODE_ARGB8888
620 * @arg @ref LL_DMA2D_OUTPUT_MODE_RGB888
621 * @arg @ref LL_DMA2D_OUTPUT_MODE_RGB565
622 * @arg @ref LL_DMA2D_OUTPUT_MODE_ARGB1555
623 * @arg @ref LL_DMA2D_OUTPUT_MODE_ARGB4444
624 */
LL_DMA2D_GetOutputColorMode(DMA2D_TypeDef * DMA2Dx)625 __STATIC_INLINE uint32_t LL_DMA2D_GetOutputColorMode(DMA2D_TypeDef *DMA2Dx)
626 {
627 return (uint32_t)(READ_BIT(DMA2Dx->OPFCCR, DMA2D_OPFCCR_CM));
628 }
629
630
631
632
633 /**
634 * @brief Set DMA2D line offset, expressed on 14 bits ([13:0] bits).
635 * @rmtoll OOR LO LL_DMA2D_SetLineOffset
636 * @param DMA2Dx DMA2D Instance
637 * @param LineOffset Value between Min_Data=0 and Max_Data=0x3FFF
638 * @retval None
639 */
LL_DMA2D_SetLineOffset(DMA2D_TypeDef * DMA2Dx,uint32_t LineOffset)640 __STATIC_INLINE void LL_DMA2D_SetLineOffset(DMA2D_TypeDef *DMA2Dx, uint32_t LineOffset)
641 {
642 MODIFY_REG(DMA2Dx->OOR, DMA2D_OOR_LO, LineOffset);
643 }
644
645 /**
646 * @brief Return DMA2D line offset, expressed on 14 bits ([13:0] bits).
647 * @rmtoll OOR LO LL_DMA2D_GetLineOffset
648 * @param DMA2Dx DMA2D Instance
649 * @retval Line offset value between Min_Data=0 and Max_Data=0x3FFF
650 */
LL_DMA2D_GetLineOffset(DMA2D_TypeDef * DMA2Dx)651 __STATIC_INLINE uint32_t LL_DMA2D_GetLineOffset(DMA2D_TypeDef *DMA2Dx)
652 {
653 return (uint32_t)(READ_BIT(DMA2Dx->OOR, DMA2D_OOR_LO));
654 }
655
656 /**
657 * @brief Set DMA2D number of pixels per lines, expressed on 14 bits ([13:0] bits).
658 * @rmtoll NLR PL LL_DMA2D_SetNbrOfPixelsPerLines
659 * @param DMA2Dx DMA2D Instance
660 * @param NbrOfPixelsPerLines Value between Min_Data=0 and Max_Data=0x3FFF
661 * @retval None
662 */
LL_DMA2D_SetNbrOfPixelsPerLines(DMA2D_TypeDef * DMA2Dx,uint32_t NbrOfPixelsPerLines)663 __STATIC_INLINE void LL_DMA2D_SetNbrOfPixelsPerLines(DMA2D_TypeDef *DMA2Dx, uint32_t NbrOfPixelsPerLines)
664 {
665 MODIFY_REG(DMA2Dx->NLR, DMA2D_NLR_PL, (NbrOfPixelsPerLines << DMA2D_NLR_PL_Pos));
666 }
667
668 /**
669 * @brief Return DMA2D number of pixels per lines, expressed on 14 bits ([13:0] bits)
670 * @rmtoll NLR PL LL_DMA2D_GetNbrOfPixelsPerLines
671 * @param DMA2Dx DMA2D Instance
672 * @retval Number of pixels per lines value between Min_Data=0 and Max_Data=0x3FFF
673 */
LL_DMA2D_GetNbrOfPixelsPerLines(DMA2D_TypeDef * DMA2Dx)674 __STATIC_INLINE uint32_t LL_DMA2D_GetNbrOfPixelsPerLines(DMA2D_TypeDef *DMA2Dx)
675 {
676 return (uint32_t)(READ_BIT(DMA2Dx->NLR, DMA2D_NLR_PL) >> DMA2D_NLR_PL_Pos);
677 }
678
679 /**
680 * @brief Set DMA2D number of lines, expressed on 16 bits ([15:0] bits).
681 * @rmtoll NLR NL LL_DMA2D_SetNbrOfLines
682 * @param DMA2Dx DMA2D Instance
683 * @param NbrOfLines Value between Min_Data=0 and Max_Data=0xFFFF
684 * @retval None
685 */
LL_DMA2D_SetNbrOfLines(DMA2D_TypeDef * DMA2Dx,uint32_t NbrOfLines)686 __STATIC_INLINE void LL_DMA2D_SetNbrOfLines(DMA2D_TypeDef *DMA2Dx, uint32_t NbrOfLines)
687 {
688 MODIFY_REG(DMA2Dx->NLR, DMA2D_NLR_NL, NbrOfLines);
689 }
690
691 /**
692 * @brief Return DMA2D number of lines, expressed on 16 bits ([15:0] bits).
693 * @rmtoll NLR NL LL_DMA2D_GetNbrOfLines
694 * @param DMA2Dx DMA2D Instance
695 * @retval Number of lines value between Min_Data=0 and Max_Data=0xFFFF
696 */
LL_DMA2D_GetNbrOfLines(DMA2D_TypeDef * DMA2Dx)697 __STATIC_INLINE uint32_t LL_DMA2D_GetNbrOfLines(DMA2D_TypeDef *DMA2Dx)
698 {
699 return (uint32_t)(READ_BIT(DMA2Dx->NLR, DMA2D_NLR_NL));
700 }
701
702 /**
703 * @brief Set DMA2D output memory address, expressed on 32 bits ([31:0] bits).
704 * @rmtoll OMAR MA LL_DMA2D_SetOutputMemAddr
705 * @param DMA2Dx DMA2D Instance
706 * @param OutputMemoryAddress Value between Min_Data=0 and Max_Data=0xFFFFFFFF
707 * @retval None
708 */
LL_DMA2D_SetOutputMemAddr(DMA2D_TypeDef * DMA2Dx,uint32_t OutputMemoryAddress)709 __STATIC_INLINE void LL_DMA2D_SetOutputMemAddr(DMA2D_TypeDef *DMA2Dx, uint32_t OutputMemoryAddress)
710 {
711 LL_DMA2D_WriteReg(DMA2Dx, OMAR, OutputMemoryAddress);
712 }
713
714 /**
715 * @brief Get DMA2D output memory address, expressed on 32 bits ([31:0] bits).
716 * @rmtoll OMAR MA LL_DMA2D_GetOutputMemAddr
717 * @param DMA2Dx DMA2D Instance
718 * @retval Output memory address value between Min_Data=0 and Max_Data=0xFFFFFFFF
719 */
LL_DMA2D_GetOutputMemAddr(DMA2D_TypeDef * DMA2Dx)720 __STATIC_INLINE uint32_t LL_DMA2D_GetOutputMemAddr(DMA2D_TypeDef *DMA2Dx)
721 {
722 return (uint32_t)(LL_DMA2D_ReadReg(DMA2Dx, OMAR));
723 }
724
725 /**
726 * @brief Set DMA2D output color, expressed on 32 bits ([31:0] bits).
727 * @note Output color format depends on output color mode, ARGB8888, RGB888,
728 * RGB565, ARGB1555 or ARGB4444.
729 * @note LL_DMA2D_ConfigOutputColor() API may be used instead if colors values formatting
730 * with respect to color mode is not done by the user code.
731 * @rmtoll OCOLR BLUE LL_DMA2D_SetOutputColor\n
732 * OCOLR GREEN LL_DMA2D_SetOutputColor\n
733 * OCOLR RED LL_DMA2D_SetOutputColor\n
734 * OCOLR ALPHA LL_DMA2D_SetOutputColor
735 * @param DMA2Dx DMA2D Instance
736 * @param OutputColor Value between Min_Data=0 and Max_Data=0xFFFFFFFF
737 * @retval None
738 */
LL_DMA2D_SetOutputColor(DMA2D_TypeDef * DMA2Dx,uint32_t OutputColor)739 __STATIC_INLINE void LL_DMA2D_SetOutputColor(DMA2D_TypeDef *DMA2Dx, uint32_t OutputColor)
740 {
741 MODIFY_REG(DMA2Dx->OCOLR, (DMA2D_OCOLR_BLUE_1 | DMA2D_OCOLR_GREEN_1 | DMA2D_OCOLR_RED_1 | DMA2D_OCOLR_ALPHA_1), \
742 OutputColor);
743 }
744
745 /**
746 * @brief Get DMA2D output color, expressed on 32 bits ([31:0] bits).
747 * @note Alpha channel and red, green, blue color values must be retrieved from the returned
748 * value based on the output color mode (ARGB8888, RGB888, RGB565, ARGB1555 or ARGB4444)
749 * as set by @ref LL_DMA2D_SetOutputColorMode.
750 * @rmtoll OCOLR BLUE LL_DMA2D_GetOutputColor\n
751 * OCOLR GREEN LL_DMA2D_GetOutputColor\n
752 * OCOLR RED LL_DMA2D_GetOutputColor\n
753 * OCOLR ALPHA LL_DMA2D_GetOutputColor
754 * @param DMA2Dx DMA2D Instance
755 * @retval Output color value between Min_Data=0 and Max_Data=0xFFFFFFFF
756 */
LL_DMA2D_GetOutputColor(DMA2D_TypeDef * DMA2Dx)757 __STATIC_INLINE uint32_t LL_DMA2D_GetOutputColor(DMA2D_TypeDef *DMA2Dx)
758 {
759 return (uint32_t)(READ_BIT(DMA2Dx->OCOLR, \
760 (DMA2D_OCOLR_BLUE_1 | DMA2D_OCOLR_GREEN_1 | DMA2D_OCOLR_RED_1 | DMA2D_OCOLR_ALPHA_1)));
761 }
762
763 /**
764 * @brief Set DMA2D line watermark, expressed on 16 bits ([15:0] bits).
765 * @rmtoll LWR LW LL_DMA2D_SetLineWatermark
766 * @param DMA2Dx DMA2D Instance
767 * @param LineWatermark Value between Min_Data=0 and Max_Data=0xFFFF
768 * @retval None
769 */
LL_DMA2D_SetLineWatermark(DMA2D_TypeDef * DMA2Dx,uint32_t LineWatermark)770 __STATIC_INLINE void LL_DMA2D_SetLineWatermark(DMA2D_TypeDef *DMA2Dx, uint32_t LineWatermark)
771 {
772 MODIFY_REG(DMA2Dx->LWR, DMA2D_LWR_LW, LineWatermark);
773 }
774
775 /**
776 * @brief Return DMA2D line watermark, expressed on 16 bits ([15:0] bits).
777 * @rmtoll LWR LW LL_DMA2D_GetLineWatermark
778 * @param DMA2Dx DMA2D Instance
779 * @retval Line watermark value between Min_Data=0 and Max_Data=0xFFFF
780 */
LL_DMA2D_GetLineWatermark(DMA2D_TypeDef * DMA2Dx)781 __STATIC_INLINE uint32_t LL_DMA2D_GetLineWatermark(DMA2D_TypeDef *DMA2Dx)
782 {
783 return (uint32_t)(READ_BIT(DMA2Dx->LWR, DMA2D_LWR_LW));
784 }
785
786 /**
787 * @brief Set DMA2D dead time, expressed on 8 bits ([7:0] bits).
788 * @rmtoll AMTCR DT LL_DMA2D_SetDeadTime
789 * @param DMA2Dx DMA2D Instance
790 * @param DeadTime Value between Min_Data=0 and Max_Data=0xFF
791 * @retval None
792 */
LL_DMA2D_SetDeadTime(DMA2D_TypeDef * DMA2Dx,uint32_t DeadTime)793 __STATIC_INLINE void LL_DMA2D_SetDeadTime(DMA2D_TypeDef *DMA2Dx, uint32_t DeadTime)
794 {
795 MODIFY_REG(DMA2Dx->AMTCR, DMA2D_AMTCR_DT, (DeadTime << DMA2D_AMTCR_DT_Pos));
796 }
797
798 /**
799 * @brief Return DMA2D dead time, expressed on 8 bits ([7:0] bits).
800 * @rmtoll AMTCR DT LL_DMA2D_GetDeadTime
801 * @param DMA2Dx DMA2D Instance
802 * @retval Dead time value between Min_Data=0 and Max_Data=0xFF
803 */
LL_DMA2D_GetDeadTime(DMA2D_TypeDef * DMA2Dx)804 __STATIC_INLINE uint32_t LL_DMA2D_GetDeadTime(DMA2D_TypeDef *DMA2Dx)
805 {
806 return (uint32_t)(READ_BIT(DMA2Dx->AMTCR, DMA2D_AMTCR_DT) >> DMA2D_AMTCR_DT_Pos);
807 }
808
809 /**
810 * @brief Enable DMA2D dead time functionality.
811 * @rmtoll AMTCR EN LL_DMA2D_EnableDeadTime
812 * @param DMA2Dx DMA2D Instance
813 * @retval None
814 */
LL_DMA2D_EnableDeadTime(DMA2D_TypeDef * DMA2Dx)815 __STATIC_INLINE void LL_DMA2D_EnableDeadTime(DMA2D_TypeDef *DMA2Dx)
816 {
817 SET_BIT(DMA2Dx->AMTCR, DMA2D_AMTCR_EN);
818 }
819
820 /**
821 * @brief Disable DMA2D dead time functionality.
822 * @rmtoll AMTCR EN LL_DMA2D_DisableDeadTime
823 * @param DMA2Dx DMA2D Instance
824 * @retval None
825 */
LL_DMA2D_DisableDeadTime(DMA2D_TypeDef * DMA2Dx)826 __STATIC_INLINE void LL_DMA2D_DisableDeadTime(DMA2D_TypeDef *DMA2Dx)
827 {
828 CLEAR_BIT(DMA2Dx->AMTCR, DMA2D_AMTCR_EN);
829 }
830
831 /**
832 * @brief Indicate if DMA2D dead time functionality is enabled.
833 * @rmtoll AMTCR EN LL_DMA2D_IsEnabledDeadTime
834 * @param DMA2Dx DMA2D Instance
835 * @retval State of bit (1 or 0).
836 */
LL_DMA2D_IsEnabledDeadTime(DMA2D_TypeDef * DMA2Dx)837 __STATIC_INLINE uint32_t LL_DMA2D_IsEnabledDeadTime(DMA2D_TypeDef *DMA2Dx)
838 {
839 return ((READ_BIT(DMA2Dx->AMTCR, DMA2D_AMTCR_EN) == (DMA2D_AMTCR_EN)) ? 1UL : 0UL);
840 }
841
842 /** @defgroup DMA2D_LL_EF_FGND_Configuration Foreground Configuration Functions
843 * @{
844 */
845
846 /**
847 * @brief Set DMA2D foreground memory address, expressed on 32 bits ([31:0] bits).
848 * @rmtoll FGMAR MA LL_DMA2D_FGND_SetMemAddr
849 * @param DMA2Dx DMA2D Instance
850 * @param MemoryAddress Value between Min_Data=0 and Max_Data=0xFFFFFFFF
851 * @retval None
852 */
LL_DMA2D_FGND_SetMemAddr(DMA2D_TypeDef * DMA2Dx,uint32_t MemoryAddress)853 __STATIC_INLINE void LL_DMA2D_FGND_SetMemAddr(DMA2D_TypeDef *DMA2Dx, uint32_t MemoryAddress)
854 {
855 LL_DMA2D_WriteReg(DMA2Dx, FGMAR, MemoryAddress);
856 }
857
858 /**
859 * @brief Get DMA2D foreground memory address, expressed on 32 bits ([31:0] bits).
860 * @rmtoll FGMAR MA LL_DMA2D_FGND_GetMemAddr
861 * @param DMA2Dx DMA2D Instance
862 * @retval Foreground memory address value between Min_Data=0 and Max_Data=0xFFFFFFFF
863 */
LL_DMA2D_FGND_GetMemAddr(DMA2D_TypeDef * DMA2Dx)864 __STATIC_INLINE uint32_t LL_DMA2D_FGND_GetMemAddr(DMA2D_TypeDef *DMA2Dx)
865 {
866 return (uint32_t)(LL_DMA2D_ReadReg(DMA2Dx, FGMAR));
867 }
868
869 /**
870 * @brief Enable DMA2D foreground CLUT loading.
871 * @rmtoll FGPFCCR START LL_DMA2D_FGND_EnableCLUTLoad
872 * @param DMA2Dx DMA2D Instance
873 * @retval None
874 */
LL_DMA2D_FGND_EnableCLUTLoad(DMA2D_TypeDef * DMA2Dx)875 __STATIC_INLINE void LL_DMA2D_FGND_EnableCLUTLoad(DMA2D_TypeDef *DMA2Dx)
876 {
877 SET_BIT(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_START);
878 }
879
880 /**
881 * @brief Indicate if DMA2D foreground CLUT loading is enabled.
882 * @rmtoll FGPFCCR START LL_DMA2D_FGND_IsEnabledCLUTLoad
883 * @param DMA2Dx DMA2D Instance
884 * @retval State of bit (1 or 0).
885 */
LL_DMA2D_FGND_IsEnabledCLUTLoad(DMA2D_TypeDef * DMA2Dx)886 __STATIC_INLINE uint32_t LL_DMA2D_FGND_IsEnabledCLUTLoad(DMA2D_TypeDef *DMA2Dx)
887 {
888 return ((READ_BIT(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_START) == (DMA2D_FGPFCCR_START)) ? 1UL : 0UL);
889 }
890
891 /**
892 * @brief Set DMA2D foreground color mode.
893 * @rmtoll FGPFCCR CM LL_DMA2D_FGND_SetColorMode
894 * @param DMA2Dx DMA2D Instance
895 * @param ColorMode This parameter can be one of the following values:
896 * @arg @ref LL_DMA2D_INPUT_MODE_ARGB8888
897 * @arg @ref LL_DMA2D_INPUT_MODE_RGB888
898 * @arg @ref LL_DMA2D_INPUT_MODE_RGB565
899 * @arg @ref LL_DMA2D_INPUT_MODE_ARGB1555
900 * @arg @ref LL_DMA2D_INPUT_MODE_ARGB4444
901 * @arg @ref LL_DMA2D_INPUT_MODE_L8
902 * @arg @ref LL_DMA2D_INPUT_MODE_AL44
903 * @arg @ref LL_DMA2D_INPUT_MODE_AL88
904 * @arg @ref LL_DMA2D_INPUT_MODE_L4
905 * @arg @ref LL_DMA2D_INPUT_MODE_A8
906 * @arg @ref LL_DMA2D_INPUT_MODE_A4
907 * @retval None
908 */
LL_DMA2D_FGND_SetColorMode(DMA2D_TypeDef * DMA2Dx,uint32_t ColorMode)909 __STATIC_INLINE void LL_DMA2D_FGND_SetColorMode(DMA2D_TypeDef *DMA2Dx, uint32_t ColorMode)
910 {
911 MODIFY_REG(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_CM, ColorMode);
912 }
913
914 /**
915 * @brief Return DMA2D foreground color mode.
916 * @rmtoll FGPFCCR CM LL_DMA2D_FGND_GetColorMode
917 * @param DMA2Dx DMA2D Instance
918 * @retval Returned value can be one of the following values:
919 * @arg @ref LL_DMA2D_INPUT_MODE_ARGB8888
920 * @arg @ref LL_DMA2D_INPUT_MODE_RGB888
921 * @arg @ref LL_DMA2D_INPUT_MODE_RGB565
922 * @arg @ref LL_DMA2D_INPUT_MODE_ARGB1555
923 * @arg @ref LL_DMA2D_INPUT_MODE_ARGB4444
924 * @arg @ref LL_DMA2D_INPUT_MODE_L8
925 * @arg @ref LL_DMA2D_INPUT_MODE_AL44
926 * @arg @ref LL_DMA2D_INPUT_MODE_AL88
927 * @arg @ref LL_DMA2D_INPUT_MODE_L4
928 * @arg @ref LL_DMA2D_INPUT_MODE_A8
929 * @arg @ref LL_DMA2D_INPUT_MODE_A4
930 */
LL_DMA2D_FGND_GetColorMode(DMA2D_TypeDef * DMA2Dx)931 __STATIC_INLINE uint32_t LL_DMA2D_FGND_GetColorMode(DMA2D_TypeDef *DMA2Dx)
932 {
933 return (uint32_t)(READ_BIT(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_CM));
934 }
935
936 /**
937 * @brief Set DMA2D foreground alpha mode.
938 * @rmtoll FGPFCCR AM LL_DMA2D_FGND_SetAlphaMode
939 * @param DMA2Dx DMA2D Instance
940 * @param AphaMode This parameter can be one of the following values:
941 * @arg @ref LL_DMA2D_ALPHA_MODE_NO_MODIF
942 * @arg @ref LL_DMA2D_ALPHA_MODE_REPLACE
943 * @arg @ref LL_DMA2D_ALPHA_MODE_COMBINE
944 * @retval None
945 */
LL_DMA2D_FGND_SetAlphaMode(DMA2D_TypeDef * DMA2Dx,uint32_t AphaMode)946 __STATIC_INLINE void LL_DMA2D_FGND_SetAlphaMode(DMA2D_TypeDef *DMA2Dx, uint32_t AphaMode)
947 {
948 MODIFY_REG(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_AM, AphaMode);
949 }
950
951 /**
952 * @brief Return DMA2D foreground alpha mode.
953 * @rmtoll FGPFCCR AM LL_DMA2D_FGND_GetAlphaMode
954 * @param DMA2Dx DMA2D Instance
955 * @retval Returned value can be one of the following values:
956 * @arg @ref LL_DMA2D_ALPHA_MODE_NO_MODIF
957 * @arg @ref LL_DMA2D_ALPHA_MODE_REPLACE
958 * @arg @ref LL_DMA2D_ALPHA_MODE_COMBINE
959 */
LL_DMA2D_FGND_GetAlphaMode(DMA2D_TypeDef * DMA2Dx)960 __STATIC_INLINE uint32_t LL_DMA2D_FGND_GetAlphaMode(DMA2D_TypeDef *DMA2Dx)
961 {
962 return (uint32_t)(READ_BIT(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_AM));
963 }
964
965 /**
966 * @brief Set DMA2D foreground alpha value, expressed on 8 bits ([7:0] bits).
967 * @rmtoll FGPFCCR ALPHA LL_DMA2D_FGND_SetAlpha
968 * @param DMA2Dx DMA2D Instance
969 * @param Alpha Value between Min_Data=0 and Max_Data=0xFF
970 * @retval None
971 */
LL_DMA2D_FGND_SetAlpha(DMA2D_TypeDef * DMA2Dx,uint32_t Alpha)972 __STATIC_INLINE void LL_DMA2D_FGND_SetAlpha(DMA2D_TypeDef *DMA2Dx, uint32_t Alpha)
973 {
974 MODIFY_REG(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_ALPHA, (Alpha << DMA2D_FGPFCCR_ALPHA_Pos));
975 }
976
977 /**
978 * @brief Return DMA2D foreground alpha value, expressed on 8 bits ([7:0] bits).
979 * @rmtoll FGPFCCR ALPHA LL_DMA2D_FGND_GetAlpha
980 * @param DMA2Dx DMA2D Instance
981 * @retval Alpha value between Min_Data=0 and Max_Data=0xFF
982 */
LL_DMA2D_FGND_GetAlpha(DMA2D_TypeDef * DMA2Dx)983 __STATIC_INLINE uint32_t LL_DMA2D_FGND_GetAlpha(DMA2D_TypeDef *DMA2Dx)
984 {
985 return (uint32_t)(READ_BIT(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_ALPHA) >> DMA2D_FGPFCCR_ALPHA_Pos);
986 }
987
988
989 /**
990 * @brief Set DMA2D foreground line offset, expressed on 14 bits ([13:0] bits).
991 * @rmtoll FGOR LO LL_DMA2D_FGND_SetLineOffset
992 * @param DMA2Dx DMA2D Instance
993 * @param LineOffset Value between Min_Data=0 and Max_Data=0x3FF
994 * @retval None
995 */
LL_DMA2D_FGND_SetLineOffset(DMA2D_TypeDef * DMA2Dx,uint32_t LineOffset)996 __STATIC_INLINE void LL_DMA2D_FGND_SetLineOffset(DMA2D_TypeDef *DMA2Dx, uint32_t LineOffset)
997 {
998 MODIFY_REG(DMA2Dx->FGOR, DMA2D_FGOR_LO, LineOffset);
999 }
1000
1001 /**
1002 * @brief Return DMA2D foreground line offset, expressed on 14 bits ([13:0] bits).
1003 * @rmtoll FGOR LO LL_DMA2D_FGND_GetLineOffset
1004 * @param DMA2Dx DMA2D Instance
1005 * @retval Foreground line offset value between Min_Data=0 and Max_Data=0x3FF
1006 */
LL_DMA2D_FGND_GetLineOffset(DMA2D_TypeDef * DMA2Dx)1007 __STATIC_INLINE uint32_t LL_DMA2D_FGND_GetLineOffset(DMA2D_TypeDef *DMA2Dx)
1008 {
1009 return (uint32_t)(READ_BIT(DMA2Dx->FGOR, DMA2D_FGOR_LO));
1010 }
1011
1012 /**
1013 * @brief Set DMA2D foreground color values, expressed on 24 bits ([23:0] bits).
1014 * @rmtoll FGCOLR RED LL_DMA2D_FGND_SetColor
1015 * @rmtoll FGCOLR GREEN LL_DMA2D_FGND_SetColor
1016 * @rmtoll FGCOLR BLUE LL_DMA2D_FGND_SetColor
1017 * @param DMA2Dx DMA2D Instance
1018 * @param Red Value between Min_Data=0 and Max_Data=0xFF
1019 * @param Green Value between Min_Data=0 and Max_Data=0xFF
1020 * @param Blue Value between Min_Data=0 and Max_Data=0xFF
1021 * @retval None
1022 */
LL_DMA2D_FGND_SetColor(DMA2D_TypeDef * DMA2Dx,uint32_t Red,uint32_t Green,uint32_t Blue)1023 __STATIC_INLINE void LL_DMA2D_FGND_SetColor(DMA2D_TypeDef *DMA2Dx, uint32_t Red, uint32_t Green, uint32_t Blue)
1024 {
1025 MODIFY_REG(DMA2Dx->FGCOLR, (DMA2D_FGCOLR_RED | DMA2D_FGCOLR_GREEN | DMA2D_FGCOLR_BLUE), \
1026 ((Red << DMA2D_FGCOLR_RED_Pos) | (Green << DMA2D_FGCOLR_GREEN_Pos) | Blue));
1027 }
1028
1029 /**
1030 * @brief Set DMA2D foreground red color value, expressed on 8 bits ([7:0] bits).
1031 * @rmtoll FGCOLR RED LL_DMA2D_FGND_SetRedColor
1032 * @param DMA2Dx DMA2D Instance
1033 * @param Red Value between Min_Data=0 and Max_Data=0xFF
1034 * @retval None
1035 */
LL_DMA2D_FGND_SetRedColor(DMA2D_TypeDef * DMA2Dx,uint32_t Red)1036 __STATIC_INLINE void LL_DMA2D_FGND_SetRedColor(DMA2D_TypeDef *DMA2Dx, uint32_t Red)
1037 {
1038 MODIFY_REG(DMA2Dx->FGCOLR, DMA2D_FGCOLR_RED, (Red << DMA2D_FGCOLR_RED_Pos));
1039 }
1040
1041 /**
1042 * @brief Return DMA2D foreground red color value, expressed on 8 bits ([7:0] bits).
1043 * @rmtoll FGCOLR RED LL_DMA2D_FGND_GetRedColor
1044 * @param DMA2Dx DMA2D Instance
1045 * @retval Red color value between Min_Data=0 and Max_Data=0xFF
1046 */
LL_DMA2D_FGND_GetRedColor(DMA2D_TypeDef * DMA2Dx)1047 __STATIC_INLINE uint32_t LL_DMA2D_FGND_GetRedColor(DMA2D_TypeDef *DMA2Dx)
1048 {
1049 return (uint32_t)(READ_BIT(DMA2Dx->FGCOLR, DMA2D_FGCOLR_RED) >> DMA2D_FGCOLR_RED_Pos);
1050 }
1051
1052 /**
1053 * @brief Set DMA2D foreground green color value, expressed on 8 bits ([7:0] bits).
1054 * @rmtoll FGCOLR GREEN LL_DMA2D_FGND_SetGreenColor
1055 * @param DMA2Dx DMA2D Instance
1056 * @param Green Value between Min_Data=0 and Max_Data=0xFF
1057 * @retval None
1058 */
LL_DMA2D_FGND_SetGreenColor(DMA2D_TypeDef * DMA2Dx,uint32_t Green)1059 __STATIC_INLINE void LL_DMA2D_FGND_SetGreenColor(DMA2D_TypeDef *DMA2Dx, uint32_t Green)
1060 {
1061 MODIFY_REG(DMA2Dx->FGCOLR, DMA2D_FGCOLR_GREEN, (Green << DMA2D_FGCOLR_GREEN_Pos));
1062 }
1063
1064 /**
1065 * @brief Return DMA2D foreground green color value, expressed on 8 bits ([7:0] bits).
1066 * @rmtoll FGCOLR GREEN LL_DMA2D_FGND_GetGreenColor
1067 * @param DMA2Dx DMA2D Instance
1068 * @retval Green color value between Min_Data=0 and Max_Data=0xFF
1069 */
LL_DMA2D_FGND_GetGreenColor(DMA2D_TypeDef * DMA2Dx)1070 __STATIC_INLINE uint32_t LL_DMA2D_FGND_GetGreenColor(DMA2D_TypeDef *DMA2Dx)
1071 {
1072 return (uint32_t)(READ_BIT(DMA2Dx->FGCOLR, DMA2D_FGCOLR_GREEN) >> DMA2D_FGCOLR_GREEN_Pos);
1073 }
1074
1075 /**
1076 * @brief Set DMA2D foreground blue color value, expressed on 8 bits ([7:0] bits).
1077 * @rmtoll FGCOLR BLUE LL_DMA2D_FGND_SetBlueColor
1078 * @param DMA2Dx DMA2D Instance
1079 * @param Blue Value between Min_Data=0 and Max_Data=0xFF
1080 * @retval None
1081 */
LL_DMA2D_FGND_SetBlueColor(DMA2D_TypeDef * DMA2Dx,uint32_t Blue)1082 __STATIC_INLINE void LL_DMA2D_FGND_SetBlueColor(DMA2D_TypeDef *DMA2Dx, uint32_t Blue)
1083 {
1084 MODIFY_REG(DMA2Dx->FGCOLR, DMA2D_FGCOLR_BLUE, Blue);
1085 }
1086
1087 /**
1088 * @brief Return DMA2D foreground blue color value, expressed on 8 bits ([7:0] bits).
1089 * @rmtoll FGCOLR BLUE LL_DMA2D_FGND_GetBlueColor
1090 * @param DMA2Dx DMA2D Instance
1091 * @retval Blue color value between Min_Data=0 and Max_Data=0xFF
1092 */
LL_DMA2D_FGND_GetBlueColor(DMA2D_TypeDef * DMA2Dx)1093 __STATIC_INLINE uint32_t LL_DMA2D_FGND_GetBlueColor(DMA2D_TypeDef *DMA2Dx)
1094 {
1095 return (uint32_t)(READ_BIT(DMA2Dx->FGCOLR, DMA2D_FGCOLR_BLUE));
1096 }
1097
1098 /**
1099 * @brief Set DMA2D foreground CLUT memory address, expressed on 32 bits ([31:0] bits).
1100 * @rmtoll FGCMAR MA LL_DMA2D_FGND_SetCLUTMemAddr
1101 * @param DMA2Dx DMA2D Instance
1102 * @param CLUTMemoryAddress Value between Min_Data=0 and Max_Data=0xFFFFFFFF
1103 * @retval None
1104 */
LL_DMA2D_FGND_SetCLUTMemAddr(DMA2D_TypeDef * DMA2Dx,uint32_t CLUTMemoryAddress)1105 __STATIC_INLINE void LL_DMA2D_FGND_SetCLUTMemAddr(DMA2D_TypeDef *DMA2Dx, uint32_t CLUTMemoryAddress)
1106 {
1107 LL_DMA2D_WriteReg(DMA2Dx, FGCMAR, CLUTMemoryAddress);
1108 }
1109
1110 /**
1111 * @brief Get DMA2D foreground CLUT memory address, expressed on 32 bits ([31:0] bits).
1112 * @rmtoll FGCMAR MA LL_DMA2D_FGND_GetCLUTMemAddr
1113 * @param DMA2Dx DMA2D Instance
1114 * @retval Foreground CLUT memory address value between Min_Data=0 and Max_Data=0xFFFFFFFF
1115 */
LL_DMA2D_FGND_GetCLUTMemAddr(DMA2D_TypeDef * DMA2Dx)1116 __STATIC_INLINE uint32_t LL_DMA2D_FGND_GetCLUTMemAddr(DMA2D_TypeDef *DMA2Dx)
1117 {
1118 return (uint32_t)(LL_DMA2D_ReadReg(DMA2Dx, FGCMAR));
1119 }
1120
1121 /**
1122 * @brief Set DMA2D foreground CLUT size, expressed on 8 bits ([7:0] bits).
1123 * @rmtoll FGPFCCR CS LL_DMA2D_FGND_SetCLUTSize
1124 * @param DMA2Dx DMA2D Instance
1125 * @param CLUTSize Value between Min_Data=0 and Max_Data=0xFF
1126 * @retval None
1127 */
LL_DMA2D_FGND_SetCLUTSize(DMA2D_TypeDef * DMA2Dx,uint32_t CLUTSize)1128 __STATIC_INLINE void LL_DMA2D_FGND_SetCLUTSize(DMA2D_TypeDef *DMA2Dx, uint32_t CLUTSize)
1129 {
1130 MODIFY_REG(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_CS, (CLUTSize << DMA2D_FGPFCCR_CS_Pos));
1131 }
1132
1133 /**
1134 * @brief Get DMA2D foreground CLUT size, expressed on 8 bits ([7:0] bits).
1135 * @rmtoll FGPFCCR CS LL_DMA2D_FGND_GetCLUTSize
1136 * @param DMA2Dx DMA2D Instance
1137 * @retval Foreground CLUT size value between Min_Data=0 and Max_Data=0xFF
1138 */
LL_DMA2D_FGND_GetCLUTSize(DMA2D_TypeDef * DMA2Dx)1139 __STATIC_INLINE uint32_t LL_DMA2D_FGND_GetCLUTSize(DMA2D_TypeDef *DMA2Dx)
1140 {
1141 return (uint32_t)(READ_BIT(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_CS) >> DMA2D_FGPFCCR_CS_Pos);
1142 }
1143
1144 /**
1145 * @brief Set DMA2D foreground CLUT color mode.
1146 * @rmtoll FGPFCCR CCM LL_DMA2D_FGND_SetCLUTColorMode
1147 * @param DMA2Dx DMA2D Instance
1148 * @param CLUTColorMode This parameter can be one of the following values:
1149 * @arg @ref LL_DMA2D_CLUT_COLOR_MODE_ARGB8888
1150 * @arg @ref LL_DMA2D_CLUT_COLOR_MODE_RGB888
1151 * @retval None
1152 */
LL_DMA2D_FGND_SetCLUTColorMode(DMA2D_TypeDef * DMA2Dx,uint32_t CLUTColorMode)1153 __STATIC_INLINE void LL_DMA2D_FGND_SetCLUTColorMode(DMA2D_TypeDef *DMA2Dx, uint32_t CLUTColorMode)
1154 {
1155 MODIFY_REG(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_CCM, CLUTColorMode);
1156 }
1157
1158 /**
1159 * @brief Return DMA2D foreground CLUT color mode.
1160 * @rmtoll FGPFCCR CCM LL_DMA2D_FGND_GetCLUTColorMode
1161 * @param DMA2Dx DMA2D Instance
1162 * @retval Returned value can be one of the following values:
1163 * @arg @ref LL_DMA2D_CLUT_COLOR_MODE_ARGB8888
1164 * @arg @ref LL_DMA2D_CLUT_COLOR_MODE_RGB888
1165 */
LL_DMA2D_FGND_GetCLUTColorMode(DMA2D_TypeDef * DMA2Dx)1166 __STATIC_INLINE uint32_t LL_DMA2D_FGND_GetCLUTColorMode(DMA2D_TypeDef *DMA2Dx)
1167 {
1168 return (uint32_t)(READ_BIT(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_CCM));
1169 }
1170
1171 /**
1172 * @}
1173 */
1174
1175 /** @defgroup DMA2D_LL_EF_BGND_Configuration Background Configuration Functions
1176 * @{
1177 */
1178
1179 /**
1180 * @brief Set DMA2D background memory address, expressed on 32 bits ([31:0] bits).
1181 * @rmtoll BGMAR MA LL_DMA2D_BGND_SetMemAddr
1182 * @param DMA2Dx DMA2D Instance
1183 * @param MemoryAddress Value between Min_Data=0 and Max_Data=0xFFFFFFFF
1184 * @retval None
1185 */
LL_DMA2D_BGND_SetMemAddr(DMA2D_TypeDef * DMA2Dx,uint32_t MemoryAddress)1186 __STATIC_INLINE void LL_DMA2D_BGND_SetMemAddr(DMA2D_TypeDef *DMA2Dx, uint32_t MemoryAddress)
1187 {
1188 LL_DMA2D_WriteReg(DMA2Dx, BGMAR, MemoryAddress);
1189 }
1190
1191 /**
1192 * @brief Get DMA2D background memory address, expressed on 32 bits ([31:0] bits).
1193 * @rmtoll BGMAR MA LL_DMA2D_BGND_GetMemAddr
1194 * @param DMA2Dx DMA2D Instance
1195 * @retval Background memory address value between Min_Data=0 and Max_Data=0xFFFFFFFF
1196 */
LL_DMA2D_BGND_GetMemAddr(DMA2D_TypeDef * DMA2Dx)1197 __STATIC_INLINE uint32_t LL_DMA2D_BGND_GetMemAddr(DMA2D_TypeDef *DMA2Dx)
1198 {
1199 return (uint32_t)(LL_DMA2D_ReadReg(DMA2Dx, BGMAR));
1200 }
1201
1202 /**
1203 * @brief Enable DMA2D background CLUT loading.
1204 * @rmtoll BGPFCCR START LL_DMA2D_BGND_EnableCLUTLoad
1205 * @param DMA2Dx DMA2D Instance
1206 * @retval None
1207 */
LL_DMA2D_BGND_EnableCLUTLoad(DMA2D_TypeDef * DMA2Dx)1208 __STATIC_INLINE void LL_DMA2D_BGND_EnableCLUTLoad(DMA2D_TypeDef *DMA2Dx)
1209 {
1210 SET_BIT(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_START);
1211 }
1212
1213 /**
1214 * @brief Indicate if DMA2D background CLUT loading is enabled.
1215 * @rmtoll BGPFCCR START LL_DMA2D_BGND_IsEnabledCLUTLoad
1216 * @param DMA2Dx DMA2D Instance
1217 * @retval State of bit (1 or 0).
1218 */
LL_DMA2D_BGND_IsEnabledCLUTLoad(DMA2D_TypeDef * DMA2Dx)1219 __STATIC_INLINE uint32_t LL_DMA2D_BGND_IsEnabledCLUTLoad(DMA2D_TypeDef *DMA2Dx)
1220 {
1221 return ((READ_BIT(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_START) == (DMA2D_BGPFCCR_START)) ? 1UL : 0UL);
1222 }
1223
1224 /**
1225 * @brief Set DMA2D background color mode.
1226 * @rmtoll BGPFCCR CM LL_DMA2D_BGND_SetColorMode
1227 * @param DMA2Dx DMA2D Instance
1228 * @param ColorMode This parameter can be one of the following values:
1229 * @arg @ref LL_DMA2D_INPUT_MODE_ARGB8888
1230 * @arg @ref LL_DMA2D_INPUT_MODE_RGB888
1231 * @arg @ref LL_DMA2D_INPUT_MODE_RGB565
1232 * @arg @ref LL_DMA2D_INPUT_MODE_ARGB1555
1233 * @arg @ref LL_DMA2D_INPUT_MODE_ARGB4444
1234 * @arg @ref LL_DMA2D_INPUT_MODE_L8
1235 * @arg @ref LL_DMA2D_INPUT_MODE_AL44
1236 * @arg @ref LL_DMA2D_INPUT_MODE_AL88
1237 * @arg @ref LL_DMA2D_INPUT_MODE_L4
1238 * @arg @ref LL_DMA2D_INPUT_MODE_A8
1239 * @arg @ref LL_DMA2D_INPUT_MODE_A4
1240 * @retval None
1241 */
LL_DMA2D_BGND_SetColorMode(DMA2D_TypeDef * DMA2Dx,uint32_t ColorMode)1242 __STATIC_INLINE void LL_DMA2D_BGND_SetColorMode(DMA2D_TypeDef *DMA2Dx, uint32_t ColorMode)
1243 {
1244 MODIFY_REG(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_CM, ColorMode);
1245 }
1246
1247 /**
1248 * @brief Return DMA2D background color mode.
1249 * @rmtoll BGPFCCR CM LL_DMA2D_BGND_GetColorMode
1250 * @param DMA2Dx DMA2D Instance
1251 * @retval Returned value can be one of the following values:
1252 * @arg @ref LL_DMA2D_INPUT_MODE_ARGB8888
1253 * @arg @ref LL_DMA2D_INPUT_MODE_RGB888
1254 * @arg @ref LL_DMA2D_INPUT_MODE_RGB565
1255 * @arg @ref LL_DMA2D_INPUT_MODE_ARGB1555
1256 * @arg @ref LL_DMA2D_INPUT_MODE_ARGB4444
1257 * @arg @ref LL_DMA2D_INPUT_MODE_L8
1258 * @arg @ref LL_DMA2D_INPUT_MODE_AL44
1259 * @arg @ref LL_DMA2D_INPUT_MODE_AL88
1260 * @arg @ref LL_DMA2D_INPUT_MODE_L4
1261 * @arg @ref LL_DMA2D_INPUT_MODE_A8
1262 * @arg @ref LL_DMA2D_INPUT_MODE_A4
1263 */
LL_DMA2D_BGND_GetColorMode(DMA2D_TypeDef * DMA2Dx)1264 __STATIC_INLINE uint32_t LL_DMA2D_BGND_GetColorMode(DMA2D_TypeDef *DMA2Dx)
1265 {
1266 return (uint32_t)(READ_BIT(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_CM));
1267 }
1268
1269 /**
1270 * @brief Set DMA2D background alpha mode.
1271 * @rmtoll BGPFCCR AM LL_DMA2D_BGND_SetAlphaMode
1272 * @param DMA2Dx DMA2D Instance
1273 * @param AphaMode This parameter can be one of the following values:
1274 * @arg @ref LL_DMA2D_ALPHA_MODE_NO_MODIF
1275 * @arg @ref LL_DMA2D_ALPHA_MODE_REPLACE
1276 * @arg @ref LL_DMA2D_ALPHA_MODE_COMBINE
1277 * @retval None
1278 */
LL_DMA2D_BGND_SetAlphaMode(DMA2D_TypeDef * DMA2Dx,uint32_t AphaMode)1279 __STATIC_INLINE void LL_DMA2D_BGND_SetAlphaMode(DMA2D_TypeDef *DMA2Dx, uint32_t AphaMode)
1280 {
1281 MODIFY_REG(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_AM, AphaMode);
1282 }
1283
1284 /**
1285 * @brief Return DMA2D background alpha mode.
1286 * @rmtoll BGPFCCR AM LL_DMA2D_BGND_GetAlphaMode
1287 * @param DMA2Dx DMA2D Instance
1288 * @retval Returned value can be one of the following values:
1289 * @arg @ref LL_DMA2D_ALPHA_MODE_NO_MODIF
1290 * @arg @ref LL_DMA2D_ALPHA_MODE_REPLACE
1291 * @arg @ref LL_DMA2D_ALPHA_MODE_COMBINE
1292 */
LL_DMA2D_BGND_GetAlphaMode(DMA2D_TypeDef * DMA2Dx)1293 __STATIC_INLINE uint32_t LL_DMA2D_BGND_GetAlphaMode(DMA2D_TypeDef *DMA2Dx)
1294 {
1295 return (uint32_t)(READ_BIT(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_AM));
1296 }
1297
1298 /**
1299 * @brief Set DMA2D background alpha value, expressed on 8 bits ([7:0] bits).
1300 * @rmtoll BGPFCCR ALPHA LL_DMA2D_BGND_SetAlpha
1301 * @param DMA2Dx DMA2D Instance
1302 * @param Alpha Value between Min_Data=0 and Max_Data=0xFF
1303 * @retval None
1304 */
LL_DMA2D_BGND_SetAlpha(DMA2D_TypeDef * DMA2Dx,uint32_t Alpha)1305 __STATIC_INLINE void LL_DMA2D_BGND_SetAlpha(DMA2D_TypeDef *DMA2Dx, uint32_t Alpha)
1306 {
1307 MODIFY_REG(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_ALPHA, (Alpha << DMA2D_BGPFCCR_ALPHA_Pos));
1308 }
1309
1310 /**
1311 * @brief Return DMA2D background alpha value, expressed on 8 bits ([7:0] bits).
1312 * @rmtoll BGPFCCR ALPHA LL_DMA2D_BGND_GetAlpha
1313 * @param DMA2Dx DMA2D Instance
1314 * @retval Alpha value between Min_Data=0 and Max_Data=0xFF
1315 */
LL_DMA2D_BGND_GetAlpha(DMA2D_TypeDef * DMA2Dx)1316 __STATIC_INLINE uint32_t LL_DMA2D_BGND_GetAlpha(DMA2D_TypeDef *DMA2Dx)
1317 {
1318 return (uint32_t)(READ_BIT(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_ALPHA) >> DMA2D_BGPFCCR_ALPHA_Pos);
1319 }
1320
1321
1322 /**
1323 * @brief Set DMA2D background line offset, expressed on 14 bits ([13:0] bits).
1324 * @rmtoll BGOR LO LL_DMA2D_BGND_SetLineOffset
1325 * @param DMA2Dx DMA2D Instance
1326 * @param LineOffset Value between Min_Data=0 and Max_Data=0x3FF
1327 * @retval None
1328 */
LL_DMA2D_BGND_SetLineOffset(DMA2D_TypeDef * DMA2Dx,uint32_t LineOffset)1329 __STATIC_INLINE void LL_DMA2D_BGND_SetLineOffset(DMA2D_TypeDef *DMA2Dx, uint32_t LineOffset)
1330 {
1331 MODIFY_REG(DMA2Dx->BGOR, DMA2D_BGOR_LO, LineOffset);
1332 }
1333
1334 /**
1335 * @brief Return DMA2D background line offset, expressed on 14 bits ([13:0] bits).
1336 * @rmtoll BGOR LO LL_DMA2D_BGND_GetLineOffset
1337 * @param DMA2Dx DMA2D Instance
1338 * @retval Background line offset value between Min_Data=0 and Max_Data=0x3FF
1339 */
LL_DMA2D_BGND_GetLineOffset(DMA2D_TypeDef * DMA2Dx)1340 __STATIC_INLINE uint32_t LL_DMA2D_BGND_GetLineOffset(DMA2D_TypeDef *DMA2Dx)
1341 {
1342 return (uint32_t)(READ_BIT(DMA2Dx->BGOR, DMA2D_BGOR_LO));
1343 }
1344
1345 /**
1346 * @brief Set DMA2D background color values, expressed on 24 bits ([23:0] bits).
1347 * @rmtoll BGCOLR RED LL_DMA2D_BGND_SetColor
1348 * @rmtoll BGCOLR GREEN LL_DMA2D_BGND_SetColor
1349 * @rmtoll BGCOLR BLUE LL_DMA2D_BGND_SetColor
1350 * @param DMA2Dx DMA2D Instance
1351 * @param Red Value between Min_Data=0 and Max_Data=0xFF
1352 * @param Green Value between Min_Data=0 and Max_Data=0xFF
1353 * @param Blue Value between Min_Data=0 and Max_Data=0xFF
1354 * @retval None
1355 */
LL_DMA2D_BGND_SetColor(DMA2D_TypeDef * DMA2Dx,uint32_t Red,uint32_t Green,uint32_t Blue)1356 __STATIC_INLINE void LL_DMA2D_BGND_SetColor(DMA2D_TypeDef *DMA2Dx, uint32_t Red, uint32_t Green, uint32_t Blue)
1357 {
1358 MODIFY_REG(DMA2Dx->BGCOLR, (DMA2D_BGCOLR_RED | DMA2D_BGCOLR_GREEN | DMA2D_BGCOLR_BLUE), \
1359 ((Red << DMA2D_BGCOLR_RED_Pos) | (Green << DMA2D_BGCOLR_GREEN_Pos) | Blue));
1360 }
1361
1362 /**
1363 * @brief Set DMA2D background red color value, expressed on 8 bits ([7:0] bits).
1364 * @rmtoll BGCOLR RED LL_DMA2D_BGND_SetRedColor
1365 * @param DMA2Dx DMA2D Instance
1366 * @param Red Value between Min_Data=0 and Max_Data=0xFF
1367 * @retval None
1368 */
LL_DMA2D_BGND_SetRedColor(DMA2D_TypeDef * DMA2Dx,uint32_t Red)1369 __STATIC_INLINE void LL_DMA2D_BGND_SetRedColor(DMA2D_TypeDef *DMA2Dx, uint32_t Red)
1370 {
1371 MODIFY_REG(DMA2Dx->BGCOLR, DMA2D_BGCOLR_RED, (Red << DMA2D_BGCOLR_RED_Pos));
1372 }
1373
1374 /**
1375 * @brief Return DMA2D background red color value, expressed on 8 bits ([7:0] bits).
1376 * @rmtoll BGCOLR RED LL_DMA2D_BGND_GetRedColor
1377 * @param DMA2Dx DMA2D Instance
1378 * @retval Red color value between Min_Data=0 and Max_Data=0xFF
1379 */
LL_DMA2D_BGND_GetRedColor(DMA2D_TypeDef * DMA2Dx)1380 __STATIC_INLINE uint32_t LL_DMA2D_BGND_GetRedColor(DMA2D_TypeDef *DMA2Dx)
1381 {
1382 return (uint32_t)(READ_BIT(DMA2Dx->BGCOLR, DMA2D_BGCOLR_RED) >> DMA2D_BGCOLR_RED_Pos);
1383 }
1384
1385 /**
1386 * @brief Set DMA2D background green color value, expressed on 8 bits ([7:0] bits).
1387 * @rmtoll BGCOLR GREEN LL_DMA2D_BGND_SetGreenColor
1388 * @param DMA2Dx DMA2D Instance
1389 * @param Green Value between Min_Data=0 and Max_Data=0xFF
1390 * @retval None
1391 */
LL_DMA2D_BGND_SetGreenColor(DMA2D_TypeDef * DMA2Dx,uint32_t Green)1392 __STATIC_INLINE void LL_DMA2D_BGND_SetGreenColor(DMA2D_TypeDef *DMA2Dx, uint32_t Green)
1393 {
1394 MODIFY_REG(DMA2Dx->BGCOLR, DMA2D_BGCOLR_GREEN, (Green << DMA2D_BGCOLR_GREEN_Pos));
1395 }
1396
1397 /**
1398 * @brief Return DMA2D background green color value, expressed on 8 bits ([7:0] bits).
1399 * @rmtoll BGCOLR GREEN LL_DMA2D_BGND_GetGreenColor
1400 * @param DMA2Dx DMA2D Instance
1401 * @retval Green color value between Min_Data=0 and Max_Data=0xFF
1402 */
LL_DMA2D_BGND_GetGreenColor(DMA2D_TypeDef * DMA2Dx)1403 __STATIC_INLINE uint32_t LL_DMA2D_BGND_GetGreenColor(DMA2D_TypeDef *DMA2Dx)
1404 {
1405 return (uint32_t)(READ_BIT(DMA2Dx->BGCOLR, DMA2D_BGCOLR_GREEN) >> DMA2D_BGCOLR_GREEN_Pos);
1406 }
1407
1408 /**
1409 * @brief Set DMA2D background blue color value, expressed on 8 bits ([7:0] bits).
1410 * @rmtoll BGCOLR BLUE LL_DMA2D_BGND_SetBlueColor
1411 * @param DMA2Dx DMA2D Instance
1412 * @param Blue Value between Min_Data=0 and Max_Data=0xFF
1413 * @retval None
1414 */
LL_DMA2D_BGND_SetBlueColor(DMA2D_TypeDef * DMA2Dx,uint32_t Blue)1415 __STATIC_INLINE void LL_DMA2D_BGND_SetBlueColor(DMA2D_TypeDef *DMA2Dx, uint32_t Blue)
1416 {
1417 MODIFY_REG(DMA2Dx->BGCOLR, DMA2D_BGCOLR_BLUE, Blue);
1418 }
1419
1420 /**
1421 * @brief Return DMA2D background blue color value, expressed on 8 bits ([7:0] bits).
1422 * @rmtoll BGCOLR BLUE LL_DMA2D_BGND_GetBlueColor
1423 * @param DMA2Dx DMA2D Instance
1424 * @retval Blue color value between Min_Data=0 and Max_Data=0xFF
1425 */
LL_DMA2D_BGND_GetBlueColor(DMA2D_TypeDef * DMA2Dx)1426 __STATIC_INLINE uint32_t LL_DMA2D_BGND_GetBlueColor(DMA2D_TypeDef *DMA2Dx)
1427 {
1428 return (uint32_t)(READ_BIT(DMA2Dx->BGCOLR, DMA2D_BGCOLR_BLUE));
1429 }
1430
1431 /**
1432 * @brief Set DMA2D background CLUT memory address, expressed on 32 bits ([31:0] bits).
1433 * @rmtoll BGCMAR MA LL_DMA2D_BGND_SetCLUTMemAddr
1434 * @param DMA2Dx DMA2D Instance
1435 * @param CLUTMemoryAddress Value between Min_Data=0 and Max_Data=0xFFFFFFFF
1436 * @retval None
1437 */
LL_DMA2D_BGND_SetCLUTMemAddr(DMA2D_TypeDef * DMA2Dx,uint32_t CLUTMemoryAddress)1438 __STATIC_INLINE void LL_DMA2D_BGND_SetCLUTMemAddr(DMA2D_TypeDef *DMA2Dx, uint32_t CLUTMemoryAddress)
1439 {
1440 LL_DMA2D_WriteReg(DMA2Dx, BGCMAR, CLUTMemoryAddress);
1441 }
1442
1443 /**
1444 * @brief Get DMA2D background CLUT memory address, expressed on 32 bits ([31:0] bits).
1445 * @rmtoll BGCMAR MA LL_DMA2D_BGND_GetCLUTMemAddr
1446 * @param DMA2Dx DMA2D Instance
1447 * @retval Background CLUT memory address value between Min_Data=0 and Max_Data=0xFFFFFFFF
1448 */
LL_DMA2D_BGND_GetCLUTMemAddr(DMA2D_TypeDef * DMA2Dx)1449 __STATIC_INLINE uint32_t LL_DMA2D_BGND_GetCLUTMemAddr(DMA2D_TypeDef *DMA2Dx)
1450 {
1451 return (uint32_t)(LL_DMA2D_ReadReg(DMA2Dx, BGCMAR));
1452 }
1453
1454 /**
1455 * @brief Set DMA2D background CLUT size, expressed on 8 bits ([7:0] bits).
1456 * @rmtoll BGPFCCR CS LL_DMA2D_BGND_SetCLUTSize
1457 * @param DMA2Dx DMA2D Instance
1458 * @param CLUTSize Value between Min_Data=0 and Max_Data=0xFF
1459 * @retval None
1460 */
LL_DMA2D_BGND_SetCLUTSize(DMA2D_TypeDef * DMA2Dx,uint32_t CLUTSize)1461 __STATIC_INLINE void LL_DMA2D_BGND_SetCLUTSize(DMA2D_TypeDef *DMA2Dx, uint32_t CLUTSize)
1462 {
1463 MODIFY_REG(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_CS, (CLUTSize << DMA2D_BGPFCCR_CS_Pos));
1464 }
1465
1466 /**
1467 * @brief Get DMA2D background CLUT size, expressed on 8 bits ([7:0] bits).
1468 * @rmtoll BGPFCCR CS LL_DMA2D_BGND_GetCLUTSize
1469 * @param DMA2Dx DMA2D Instance
1470 * @retval Background CLUT size value between Min_Data=0 and Max_Data=0xFF
1471 */
LL_DMA2D_BGND_GetCLUTSize(DMA2D_TypeDef * DMA2Dx)1472 __STATIC_INLINE uint32_t LL_DMA2D_BGND_GetCLUTSize(DMA2D_TypeDef *DMA2Dx)
1473 {
1474 return (uint32_t)(READ_BIT(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_CS) >> DMA2D_BGPFCCR_CS_Pos);
1475 }
1476
1477 /**
1478 * @brief Set DMA2D background CLUT color mode.
1479 * @rmtoll BGPFCCR CCM LL_DMA2D_BGND_SetCLUTColorMode
1480 * @param DMA2Dx DMA2D Instance
1481 * @param CLUTColorMode This parameter can be one of the following values:
1482 * @arg @ref LL_DMA2D_CLUT_COLOR_MODE_ARGB8888
1483 * @arg @ref LL_DMA2D_CLUT_COLOR_MODE_RGB888
1484 * @retval None
1485 */
LL_DMA2D_BGND_SetCLUTColorMode(DMA2D_TypeDef * DMA2Dx,uint32_t CLUTColorMode)1486 __STATIC_INLINE void LL_DMA2D_BGND_SetCLUTColorMode(DMA2D_TypeDef *DMA2Dx, uint32_t CLUTColorMode)
1487 {
1488 MODIFY_REG(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_CCM, CLUTColorMode);
1489 }
1490
1491 /**
1492 * @brief Return DMA2D background CLUT color mode.
1493 * @rmtoll BGPFCCR CCM LL_DMA2D_BGND_GetCLUTColorMode
1494 * @param DMA2Dx DMA2D Instance
1495 * @retval Returned value can be one of the following values:
1496 * @arg @ref LL_DMA2D_CLUT_COLOR_MODE_ARGB8888
1497 * @arg @ref LL_DMA2D_CLUT_COLOR_MODE_RGB888
1498 */
LL_DMA2D_BGND_GetCLUTColorMode(DMA2D_TypeDef * DMA2Dx)1499 __STATIC_INLINE uint32_t LL_DMA2D_BGND_GetCLUTColorMode(DMA2D_TypeDef *DMA2Dx)
1500 {
1501 return (uint32_t)(READ_BIT(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_CCM));
1502 }
1503
1504 /**
1505 * @}
1506 */
1507
1508 /**
1509 * @}
1510 */
1511
1512
1513 /** @defgroup DMA2D_LL_EF_FLAG_MANAGEMENT Flag Management
1514 * @{
1515 */
1516
1517 /**
1518 * @brief Check if the DMA2D Configuration Error Interrupt Flag is set or not
1519 * @rmtoll ISR CEIF LL_DMA2D_IsActiveFlag_CE
1520 * @param DMA2Dx DMA2D Instance
1521 * @retval State of bit (1 or 0).
1522 */
LL_DMA2D_IsActiveFlag_CE(DMA2D_TypeDef * DMA2Dx)1523 __STATIC_INLINE uint32_t LL_DMA2D_IsActiveFlag_CE(DMA2D_TypeDef *DMA2Dx)
1524 {
1525 return ((READ_BIT(DMA2Dx->ISR, DMA2D_ISR_CEIF) == (DMA2D_ISR_CEIF)) ? 1UL : 0UL);
1526 }
1527
1528 /**
1529 * @brief Check if the DMA2D CLUT Transfer Complete Interrupt Flag is set or not
1530 * @rmtoll ISR CTCIF LL_DMA2D_IsActiveFlag_CTC
1531 * @param DMA2Dx DMA2D Instance
1532 * @retval State of bit (1 or 0).
1533 */
LL_DMA2D_IsActiveFlag_CTC(DMA2D_TypeDef * DMA2Dx)1534 __STATIC_INLINE uint32_t LL_DMA2D_IsActiveFlag_CTC(DMA2D_TypeDef *DMA2Dx)
1535 {
1536 return ((READ_BIT(DMA2Dx->ISR, DMA2D_ISR_CTCIF) == (DMA2D_ISR_CTCIF)) ? 1UL : 0UL);
1537 }
1538
1539 /**
1540 * @brief Check if the DMA2D CLUT Access Error Interrupt Flag is set or not
1541 * @rmtoll ISR CAEIF LL_DMA2D_IsActiveFlag_CAE
1542 * @param DMA2Dx DMA2D Instance
1543 * @retval State of bit (1 or 0).
1544 */
LL_DMA2D_IsActiveFlag_CAE(DMA2D_TypeDef * DMA2Dx)1545 __STATIC_INLINE uint32_t LL_DMA2D_IsActiveFlag_CAE(DMA2D_TypeDef *DMA2Dx)
1546 {
1547 return ((READ_BIT(DMA2Dx->ISR, DMA2D_ISR_CAEIF) == (DMA2D_ISR_CAEIF)) ? 1UL : 0UL);
1548 }
1549
1550 /**
1551 * @brief Check if the DMA2D Transfer Watermark Interrupt Flag is set or not
1552 * @rmtoll ISR TWIF LL_DMA2D_IsActiveFlag_TW
1553 * @param DMA2Dx DMA2D Instance
1554 * @retval State of bit (1 or 0).
1555 */
LL_DMA2D_IsActiveFlag_TW(DMA2D_TypeDef * DMA2Dx)1556 __STATIC_INLINE uint32_t LL_DMA2D_IsActiveFlag_TW(DMA2D_TypeDef *DMA2Dx)
1557 {
1558 return ((READ_BIT(DMA2Dx->ISR, DMA2D_ISR_TWIF) == (DMA2D_ISR_TWIF)) ? 1UL : 0UL);
1559 }
1560
1561 /**
1562 * @brief Check if the DMA2D Transfer Complete Interrupt Flag is set or not
1563 * @rmtoll ISR TCIF LL_DMA2D_IsActiveFlag_TC
1564 * @param DMA2Dx DMA2D Instance
1565 * @retval State of bit (1 or 0).
1566 */
LL_DMA2D_IsActiveFlag_TC(DMA2D_TypeDef * DMA2Dx)1567 __STATIC_INLINE uint32_t LL_DMA2D_IsActiveFlag_TC(DMA2D_TypeDef *DMA2Dx)
1568 {
1569 return ((READ_BIT(DMA2Dx->ISR, DMA2D_ISR_TCIF) == (DMA2D_ISR_TCIF)) ? 1UL : 0UL);
1570 }
1571
1572 /**
1573 * @brief Check if the DMA2D Transfer Error Interrupt Flag is set or not
1574 * @rmtoll ISR TEIF LL_DMA2D_IsActiveFlag_TE
1575 * @param DMA2Dx DMA2D Instance
1576 * @retval State of bit (1 or 0).
1577 */
LL_DMA2D_IsActiveFlag_TE(DMA2D_TypeDef * DMA2Dx)1578 __STATIC_INLINE uint32_t LL_DMA2D_IsActiveFlag_TE(DMA2D_TypeDef *DMA2Dx)
1579 {
1580 return ((READ_BIT(DMA2Dx->ISR, DMA2D_ISR_TEIF) == (DMA2D_ISR_TEIF)) ? 1UL : 0UL);
1581 }
1582
1583 /**
1584 * @brief Clear DMA2D Configuration Error Interrupt Flag
1585 * @rmtoll IFCR CCEIF LL_DMA2D_ClearFlag_CE
1586 * @param DMA2Dx DMA2D Instance
1587 * @retval None
1588 */
LL_DMA2D_ClearFlag_CE(DMA2D_TypeDef * DMA2Dx)1589 __STATIC_INLINE void LL_DMA2D_ClearFlag_CE(DMA2D_TypeDef *DMA2Dx)
1590 {
1591 WRITE_REG(DMA2Dx->IFCR, DMA2D_IFCR_CCEIF);
1592 }
1593
1594 /**
1595 * @brief Clear DMA2D CLUT Transfer Complete Interrupt Flag
1596 * @rmtoll IFCR CCTCIF LL_DMA2D_ClearFlag_CTC
1597 * @param DMA2Dx DMA2D Instance
1598 * @retval None
1599 */
LL_DMA2D_ClearFlag_CTC(DMA2D_TypeDef * DMA2Dx)1600 __STATIC_INLINE void LL_DMA2D_ClearFlag_CTC(DMA2D_TypeDef *DMA2Dx)
1601 {
1602 WRITE_REG(DMA2Dx->IFCR, DMA2D_IFCR_CCTCIF);
1603 }
1604
1605 /**
1606 * @brief Clear DMA2D CLUT Access Error Interrupt Flag
1607 * @rmtoll IFCR CAECIF LL_DMA2D_ClearFlag_CAE
1608 * @param DMA2Dx DMA2D Instance
1609 * @retval None
1610 */
LL_DMA2D_ClearFlag_CAE(DMA2D_TypeDef * DMA2Dx)1611 __STATIC_INLINE void LL_DMA2D_ClearFlag_CAE(DMA2D_TypeDef *DMA2Dx)
1612 {
1613 WRITE_REG(DMA2Dx->IFCR, DMA2D_IFCR_CAECIF);
1614 }
1615
1616 /**
1617 * @brief Clear DMA2D Transfer Watermark Interrupt Flag
1618 * @rmtoll IFCR CTWIF LL_DMA2D_ClearFlag_TW
1619 * @param DMA2Dx DMA2D Instance
1620 * @retval None
1621 */
LL_DMA2D_ClearFlag_TW(DMA2D_TypeDef * DMA2Dx)1622 __STATIC_INLINE void LL_DMA2D_ClearFlag_TW(DMA2D_TypeDef *DMA2Dx)
1623 {
1624 WRITE_REG(DMA2Dx->IFCR, DMA2D_IFCR_CTWIF);
1625 }
1626
1627 /**
1628 * @brief Clear DMA2D Transfer Complete Interrupt Flag
1629 * @rmtoll IFCR CTCIF LL_DMA2D_ClearFlag_TC
1630 * @param DMA2Dx DMA2D Instance
1631 * @retval None
1632 */
LL_DMA2D_ClearFlag_TC(DMA2D_TypeDef * DMA2Dx)1633 __STATIC_INLINE void LL_DMA2D_ClearFlag_TC(DMA2D_TypeDef *DMA2Dx)
1634 {
1635 WRITE_REG(DMA2Dx->IFCR, DMA2D_IFCR_CTCIF);
1636 }
1637
1638 /**
1639 * @brief Clear DMA2D Transfer Error Interrupt Flag
1640 * @rmtoll IFCR CTEIF LL_DMA2D_ClearFlag_TE
1641 * @param DMA2Dx DMA2D Instance
1642 * @retval None
1643 */
LL_DMA2D_ClearFlag_TE(DMA2D_TypeDef * DMA2Dx)1644 __STATIC_INLINE void LL_DMA2D_ClearFlag_TE(DMA2D_TypeDef *DMA2Dx)
1645 {
1646 WRITE_REG(DMA2Dx->IFCR, DMA2D_IFCR_CTEIF);
1647 }
1648
1649 /**
1650 * @}
1651 */
1652
1653 /** @defgroup DMA2D_LL_EF_IT_MANAGEMENT Interruption Management
1654 * @{
1655 */
1656
1657 /**
1658 * @brief Enable Configuration Error Interrupt
1659 * @rmtoll CR CEIE LL_DMA2D_EnableIT_CE
1660 * @param DMA2Dx DMA2D Instance
1661 * @retval None
1662 */
LL_DMA2D_EnableIT_CE(DMA2D_TypeDef * DMA2Dx)1663 __STATIC_INLINE void LL_DMA2D_EnableIT_CE(DMA2D_TypeDef *DMA2Dx)
1664 {
1665 SET_BIT(DMA2Dx->CR, DMA2D_CR_CEIE);
1666 }
1667
1668 /**
1669 * @brief Enable CLUT Transfer Complete Interrupt
1670 * @rmtoll CR CTCIE LL_DMA2D_EnableIT_CTC
1671 * @param DMA2Dx DMA2D Instance
1672 * @retval None
1673 */
LL_DMA2D_EnableIT_CTC(DMA2D_TypeDef * DMA2Dx)1674 __STATIC_INLINE void LL_DMA2D_EnableIT_CTC(DMA2D_TypeDef *DMA2Dx)
1675 {
1676 SET_BIT(DMA2Dx->CR, DMA2D_CR_CTCIE);
1677 }
1678
1679 /**
1680 * @brief Enable CLUT Access Error Interrupt
1681 * @rmtoll CR CAEIE LL_DMA2D_EnableIT_CAE
1682 * @param DMA2Dx DMA2D Instance
1683 * @retval None
1684 */
LL_DMA2D_EnableIT_CAE(DMA2D_TypeDef * DMA2Dx)1685 __STATIC_INLINE void LL_DMA2D_EnableIT_CAE(DMA2D_TypeDef *DMA2Dx)
1686 {
1687 SET_BIT(DMA2Dx->CR, DMA2D_CR_CAEIE);
1688 }
1689
1690 /**
1691 * @brief Enable Transfer Watermark Interrupt
1692 * @rmtoll CR TWIE LL_DMA2D_EnableIT_TW
1693 * @param DMA2Dx DMA2D Instance
1694 * @retval None
1695 */
LL_DMA2D_EnableIT_TW(DMA2D_TypeDef * DMA2Dx)1696 __STATIC_INLINE void LL_DMA2D_EnableIT_TW(DMA2D_TypeDef *DMA2Dx)
1697 {
1698 SET_BIT(DMA2Dx->CR, DMA2D_CR_TWIE);
1699 }
1700
1701 /**
1702 * @brief Enable Transfer Complete Interrupt
1703 * @rmtoll CR TCIE LL_DMA2D_EnableIT_TC
1704 * @param DMA2Dx DMA2D Instance
1705 * @retval None
1706 */
LL_DMA2D_EnableIT_TC(DMA2D_TypeDef * DMA2Dx)1707 __STATIC_INLINE void LL_DMA2D_EnableIT_TC(DMA2D_TypeDef *DMA2Dx)
1708 {
1709 SET_BIT(DMA2Dx->CR, DMA2D_CR_TCIE);
1710 }
1711
1712 /**
1713 * @brief Enable Transfer Error Interrupt
1714 * @rmtoll CR TEIE LL_DMA2D_EnableIT_TE
1715 * @param DMA2Dx DMA2D Instance
1716 * @retval None
1717 */
LL_DMA2D_EnableIT_TE(DMA2D_TypeDef * DMA2Dx)1718 __STATIC_INLINE void LL_DMA2D_EnableIT_TE(DMA2D_TypeDef *DMA2Dx)
1719 {
1720 SET_BIT(DMA2Dx->CR, DMA2D_CR_TEIE);
1721 }
1722
1723 /**
1724 * @brief Disable Configuration Error Interrupt
1725 * @rmtoll CR CEIE LL_DMA2D_DisableIT_CE
1726 * @param DMA2Dx DMA2D Instance
1727 * @retval None
1728 */
LL_DMA2D_DisableIT_CE(DMA2D_TypeDef * DMA2Dx)1729 __STATIC_INLINE void LL_DMA2D_DisableIT_CE(DMA2D_TypeDef *DMA2Dx)
1730 {
1731 CLEAR_BIT(DMA2Dx->CR, DMA2D_CR_CEIE);
1732 }
1733
1734 /**
1735 * @brief Disable CLUT Transfer Complete Interrupt
1736 * @rmtoll CR CTCIE LL_DMA2D_DisableIT_CTC
1737 * @param DMA2Dx DMA2D Instance
1738 * @retval None
1739 */
LL_DMA2D_DisableIT_CTC(DMA2D_TypeDef * DMA2Dx)1740 __STATIC_INLINE void LL_DMA2D_DisableIT_CTC(DMA2D_TypeDef *DMA2Dx)
1741 {
1742 CLEAR_BIT(DMA2Dx->CR, DMA2D_CR_CTCIE);
1743 }
1744
1745 /**
1746 * @brief Disable CLUT Access Error Interrupt
1747 * @rmtoll CR CAEIE LL_DMA2D_DisableIT_CAE
1748 * @param DMA2Dx DMA2D Instance
1749 * @retval None
1750 */
LL_DMA2D_DisableIT_CAE(DMA2D_TypeDef * DMA2Dx)1751 __STATIC_INLINE void LL_DMA2D_DisableIT_CAE(DMA2D_TypeDef *DMA2Dx)
1752 {
1753 CLEAR_BIT(DMA2Dx->CR, DMA2D_CR_CAEIE);
1754 }
1755
1756 /**
1757 * @brief Disable Transfer Watermark Interrupt
1758 * @rmtoll CR TWIE LL_DMA2D_DisableIT_TW
1759 * @param DMA2Dx DMA2D Instance
1760 * @retval None
1761 */
LL_DMA2D_DisableIT_TW(DMA2D_TypeDef * DMA2Dx)1762 __STATIC_INLINE void LL_DMA2D_DisableIT_TW(DMA2D_TypeDef *DMA2Dx)
1763 {
1764 CLEAR_BIT(DMA2Dx->CR, DMA2D_CR_TWIE);
1765 }
1766
1767 /**
1768 * @brief Disable Transfer Complete Interrupt
1769 * @rmtoll CR TCIE LL_DMA2D_DisableIT_TC
1770 * @param DMA2Dx DMA2D Instance
1771 * @retval None
1772 */
LL_DMA2D_DisableIT_TC(DMA2D_TypeDef * DMA2Dx)1773 __STATIC_INLINE void LL_DMA2D_DisableIT_TC(DMA2D_TypeDef *DMA2Dx)
1774 {
1775 CLEAR_BIT(DMA2Dx->CR, DMA2D_CR_TCIE);
1776 }
1777
1778 /**
1779 * @brief Disable Transfer Error Interrupt
1780 * @rmtoll CR TEIE LL_DMA2D_DisableIT_TE
1781 * @param DMA2Dx DMA2D Instance
1782 * @retval None
1783 */
LL_DMA2D_DisableIT_TE(DMA2D_TypeDef * DMA2Dx)1784 __STATIC_INLINE void LL_DMA2D_DisableIT_TE(DMA2D_TypeDef *DMA2Dx)
1785 {
1786 CLEAR_BIT(DMA2Dx->CR, DMA2D_CR_TEIE);
1787 }
1788
1789 /**
1790 * @brief Check if the DMA2D Configuration Error interrupt source is enabled or disabled.
1791 * @rmtoll CR CEIE LL_DMA2D_IsEnabledIT_CE
1792 * @param DMA2Dx DMA2D Instance
1793 * @retval State of bit (1 or 0).
1794 */
LL_DMA2D_IsEnabledIT_CE(DMA2D_TypeDef * DMA2Dx)1795 __STATIC_INLINE uint32_t LL_DMA2D_IsEnabledIT_CE(DMA2D_TypeDef *DMA2Dx)
1796 {
1797 return ((READ_BIT(DMA2Dx->CR, DMA2D_CR_CEIE) == (DMA2D_CR_CEIE)) ? 1UL : 0UL);
1798 }
1799
1800 /**
1801 * @brief Check if the DMA2D CLUT Transfer Complete interrupt source is enabled or disabled.
1802 * @rmtoll CR CTCIE LL_DMA2D_IsEnabledIT_CTC
1803 * @param DMA2Dx DMA2D Instance
1804 * @retval State of bit (1 or 0).
1805 */
LL_DMA2D_IsEnabledIT_CTC(DMA2D_TypeDef * DMA2Dx)1806 __STATIC_INLINE uint32_t LL_DMA2D_IsEnabledIT_CTC(DMA2D_TypeDef *DMA2Dx)
1807 {
1808 return ((READ_BIT(DMA2Dx->CR, DMA2D_CR_CTCIE) == (DMA2D_CR_CTCIE)) ? 1UL : 0UL);
1809 }
1810
1811 /**
1812 * @brief Check if the DMA2D CLUT Access Error interrupt source is enabled or disabled.
1813 * @rmtoll CR CAEIE LL_DMA2D_IsEnabledIT_CAE
1814 * @param DMA2Dx DMA2D Instance
1815 * @retval State of bit (1 or 0).
1816 */
LL_DMA2D_IsEnabledIT_CAE(DMA2D_TypeDef * DMA2Dx)1817 __STATIC_INLINE uint32_t LL_DMA2D_IsEnabledIT_CAE(DMA2D_TypeDef *DMA2Dx)
1818 {
1819 return ((READ_BIT(DMA2Dx->CR, DMA2D_CR_CAEIE) == (DMA2D_CR_CAEIE)) ? 1UL : 0UL);
1820 }
1821
1822 /**
1823 * @brief Check if the DMA2D Transfer Watermark interrupt source is enabled or disabled.
1824 * @rmtoll CR TWIE LL_DMA2D_IsEnabledIT_TW
1825 * @param DMA2Dx DMA2D Instance
1826 * @retval State of bit (1 or 0).
1827 */
LL_DMA2D_IsEnabledIT_TW(DMA2D_TypeDef * DMA2Dx)1828 __STATIC_INLINE uint32_t LL_DMA2D_IsEnabledIT_TW(DMA2D_TypeDef *DMA2Dx)
1829 {
1830 return ((READ_BIT(DMA2Dx->CR, DMA2D_CR_TWIE) == (DMA2D_CR_TWIE)) ? 1UL : 0UL);
1831 }
1832
1833 /**
1834 * @brief Check if the DMA2D Transfer Complete interrupt source is enabled or disabled.
1835 * @rmtoll CR TCIE LL_DMA2D_IsEnabledIT_TC
1836 * @param DMA2Dx DMA2D Instance
1837 * @retval State of bit (1 or 0).
1838 */
LL_DMA2D_IsEnabledIT_TC(DMA2D_TypeDef * DMA2Dx)1839 __STATIC_INLINE uint32_t LL_DMA2D_IsEnabledIT_TC(DMA2D_TypeDef *DMA2Dx)
1840 {
1841 return ((READ_BIT(DMA2Dx->CR, DMA2D_CR_TCIE) == (DMA2D_CR_TCIE)) ? 1UL : 0UL);
1842 }
1843
1844 /**
1845 * @brief Check if the DMA2D Transfer Error interrupt source is enabled or disabled.
1846 * @rmtoll CR TEIE LL_DMA2D_IsEnabledIT_TE
1847 * @param DMA2Dx DMA2D Instance
1848 * @retval State of bit (1 or 0).
1849 */
LL_DMA2D_IsEnabledIT_TE(DMA2D_TypeDef * DMA2Dx)1850 __STATIC_INLINE uint32_t LL_DMA2D_IsEnabledIT_TE(DMA2D_TypeDef *DMA2Dx)
1851 {
1852 return ((READ_BIT(DMA2Dx->CR, DMA2D_CR_TEIE) == (DMA2D_CR_TEIE)) ? 1UL : 0UL);
1853 }
1854
1855
1856
1857 /**
1858 * @}
1859 */
1860
1861 #if defined(USE_FULL_LL_DRIVER)
1862 /** @defgroup DMA2D_LL_EF_Init_Functions Initialization and De-initialization Functions
1863 * @{
1864 */
1865
1866 ErrorStatus LL_DMA2D_DeInit(DMA2D_TypeDef *DMA2Dx);
1867 ErrorStatus LL_DMA2D_Init(DMA2D_TypeDef *DMA2Dx, LL_DMA2D_InitTypeDef *DMA2D_InitStruct);
1868 void LL_DMA2D_StructInit(LL_DMA2D_InitTypeDef *DMA2D_InitStruct);
1869 void LL_DMA2D_ConfigLayer(DMA2D_TypeDef *DMA2Dx, LL_DMA2D_LayerCfgTypeDef *DMA2D_LayerCfg, uint32_t LayerIdx);
1870 void LL_DMA2D_LayerCfgStructInit(LL_DMA2D_LayerCfgTypeDef *DMA2D_LayerCfg);
1871 void LL_DMA2D_ConfigOutputColor(DMA2D_TypeDef *DMA2Dx, LL_DMA2D_ColorTypeDef *DMA2D_ColorStruct);
1872 uint32_t LL_DMA2D_GetOutputBlueColor(DMA2D_TypeDef *DMA2Dx, uint32_t ColorMode);
1873 uint32_t LL_DMA2D_GetOutputGreenColor(DMA2D_TypeDef *DMA2Dx, uint32_t ColorMode);
1874 uint32_t LL_DMA2D_GetOutputRedColor(DMA2D_TypeDef *DMA2Dx, uint32_t ColorMode);
1875 uint32_t LL_DMA2D_GetOutputAlphaColor(DMA2D_TypeDef *DMA2Dx, uint32_t ColorMode);
1876 void LL_DMA2D_ConfigSize(DMA2D_TypeDef *DMA2Dx, uint32_t NbrOfLines, uint32_t NbrOfPixelsPerLines);
1877
1878 /**
1879 * @}
1880 */
1881 #endif /* USE_FULL_LL_DRIVER */
1882
1883 /**
1884 * @}
1885 */
1886
1887 /**
1888 * @}
1889 */
1890
1891 #endif /* defined (DMA2D) */
1892
1893 /**
1894 * @}
1895 */
1896
1897 #ifdef __cplusplus
1898 }
1899 #endif
1900
1901 #endif /* STM32F4xx_LL_DMA2D_H */
1902
