1 /** 2 ****************************************************************************** 3 * @file stm32f4xx_hal_sai.h 4 * @author MCD Application Team 5 * @brief Header file of SAI HAL module. 6 ****************************************************************************** 7 * @attention 8 * 9 * Copyright (c) 2017 STMicroelectronics. 10 * All rights reserved. 11 * 12 * This software is licensed under terms that can be found in the LICENSE file 13 * in the root directory of this software component. 14 * If no LICENSE file comes with this software, it is provided AS-IS. 15 * 16 ****************************************************************************** 17 */ 18 19 /* Define to prevent recursive inclusion -------------------------------------*/ 20 #ifndef __STM32F4xx_HAL_SAI_H 21 #define __STM32F4xx_HAL_SAI_H 22 23 #ifdef __cplusplus 24 extern "C" { 25 #endif 26 27 /* Includes ------------------------------------------------------------------*/ 28 #include "stm32f4xx_hal_def.h" 29 30 /** @addtogroup STM32F4xx_HAL_Driver 31 * @{ 32 */ 33 #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) || \ 34 defined(STM32F446xx) || defined(STM32F469xx) || defined(STM32F479xx) || defined(STM32F413xx) || \ 35 defined(STM32F423xx) 36 37 /** @addtogroup SAI 38 * @{ 39 */ 40 41 /* Exported types ------------------------------------------------------------*/ 42 /** @defgroup SAI_Exported_Types SAI Exported Types 43 * @{ 44 */ 45 46 /** 47 * @brief HAL State structures definition 48 */ 49 typedef enum 50 { 51 HAL_SAI_STATE_RESET = 0x00U, /*!< SAI not yet initialized or disabled */ 52 HAL_SAI_STATE_READY = 0x01U, /*!< SAI initialized and ready for use */ 53 HAL_SAI_STATE_BUSY = 0x02U, /*!< SAI internal process is ongoing */ 54 HAL_SAI_STATE_BUSY_TX = 0x12U, /*!< Data transmission process is ongoing */ 55 HAL_SAI_STATE_BUSY_RX = 0x22U, /*!< Data reception process is ongoing */ 56 HAL_SAI_STATE_TIMEOUT = 0x03U, /*!< SAI timeout state */ 57 HAL_SAI_STATE_ERROR = 0x04U /*!< SAI error state */ 58 } HAL_SAI_StateTypeDef; 59 60 /** 61 * @brief SAI Callback prototype 62 */ 63 typedef void (*SAIcallback)(void); 64 65 /** @defgroup SAI_Init_Structure_definition SAI Init Structure definition 66 * @brief SAI Init Structure definition 67 * @{ 68 */ 69 typedef struct 70 { 71 uint32_t AudioMode; /*!< Specifies the SAI Block audio Mode. 72 This parameter can be a value of @ref SAI_Block_Mode */ 73 74 uint32_t Synchro; /*!< Specifies SAI Block synchronization 75 This parameter can be a value of @ref SAI_Block_Synchronization */ 76 77 uint32_t SynchroExt; /*!< Specifies SAI external output synchronization, this setup is common 78 for BlockA and BlockB 79 This parameter can be a value of @ref SAI_Block_SyncExt 80 @note: If both audio blocks of same SAI are used, this parameter has 81 to be set to the same value for each audio block */ 82 83 uint32_t OutputDrive; /*!< Specifies when SAI Block outputs are driven. 84 This parameter can be a value of @ref SAI_Block_Output_Drive 85 @note this value has to be set before enabling the audio block 86 but after the audio block configuration. */ 87 88 uint32_t NoDivider; /*!< Specifies whether master clock will be divided or not. 89 This parameter can be a value of @ref SAI_Block_NoDivider 90 @note If bit NODIV in the SAI_xCR1 register is cleared, the frame length 91 should be aligned to a number equal to a power of 2, from 8 to 256. 92 If bit NODIV in the SAI_xCR1 register is set, the frame length can 93 take any of the values without constraint since the input clock of 94 the audio block should be equal to the bit clock. 95 There is no MCLK_x clock which can be output. */ 96 97 uint32_t FIFOThreshold; /*!< Specifies SAI Block FIFO threshold. 98 This parameter can be a value of @ref SAI_Block_Fifo_Threshold */ 99 100 uint32_t ClockSource; /*!< Specifies the SAI Block x Clock source. 101 This parameter is not used for STM32F446xx devices. */ 102 103 uint32_t AudioFrequency; /*!< Specifies the audio frequency sampling. 104 This parameter can be a value of @ref SAI_Audio_Frequency */ 105 106 uint32_t Mckdiv; /*!< Specifies the master clock divider. 107 This parameter must be a number between Min_Data = 0 and Max_Data = 15. 108 @note This parameter is used only if AudioFrequency is set to 109 SAI_AUDIO_FREQUENCY_MCKDIV otherwise it is internally computed. */ 110 111 uint32_t MonoStereoMode; /*!< Specifies if the mono or stereo mode is selected. 112 This parameter can be a value of @ref SAI_Mono_Stereo_Mode */ 113 114 uint32_t CompandingMode; /*!< Specifies the companding mode type. 115 This parameter can be a value of @ref SAI_Block_Companding_Mode */ 116 117 uint32_t TriState; /*!< Specifies the companding mode type. 118 This parameter can be a value of @ref SAI_TRIState_Management */ 119 120 /* This part of the structure is automatically filled if your are using the high level initialisation 121 function HAL_SAI_InitProtocol */ 122 123 uint32_t Protocol; /*!< Specifies the SAI Block protocol. 124 This parameter can be a value of @ref SAI_Block_Protocol */ 125 126 uint32_t DataSize; /*!< Specifies the SAI Block data size. 127 This parameter can be a value of @ref SAI_Block_Data_Size */ 128 129 uint32_t FirstBit; /*!< Specifies whether data transfers start from MSB or LSB bit. 130 This parameter can be a value of @ref SAI_Block_MSB_LSB_transmission */ 131 132 uint32_t ClockStrobing; /*!< Specifies the SAI Block clock strobing edge sensitivity. 133 This parameter can be a value of @ref SAI_Block_Clock_Strobing */ 134 } SAI_InitTypeDef; 135 /** 136 * @} 137 */ 138 139 /** @defgroup SAI_Frame_Structure_definition SAI Frame Structure definition 140 * @brief SAI Frame Init structure definition 141 * @note For SPDIF and AC97 protocol, these parameters are not used (set by hardware). 142 * @{ 143 */ 144 typedef struct 145 { 146 uint32_t FrameLength; /*!< Specifies the Frame length, the number of SCK clocks for each audio frame. 147 This parameter must be a number between Min_Data = 8 and Max_Data = 256. 148 @note If master clock MCLK_x pin is declared as an output, the frame length 149 should be aligned to a number equal to power of 2 in order to keep 150 in an audio frame, an integer number of MCLK pulses by bit Clock. */ 151 152 uint32_t ActiveFrameLength; /*!< Specifies the Frame synchronization active level length. 153 This Parameter specifies the length in number of bit clock (SCK + 1) 154 of the active level of FS signal in audio frame. 155 This parameter must be a number between Min_Data = 1 and Max_Data = 128 */ 156 157 uint32_t FSDefinition; /*!< Specifies the Frame synchronization definition. 158 This parameter can be a value of @ref SAI_Block_FS_Definition */ 159 160 uint32_t FSPolarity; /*!< Specifies the Frame synchronization Polarity. 161 This parameter can be a value of @ref SAI_Block_FS_Polarity */ 162 163 uint32_t FSOffset; /*!< Specifies the Frame synchronization Offset. 164 This parameter can be a value of @ref SAI_Block_FS_Offset */ 165 } SAI_FrameInitTypeDef; 166 /** 167 * @} 168 */ 169 170 /** @defgroup SAI_Slot_Structure_definition SAI Slot Structure definition 171 * @brief SAI Block Slot Init Structure definition 172 * @note For SPDIF protocol, these parameters are not used (set by hardware). 173 * @note For AC97 protocol, only SlotActive parameter is used (the others are set by hardware). 174 * @{ 175 */ 176 typedef struct 177 { 178 uint32_t FirstBitOffset; /*!< Specifies the position of first data transfer bit in the slot. 179 This parameter must be a number between Min_Data = 0 and Max_Data = 24 */ 180 181 uint32_t SlotSize; /*!< Specifies the Slot Size. 182 This parameter can be a value of @ref SAI_Block_Slot_Size */ 183 184 uint32_t SlotNumber; /*!< Specifies the number of slot in the audio frame. 185 This parameter must be a number between Min_Data = 1 and Max_Data = 16 */ 186 187 uint32_t SlotActive; /*!< Specifies the slots in audio frame that will be activated. 188 This parameter can be a value of @ref SAI_Block_Slot_Active */ 189 } SAI_SlotInitTypeDef; 190 /** 191 * @} 192 */ 193 194 /** @defgroup SAI_Handle_Structure_definition SAI Handle Structure definition 195 * @brief SAI handle Structure definition 196 * @{ 197 */ 198 typedef struct __SAI_HandleTypeDef 199 { 200 SAI_Block_TypeDef *Instance; /*!< SAI Blockx registers base address */ 201 202 SAI_InitTypeDef Init; /*!< SAI communication parameters */ 203 204 SAI_FrameInitTypeDef FrameInit; /*!< SAI Frame configuration parameters */ 205 206 SAI_SlotInitTypeDef SlotInit; /*!< SAI Slot configuration parameters */ 207 208 uint8_t *pBuffPtr; /*!< Pointer to SAI transfer Buffer */ 209 210 uint16_t XferSize; /*!< SAI transfer size */ 211 212 uint16_t XferCount; /*!< SAI transfer counter */ 213 214 DMA_HandleTypeDef *hdmatx; /*!< SAI Tx DMA handle parameters */ 215 216 DMA_HandleTypeDef *hdmarx; /*!< SAI Rx DMA handle parameters */ 217 218 SAIcallback mutecallback;/*!< SAI mute callback */ 219 220 void (*InterruptServiceRoutine)(struct __SAI_HandleTypeDef *hsai); /* function pointer for IRQ handler */ 221 222 HAL_LockTypeDef Lock; /*!< SAI locking object */ 223 224 __IO HAL_SAI_StateTypeDef State; /*!< SAI communication state */ 225 226 __IO uint32_t ErrorCode; /*!< SAI Error code */ 227 228 #if (USE_HAL_SAI_REGISTER_CALLBACKS == 1) 229 void (*RxCpltCallback)(struct __SAI_HandleTypeDef *hsai); /*!< SAI receive complete callback */ 230 void (*RxHalfCpltCallback)(struct __SAI_HandleTypeDef *hsai); /*!< SAI receive half complete callback */ 231 void (*TxCpltCallback)(struct __SAI_HandleTypeDef *hsai); /*!< SAI transmit complete callback */ 232 void (*TxHalfCpltCallback)(struct __SAI_HandleTypeDef *hsai); /*!< SAI transmit half complete callback */ 233 void (*ErrorCallback)(struct __SAI_HandleTypeDef *hsai); /*!< SAI error callback */ 234 void (*MspInitCallback)(struct __SAI_HandleTypeDef *hsai); /*!< SAI MSP init callback */ 235 void (*MspDeInitCallback)(struct __SAI_HandleTypeDef *hsai); /*!< SAI MSP de-init callback */ 236 #endif /* USE_HAL_SAI_REGISTER_CALLBACKS */ 237 } SAI_HandleTypeDef; 238 /** 239 * @} 240 */ 241 242 #if (USE_HAL_SAI_REGISTER_CALLBACKS == 1) 243 /** 244 * @brief SAI callback ID enumeration definition 245 */ 246 typedef enum 247 { 248 HAL_SAI_RX_COMPLETE_CB_ID = 0x00U, /*!< SAI receive complete callback ID */ 249 HAL_SAI_RX_HALFCOMPLETE_CB_ID = 0x01U, /*!< SAI receive half complete callback ID */ 250 HAL_SAI_TX_COMPLETE_CB_ID = 0x02U, /*!< SAI transmit complete callback ID */ 251 HAL_SAI_TX_HALFCOMPLETE_CB_ID = 0x03U, /*!< SAI transmit half complete callback ID */ 252 HAL_SAI_ERROR_CB_ID = 0x04U, /*!< SAI error callback ID */ 253 HAL_SAI_MSPINIT_CB_ID = 0x05U, /*!< SAI MSP init callback ID */ 254 HAL_SAI_MSPDEINIT_CB_ID = 0x06U /*!< SAI MSP de-init callback ID */ 255 } HAL_SAI_CallbackIDTypeDef; 256 257 /** 258 * @brief SAI callback pointer definition 259 */ 260 typedef void (*pSAI_CallbackTypeDef)(SAI_HandleTypeDef *hsai); 261 #endif /* USE_HAL_SAI_REGISTER_CALLBACKS */ 262 263 /** 264 * @} 265 */ 266 267 /* Exported constants --------------------------------------------------------*/ 268 /** @defgroup SAI_Exported_Constants SAI Exported Constants 269 * @{ 270 */ 271 272 /** @defgroup SAI_Error_Code SAI Error Code 273 * @{ 274 */ 275 #define HAL_SAI_ERROR_NONE 0x00000000U /*!< No error */ 276 #define HAL_SAI_ERROR_OVR 0x00000001U /*!< Overrun Error */ 277 #define HAL_SAI_ERROR_UDR 0x00000002U /*!< Underrun error */ 278 #define HAL_SAI_ERROR_AFSDET 0x00000004U /*!< Anticipated Frame synchronisation detection */ 279 #define HAL_SAI_ERROR_LFSDET 0x00000008U /*!< Late Frame synchronisation detection */ 280 #define HAL_SAI_ERROR_CNREADY 0x00000010U /*!< codec not ready */ 281 #define HAL_SAI_ERROR_WCKCFG 0x00000020U /*!< Wrong clock configuration */ 282 #define HAL_SAI_ERROR_TIMEOUT 0x00000040U /*!< Timeout error */ 283 #define HAL_SAI_ERROR_DMA 0x00000080U /*!< DMA error */ 284 #if (USE_HAL_SAI_REGISTER_CALLBACKS == 1) 285 #define HAL_SAI_ERROR_INVALID_CALLBACK 0x00000100U /*!< Invalid callback error */ 286 #endif /* USE_HAL_SAI_REGISTER_CALLBACKS */ 287 /** 288 * @} 289 */ 290 291 /** @defgroup SAI_Block_SyncExt SAI External synchronisation 292 * @{ 293 */ 294 #define SAI_SYNCEXT_DISABLE 0U 295 #define SAI_SYNCEXT_OUTBLOCKA_ENABLE 1U 296 #define SAI_SYNCEXT_OUTBLOCKB_ENABLE 2U 297 /** 298 * @} 299 */ 300 301 /** @defgroup SAI_Protocol SAI Supported protocol 302 * @{ 303 */ 304 #define SAI_I2S_STANDARD 0U 305 #define SAI_I2S_MSBJUSTIFIED 1U 306 #define SAI_I2S_LSBJUSTIFIED 2U 307 #define SAI_PCM_LONG 3U 308 #define SAI_PCM_SHORT 4U 309 /** 310 * @} 311 */ 312 313 /** @defgroup SAI_Protocol_DataSize SAI protocol data size 314 * @{ 315 */ 316 #define SAI_PROTOCOL_DATASIZE_16BIT 0U 317 #define SAI_PROTOCOL_DATASIZE_16BITEXTENDED 1U 318 #define SAI_PROTOCOL_DATASIZE_24BIT 2U 319 #define SAI_PROTOCOL_DATASIZE_32BIT 3U 320 /** 321 * @} 322 */ 323 324 /** @defgroup SAI_Audio_Frequency SAI Audio Frequency 325 * @{ 326 */ 327 #define SAI_AUDIO_FREQUENCY_192K 192000U 328 #define SAI_AUDIO_FREQUENCY_96K 96000U 329 #define SAI_AUDIO_FREQUENCY_48K 48000U 330 #define SAI_AUDIO_FREQUENCY_44K 44100U 331 #define SAI_AUDIO_FREQUENCY_32K 32000U 332 #define SAI_AUDIO_FREQUENCY_22K 22050U 333 #define SAI_AUDIO_FREQUENCY_16K 16000U 334 #define SAI_AUDIO_FREQUENCY_11K 11025U 335 #define SAI_AUDIO_FREQUENCY_8K 8000U 336 #define SAI_AUDIO_FREQUENCY_MCKDIV 0U 337 /** 338 * @} 339 */ 340 341 /** @defgroup SAI_Block_Mode SAI Block Mode 342 * @{ 343 */ 344 #define SAI_MODEMASTER_TX 0x00000000U 345 #define SAI_MODEMASTER_RX ((uint32_t)SAI_xCR1_MODE_0) 346 #define SAI_MODESLAVE_TX ((uint32_t)SAI_xCR1_MODE_1) 347 #define SAI_MODESLAVE_RX ((uint32_t)(SAI_xCR1_MODE_1 | SAI_xCR1_MODE_0)) 348 /** 349 * @} 350 */ 351 352 /** @defgroup SAI_Block_Protocol SAI Block Protocol 353 * @{ 354 */ 355 #define SAI_FREE_PROTOCOL 0x00000000U 356 #define SAI_SPDIF_PROTOCOL ((uint32_t)SAI_xCR1_PRTCFG_0) 357 #define SAI_AC97_PROTOCOL ((uint32_t)SAI_xCR1_PRTCFG_1) 358 /** 359 * @} 360 */ 361 362 /** @defgroup SAI_Block_Data_Size SAI Block Data Size 363 * @{ 364 */ 365 #define SAI_DATASIZE_8 ((uint32_t)SAI_xCR1_DS_1) 366 #define SAI_DATASIZE_10 ((uint32_t)(SAI_xCR1_DS_1 | SAI_xCR1_DS_0)) 367 #define SAI_DATASIZE_16 ((uint32_t)SAI_xCR1_DS_2) 368 #define SAI_DATASIZE_20 ((uint32_t)(SAI_xCR1_DS_2 | SAI_xCR1_DS_0)) 369 #define SAI_DATASIZE_24 ((uint32_t)(SAI_xCR1_DS_2 | SAI_xCR1_DS_1)) 370 #define SAI_DATASIZE_32 ((uint32_t)(SAI_xCR1_DS_2 | SAI_xCR1_DS_1 | SAI_xCR1_DS_0)) 371 /** 372 * @} 373 */ 374 375 /** @defgroup SAI_Block_MSB_LSB_transmission SAI Block MSB LSB transmission 376 * @{ 377 */ 378 #define SAI_FIRSTBIT_MSB 0x00000000U 379 #define SAI_FIRSTBIT_LSB ((uint32_t)SAI_xCR1_LSBFIRST) 380 /** 381 * @} 382 */ 383 384 /** @defgroup SAI_Block_Clock_Strobing SAI Block Clock Strobing 385 * @{ 386 */ 387 #define SAI_CLOCKSTROBING_FALLINGEDGE 0U 388 #define SAI_CLOCKSTROBING_RISINGEDGE 1U 389 /** 390 * @} 391 */ 392 393 /** @defgroup SAI_Block_Synchronization SAI Block Synchronization 394 * @{ 395 */ 396 #define SAI_ASYNCHRONOUS 0U /*!< Asynchronous */ 397 #define SAI_SYNCHRONOUS 1U /*!< Synchronous with other block of same SAI */ 398 #define SAI_SYNCHRONOUS_EXT_SAI1 2U /*!< Synchronous with other SAI, SAI1 */ 399 #define SAI_SYNCHRONOUS_EXT_SAI2 3U /*!< Synchronous with other SAI, SAI2 */ 400 /** 401 * @} 402 */ 403 404 /** @defgroup SAI_Block_Output_Drive SAI Block Output Drive 405 * @{ 406 */ 407 #define SAI_OUTPUTDRIVE_DISABLE 0x00000000U 408 #define SAI_OUTPUTDRIVE_ENABLE ((uint32_t)SAI_xCR1_OUTDRIV) 409 /** 410 * @} 411 */ 412 413 /** @defgroup SAI_Block_NoDivider SAI Block NoDivider 414 * @{ 415 */ 416 #define SAI_MASTERDIVIDER_ENABLE 0x00000000U 417 #define SAI_MASTERDIVIDER_DISABLE ((uint32_t)SAI_xCR1_NODIV) 418 /** 419 * @} 420 */ 421 422 /** @defgroup SAI_Block_FS_Definition SAI Block FS Definition 423 * @{ 424 */ 425 #define SAI_FS_STARTFRAME 0x00000000U 426 #define SAI_FS_CHANNEL_IDENTIFICATION ((uint32_t)SAI_xFRCR_FSDEF) 427 /** 428 * @} 429 */ 430 431 /** @defgroup SAI_Block_FS_Polarity SAI Block FS Polarity 432 * @{ 433 */ 434 #define SAI_FS_ACTIVE_LOW 0x00000000U 435 #define SAI_FS_ACTIVE_HIGH ((uint32_t)SAI_xFRCR_FSPOL) 436 /** 437 * @} 438 */ 439 440 /** @defgroup SAI_Block_FS_Offset SAI Block FS Offset 441 * @{ 442 */ 443 #define SAI_FS_FIRSTBIT 0x00000000U 444 #define SAI_FS_BEFOREFIRSTBIT ((uint32_t)SAI_xFRCR_FSOFF) 445 /** 446 * @} 447 */ 448 449 /** @defgroup SAI_Block_Slot_Size SAI Block Slot Size 450 * @{ 451 */ 452 #define SAI_SLOTSIZE_DATASIZE 0x00000000U 453 #define SAI_SLOTSIZE_16B ((uint32_t)SAI_xSLOTR_SLOTSZ_0) 454 #define SAI_SLOTSIZE_32B ((uint32_t)SAI_xSLOTR_SLOTSZ_1) 455 /** 456 * @} 457 */ 458 459 /** @defgroup SAI_Block_Slot_Active SAI Block Slot Active 460 * @{ 461 */ 462 #define SAI_SLOT_NOTACTIVE 0x00000000U 463 #define SAI_SLOTACTIVE_0 0x00000001U 464 #define SAI_SLOTACTIVE_1 0x00000002U 465 #define SAI_SLOTACTIVE_2 0x00000004U 466 #define SAI_SLOTACTIVE_3 0x00000008U 467 #define SAI_SLOTACTIVE_4 0x00000010U 468 #define SAI_SLOTACTIVE_5 0x00000020U 469 #define SAI_SLOTACTIVE_6 0x00000040U 470 #define SAI_SLOTACTIVE_7 0x00000080U 471 #define SAI_SLOTACTIVE_8 0x00000100U 472 #define SAI_SLOTACTIVE_9 0x00000200U 473 #define SAI_SLOTACTIVE_10 0x00000400U 474 #define SAI_SLOTACTIVE_11 0x00000800U 475 #define SAI_SLOTACTIVE_12 0x00001000U 476 #define SAI_SLOTACTIVE_13 0x00002000U 477 #define SAI_SLOTACTIVE_14 0x00004000U 478 #define SAI_SLOTACTIVE_15 0x00008000U 479 #define SAI_SLOTACTIVE_ALL 0x0000FFFFU 480 /** 481 * @} 482 */ 483 484 /** @defgroup SAI_Mono_Stereo_Mode SAI Mono Stereo Mode 485 * @{ 486 */ 487 #define SAI_STEREOMODE 0x00000000U 488 #define SAI_MONOMODE ((uint32_t)SAI_xCR1_MONO) 489 /** 490 * @} 491 */ 492 493 /** @defgroup SAI_TRIState_Management SAI TRIState Management 494 * @{ 495 */ 496 #define SAI_OUTPUT_NOTRELEASED 0x00000000U 497 #define SAI_OUTPUT_RELEASED ((uint32_t)SAI_xCR2_TRIS) 498 /** 499 * @} 500 */ 501 502 /** @defgroup SAI_Block_Fifo_Threshold SAI Block Fifo Threshold 503 * @{ 504 */ 505 #define SAI_FIFOTHRESHOLD_EMPTY 0x00000000U 506 #define SAI_FIFOTHRESHOLD_1QF ((uint32_t)(SAI_xCR2_FTH_0)) 507 #define SAI_FIFOTHRESHOLD_HF ((uint32_t)(SAI_xCR2_FTH_1)) 508 #define SAI_FIFOTHRESHOLD_3QF ((uint32_t)(SAI_xCR2_FTH_1 | SAI_xCR2_FTH_0)) 509 #define SAI_FIFOTHRESHOLD_FULL ((uint32_t)(SAI_xCR2_FTH_2)) 510 /** 511 * @} 512 */ 513 514 /** @defgroup SAI_Block_Companding_Mode SAI Block Companding Mode 515 * @{ 516 */ 517 #define SAI_NOCOMPANDING 0x00000000U 518 #define SAI_ULAW_1CPL_COMPANDING ((uint32_t)(SAI_xCR2_COMP_1)) 519 #define SAI_ALAW_1CPL_COMPANDING ((uint32_t)(SAI_xCR2_COMP_1 | SAI_xCR2_COMP_0)) 520 #define SAI_ULAW_2CPL_COMPANDING ((uint32_t)(SAI_xCR2_COMP_1 | SAI_xCR2_CPL)) 521 #define SAI_ALAW_2CPL_COMPANDING ((uint32_t)(SAI_xCR2_COMP_1 | SAI_xCR2_COMP_0 | SAI_xCR2_CPL)) 522 /** 523 * @} 524 */ 525 526 /** @defgroup SAI_Block_Mute_Value SAI Block Mute Value 527 * @{ 528 */ 529 #define SAI_ZERO_VALUE 0x00000000U 530 #define SAI_LAST_SENT_VALUE ((uint32_t)SAI_xCR2_MUTEVAL) 531 /** 532 * @} 533 */ 534 535 /** @defgroup SAI_Block_Interrupts_Definition SAI Block Interrupts Definition 536 * @{ 537 */ 538 #define SAI_IT_OVRUDR ((uint32_t)SAI_xIMR_OVRUDRIE) 539 #define SAI_IT_MUTEDET ((uint32_t)SAI_xIMR_MUTEDETIE) 540 #define SAI_IT_WCKCFG ((uint32_t)SAI_xIMR_WCKCFGIE) 541 #define SAI_IT_FREQ ((uint32_t)SAI_xIMR_FREQIE) 542 #define SAI_IT_CNRDY ((uint32_t)SAI_xIMR_CNRDYIE) 543 #define SAI_IT_AFSDET ((uint32_t)SAI_xIMR_AFSDETIE) 544 #define SAI_IT_LFSDET ((uint32_t)SAI_xIMR_LFSDETIE) 545 /** 546 * @} 547 */ 548 549 /** @defgroup SAI_Block_Flags_Definition SAI Block Flags Definition 550 * @{ 551 */ 552 #define SAI_FLAG_OVRUDR ((uint32_t)SAI_xSR_OVRUDR) 553 #define SAI_FLAG_MUTEDET ((uint32_t)SAI_xSR_MUTEDET) 554 #define SAI_FLAG_WCKCFG ((uint32_t)SAI_xSR_WCKCFG) 555 #define SAI_FLAG_FREQ ((uint32_t)SAI_xSR_FREQ) 556 #define SAI_FLAG_CNRDY ((uint32_t)SAI_xSR_CNRDY) 557 #define SAI_FLAG_AFSDET ((uint32_t)SAI_xSR_AFSDET) 558 #define SAI_FLAG_LFSDET ((uint32_t)SAI_xSR_LFSDET) 559 /** 560 * @} 561 */ 562 563 /** @defgroup SAI_Block_Fifo_Status_Level SAI Block Fifo Status Level 564 * @{ 565 */ 566 #define SAI_FIFOSTATUS_EMPTY 0x00000000U 567 #define SAI_FIFOSTATUS_LESS1QUARTERFULL 0x00010000U 568 #define SAI_FIFOSTATUS_1QUARTERFULL 0x00020000U 569 #define SAI_FIFOSTATUS_HALFFULL 0x00030000U 570 #define SAI_FIFOSTATUS_3QUARTERFULL 0x00040000U 571 #define SAI_FIFOSTATUS_FULL 0x00050000U 572 /** 573 * @} 574 */ 575 576 /** 577 * @} 578 */ 579 580 /* Exported macro ------------------------------------------------------------*/ 581 /** @defgroup SAI_Exported_Macros SAI Exported Macros 582 * @brief macros to handle interrupts and specific configurations 583 * @{ 584 */ 585 586 /** @brief Reset SAI handle state 587 * @param __HANDLE__ specifies the SAI Handle. 588 * @retval None 589 */ 590 #if (USE_HAL_SAI_REGISTER_CALLBACKS == 1) 591 #define __HAL_SAI_RESET_HANDLE_STATE(__HANDLE__) do{ \ 592 (__HANDLE__)->State = HAL_SAI_STATE_RESET; \ 593 (__HANDLE__)->MspInitCallback = NULL; \ 594 (__HANDLE__)->MspDeInitCallback = NULL; \ 595 } while(0U) 596 #else 597 #define __HAL_SAI_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_SAI_STATE_RESET) 598 #endif /* USE_HAL_SAI_REGISTER_CALLBACKS */ 599 600 /** @brief Enable or disable the specified SAI interrupts. 601 * @param __HANDLE__ specifies the SAI Handle. 602 * @param __INTERRUPT__ specifies the interrupt source to enable or disable. 603 * This parameter can be one of the following values: 604 * @arg SAI_IT_OVRUDR: Overrun underrun interrupt enable 605 * @arg SAI_IT_MUTEDET: Mute detection interrupt enable 606 * @arg SAI_IT_WCKCFG: Wrong Clock Configuration interrupt enable 607 * @arg SAI_IT_FREQ: FIFO request interrupt enable 608 * @arg SAI_IT_CNRDY: Codec not ready interrupt enable 609 * @arg SAI_IT_AFSDET: Anticipated frame synchronization detection interrupt enable 610 * @arg SAI_IT_LFSDET: Late frame synchronization detection interrupt enable 611 * @retval None 612 */ 613 #define __HAL_SAI_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->IMR |= (__INTERRUPT__)) 614 #define __HAL_SAI_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->IMR &= (~(__INTERRUPT__))) 615 616 /** @brief Check if the specified SAI interrupt source is enabled or disabled. 617 * @param __HANDLE__ specifies the SAI Handle. 618 * This parameter can be SAI where x: 1, 2, or 3 to select the SAI peripheral. 619 * @param __INTERRUPT__ specifies the SAI interrupt source to check. 620 * This parameter can be one of the following values: 621 * @arg SAI_IT_OVRUDR: Overrun underrun interrupt enable 622 * @arg SAI_IT_MUTEDET: Mute detection interrupt enable 623 * @arg SAI_IT_WCKCFG: Wrong Clock Configuration interrupt enable 624 * @arg SAI_IT_FREQ: FIFO request interrupt enable 625 * @arg SAI_IT_CNRDY: Codec not ready interrupt enable 626 * @arg SAI_IT_AFSDET: Anticipated frame synchronization detection interrupt enable 627 * @arg SAI_IT_LFSDET: Late frame synchronization detection interrupt enable 628 * @retval The new state of __INTERRUPT__ (TRUE or FALSE). 629 */ 630 #define __HAL_SAI_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->IMR & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET) 631 632 /** @brief Check whether the specified SAI flag is set or not. 633 * @param __HANDLE__ specifies the SAI Handle. 634 * @param __FLAG__ specifies the flag to check. 635 * This parameter can be one of the following values: 636 * @arg SAI_FLAG_OVRUDR: Overrun underrun flag. 637 * @arg SAI_FLAG_MUTEDET: Mute detection flag. 638 * @arg SAI_FLAG_WCKCFG: Wrong Clock Configuration flag. 639 * @arg SAI_FLAG_FREQ: FIFO request flag. 640 * @arg SAI_FLAG_CNRDY: Codec not ready flag. 641 * @arg SAI_FLAG_AFSDET: Anticipated frame synchronization detection flag. 642 * @arg SAI_FLAG_LFSDET: Late frame synchronization detection flag. 643 * @retval The new state of __FLAG__ (TRUE or FALSE). 644 */ 645 #define __HAL_SAI_GET_FLAG(__HANDLE__, __FLAG__) ((((__HANDLE__)->Instance->SR) & (__FLAG__)) == (__FLAG__)) 646 647 /** @brief Clear the specified SAI pending flag. 648 * @param __HANDLE__ specifies the SAI Handle. 649 * @param __FLAG__ specifies the flag to check. 650 * This parameter can be any combination of the following values: 651 * @arg SAI_FLAG_OVRUDR: Clear Overrun underrun 652 * @arg SAI_FLAG_MUTEDET: Clear Mute detection 653 * @arg SAI_FLAG_WCKCFG: Clear Wrong Clock Configuration 654 * @arg SAI_FLAG_FREQ: Clear FIFO request 655 * @arg SAI_FLAG_CNRDY: Clear Codec not ready 656 * @arg SAI_FLAG_AFSDET: Clear Anticipated frame synchronization detection 657 * @arg SAI_FLAG_LFSDET: Clear Late frame synchronization detection 658 * @retval None 659 */ 660 #define __HAL_SAI_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->CLRFR = (__FLAG__)) 661 662 /** @brief Enable SAI 663 * @param __HANDLE__ specifies the SAI Handle. 664 * @retval None 665 */ 666 #define __HAL_SAI_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 |= SAI_xCR1_SAIEN) 667 668 /** @brief Disable SAI 669 * @param __HANDLE__ specifies the SAI Handle. 670 * @retval None 671 */ 672 #define __HAL_SAI_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 &= ~SAI_xCR1_SAIEN) 673 674 /** 675 * @} 676 */ 677 678 /* Include HAL SAI Extension module */ 679 #include "stm32f4xx_hal_sai_ex.h" 680 681 /* Exported functions --------------------------------------------------------*/ 682 /** @addtogroup SAI_Exported_Functions 683 * @{ 684 */ 685 686 /* Initialization/de-initialization functions **********************************/ 687 /** @addtogroup SAI_Exported_Functions_Group1 688 * @{ 689 */ 690 HAL_StatusTypeDef HAL_SAI_InitProtocol(SAI_HandleTypeDef *hsai, uint32_t protocol, uint32_t datasize, uint32_t nbslot); 691 HAL_StatusTypeDef HAL_SAI_Init(SAI_HandleTypeDef *hsai); 692 HAL_StatusTypeDef HAL_SAI_DeInit(SAI_HandleTypeDef *hsai); 693 void HAL_SAI_MspInit(SAI_HandleTypeDef *hsai); 694 void HAL_SAI_MspDeInit(SAI_HandleTypeDef *hsai); 695 696 #if (USE_HAL_SAI_REGISTER_CALLBACKS == 1) 697 /* SAI callbacks register/unregister functions ********************************/ 698 HAL_StatusTypeDef HAL_SAI_RegisterCallback(SAI_HandleTypeDef *hsai, 699 HAL_SAI_CallbackIDTypeDef CallbackID, 700 pSAI_CallbackTypeDef pCallback); 701 HAL_StatusTypeDef HAL_SAI_UnRegisterCallback(SAI_HandleTypeDef *hsai, 702 HAL_SAI_CallbackIDTypeDef CallbackID); 703 #endif /* USE_HAL_SAI_REGISTER_CALLBACKS */ 704 /** 705 * @} 706 */ 707 708 /* I/O operation functions *****************************************************/ 709 /** @addtogroup SAI_Exported_Functions_Group2 710 * @{ 711 */ 712 /* Blocking mode: Polling */ 713 HAL_StatusTypeDef HAL_SAI_Transmit(SAI_HandleTypeDef *hsai, uint8_t *pData, uint16_t Size, uint32_t Timeout); 714 HAL_StatusTypeDef HAL_SAI_Receive(SAI_HandleTypeDef *hsai, uint8_t *pData, uint16_t Size, uint32_t Timeout); 715 716 /* Non-Blocking mode: Interrupt */ 717 HAL_StatusTypeDef HAL_SAI_Transmit_IT(SAI_HandleTypeDef *hsai, uint8_t *pData, uint16_t Size); 718 HAL_StatusTypeDef HAL_SAI_Receive_IT(SAI_HandleTypeDef *hsai, uint8_t *pData, uint16_t Size); 719 720 /* Non-Blocking mode: DMA */ 721 HAL_StatusTypeDef HAL_SAI_Transmit_DMA(SAI_HandleTypeDef *hsai, uint8_t *pData, uint16_t Size); 722 HAL_StatusTypeDef HAL_SAI_Receive_DMA(SAI_HandleTypeDef *hsai, uint8_t *pData, uint16_t Size); 723 HAL_StatusTypeDef HAL_SAI_DMAPause(SAI_HandleTypeDef *hsai); 724 HAL_StatusTypeDef HAL_SAI_DMAResume(SAI_HandleTypeDef *hsai); 725 HAL_StatusTypeDef HAL_SAI_DMAStop(SAI_HandleTypeDef *hsai); 726 727 /* Abort function */ 728 HAL_StatusTypeDef HAL_SAI_Abort(SAI_HandleTypeDef *hsai); 729 730 /* Mute management */ 731 HAL_StatusTypeDef HAL_SAI_EnableTxMuteMode(SAI_HandleTypeDef *hsai, uint16_t val); 732 HAL_StatusTypeDef HAL_SAI_DisableTxMuteMode(SAI_HandleTypeDef *hsai); 733 HAL_StatusTypeDef HAL_SAI_EnableRxMuteMode(SAI_HandleTypeDef *hsai, SAIcallback callback, uint16_t counter); 734 HAL_StatusTypeDef HAL_SAI_DisableRxMuteMode(SAI_HandleTypeDef *hsai); 735 736 /* SAI IRQHandler and Callbacks used in non blocking modes (Interrupt and DMA) */ 737 void HAL_SAI_IRQHandler(SAI_HandleTypeDef *hsai); 738 void HAL_SAI_TxHalfCpltCallback(SAI_HandleTypeDef *hsai); 739 void HAL_SAI_TxCpltCallback(SAI_HandleTypeDef *hsai); 740 void HAL_SAI_RxHalfCpltCallback(SAI_HandleTypeDef *hsai); 741 void HAL_SAI_RxCpltCallback(SAI_HandleTypeDef *hsai); 742 void HAL_SAI_ErrorCallback(SAI_HandleTypeDef *hsai); 743 /** 744 * @} 745 */ 746 747 /** @addtogroup SAI_Exported_Functions_Group3 748 * @{ 749 */ 750 /* Peripheral State functions ************************************************/ 751 HAL_SAI_StateTypeDef HAL_SAI_GetState(SAI_HandleTypeDef *hsai); 752 uint32_t HAL_SAI_GetError(SAI_HandleTypeDef *hsai); 753 /** 754 * @} 755 */ 756 757 /** 758 * @} 759 */ 760 761 /* Private macros ------------------------------------------------------------*/ 762 /** @addtogroup SAI_Private_Macros 763 * @{ 764 */ 765 #define IS_SAI_BLOCK_SYNCEXT(STATE) (((STATE) == SAI_SYNCEXT_DISABLE) ||\ 766 ((STATE) == SAI_SYNCEXT_OUTBLOCKA_ENABLE) ||\ 767 ((STATE) == SAI_SYNCEXT_OUTBLOCKB_ENABLE)) 768 769 #define IS_SAI_SUPPORTED_PROTOCOL(PROTOCOL) (((PROTOCOL) == SAI_I2S_STANDARD) ||\ 770 ((PROTOCOL) == SAI_I2S_MSBJUSTIFIED) ||\ 771 ((PROTOCOL) == SAI_I2S_LSBJUSTIFIED) ||\ 772 ((PROTOCOL) == SAI_PCM_LONG) ||\ 773 ((PROTOCOL) == SAI_PCM_SHORT)) 774 775 #define IS_SAI_PROTOCOL_DATASIZE(DATASIZE) (((DATASIZE) == SAI_PROTOCOL_DATASIZE_16BIT) ||\ 776 ((DATASIZE) == SAI_PROTOCOL_DATASIZE_16BITEXTENDED) ||\ 777 ((DATASIZE) == SAI_PROTOCOL_DATASIZE_24BIT) ||\ 778 ((DATASIZE) == SAI_PROTOCOL_DATASIZE_32BIT)) 779 780 #define IS_SAI_AUDIO_FREQUENCY(AUDIO) (((AUDIO) == SAI_AUDIO_FREQUENCY_192K) || ((AUDIO) == SAI_AUDIO_FREQUENCY_96K) || \ 781 ((AUDIO) == SAI_AUDIO_FREQUENCY_48K) || ((AUDIO) == SAI_AUDIO_FREQUENCY_44K) || \ 782 ((AUDIO) == SAI_AUDIO_FREQUENCY_32K) || ((AUDIO) == SAI_AUDIO_FREQUENCY_22K) || \ 783 ((AUDIO) == SAI_AUDIO_FREQUENCY_16K) || ((AUDIO) == SAI_AUDIO_FREQUENCY_11K) || \ 784 ((AUDIO) == SAI_AUDIO_FREQUENCY_8K) || ((AUDIO) == SAI_AUDIO_FREQUENCY_MCKDIV)) 785 786 #define IS_SAI_BLOCK_MODE(MODE) (((MODE) == SAI_MODEMASTER_TX) || \ 787 ((MODE) == SAI_MODEMASTER_RX) || \ 788 ((MODE) == SAI_MODESLAVE_TX) || \ 789 ((MODE) == SAI_MODESLAVE_RX)) 790 791 #define IS_SAI_BLOCK_PROTOCOL(PROTOCOL) (((PROTOCOL) == SAI_FREE_PROTOCOL) || \ 792 ((PROTOCOL) == SAI_AC97_PROTOCOL) || \ 793 ((PROTOCOL) == SAI_SPDIF_PROTOCOL)) 794 795 #define IS_SAI_BLOCK_DATASIZE(DATASIZE) (((DATASIZE) == SAI_DATASIZE_8) || \ 796 ((DATASIZE) == SAI_DATASIZE_10) || \ 797 ((DATASIZE) == SAI_DATASIZE_16) || \ 798 ((DATASIZE) == SAI_DATASIZE_20) || \ 799 ((DATASIZE) == SAI_DATASIZE_24) || \ 800 ((DATASIZE) == SAI_DATASIZE_32)) 801 802 #define IS_SAI_BLOCK_FIRST_BIT(BIT) (((BIT) == SAI_FIRSTBIT_MSB) || \ 803 ((BIT) == SAI_FIRSTBIT_LSB)) 804 805 #define IS_SAI_BLOCK_CLOCK_STROBING(CLOCK) (((CLOCK) == SAI_CLOCKSTROBING_FALLINGEDGE) || \ 806 ((CLOCK) == SAI_CLOCKSTROBING_RISINGEDGE)) 807 808 #define IS_SAI_BLOCK_SYNCHRO(SYNCHRO) (((SYNCHRO) == SAI_ASYNCHRONOUS) || \ 809 ((SYNCHRO) == SAI_SYNCHRONOUS) || \ 810 ((SYNCHRO) == SAI_SYNCHRONOUS_EXT_SAI1) ||\ 811 ((SYNCHRO) == SAI_SYNCHRONOUS_EXT_SAI2)) 812 813 #define IS_SAI_BLOCK_OUTPUT_DRIVE(DRIVE) (((DRIVE) == SAI_OUTPUTDRIVE_DISABLE) || \ 814 ((DRIVE) == SAI_OUTPUTDRIVE_ENABLE)) 815 816 #define IS_SAI_BLOCK_NODIVIDER(NODIVIDER) (((NODIVIDER) == SAI_MASTERDIVIDER_ENABLE) || \ 817 ((NODIVIDER) == SAI_MASTERDIVIDER_DISABLE)) 818 819 #define IS_SAI_BLOCK_MUTE_COUNTER(COUNTER) ((COUNTER) <= 63U) 820 821 #define IS_SAI_BLOCK_MUTE_VALUE(VALUE) (((VALUE) == SAI_ZERO_VALUE) || \ 822 ((VALUE) == SAI_LAST_SENT_VALUE)) 823 824 #define IS_SAI_BLOCK_COMPANDING_MODE(MODE) (((MODE) == SAI_NOCOMPANDING) || \ 825 ((MODE) == SAI_ULAW_1CPL_COMPANDING) || \ 826 ((MODE) == SAI_ALAW_1CPL_COMPANDING) || \ 827 ((MODE) == SAI_ULAW_2CPL_COMPANDING) || \ 828 ((MODE) == SAI_ALAW_2CPL_COMPANDING)) 829 830 #define IS_SAI_BLOCK_FIFO_THRESHOLD(THRESHOLD) (((THRESHOLD) == SAI_FIFOTHRESHOLD_EMPTY) || \ 831 ((THRESHOLD) == SAI_FIFOTHRESHOLD_1QF) || \ 832 ((THRESHOLD) == SAI_FIFOTHRESHOLD_HF) || \ 833 ((THRESHOLD) == SAI_FIFOTHRESHOLD_3QF) || \ 834 ((THRESHOLD) == SAI_FIFOTHRESHOLD_FULL)) 835 836 #define IS_SAI_BLOCK_TRISTATE_MANAGEMENT(STATE) (((STATE) == SAI_OUTPUT_NOTRELEASED) ||\ 837 ((STATE) == SAI_OUTPUT_RELEASED)) 838 839 #define IS_SAI_MONO_STEREO_MODE(MODE) (((MODE) == SAI_MONOMODE) ||\ 840 ((MODE) == SAI_STEREOMODE)) 841 842 #define IS_SAI_SLOT_ACTIVE(ACTIVE) ((ACTIVE) <= SAI_SLOTACTIVE_ALL) 843 844 #define IS_SAI_BLOCK_SLOT_NUMBER(NUMBER) ((1U <= (NUMBER)) && ((NUMBER) <= 16U)) 845 846 #define IS_SAI_BLOCK_SLOT_SIZE(SIZE) (((SIZE) == SAI_SLOTSIZE_DATASIZE) || \ 847 ((SIZE) == SAI_SLOTSIZE_16B) || \ 848 ((SIZE) == SAI_SLOTSIZE_32B)) 849 850 #define IS_SAI_BLOCK_FIRSTBIT_OFFSET(OFFSET) ((OFFSET) <= 24U) 851 852 #define IS_SAI_BLOCK_FS_OFFSET(OFFSET) (((OFFSET) == SAI_FS_FIRSTBIT) || \ 853 ((OFFSET) == SAI_FS_BEFOREFIRSTBIT)) 854 855 #define IS_SAI_BLOCK_FS_POLARITY(POLARITY) (((POLARITY) == SAI_FS_ACTIVE_LOW) || \ 856 ((POLARITY) == SAI_FS_ACTIVE_HIGH)) 857 858 #define IS_SAI_BLOCK_FS_DEFINITION(DEFINITION) (((DEFINITION) == SAI_FS_STARTFRAME) || \ 859 ((DEFINITION) == SAI_FS_CHANNEL_IDENTIFICATION)) 860 861 #define IS_SAI_BLOCK_MASTER_DIVIDER(DIVIDER) ((DIVIDER) <= 15U) 862 863 #define IS_SAI_BLOCK_FRAME_LENGTH(LENGTH) ((8U <= (LENGTH)) && ((LENGTH) <= 256U)) 864 865 #define IS_SAI_BLOCK_ACTIVE_FRAME(LENGTH) ((1U <= (LENGTH)) && ((LENGTH) <= 128U)) 866 867 /** 868 * @} 869 */ 870 871 /* Private functions ---------------------------------------------------------*/ 872 /** @defgroup SAI_Private_Functions SAI Private Functions 873 * @{ 874 */ 875 876 /** 877 * @} 878 */ 879 880 /** 881 * @} 882 */ 883 884 #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F446xx || STM32F469xx || STM32F479xx || STM32F413xx || STM32F423xx */ 885 886 /** 887 * @} 888 */ 889 890 #ifdef __cplusplus 891 } 892 #endif 893 894 #endif /* __STM32F4xx_HAL_SAI_H */ 895 896
