1 /** 2 ****************************************************************************** 3 * @file stm32f3xx_hal_i2s.h 4 * @author MCD Application Team 5 * @brief Header file of I2S HAL module. 6 ****************************************************************************** 7 * @attention 8 * 9 * Copyright (c) 2016 STMicroelectronics. 10 * All rights reserved. 11 * 12 * This software is licensed under terms that can be found in the LICENSE file 13 * in the root directory of this software component. 14 * If no LICENSE file comes with this software, it is provided AS-IS. 15 * 16 ****************************************************************************** 17 */ 18 19 /* Define to prevent recursive inclusion -------------------------------------*/ 20 #ifndef STM32F3xx_HAL_I2S_H 21 #define STM32F3xx_HAL_I2S_H 22 23 #ifdef __cplusplus 24 extern "C" { 25 #endif 26 27 /* Includes ------------------------------------------------------------------*/ 28 #include "stm32f3xx_hal_def.h" 29 30 #if defined(SPI_I2S_SUPPORT) 31 /** @addtogroup STM32F3xx_HAL_Driver 32 * @{ 33 */ 34 35 /** @addtogroup I2S 36 * @{ 37 */ 38 39 /* Exported types ------------------------------------------------------------*/ 40 /** @defgroup I2S_Exported_Types I2S Exported Types 41 * @{ 42 */ 43 44 /** 45 * @brief I2S Init structure definition 46 */ 47 typedef struct 48 { 49 uint32_t Mode; /*!< Specifies the I2S operating mode. 50 This parameter can be a value of @ref I2S_Mode */ 51 52 uint32_t Standard; /*!< Specifies the standard used for the I2S communication. 53 This parameter can be a value of @ref I2S_Standard */ 54 55 uint32_t DataFormat; /*!< Specifies the data format for the I2S communication. 56 This parameter can be a value of @ref I2S_Data_Format */ 57 58 uint32_t MCLKOutput; /*!< Specifies whether the I2S MCLK output is enabled or not. 59 This parameter can be a value of @ref I2S_MCLK_Output */ 60 61 uint32_t AudioFreq; /*!< Specifies the frequency selected for the I2S communication. 62 This parameter can be a value of @ref I2S_Audio_Frequency */ 63 64 uint32_t CPOL; /*!< Specifies the idle state of the I2S clock. 65 This parameter can be a value of @ref I2S_Clock_Polarity */ 66 67 uint32_t ClockSource; /*!< Specifies the I2S Clock Source. 68 This parameter can be a value of @ref I2S_Clock_Source */ 69 uint32_t FullDuplexMode; /*!< Specifies the I2S FullDuplex mode. 70 This parameter can be a value of @ref I2S_FullDuplex_Mode */ 71 } I2S_InitTypeDef; 72 73 /** 74 * @brief HAL State structures definition 75 */ 76 typedef enum 77 { 78 HAL_I2S_STATE_RESET = 0x00U, /*!< I2S not yet initialized or disabled */ 79 HAL_I2S_STATE_READY = 0x01U, /*!< I2S initialized and ready for use */ 80 HAL_I2S_STATE_BUSY = 0x02U, /*!< I2S internal process is ongoing */ 81 HAL_I2S_STATE_BUSY_TX = 0x03U, /*!< Data Transmission process is ongoing */ 82 HAL_I2S_STATE_BUSY_RX = 0x04U, /*!< Data Reception process is ongoing */ 83 HAL_I2S_STATE_BUSY_TX_RX = 0x05U, /*!< Data Transmission and Reception process is ongoing */ 84 HAL_I2S_STATE_TIMEOUT = 0x06U, /*!< I2S timeout state */ 85 HAL_I2S_STATE_ERROR = 0x07U /*!< I2S error state */ 86 } HAL_I2S_StateTypeDef; 87 88 /** 89 * @brief I2S handle Structure definition 90 */ 91 typedef struct __I2S_HandleTypeDef 92 { 93 SPI_TypeDef *Instance; /*!< I2S registers base address */ 94 95 I2S_InitTypeDef Init; /*!< I2S communication parameters */ 96 97 uint16_t *pTxBuffPtr; /*!< Pointer to I2S Tx transfer buffer */ 98 99 __IO uint16_t TxXferSize; /*!< I2S Tx transfer size */ 100 101 __IO uint16_t TxXferCount; /*!< I2S Tx transfer Counter */ 102 103 uint16_t *pRxBuffPtr; /*!< Pointer to I2S Rx transfer buffer */ 104 105 __IO uint16_t RxXferSize; /*!< I2S Rx transfer size */ 106 107 __IO uint16_t RxXferCount; /*!< I2S Rx transfer counter 108 (This field is initialized at the 109 same value as transfer size at the 110 beginning of the transfer and 111 decremented when a sample is received 112 NbSamplesReceived = RxBufferSize-RxBufferCount) */ 113 void (*IrqHandlerISR)(struct __I2S_HandleTypeDef *hi2s); /*!< I2S function pointer on IrqHandler */ 114 115 DMA_HandleTypeDef *hdmatx; /*!< I2S Tx DMA handle parameters */ 116 117 DMA_HandleTypeDef *hdmarx; /*!< I2S Rx DMA handle parameters */ 118 119 __IO HAL_LockTypeDef Lock; /*!< I2S locking object */ 120 121 __IO HAL_I2S_StateTypeDef State; /*!< I2S communication state */ 122 123 __IO uint32_t ErrorCode; /*!< I2S Error code 124 This parameter can be a value of @ref I2S_Error */ 125 126 #if (USE_HAL_I2S_REGISTER_CALLBACKS == 1U) 127 void (* TxCpltCallback)(struct __I2S_HandleTypeDef *hi2s); /*!< I2S Tx Completed callback */ 128 void (* RxCpltCallback)(struct __I2S_HandleTypeDef *hi2s); /*!< I2S Rx Completed callback */ 129 void (* TxRxCpltCallback)(struct __I2S_HandleTypeDef *hi2s); /*!< I2S TxRx Completed callback */ 130 void (* TxHalfCpltCallback)(struct __I2S_HandleTypeDef *hi2s); /*!< I2S Tx Half Completed callback */ 131 void (* RxHalfCpltCallback)(struct __I2S_HandleTypeDef *hi2s); /*!< I2S Rx Half Completed callback */ 132 void (* TxRxHalfCpltCallback)(struct __I2S_HandleTypeDef *hi2s); /*!< I2S TxRx Half Completed callback */ 133 void (* ErrorCallback)(struct __I2S_HandleTypeDef *hi2s); /*!< I2S Error callback */ 134 void (* MspInitCallback)(struct __I2S_HandleTypeDef *hi2s); /*!< I2S Msp Init callback */ 135 void (* MspDeInitCallback)(struct __I2S_HandleTypeDef *hi2s); /*!< I2S Msp DeInit callback */ 136 137 #endif /* USE_HAL_I2S_REGISTER_CALLBACKS */ 138 } I2S_HandleTypeDef; 139 140 #if (USE_HAL_I2S_REGISTER_CALLBACKS == 1U) 141 /** 142 * @brief HAL I2S Callback ID enumeration definition 143 */ 144 typedef enum 145 { 146 HAL_I2S_TX_COMPLETE_CB_ID = 0x00U, /*!< I2S Tx Completed callback ID */ 147 HAL_I2S_RX_COMPLETE_CB_ID = 0x01U, /*!< I2S Rx Completed callback ID */ 148 HAL_I2S_TX_RX_COMPLETE_CB_ID = 0x02U, /*!< I2S TxRx Completed callback ID */ 149 HAL_I2S_TX_HALF_COMPLETE_CB_ID = 0x03U, /*!< I2S Tx Half Completed callback ID */ 150 HAL_I2S_RX_HALF_COMPLETE_CB_ID = 0x04U, /*!< I2S Rx Half Completed callback ID */ 151 HAL_I2S_TX_RX_HALF_COMPLETE_CB_ID = 0x05U, /*!< I2S TxRx Half Completed callback ID */ 152 HAL_I2S_ERROR_CB_ID = 0x06U, /*!< I2S Error callback ID */ 153 HAL_I2S_MSPINIT_CB_ID = 0x07U, /*!< I2S Msp Init callback ID */ 154 HAL_I2S_MSPDEINIT_CB_ID = 0x08U /*!< I2S Msp DeInit callback ID */ 155 156 } HAL_I2S_CallbackIDTypeDef; 157 158 /** 159 * @brief HAL I2S Callback pointer definition 160 */ 161 typedef void (*pI2S_CallbackTypeDef)(I2S_HandleTypeDef *hi2s); /*!< pointer to an I2S callback function */ 162 163 #endif /* USE_HAL_I2S_REGISTER_CALLBACKS */ 164 /** 165 * @} 166 */ 167 168 /* Exported constants --------------------------------------------------------*/ 169 /** @defgroup I2S_Exported_Constants I2S Exported Constants 170 * @{ 171 */ 172 /** @defgroup I2S_Error I2S Error 173 * @{ 174 */ 175 #define HAL_I2S_ERROR_NONE (0x00000000U) /*!< No error */ 176 #define HAL_I2S_ERROR_TIMEOUT (0x00000001U) /*!< Timeout error */ 177 #define HAL_I2S_ERROR_OVR (0x00000002U) /*!< OVR error */ 178 #define HAL_I2S_ERROR_UDR (0x00000004U) /*!< UDR error */ 179 #define HAL_I2S_ERROR_DMA (0x00000008U) /*!< DMA transfer error */ 180 #define HAL_I2S_ERROR_PRESCALER (0x00000010U) /*!< Prescaler Calculation error */ 181 #if (USE_HAL_I2S_REGISTER_CALLBACKS == 1U) 182 #define HAL_I2S_ERROR_INVALID_CALLBACK (0x00000020U) /*!< Invalid Callback error */ 183 #endif /* USE_HAL_I2S_REGISTER_CALLBACKS */ 184 #define HAL_I2S_ERROR_BUSY_LINE_RX (0x00000040U) /*!< Busy Rx Line error */ 185 /** 186 * @} 187 */ 188 189 /** @defgroup I2S_Mode I2S Mode 190 * @{ 191 */ 192 #define I2S_MODE_SLAVE_TX (0x00000000U) 193 #define I2S_MODE_SLAVE_RX (SPI_I2SCFGR_I2SCFG_0) 194 #define I2S_MODE_MASTER_TX (SPI_I2SCFGR_I2SCFG_1) 195 #define I2S_MODE_MASTER_RX ((SPI_I2SCFGR_I2SCFG_0 | SPI_I2SCFGR_I2SCFG_1)) 196 /** 197 * @} 198 */ 199 200 /** @defgroup I2S_Standard I2S Standard 201 * @{ 202 */ 203 #define I2S_STANDARD_PHILIPS (0x00000000U) 204 #define I2S_STANDARD_MSB (SPI_I2SCFGR_I2SSTD_0) 205 #define I2S_STANDARD_LSB (SPI_I2SCFGR_I2SSTD_1) 206 #define I2S_STANDARD_PCM_SHORT ((SPI_I2SCFGR_I2SSTD_0 | SPI_I2SCFGR_I2SSTD_1)) 207 #define I2S_STANDARD_PCM_LONG ((SPI_I2SCFGR_I2SSTD_0 | SPI_I2SCFGR_I2SSTD_1 | SPI_I2SCFGR_PCMSYNC)) 208 /** 209 * @} 210 */ 211 212 /** @defgroup I2S_Data_Format I2S Data Format 213 * @{ 214 */ 215 #define I2S_DATAFORMAT_16B (0x00000000U) 216 #define I2S_DATAFORMAT_16B_EXTENDED (SPI_I2SCFGR_CHLEN) 217 #define I2S_DATAFORMAT_24B ((SPI_I2SCFGR_CHLEN | SPI_I2SCFGR_DATLEN_0)) 218 #define I2S_DATAFORMAT_32B ((SPI_I2SCFGR_CHLEN | SPI_I2SCFGR_DATLEN_1)) 219 /** 220 * @} 221 */ 222 223 /** @defgroup I2S_MCLK_Output I2S MCLK Output 224 * @{ 225 */ 226 #define I2S_MCLKOUTPUT_ENABLE (SPI_I2SPR_MCKOE) 227 #define I2S_MCLKOUTPUT_DISABLE (0x00000000U) 228 /** 229 * @} 230 */ 231 232 /** @defgroup I2S_Audio_Frequency I2S Audio Frequency 233 * @{ 234 */ 235 #define I2S_AUDIOFREQ_192K (192000U) 236 #define I2S_AUDIOFREQ_96K (96000U) 237 #define I2S_AUDIOFREQ_48K (48000U) 238 #define I2S_AUDIOFREQ_44K (44100U) 239 #define I2S_AUDIOFREQ_32K (32000U) 240 #define I2S_AUDIOFREQ_22K (22050U) 241 #define I2S_AUDIOFREQ_16K (16000U) 242 #define I2S_AUDIOFREQ_11K (11025U) 243 #define I2S_AUDIOFREQ_8K (8000U) 244 #define I2S_AUDIOFREQ_DEFAULT (2U) 245 /** 246 * @} 247 */ 248 249 /** @defgroup I2S_FullDuplex_Mode I2S FullDuplex Mode 250 * @{ 251 */ 252 #define I2S_FULLDUPLEXMODE_DISABLE (0x00000000U) 253 #define I2S_FULLDUPLEXMODE_ENABLE (0x00000001U) 254 /** 255 * @} 256 */ 257 258 /** @defgroup I2S_Clock_Polarity I2S Clock Polarity 259 * @{ 260 */ 261 #define I2S_CPOL_LOW (0x00000000U) 262 #define I2S_CPOL_HIGH (SPI_I2SCFGR_CKPOL) 263 /** 264 * @} 265 */ 266 267 /** @defgroup I2S_Interrupts_Definition I2S Interrupts Definition 268 * @{ 269 */ 270 #define I2S_IT_TXE SPI_CR2_TXEIE 271 #define I2S_IT_RXNE SPI_CR2_RXNEIE 272 #define I2S_IT_ERR SPI_CR2_ERRIE 273 /** 274 * @} 275 */ 276 277 /** @defgroup I2S_Flags_Definition I2S Flags Definition 278 * @{ 279 */ 280 #define I2S_FLAG_TXE SPI_SR_TXE 281 #define I2S_FLAG_RXNE SPI_SR_RXNE 282 283 #define I2S_FLAG_UDR SPI_SR_UDR 284 #define I2S_FLAG_OVR SPI_SR_OVR 285 #define I2S_FLAG_FRE SPI_SR_FRE 286 287 #define I2S_FLAG_CHSIDE SPI_SR_CHSIDE 288 #define I2S_FLAG_BSY SPI_SR_BSY 289 290 #define I2S_FLAG_MASK (SPI_SR_RXNE\ 291 | SPI_SR_TXE | SPI_SR_UDR | SPI_SR_OVR | SPI_SR_FRE | SPI_SR_CHSIDE | SPI_SR_BSY) 292 /** 293 * @} 294 */ 295 296 /** @defgroup I2S_Clock_Source I2S Clock Source Definition 297 * @{ 298 */ 299 #define I2S_CLOCK_EXTERNAL (0x00000001U) 300 #define I2S_CLOCK_SYSCLK (0x00000002U) 301 /** 302 * @} 303 */ 304 /** 305 * @} 306 */ 307 308 /* Exported macros -----------------------------------------------------------*/ 309 /** @defgroup I2S_Exported_macros I2S Exported Macros 310 * @{ 311 */ 312 313 /** @brief Reset I2S handle state 314 * @param __HANDLE__ specifies the I2S Handle. 315 * @retval None 316 */ 317 #if (USE_HAL_I2S_REGISTER_CALLBACKS == 1U) 318 #define __HAL_I2S_RESET_HANDLE_STATE(__HANDLE__) do{ \ 319 (__HANDLE__)->State = HAL_I2S_STATE_RESET; \ 320 (__HANDLE__)->MspInitCallback = NULL; \ 321 (__HANDLE__)->MspDeInitCallback = NULL; \ 322 } while(0) 323 #else 324 #define __HAL_I2S_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_I2S_STATE_RESET) 325 #endif /* USE_HAL_I2S_REGISTER_CALLBACKS */ 326 327 /** @brief Enable the specified SPI peripheral (in I2S mode). 328 * @param __HANDLE__ specifies the I2S Handle. 329 * @retval None 330 */ 331 #define __HAL_I2S_ENABLE(__HANDLE__) (SET_BIT((__HANDLE__)->Instance->I2SCFGR, SPI_I2SCFGR_I2SE)) 332 333 /** @brief Disable the specified SPI peripheral (in I2S mode). 334 * @param __HANDLE__ specifies the I2S Handle. 335 * @retval None 336 */ 337 #define __HAL_I2S_DISABLE(__HANDLE__) (CLEAR_BIT((__HANDLE__)->Instance->I2SCFGR, SPI_I2SCFGR_I2SE)) 338 339 /** @brief Enable the specified I2S interrupts. 340 * @param __HANDLE__ specifies the I2S Handle. 341 * @param __INTERRUPT__ specifies the interrupt source to enable or disable. 342 * This parameter can be one of the following values: 343 * @arg I2S_IT_TXE: Tx buffer empty interrupt enable 344 * @arg I2S_IT_RXNE: RX buffer not empty interrupt enable 345 * @arg I2S_IT_ERR: Error interrupt enable 346 * @retval None 347 */ 348 #define __HAL_I2S_ENABLE_IT(__HANDLE__, __INTERRUPT__) (SET_BIT((__HANDLE__)->Instance->CR2,(__INTERRUPT__))) 349 350 /** @brief Disable the specified I2S interrupts. 351 * @param __HANDLE__ specifies the I2S Handle. 352 * @param __INTERRUPT__ specifies the interrupt source to enable or disable. 353 * This parameter can be one of the following values: 354 * @arg I2S_IT_TXE: Tx buffer empty interrupt enable 355 * @arg I2S_IT_RXNE: RX buffer not empty interrupt enable 356 * @arg I2S_IT_ERR: Error interrupt enable 357 * @retval None 358 */ 359 #define __HAL_I2S_DISABLE_IT(__HANDLE__, __INTERRUPT__) (CLEAR_BIT((__HANDLE__)->Instance->CR2,(__INTERRUPT__))) 360 361 /** @brief Checks if the specified I2S interrupt source is enabled or disabled. 362 * @param __HANDLE__ specifies the I2S Handle. 363 * This parameter can be I2S where x: 1, 2, or 3 to select the I2S peripheral. 364 * @param __INTERRUPT__ specifies the I2S interrupt source to check. 365 * This parameter can be one of the following values: 366 * @arg I2S_IT_TXE: Tx buffer empty interrupt enable 367 * @arg I2S_IT_RXNE: RX buffer not empty interrupt enable 368 * @arg I2S_IT_ERR: Error interrupt enable 369 * @retval The new state of __IT__ (TRUE or FALSE). 370 */ 371 #define __HAL_I2S_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->CR2\ 372 & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET) 373 374 /** @brief Checks whether the specified I2S flag is set or not. 375 * @param __HANDLE__ specifies the I2S Handle. 376 * @param __FLAG__ specifies the flag to check. 377 * This parameter can be one of the following values: 378 * @arg I2S_FLAG_RXNE: Receive buffer not empty flag 379 * @arg I2S_FLAG_TXE: Transmit buffer empty flag 380 * @arg I2S_FLAG_UDR: Underrun flag 381 * @arg I2S_FLAG_OVR: Overrun flag 382 * @arg I2S_FLAG_FRE: Frame error flag 383 * @arg I2S_FLAG_CHSIDE: Channel Side flag 384 * @arg I2S_FLAG_BSY: Busy flag 385 * @retval The new state of __FLAG__ (TRUE or FALSE). 386 */ 387 #define __HAL_I2S_GET_FLAG(__HANDLE__, __FLAG__) ((((__HANDLE__)->Instance->SR) & (__FLAG__)) == (__FLAG__)) 388 389 /** @brief Clears the I2S OVR pending flag. 390 * @param __HANDLE__ specifies the I2S Handle. 391 * @retval None 392 */ 393 #define __HAL_I2S_CLEAR_OVRFLAG(__HANDLE__) do{ \ 394 __IO uint32_t tmpreg_ovr = 0x00U; \ 395 tmpreg_ovr = (__HANDLE__)->Instance->DR; \ 396 tmpreg_ovr = (__HANDLE__)->Instance->SR; \ 397 UNUSED(tmpreg_ovr); \ 398 }while(0U) 399 /** @brief Clears the I2S UDR pending flag. 400 * @param __HANDLE__ specifies the I2S Handle. 401 * @retval None 402 */ 403 #define __HAL_I2S_CLEAR_UDRFLAG(__HANDLE__) do{\ 404 __IO uint32_t tmpreg_udr = 0x00U;\ 405 tmpreg_udr = ((__HANDLE__)->Instance->SR);\ 406 UNUSED(tmpreg_udr); \ 407 }while(0U) 408 /** @brief Flush the I2S DR Register. 409 * @param __HANDLE__ specifies the I2S Handle. 410 * @retval None 411 */ 412 #define __HAL_I2S_FLUSH_RX_DR(__HANDLE__) do{\ 413 __IO uint32_t tmpreg_dr = 0x00U;\ 414 tmpreg_dr = ((__HANDLE__)->Instance->DR);\ 415 UNUSED(tmpreg_dr); \ 416 }while(0U) 417 /** 418 * @} 419 */ 420 421 /* Include I2S Extension module */ 422 #include "stm32f3xx_hal_i2s_ex.h" 423 424 /* Exported functions --------------------------------------------------------*/ 425 /** @addtogroup I2S_Exported_Functions 426 * @{ 427 */ 428 429 /** @addtogroup I2S_Exported_Functions_Group1 430 * @{ 431 */ 432 /* Initialization/de-initialization functions ********************************/ 433 HAL_StatusTypeDef HAL_I2S_Init(I2S_HandleTypeDef *hi2s); 434 HAL_StatusTypeDef HAL_I2S_DeInit(I2S_HandleTypeDef *hi2s); 435 void HAL_I2S_MspInit(I2S_HandleTypeDef *hi2s); 436 void HAL_I2S_MspDeInit(I2S_HandleTypeDef *hi2s); 437 438 /* Callbacks Register/UnRegister functions ***********************************/ 439 #if (USE_HAL_I2S_REGISTER_CALLBACKS == 1U) 440 HAL_StatusTypeDef HAL_I2S_RegisterCallback(I2S_HandleTypeDef *hi2s, HAL_I2S_CallbackIDTypeDef CallbackID, 441 pI2S_CallbackTypeDef pCallback); 442 HAL_StatusTypeDef HAL_I2S_UnRegisterCallback(I2S_HandleTypeDef *hi2s, HAL_I2S_CallbackIDTypeDef CallbackID); 443 #endif /* USE_HAL_I2S_REGISTER_CALLBACKS */ 444 /** 445 * @} 446 */ 447 448 /** @addtogroup I2S_Exported_Functions_Group2 449 * @{ 450 */ 451 /* I/O operation functions ***************************************************/ 452 /* Blocking mode: Polling */ 453 HAL_StatusTypeDef HAL_I2S_Transmit(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size, uint32_t Timeout); 454 HAL_StatusTypeDef HAL_I2S_Receive(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size, uint32_t Timeout); 455 456 /* Non-Blocking mode: Interrupt */ 457 HAL_StatusTypeDef HAL_I2S_Transmit_IT(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size); 458 HAL_StatusTypeDef HAL_I2S_Receive_IT(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size); 459 void HAL_I2S_IRQHandler(I2S_HandleTypeDef *hi2s); 460 461 /* Non-Blocking mode: DMA */ 462 HAL_StatusTypeDef HAL_I2S_Transmit_DMA(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size); 463 HAL_StatusTypeDef HAL_I2S_Receive_DMA(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size); 464 465 HAL_StatusTypeDef HAL_I2S_DMAPause(I2S_HandleTypeDef *hi2s); 466 HAL_StatusTypeDef HAL_I2S_DMAResume(I2S_HandleTypeDef *hi2s); 467 HAL_StatusTypeDef HAL_I2S_DMAStop(I2S_HandleTypeDef *hi2s); 468 469 /* Callbacks used in non blocking modes (Interrupt and DMA) *******************/ 470 void HAL_I2S_TxHalfCpltCallback(I2S_HandleTypeDef *hi2s); 471 void HAL_I2S_TxCpltCallback(I2S_HandleTypeDef *hi2s); 472 void HAL_I2S_RxHalfCpltCallback(I2S_HandleTypeDef *hi2s); 473 void HAL_I2S_RxCpltCallback(I2S_HandleTypeDef *hi2s); 474 void HAL_I2S_ErrorCallback(I2S_HandleTypeDef *hi2s); 475 /** 476 * @} 477 */ 478 479 /** @addtogroup I2S_Exported_Functions_Group3 480 * @{ 481 */ 482 /* Peripheral Control and State functions ************************************/ 483 HAL_I2S_StateTypeDef HAL_I2S_GetState(I2S_HandleTypeDef *hi2s); 484 uint32_t HAL_I2S_GetError(I2S_HandleTypeDef *hi2s); 485 /** 486 * @} 487 */ 488 489 /** 490 * @} 491 */ 492 493 /* Private types -------------------------------------------------------------*/ 494 /* Private variables ---------------------------------------------------------*/ 495 /* Private constants ---------------------------------------------------------*/ 496 /* Private macros ------------------------------------------------------------*/ 497 /** @defgroup I2S_Private_Macros I2S Private Macros 498 * @{ 499 */ 500 501 /** @brief Check whether the specified SPI flag is set or not. 502 * @param __SR__ copy of I2S SR register. 503 * @param __FLAG__ specifies the flag to check. 504 * This parameter can be one of the following values: 505 * @arg I2S_FLAG_RXNE: Receive buffer not empty flag 506 * @arg I2S_FLAG_TXE: Transmit buffer empty flag 507 * @arg I2S_FLAG_UDR: Underrun error flag 508 * @arg I2S_FLAG_OVR: Overrun flag 509 * @arg I2S_FLAG_CHSIDE: Channel side flag 510 * @arg I2S_FLAG_BSY: Busy flag 511 * @retval SET or RESET. 512 */ 513 #define I2S_CHECK_FLAG(__SR__, __FLAG__) ((((__SR__)\ 514 & ((__FLAG__) & I2S_FLAG_MASK)) == ((__FLAG__) & I2S_FLAG_MASK)) ? SET : RESET) 515 516 /** @brief Check whether the specified SPI Interrupt is set or not. 517 * @param __CR2__ copy of I2S CR2 register. 518 * @param __INTERRUPT__ specifies the SPI interrupt source to check. 519 * This parameter can be one of the following values: 520 * @arg I2S_IT_TXE: Tx buffer empty interrupt enable 521 * @arg I2S_IT_RXNE: RX buffer not empty interrupt enable 522 * @arg I2S_IT_ERR: Error interrupt enable 523 * @retval SET or RESET. 524 */ 525 #define I2S_CHECK_IT_SOURCE(__CR2__, __INTERRUPT__) ((((__CR2__)\ 526 & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET) 527 528 /** @brief Checks if I2S Mode parameter is in allowed range. 529 * @param __MODE__ specifies the I2S Mode. 530 * This parameter can be a value of @ref I2S_Mode 531 * @retval None 532 */ 533 #define IS_I2S_MODE(__MODE__) (((__MODE__) == I2S_MODE_SLAVE_TX) || \ 534 ((__MODE__) == I2S_MODE_SLAVE_RX) || \ 535 ((__MODE__) == I2S_MODE_MASTER_TX) || \ 536 ((__MODE__) == I2S_MODE_MASTER_RX)) 537 538 #define IS_I2S_STANDARD(__STANDARD__) (((__STANDARD__) == I2S_STANDARD_PHILIPS) || \ 539 ((__STANDARD__) == I2S_STANDARD_MSB) || \ 540 ((__STANDARD__) == I2S_STANDARD_LSB) || \ 541 ((__STANDARD__) == I2S_STANDARD_PCM_SHORT) || \ 542 ((__STANDARD__) == I2S_STANDARD_PCM_LONG)) 543 544 #define IS_I2S_DATA_FORMAT(__FORMAT__) (((__FORMAT__) == I2S_DATAFORMAT_16B) || \ 545 ((__FORMAT__) == I2S_DATAFORMAT_16B_EXTENDED) || \ 546 ((__FORMAT__) == I2S_DATAFORMAT_24B) || \ 547 ((__FORMAT__) == I2S_DATAFORMAT_32B)) 548 549 #define IS_I2S_MCLK_OUTPUT(__OUTPUT__) (((__OUTPUT__) == I2S_MCLKOUTPUT_ENABLE) || \ 550 ((__OUTPUT__) == I2S_MCLKOUTPUT_DISABLE)) 551 552 #define IS_I2S_AUDIO_FREQ(__FREQ__) ((((__FREQ__) >= I2S_AUDIOFREQ_8K) && \ 553 ((__FREQ__) <= I2S_AUDIOFREQ_192K)) || \ 554 ((__FREQ__) == I2S_AUDIOFREQ_DEFAULT)) 555 556 #define IS_I2S_FULLDUPLEX_MODE(MODE) (((MODE) == I2S_FULLDUPLEXMODE_DISABLE) || \ 557 ((MODE) == I2S_FULLDUPLEXMODE_ENABLE)) 558 559 /** @brief Checks if I2S Serial clock steady state parameter is in allowed range. 560 * @param __CPOL__ specifies the I2S serial clock steady state. 561 * This parameter can be a value of @ref I2S_Clock_Polarity 562 * @retval None 563 */ 564 #define IS_I2S_CPOL(__CPOL__) (((__CPOL__) == I2S_CPOL_LOW) || \ 565 ((__CPOL__) == I2S_CPOL_HIGH)) 566 567 #define IS_I2S_CLOCKSOURCE(CLOCK) (((CLOCK) == I2S_CLOCK_EXTERNAL) || \ 568 ((CLOCK) == I2S_CLOCK_SYSCLK)) 569 /** 570 * @} 571 */ 572 573 /** 574 * @} 575 */ 576 577 /** 578 * @} 579 */ 580 #endif /* SPI_I2S_SUPPORT */ 581 582 #ifdef __cplusplus 583 } 584 #endif 585 586 #endif /* STM32F3xx_HAL_I2S_H */ 587 588