1 /** 2 ****************************************************************************** 3 * @file stm32f3xx_hal_dma_ex.h 4 * @author MCD Application Team 5 * @brief Header file of DMA HAL extension module. 6 ****************************************************************************** 7 * @attention 8 * 9 * Copyright (c) 2016 STMicroelectronics. 10 * All rights reserved. 11 * 12 * This software is licensed under terms that can be found in the LICENSE file in 13 * the root directory of this software component. 14 * If no LICENSE file comes with this software, it is provided AS-IS. 15 * 16 ****************************************************************************** 17 */ 18 19 /* Define to prevent recursive inclusion -------------------------------------*/ 20 #ifndef __STM32F3xx_HAL_DMA_EX_H 21 #define __STM32F3xx_HAL_DMA_EX_H 22 23 #ifdef __cplusplus 24 extern "C" { 25 #endif 26 27 /* Includes ------------------------------------------------------------------*/ 28 #include "stm32f3xx_hal_def.h" 29 30 /** @addtogroup STM32F3xx_HAL_Driver 31 * @{ 32 */ 33 34 /** @addtogroup DMAEx 35 * @{ 36 */ 37 38 /* Exported types ------------------------------------------------------------*/ 39 /* Exported constants --------------------------------------------------------*/ 40 /* Exported macro ------------------------------------------------------------*/ 41 /** @defgroup DMAEx_Exported_Macros DMA Extended Exported Macros 42 * @{ 43 */ 44 /* Interrupt & Flag management */ 45 46 #if defined(STM32F302xE) || defined(STM32F303xE) || defined(STM32F398xx) || \ 47 defined(STM32F302xC) || defined(STM32F303xC) || defined(STM32F358xx) || \ 48 defined(STM32F373xC) || defined(STM32F378xx) 49 /** 50 * @brief Returns the current DMA Channel transfer complete flag. 51 * @param __HANDLE__ DMA handle 52 * @retval The specified transfer complete flag index. 53 */ 54 #define __HAL_DMA_GET_TC_FLAG_INDEX(__HANDLE__) \ 55 (((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel1))? DMA_FLAG_TC1 :\ 56 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel2))? DMA_FLAG_TC2 :\ 57 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel3))? DMA_FLAG_TC3 :\ 58 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel4))? DMA_FLAG_TC4 :\ 59 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel5))? DMA_FLAG_TC5 :\ 60 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel6))? DMA_FLAG_TC6 :\ 61 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel7))? DMA_FLAG_TC7 :\ 62 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel1))? DMA_FLAG_TC1 :\ 63 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel2))? DMA_FLAG_TC2 :\ 64 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel3))? DMA_FLAG_TC3 :\ 65 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel4))? DMA_FLAG_TC4 :\ 66 DMA_FLAG_TC5) 67 68 /** 69 * @brief Returns the current DMA Channel half transfer complete flag. 70 * @param __HANDLE__ DMA handle 71 * @retval The specified half transfer complete flag index. 72 */ 73 #define __HAL_DMA_GET_HT_FLAG_INDEX(__HANDLE__)\ 74 (((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel1))? DMA_FLAG_HT1 :\ 75 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel2))? DMA_FLAG_HT2 :\ 76 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel3))? DMA_FLAG_HT3 :\ 77 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel4))? DMA_FLAG_HT4 :\ 78 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel5))? DMA_FLAG_HT5 :\ 79 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel6))? DMA_FLAG_HT6 :\ 80 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel7))? DMA_FLAG_HT7 :\ 81 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel1))? DMA_FLAG_HT1 :\ 82 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel2))? DMA_FLAG_HT2 :\ 83 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel3))? DMA_FLAG_HT3 :\ 84 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel4))? DMA_FLAG_HT4 :\ 85 DMA_FLAG_HT5) 86 87 /** 88 * @brief Returns the current DMA Channel transfer error flag. 89 * @param __HANDLE__ DMA handle 90 * @retval The specified transfer error flag index. 91 */ 92 #define __HAL_DMA_GET_TE_FLAG_INDEX(__HANDLE__)\ 93 (((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel1))? DMA_FLAG_TE1 :\ 94 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel2))? DMA_FLAG_TE2 :\ 95 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel3))? DMA_FLAG_TE3 :\ 96 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel4))? DMA_FLAG_TE4 :\ 97 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel5))? DMA_FLAG_TE5 :\ 98 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel6))? DMA_FLAG_TE6 :\ 99 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel7))? DMA_FLAG_TE7 :\ 100 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel1))? DMA_FLAG_TE1 :\ 101 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel2))? DMA_FLAG_TE2 :\ 102 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel3))? DMA_FLAG_TE3 :\ 103 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel4))? DMA_FLAG_TE4 :\ 104 DMA_FLAG_TE5) 105 106 /** 107 * @brief Return the current DMA Channel Global interrupt flag. 108 * @param __HANDLE__ DMA handle 109 * @retval The specified transfer error flag index. 110 */ 111 #define __HAL_DMA_GET_GI_FLAG_INDEX(__HANDLE__)\ 112 (((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel1))? DMA_FLAG_GL1 :\ 113 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel2))? DMA_FLAG_GL2 :\ 114 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel3))? DMA_FLAG_GL3 :\ 115 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel4))? DMA_FLAG_GL4 :\ 116 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel5))? DMA_FLAG_GL5 :\ 117 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel6))? DMA_FLAG_GL6 :\ 118 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel7))? DMA_FLAG_GL7 :\ 119 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel1))? DMA_FLAG_GL1 :\ 120 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel2))? DMA_FLAG_GL2 :\ 121 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel3))? DMA_FLAG_GL3 :\ 122 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel4))? DMA_FLAG_GL4 :\ 123 DMA_FLAG_GL5) 124 125 /** 126 * @brief Get the DMA Channel pending flags. 127 * @param __HANDLE__ DMA handle 128 * @param __FLAG__ Get the specified flag. 129 * This parameter can be any combination of the following values: 130 * @arg DMA_FLAG_TCx: Transfer complete flag 131 * @arg DMA_FLAG_HTx: Half transfer complete flag 132 * @arg DMA_FLAG_TEx: Transfer error flag 133 * Where x can be 1_7 or 1_5 (depending on DMA1 or DMA2) to select the DMA Channel flag. 134 * @retval The state of FLAG (SET or RESET). 135 */ 136 #define __HAL_DMA_GET_FLAG(__HANDLE__, __FLAG__)\ 137 (((uint32_t)((__HANDLE__)->Instance) > (uint32_t)DMA1_Channel7)? (DMA2->ISR & (__FLAG__)) :\ 138 (DMA1->ISR & (__FLAG__))) 139 140 /** 141 * @brief Clears the DMA Channel pending flags. 142 * @param __HANDLE__ DMA handle 143 * @param __FLAG__ specifies the flag to clear. 144 * This parameter can be any combination of the following values: 145 * @arg DMA_FLAG_TCx: Transfer complete flag 146 * @arg DMA_FLAG_HTx: Half transfer complete flag 147 * @arg DMA_FLAG_TEx: Transfer error flag 148 * Where x can be 1_7 or 1_5 (depending on DMA1 or DMA2) to select the DMA Channel flag. 149 * @retval None 150 */ 151 #define __HAL_DMA_CLEAR_FLAG(__HANDLE__, __FLAG__) \ 152 (((uint32_t)((__HANDLE__)->Instance) > (uint32_t)DMA1_Channel7)? (DMA2->IFCR = (__FLAG__)) :\ 153 (DMA1->IFCR = (__FLAG__))) 154 155 /** 156 * @} 157 */ 158 159 #else /* STM32F301x8_STM32F302x8_STM32F318xx_STM32F303x8_STM32F334x8_STM32F328xx Product devices */ 160 /** @defgroup DMA_Low_density_Medium_density_Product_devices DMA Low density and Medium density product devices 161 * @{ 162 */ 163 164 /** 165 * @brief Returns the current DMA Channel transfer complete flag. 166 * @param __HANDLE__ DMA handle 167 * @retval The specified transfer complete flag index. 168 */ 169 #define __HAL_DMA_GET_TC_FLAG_INDEX(__HANDLE__) \ 170 (((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel1))? DMA_FLAG_TC1 :\ 171 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel2))? DMA_FLAG_TC2 :\ 172 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel3))? DMA_FLAG_TC3 :\ 173 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel4))? DMA_FLAG_TC4 :\ 174 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel5))? DMA_FLAG_TC5 :\ 175 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel6))? DMA_FLAG_TC6 :\ 176 DMA_FLAG_TC7) 177 178 /** 179 * @brief Returns the current DMA Channel half transfer complete flag. 180 * @param __HANDLE__ DMA handle 181 * @retval The specified half transfer complete flag index. 182 */ 183 #define __HAL_DMA_GET_HT_FLAG_INDEX(__HANDLE__)\ 184 (((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel1))? DMA_FLAG_HT1 :\ 185 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel2))? DMA_FLAG_HT2 :\ 186 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel3))? DMA_FLAG_HT3 :\ 187 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel4))? DMA_FLAG_HT4 :\ 188 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel5))? DMA_FLAG_HT5 :\ 189 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel6))? DMA_FLAG_HT6 :\ 190 DMA_FLAG_HT7) 191 192 /** 193 * @brief Returns the current DMA Channel transfer error flag. 194 * @param __HANDLE__ DMA handle 195 * @retval The specified transfer error flag index. 196 */ 197 #define __HAL_DMA_GET_TE_FLAG_INDEX(__HANDLE__)\ 198 (((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel1))? DMA_FLAG_TE1 :\ 199 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel2))? DMA_FLAG_TE2 :\ 200 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel3))? DMA_FLAG_TE3 :\ 201 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel4))? DMA_FLAG_TE4 :\ 202 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel5))? DMA_FLAG_TE5 :\ 203 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel6))? DMA_FLAG_TE6 :\ 204 DMA_FLAG_TE7) 205 206 /** 207 * @brief Return the current DMA Channel Global interrupt flag. 208 * @param __HANDLE__ DMA handle 209 * @retval The specified transfer error flag index. 210 */ 211 #define __HAL_DMA_GET_GI_FLAG_INDEX(__HANDLE__)\ 212 (((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel1))? DMA_FLAG_GL1 :\ 213 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel2))? DMA_FLAG_GL2 :\ 214 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel3))? DMA_FLAG_GL3 :\ 215 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel4))? DMA_FLAG_GL4 :\ 216 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel5))? DMA_FLAG_GL5 :\ 217 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel6))? DMA_FLAG_GL6 :\ 218 DMA_FLAG_GL7) 219 220 /** 221 * @brief Get the DMA Channel pending flags. 222 * @param __HANDLE__ DMA handle 223 * @param __FLAG__ Get the specified flag. 224 * This parameter can be any combination of the following values: 225 * @arg DMA_FLAG_TCx: Transfer complete flag 226 * @arg DMA_FLAG_HTx: Half transfer complete flag 227 * @arg DMA_FLAG_TEx: Transfer error flag 228 * Where x can be 1_7 to select the DMA Channel flag. 229 * @retval The state of FLAG (SET or RESET). 230 */ 231 232 #define __HAL_DMA_GET_FLAG(__HANDLE__, __FLAG__) (DMA1->ISR & (__FLAG__)) 233 234 /** 235 * @brief Clears the DMA Channel pending flags. 236 * @param __HANDLE__ DMA handle 237 * @param __FLAG__ specifies the flag to clear. 238 * This parameter can be any combination of the following values: 239 * @arg DMA_FLAG_TCx: Transfer complete flag 240 * @arg DMA_FLAG_HTx: Half transfer complete flag 241 * @arg DMA_FLAG_TEx: Transfer error flag 242 * Where x can be 1_7 to select the DMA Channel flag. 243 * @retval None 244 */ 245 #define __HAL_DMA_CLEAR_FLAG(__HANDLE__, __FLAG__) (DMA1->IFCR = (__FLAG__)) 246 247 /** 248 * @} 249 */ 250 251 #endif 252 253 /** 254 * @} 255 */ 256 257 /** 258 * @} 259 */ 260 261 /** 262 * @} 263 */ 264 265 #ifdef __cplusplus 266 } 267 #endif /* STM32F302xE || STM32F303xE || STM32F398xx || */ 268 /* STM32F302xC || STM32F303xC || STM32F358xx || */ 269 /* STM32F373xC || STM32F378xx */ 270 271 #endif /* __STM32F3xx_HAL_DMA_H */ 272 273
