1 /** 2 ****************************************************************************** 3 * @file stm32f2xx_hal_nor.h 4 * @author MCD Application Team 5 * @brief Header file of NOR HAL module. 6 ****************************************************************************** 7 * @attention 8 * 9 * Copyright (c) 2016 STMicroelectronics. 10 * All rights reserved. 11 * 12 * This software is licensed under terms that can be found in the LICENSE file 13 * in the root directory of this software component. 14 * If no LICENSE file comes with this software, it is provided AS-IS. 15 * 16 ****************************************************************************** 17 */ 18 19 /* Define to prevent recursive inclusion -------------------------------------*/ 20 #ifndef STM32F2xx_HAL_NOR_H 21 #define STM32F2xx_HAL_NOR_H 22 23 #ifdef __cplusplus 24 extern "C" { 25 #endif 26 27 28 /* Includes ------------------------------------------------------------------*/ 29 #include "stm32f2xx_ll_fsmc.h" 30 31 /** @addtogroup STM32F2xx_HAL_Driver 32 * @{ 33 */ 34 35 /** @addtogroup NOR 36 * @{ 37 */ 38 39 /* Exported typedef ----------------------------------------------------------*/ 40 /** @defgroup NOR_Exported_Types NOR Exported Types 41 * @{ 42 */ 43 44 /** 45 * @brief HAL SRAM State structures definition 46 */ 47 typedef enum 48 { 49 HAL_NOR_STATE_RESET = 0x00U, /*!< NOR not yet initialized or disabled */ 50 HAL_NOR_STATE_READY = 0x01U, /*!< NOR initialized and ready for use */ 51 HAL_NOR_STATE_BUSY = 0x02U, /*!< NOR internal processing is ongoing */ 52 HAL_NOR_STATE_ERROR = 0x03U, /*!< NOR error state */ 53 HAL_NOR_STATE_PROTECTED = 0x04U /*!< NOR NORSRAM device write protected */ 54 } HAL_NOR_StateTypeDef; 55 56 /** 57 * @brief FSMC NOR Status typedef 58 */ 59 typedef enum 60 { 61 HAL_NOR_STATUS_SUCCESS = 0U, 62 HAL_NOR_STATUS_ONGOING, 63 HAL_NOR_STATUS_ERROR, 64 HAL_NOR_STATUS_TIMEOUT 65 } HAL_NOR_StatusTypeDef; 66 67 /** 68 * @brief FSMC NOR ID typedef 69 */ 70 typedef struct 71 { 72 uint16_t Manufacturer_Code; /*!< Defines the device's manufacturer code used to identify the memory */ 73 74 uint16_t Device_Code1; 75 76 uint16_t Device_Code2; 77 78 uint16_t Device_Code3; /*!< Defines the device's codes used to identify the memory. 79 These codes can be accessed by performing read operations with specific 80 control signals and addresses set.They can also be accessed by issuing 81 an Auto Select command */ 82 } NOR_IDTypeDef; 83 84 /** 85 * @brief FSMC NOR CFI typedef 86 */ 87 typedef struct 88 { 89 /*!< Defines the information stored in the memory's Common flash interface 90 which contains a description of various electrical and timing parameters, 91 density information and functions supported by the memory */ 92 93 uint16_t CFI_1; 94 95 uint16_t CFI_2; 96 97 uint16_t CFI_3; 98 99 uint16_t CFI_4; 100 } NOR_CFITypeDef; 101 102 /** 103 * @brief NOR handle Structure definition 104 */ 105 #if (USE_HAL_NOR_REGISTER_CALLBACKS == 1) 106 typedef struct __NOR_HandleTypeDef 107 #else 108 typedef struct 109 #endif /* USE_HAL_NOR_REGISTER_CALLBACKS */ 110 111 { 112 FSMC_NORSRAM_TypeDef *Instance; /*!< Register base address */ 113 114 FSMC_NORSRAM_EXTENDED_TypeDef *Extended; /*!< Extended mode register base address */ 115 116 FSMC_NORSRAM_InitTypeDef Init; /*!< NOR device control configuration parameters */ 117 118 HAL_LockTypeDef Lock; /*!< NOR locking object */ 119 120 __IO HAL_NOR_StateTypeDef State; /*!< NOR device access state */ 121 122 uint32_t CommandSet; /*!< NOR algorithm command set and control */ 123 124 #if (USE_HAL_NOR_REGISTER_CALLBACKS == 1) 125 void (* MspInitCallback)(struct __NOR_HandleTypeDef *hnor); /*!< NOR Msp Init callback */ 126 void (* MspDeInitCallback)(struct __NOR_HandleTypeDef *hnor); /*!< NOR Msp DeInit callback */ 127 #endif /* USE_HAL_NOR_REGISTER_CALLBACKS */ 128 } NOR_HandleTypeDef; 129 130 #if (USE_HAL_NOR_REGISTER_CALLBACKS == 1) 131 /** 132 * @brief HAL NOR Callback ID enumeration definition 133 */ 134 typedef enum 135 { 136 HAL_NOR_MSP_INIT_CB_ID = 0x00U, /*!< NOR MspInit Callback ID */ 137 HAL_NOR_MSP_DEINIT_CB_ID = 0x01U /*!< NOR MspDeInit Callback ID */ 138 } HAL_NOR_CallbackIDTypeDef; 139 140 /** 141 * @brief HAL NOR Callback pointer definition 142 */ 143 typedef void (*pNOR_CallbackTypeDef)(NOR_HandleTypeDef *hnor); 144 #endif /* USE_HAL_NOR_REGISTER_CALLBACKS */ 145 /** 146 * @} 147 */ 148 149 /* Exported constants --------------------------------------------------------*/ 150 /* Exported macro ------------------------------------------------------------*/ 151 /** @defgroup NOR_Exported_Macros NOR Exported Macros 152 * @{ 153 */ 154 /** @brief Reset NOR handle state 155 * @param __HANDLE__ specifies the NOR handle. 156 * @retval None 157 */ 158 #if (USE_HAL_NOR_REGISTER_CALLBACKS == 1) 159 #define __HAL_NOR_RESET_HANDLE_STATE(__HANDLE__) do { \ 160 (__HANDLE__)->State = HAL_NOR_STATE_RESET; \ 161 (__HANDLE__)->MspInitCallback = NULL; \ 162 (__HANDLE__)->MspDeInitCallback = NULL; \ 163 } while(0) 164 #else 165 #define __HAL_NOR_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_NOR_STATE_RESET) 166 #endif /* USE_HAL_NOR_REGISTER_CALLBACKS */ 167 /** 168 * @} 169 */ 170 171 /* Exported functions --------------------------------------------------------*/ 172 /** @addtogroup NOR_Exported_Functions NOR Exported Functions 173 * @{ 174 */ 175 176 /** @addtogroup NOR_Exported_Functions_Group1 Initialization and de-initialization functions 177 * @{ 178 */ 179 180 /* Initialization/de-initialization functions ********************************/ 181 HAL_StatusTypeDef HAL_NOR_Init(NOR_HandleTypeDef *hnor, FSMC_NORSRAM_TimingTypeDef *Timing, 182 FSMC_NORSRAM_TimingTypeDef *ExtTiming); 183 HAL_StatusTypeDef HAL_NOR_DeInit(NOR_HandleTypeDef *hnor); 184 void HAL_NOR_MspInit(NOR_HandleTypeDef *hnor); 185 void HAL_NOR_MspDeInit(NOR_HandleTypeDef *hnor); 186 void HAL_NOR_MspWait(NOR_HandleTypeDef *hnor, uint32_t Timeout); 187 /** 188 * @} 189 */ 190 191 /** @addtogroup NOR_Exported_Functions_Group2 Input and Output functions 192 * @{ 193 */ 194 195 /* I/O operation functions ***************************************************/ 196 HAL_StatusTypeDef HAL_NOR_Read_ID(NOR_HandleTypeDef *hnor, NOR_IDTypeDef *pNOR_ID); 197 HAL_StatusTypeDef HAL_NOR_ReturnToReadMode(NOR_HandleTypeDef *hnor); 198 HAL_StatusTypeDef HAL_NOR_Read(NOR_HandleTypeDef *hnor, uint32_t *pAddress, uint16_t *pData); 199 HAL_StatusTypeDef HAL_NOR_Program(NOR_HandleTypeDef *hnor, uint32_t *pAddress, uint16_t *pData); 200 201 HAL_StatusTypeDef HAL_NOR_ReadBuffer(NOR_HandleTypeDef *hnor, uint32_t uwAddress, uint16_t *pData, 202 uint32_t uwBufferSize); 203 HAL_StatusTypeDef HAL_NOR_ProgramBuffer(NOR_HandleTypeDef *hnor, uint32_t uwAddress, uint16_t *pData, 204 uint32_t uwBufferSize); 205 206 HAL_StatusTypeDef HAL_NOR_Erase_Block(NOR_HandleTypeDef *hnor, uint32_t BlockAddress, uint32_t Address); 207 HAL_StatusTypeDef HAL_NOR_Erase_Chip(NOR_HandleTypeDef *hnor, uint32_t Address); 208 HAL_StatusTypeDef HAL_NOR_Read_CFI(NOR_HandleTypeDef *hnor, NOR_CFITypeDef *pNOR_CFI); 209 210 #if (USE_HAL_NOR_REGISTER_CALLBACKS == 1) 211 /* NOR callback registering/unregistering */ 212 HAL_StatusTypeDef HAL_NOR_RegisterCallback(NOR_HandleTypeDef *hnor, HAL_NOR_CallbackIDTypeDef CallbackId, 213 pNOR_CallbackTypeDef pCallback); 214 HAL_StatusTypeDef HAL_NOR_UnRegisterCallback(NOR_HandleTypeDef *hnor, HAL_NOR_CallbackIDTypeDef CallbackId); 215 #endif /* USE_HAL_NOR_REGISTER_CALLBACKS */ 216 /** 217 * @} 218 */ 219 220 /** @addtogroup NOR_Exported_Functions_Group3 NOR Control functions 221 * @{ 222 */ 223 224 /* NOR Control functions *****************************************************/ 225 HAL_StatusTypeDef HAL_NOR_WriteOperation_Enable(NOR_HandleTypeDef *hnor); 226 HAL_StatusTypeDef HAL_NOR_WriteOperation_Disable(NOR_HandleTypeDef *hnor); 227 /** 228 * @} 229 */ 230 231 /** @addtogroup NOR_Exported_Functions_Group4 NOR State functions 232 * @{ 233 */ 234 235 /* NOR State functions ********************************************************/ 236 HAL_NOR_StateTypeDef HAL_NOR_GetState(const NOR_HandleTypeDef *hnor); 237 HAL_NOR_StatusTypeDef HAL_NOR_GetStatus(NOR_HandleTypeDef *hnor, uint32_t Address, uint32_t Timeout); 238 /** 239 * @} 240 */ 241 242 /** 243 * @} 244 */ 245 246 /* Private types -------------------------------------------------------------*/ 247 /* Private variables ---------------------------------------------------------*/ 248 /* Private constants ---------------------------------------------------------*/ 249 /** @defgroup NOR_Private_Constants NOR Private Constants 250 * @{ 251 */ 252 /* NOR device IDs addresses */ 253 #define MC_ADDRESS ((uint16_t)0x0000) 254 #define DEVICE_CODE1_ADDR ((uint16_t)0x0001) 255 #define DEVICE_CODE2_ADDR ((uint16_t)0x000E) 256 #define DEVICE_CODE3_ADDR ((uint16_t)0x000F) 257 258 /* NOR CFI IDs addresses */ 259 #define CFI1_ADDRESS ((uint16_t)0x0061) 260 #define CFI2_ADDRESS ((uint16_t)0x0062) 261 #define CFI3_ADDRESS ((uint16_t)0x0063) 262 #define CFI4_ADDRESS ((uint16_t)0x0064) 263 264 /* NOR operation wait timeout */ 265 #define NOR_TMEOUT ((uint16_t)0xFFFF) 266 267 /* NOR memory data width */ 268 #define NOR_MEMORY_8B ((uint8_t)0x00) 269 #define NOR_MEMORY_16B ((uint8_t)0x01) 270 271 /* NOR memory device read/write start address */ 272 #define NOR_MEMORY_ADRESS1 (0x60000000U) 273 #define NOR_MEMORY_ADRESS2 (0x64000000U) 274 #define NOR_MEMORY_ADRESS3 (0x68000000U) 275 #define NOR_MEMORY_ADRESS4 (0x6C000000U) 276 /** 277 * @} 278 */ 279 280 /* Private macros ------------------------------------------------------------*/ 281 /** @defgroup NOR_Private_Macros NOR Private Macros 282 * @{ 283 */ 284 /** 285 * @brief NOR memory address shifting. 286 * @param __NOR_ADDRESS NOR base address 287 * @param __NOR_MEMORY_WIDTH_ NOR memory width 288 * @param __ADDRESS__ NOR memory address 289 * @retval NOR shifted address value 290 */ 291 #define NOR_ADDR_SHIFT(__NOR_ADDRESS, __NOR_MEMORY_WIDTH_, __ADDRESS__) \ 292 ((uint32_t)(((__NOR_MEMORY_WIDTH_) == NOR_MEMORY_16B)? \ 293 ((uint32_t)((__NOR_ADDRESS) + (2U * (__ADDRESS__)))): \ 294 ((uint32_t)((__NOR_ADDRESS) + (__ADDRESS__))))) 295 296 /** 297 * @brief NOR memory write data to specified address. 298 * @param __ADDRESS__ NOR memory address 299 * @param __DATA__ Data to write 300 * @retval None 301 */ 302 #define NOR_WRITE(__ADDRESS__, __DATA__) do{ \ 303 (*(__IO uint16_t *)((uint32_t)(__ADDRESS__)) = (__DATA__)); \ 304 __DSB(); \ 305 } while(0) 306 307 /** 308 * @} 309 */ 310 311 /** 312 * @} 313 */ 314 315 /** 316 * @} 317 */ 318 319 320 #ifdef __cplusplus 321 } 322 #endif 323 324 #endif /* STM32F2xx_HAL_NOR_H */ 325
