1 /** 2 ****************************************************************************** 3 * @file stm32f1xx_hal_flash_ex.h 4 * @author MCD Application Team 5 * @brief Header file of Flash HAL Extended module. 6 ****************************************************************************** 7 * @attention 8 * 9 * <h2><center>© Copyright (c) 2016 STMicroelectronics. 10 * All rights reserved.</center></h2> 11 * 12 * This software component is licensed by ST under BSD 3-Clause license, 13 * the "License"; You may not use this file except in compliance with the 14 * License. You may obtain a copy of the License at: 15 * opensource.org/licenses/BSD-3-Clause 16 * 17 ****************************************************************************** 18 */ 19 20 /* Define to prevent recursive inclusion -------------------------------------*/ 21 #ifndef __STM32F1xx_HAL_FLASH_EX_H 22 #define __STM32F1xx_HAL_FLASH_EX_H 23 24 #ifdef __cplusplus 25 extern "C" { 26 #endif 27 28 /* Includes ------------------------------------------------------------------*/ 29 #include "stm32f1xx_hal_def.h" 30 31 /** @addtogroup STM32F1xx_HAL_Driver 32 * @{ 33 */ 34 35 /** @addtogroup FLASHEx 36 * @{ 37 */ 38 39 /** @addtogroup FLASHEx_Private_Constants 40 * @{ 41 */ 42 43 #define FLASH_SIZE_DATA_REGISTER 0x1FFFF7E0U 44 #define OBR_REG_INDEX 1U 45 #define SR_FLAG_MASK ((uint32_t)(FLASH_SR_BSY | FLASH_SR_PGERR | FLASH_SR_WRPRTERR | FLASH_SR_EOP)) 46 47 /** 48 * @} 49 */ 50 51 /** @addtogroup FLASHEx_Private_Macros 52 * @{ 53 */ 54 55 #define IS_FLASH_TYPEERASE(VALUE) (((VALUE) == FLASH_TYPEERASE_PAGES) || ((VALUE) == FLASH_TYPEERASE_MASSERASE)) 56 57 #define IS_OPTIONBYTE(VALUE) (((VALUE) <= (OPTIONBYTE_WRP | OPTIONBYTE_RDP | OPTIONBYTE_USER | OPTIONBYTE_DATA))) 58 59 #define IS_WRPSTATE(VALUE) (((VALUE) == OB_WRPSTATE_DISABLE) || ((VALUE) == OB_WRPSTATE_ENABLE)) 60 61 #define IS_OB_RDP_LEVEL(LEVEL) (((LEVEL) == OB_RDP_LEVEL_0) || ((LEVEL) == OB_RDP_LEVEL_1)) 62 63 #define IS_OB_DATA_ADDRESS(ADDRESS) (((ADDRESS) == OB_DATA_ADDRESS_DATA0) || ((ADDRESS) == OB_DATA_ADDRESS_DATA1)) 64 65 #define IS_OB_IWDG_SOURCE(SOURCE) (((SOURCE) == OB_IWDG_SW) || ((SOURCE) == OB_IWDG_HW)) 66 67 #define IS_OB_STOP_SOURCE(SOURCE) (((SOURCE) == OB_STOP_NO_RST) || ((SOURCE) == OB_STOP_RST)) 68 69 #define IS_OB_STDBY_SOURCE(SOURCE) (((SOURCE) == OB_STDBY_NO_RST) || ((SOURCE) == OB_STDBY_RST)) 70 71 #if defined(FLASH_BANK2_END) 72 #define IS_OB_BOOT1(BOOT1) (((BOOT1) == OB_BOOT1_RESET) || ((BOOT1) == OB_BOOT1_SET)) 73 #endif /* FLASH_BANK2_END */ 74 75 /* Low Density */ 76 #if (defined(STM32F101x6) || defined(STM32F102x6) || defined(STM32F103x6)) 77 #define IS_FLASH_NB_PAGES(ADDRESS,NBPAGES) (((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) == 0x20U) ? ((ADDRESS)+((NBPAGES)*FLASH_PAGE_SIZE)- 1 <= 0x08007FFFU) : \ 78 ((ADDRESS)+((NBPAGES)*FLASH_PAGE_SIZE)- 1 <= 0x08003FFFU)) 79 #endif /* STM32F101x6 || STM32F102x6 || STM32F103x6 */ 80 81 /* Medium Density */ 82 #if (defined(STM32F100xB) || defined(STM32F101xB) || defined(STM32F102xB) || defined(STM32F103xB)) 83 #define IS_FLASH_NB_PAGES(ADDRESS,NBPAGES) (((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) == 0x80U) ? ((ADDRESS)+((NBPAGES)*FLASH_PAGE_SIZE)-1 <= 0x0801FFFFU) : \ 84 (((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) == 0x40U) ? ((ADDRESS)+((NBPAGES)*FLASH_PAGE_SIZE)-1 <= 0x0800FFFFU) : \ 85 (((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) == 0x20U) ? ((ADDRESS)+((NBPAGES)*FLASH_PAGE_SIZE)-1 <= 0x08007FFFU) : \ 86 ((ADDRESS)+((NBPAGES)*FLASH_PAGE_SIZE)-1 <= 0x08003FFFU)))) 87 #endif /* STM32F100xB || STM32F101xB || STM32F102xB || STM32F103xB*/ 88 89 /* High Density */ 90 #if (defined(STM32F100xE) || defined(STM32F101xE) || defined(STM32F103xE)) 91 #define IS_FLASH_NB_PAGES(ADDRESS,NBPAGES) (((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) == 0x200U) ? ((ADDRESS)+((NBPAGES)*FLASH_PAGE_SIZE)-1 <= 0x0807FFFFU) : \ 92 (((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) == 0x180U) ? ((ADDRESS)+((NBPAGES)*FLASH_PAGE_SIZE)-1 <= 0x0805FFFFU) : \ 93 ((ADDRESS)+((NBPAGES)*FLASH_PAGE_SIZE)-1 <= 0x0803FFFFU))) 94 #endif /* STM32F100xE || STM32F101xE || STM32F103xE */ 95 96 /* XL Density */ 97 #if defined(FLASH_BANK2_END) 98 #define IS_FLASH_NB_PAGES(ADDRESS,NBPAGES) (((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) == 0x400U) ? ((ADDRESS)+((NBPAGES)*FLASH_PAGE_SIZE)-1 <= 0x080FFFFFU) : \ 99 ((ADDRESS)+((NBPAGES)*FLASH_PAGE_SIZE)-1 <= 0x080BFFFFU)) 100 #endif /* FLASH_BANK2_END */ 101 102 /* Connectivity Line */ 103 #if (defined(STM32F105xC) || defined(STM32F107xC)) 104 #define IS_FLASH_NB_PAGES(ADDRESS,NBPAGES) (((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) == 0x100U) ? ((ADDRESS)+((NBPAGES)*FLASH_PAGE_SIZE)-1 <= 0x0803FFFFU) : \ 105 (((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) == 0x80U) ? ((ADDRESS)+((NBPAGES)*FLASH_PAGE_SIZE)-1 <= 0x0801FFFFU) : \ 106 ((ADDRESS)+((NBPAGES)*FLASH_PAGE_SIZE)-1 <= 0x0800FFFFU))) 107 #endif /* STM32F105xC || STM32F107xC */ 108 109 #define IS_OB_WRP(PAGE) (((PAGE) != 0x0000000U)) 110 111 #if defined(FLASH_BANK2_END) 112 #define IS_FLASH_BANK(BANK) (((BANK) == FLASH_BANK_1) || \ 113 ((BANK) == FLASH_BANK_2) || \ 114 ((BANK) == FLASH_BANK_BOTH)) 115 #else 116 #define IS_FLASH_BANK(BANK) (((BANK) == FLASH_BANK_1)) 117 #endif /* FLASH_BANK2_END */ 118 119 /* Low Density */ 120 #if (defined(STM32F101x6) || defined(STM32F102x6) || defined(STM32F103x6)) 121 #define IS_FLASH_PROGRAM_ADDRESS(ADDRESS) (((ADDRESS) >= FLASH_BASE) && (((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) == 0x20U) ? \ 122 ((ADDRESS) <= FLASH_BANK1_END) : ((ADDRESS) <= 0x08003FFFU))) 123 124 #endif /* STM32F101x6 || STM32F102x6 || STM32F103x6 */ 125 126 /* Medium Density */ 127 #if (defined(STM32F100xB) || defined(STM32F101xB) || defined(STM32F102xB) || defined(STM32F103xB)) 128 #define IS_FLASH_PROGRAM_ADDRESS(ADDRESS) (((ADDRESS) >= FLASH_BASE) && (((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) == 0x80U) ? \ 129 ((ADDRESS) <= FLASH_BANK1_END) : (((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) == 0x40U) ? \ 130 ((ADDRESS) <= 0x0800FFFF) : (((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) == 0x20U) ? \ 131 ((ADDRESS) <= 0x08007FFF) : ((ADDRESS) <= 0x08003FFFU))))) 132 133 #endif /* STM32F100xB || STM32F101xB || STM32F102xB || STM32F103xB*/ 134 135 /* High Density */ 136 #if (defined(STM32F100xE) || defined(STM32F101xE) || defined(STM32F103xE)) 137 #define IS_FLASH_PROGRAM_ADDRESS(ADDRESS) (((ADDRESS) >= FLASH_BASE) && (((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) == 0x200U) ? \ 138 ((ADDRESS) <= FLASH_BANK1_END) : (((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) == 0x180U) ? \ 139 ((ADDRESS) <= 0x0805FFFFU) : ((ADDRESS) <= 0x0803FFFFU)))) 140 141 #endif /* STM32F100xE || STM32F101xE || STM32F103xE */ 142 143 /* XL Density */ 144 #if defined(FLASH_BANK2_END) 145 #define IS_FLASH_PROGRAM_ADDRESS(ADDRESS) (((ADDRESS) >= FLASH_BASE) && (((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) == 0x400U) ? \ 146 ((ADDRESS) <= FLASH_BANK2_END) : ((ADDRESS) <= 0x080BFFFFU))) 147 148 #endif /* FLASH_BANK2_END */ 149 150 /* Connectivity Line */ 151 #if (defined(STM32F105xC) || defined(STM32F107xC)) 152 #define IS_FLASH_PROGRAM_ADDRESS(ADDRESS) (((ADDRESS) >= FLASH_BASE) && (((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) == 0x100U) ? \ 153 ((ADDRESS) <= FLASH_BANK1_END) : (((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) == 0x80U) ? \ 154 ((ADDRESS) <= 0x0801FFFFU) : ((ADDRESS) <= 0x0800FFFFU)))) 155 156 #endif /* STM32F105xC || STM32F107xC */ 157 158 /** 159 * @} 160 */ 161 162 /* Exported types ------------------------------------------------------------*/ 163 /** @defgroup FLASHEx_Exported_Types FLASHEx Exported Types 164 * @{ 165 */ 166 167 /** 168 * @brief FLASH Erase structure definition 169 */ 170 typedef struct 171 { 172 uint32_t TypeErase; /*!< TypeErase: Mass erase or page erase. 173 This parameter can be a value of @ref FLASHEx_Type_Erase */ 174 175 uint32_t Banks; /*!< Select banks to erase when Mass erase is enabled. 176 This parameter must be a value of @ref FLASHEx_Banks */ 177 178 uint32_t PageAddress; /*!< PageAdress: Initial FLASH page address to erase when mass erase is disabled 179 This parameter must be a number between Min_Data = 0x08000000 and Max_Data = FLASH_BANKx_END 180 (x = 1 or 2 depending on devices)*/ 181 182 uint32_t NbPages; /*!< NbPages: Number of pagess to be erased. 183 This parameter must be a value between Min_Data = 1 and Max_Data = (max number of pages - value of initial page)*/ 184 185 } FLASH_EraseInitTypeDef; 186 187 /** 188 * @brief FLASH Options bytes program structure definition 189 */ 190 typedef struct 191 { 192 uint32_t OptionType; /*!< OptionType: Option byte to be configured. 193 This parameter can be a value of @ref FLASHEx_OB_Type */ 194 195 uint32_t WRPState; /*!< WRPState: Write protection activation or deactivation. 196 This parameter can be a value of @ref FLASHEx_OB_WRP_State */ 197 198 uint32_t WRPPage; /*!< WRPPage: specifies the page(s) to be write protected 199 This parameter can be a value of @ref FLASHEx_OB_Write_Protection */ 200 201 uint32_t Banks; /*!< Select banks for WRP activation/deactivation of all sectors. 202 This parameter must be a value of @ref FLASHEx_Banks */ 203 204 uint8_t RDPLevel; /*!< RDPLevel: Set the read protection level.. 205 This parameter can be a value of @ref FLASHEx_OB_Read_Protection */ 206 207 #if defined(FLASH_BANK2_END) 208 uint8_t USERConfig; /*!< USERConfig: Program the FLASH User Option Byte: 209 IWDG / STOP / STDBY / BOOT1 210 This parameter can be a combination of @ref FLASHEx_OB_IWatchdog, @ref FLASHEx_OB_nRST_STOP, 211 @ref FLASHEx_OB_nRST_STDBY, @ref FLASHEx_OB_BOOT1 */ 212 #else 213 uint8_t USERConfig; /*!< USERConfig: Program the FLASH User Option Byte: 214 IWDG / STOP / STDBY 215 This parameter can be a combination of @ref FLASHEx_OB_IWatchdog, @ref FLASHEx_OB_nRST_STOP, 216 @ref FLASHEx_OB_nRST_STDBY */ 217 #endif /* FLASH_BANK2_END */ 218 219 uint32_t DATAAddress; /*!< DATAAddress: Address of the option byte DATA to be programmed 220 This parameter can be a value of @ref FLASHEx_OB_Data_Address */ 221 222 uint8_t DATAData; /*!< DATAData: Data to be stored in the option byte DATA 223 This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF */ 224 } FLASH_OBProgramInitTypeDef; 225 226 /** 227 * @} 228 */ 229 230 /* Exported constants --------------------------------------------------------*/ 231 /** @defgroup FLASHEx_Exported_Constants FLASHEx Exported Constants 232 * @{ 233 */ 234 235 /** @defgroup FLASHEx_Constants FLASH Constants 236 * @{ 237 */ 238 239 /** @defgroup FLASHEx_Page_Size Page Size 240 * @{ 241 */ 242 #if (defined(STM32F101x6) || defined(STM32F102x6) || defined(STM32F103x6) || defined(STM32F100xB) || defined(STM32F101xB) || defined(STM32F102xB) || defined(STM32F103xB)) 243 #define FLASH_PAGE_SIZE 0x400U 244 #endif /* STM32F101x6 || STM32F102x6 || STM32F103x6 */ 245 /* STM32F100xB || STM32F101xB || STM32F102xB || STM32F103xB */ 246 247 #if (defined(STM32F100xE) || defined(STM32F101xE) || defined(STM32F103xE) || defined(STM32F101xG) || defined(STM32F103xG) || defined(STM32F105xC) || defined(STM32F107xC)) 248 #define FLASH_PAGE_SIZE 0x800U 249 #endif /* STM32F100xB || STM32F101xB || STM32F102xB || STM32F103xB */ 250 /* STM32F101xG || STM32F103xG */ 251 /* STM32F105xC || STM32F107xC */ 252 253 /** 254 * @} 255 */ 256 257 /** @defgroup FLASHEx_Type_Erase Type Erase 258 * @{ 259 */ 260 #define FLASH_TYPEERASE_PAGES 0x00U /*!<Pages erase only*/ 261 #define FLASH_TYPEERASE_MASSERASE 0x02U /*!<Flash mass erase activation*/ 262 263 /** 264 * @} 265 */ 266 267 /** @defgroup FLASHEx_Banks Banks 268 * @{ 269 */ 270 #if defined(FLASH_BANK2_END) 271 #define FLASH_BANK_1 1U /*!< Bank 1 */ 272 #define FLASH_BANK_2 2U /*!< Bank 2 */ 273 #define FLASH_BANK_BOTH ((uint32_t)FLASH_BANK_1 | FLASH_BANK_2) /*!< Bank1 and Bank2 */ 274 275 #else 276 #define FLASH_BANK_1 1U /*!< Bank 1 */ 277 #endif 278 /** 279 * @} 280 */ 281 282 /** 283 * @} 284 */ 285 286 /** @defgroup FLASHEx_OptionByte_Constants Option Byte Constants 287 * @{ 288 */ 289 290 /** @defgroup FLASHEx_OB_Type Option Bytes Type 291 * @{ 292 */ 293 #define OPTIONBYTE_WRP 0x01U /*!<WRP option byte configuration*/ 294 #define OPTIONBYTE_RDP 0x02U /*!<RDP option byte configuration*/ 295 #define OPTIONBYTE_USER 0x04U /*!<USER option byte configuration*/ 296 #define OPTIONBYTE_DATA 0x08U /*!<DATA option byte configuration*/ 297 298 /** 299 * @} 300 */ 301 302 /** @defgroup FLASHEx_OB_WRP_State Option Byte WRP State 303 * @{ 304 */ 305 #define OB_WRPSTATE_DISABLE 0x00U /*!<Disable the write protection of the desired pages*/ 306 #define OB_WRPSTATE_ENABLE 0x01U /*!<Enable the write protection of the desired pagess*/ 307 308 /** 309 * @} 310 */ 311 312 /** @defgroup FLASHEx_OB_Write_Protection Option Bytes Write Protection 313 * @{ 314 */ 315 /* STM32 Low and Medium density devices */ 316 #if defined(STM32F101x6) || defined(STM32F102x6) || defined(STM32F103x6) \ 317 || defined(STM32F100xB) || defined(STM32F101xB) || defined(STM32F102xB) \ 318 || defined(STM32F103xB) 319 #define OB_WRP_PAGES0TO3 0x00000001U /*!< Write protection of page 0 to 3 */ 320 #define OB_WRP_PAGES4TO7 0x00000002U /*!< Write protection of page 4 to 7 */ 321 #define OB_WRP_PAGES8TO11 0x00000004U /*!< Write protection of page 8 to 11 */ 322 #define OB_WRP_PAGES12TO15 0x00000008U /*!< Write protection of page 12 to 15 */ 323 #define OB_WRP_PAGES16TO19 0x00000010U /*!< Write protection of page 16 to 19 */ 324 #define OB_WRP_PAGES20TO23 0x00000020U /*!< Write protection of page 20 to 23 */ 325 #define OB_WRP_PAGES24TO27 0x00000040U /*!< Write protection of page 24 to 27 */ 326 #define OB_WRP_PAGES28TO31 0x00000080U /*!< Write protection of page 28 to 31 */ 327 #endif /* STM32F101x6 || STM32F102x6 || STM32F103x6 */ 328 /* STM32F100xB || STM32F101xB || STM32F102xB || STM32F103xB */ 329 330 /* STM32 Medium-density devices */ 331 #if defined(STM32F100xB) || defined(STM32F101xB) || defined(STM32F102xB) || defined(STM32F103xB) 332 #define OB_WRP_PAGES32TO35 0x00000100U /*!< Write protection of page 32 to 35 */ 333 #define OB_WRP_PAGES36TO39 0x00000200U /*!< Write protection of page 36 to 39 */ 334 #define OB_WRP_PAGES40TO43 0x00000400U /*!< Write protection of page 40 to 43 */ 335 #define OB_WRP_PAGES44TO47 0x00000800U /*!< Write protection of page 44 to 47 */ 336 #define OB_WRP_PAGES48TO51 0x00001000U /*!< Write protection of page 48 to 51 */ 337 #define OB_WRP_PAGES52TO55 0x00002000U /*!< Write protection of page 52 to 55 */ 338 #define OB_WRP_PAGES56TO59 0x00004000U /*!< Write protection of page 56 to 59 */ 339 #define OB_WRP_PAGES60TO63 0x00008000U /*!< Write protection of page 60 to 63 */ 340 #define OB_WRP_PAGES64TO67 0x00010000U /*!< Write protection of page 64 to 67 */ 341 #define OB_WRP_PAGES68TO71 0x00020000U /*!< Write protection of page 68 to 71 */ 342 #define OB_WRP_PAGES72TO75 0x00040000U /*!< Write protection of page 72 to 75 */ 343 #define OB_WRP_PAGES76TO79 0x00080000U /*!< Write protection of page 76 to 79 */ 344 #define OB_WRP_PAGES80TO83 0x00100000U /*!< Write protection of page 80 to 83 */ 345 #define OB_WRP_PAGES84TO87 0x00200000U /*!< Write protection of page 84 to 87 */ 346 #define OB_WRP_PAGES88TO91 0x00400000U /*!< Write protection of page 88 to 91 */ 347 #define OB_WRP_PAGES92TO95 0x00800000U /*!< Write protection of page 92 to 95 */ 348 #define OB_WRP_PAGES96TO99 0x01000000U /*!< Write protection of page 96 to 99 */ 349 #define OB_WRP_PAGES100TO103 0x02000000U /*!< Write protection of page 100 to 103 */ 350 #define OB_WRP_PAGES104TO107 0x04000000U /*!< Write protection of page 104 to 107 */ 351 #define OB_WRP_PAGES108TO111 0x08000000U /*!< Write protection of page 108 to 111 */ 352 #define OB_WRP_PAGES112TO115 0x10000000U /*!< Write protection of page 112 to 115 */ 353 #define OB_WRP_PAGES116TO119 0x20000000U /*!< Write protection of page 115 to 119 */ 354 #define OB_WRP_PAGES120TO123 0x40000000U /*!< Write protection of page 120 to 123 */ 355 #define OB_WRP_PAGES124TO127 0x80000000U /*!< Write protection of page 124 to 127 */ 356 #endif /* STM32F100xB || STM32F101xB || STM32F102xB || STM32F103xB */ 357 358 359 /* STM32 High-density, XL-density and Connectivity line devices */ 360 #if defined(STM32F100xE) || defined(STM32F101xE) || defined(STM32F103xE) \ 361 || defined(STM32F101xG) || defined(STM32F103xG) \ 362 || defined(STM32F105xC) || defined(STM32F107xC) 363 #define OB_WRP_PAGES0TO1 0x00000001U /*!< Write protection of page 0 TO 1 */ 364 #define OB_WRP_PAGES2TO3 0x00000002U /*!< Write protection of page 2 TO 3 */ 365 #define OB_WRP_PAGES4TO5 0x00000004U /*!< Write protection of page 4 TO 5 */ 366 #define OB_WRP_PAGES6TO7 0x00000008U /*!< Write protection of page 6 TO 7 */ 367 #define OB_WRP_PAGES8TO9 0x00000010U /*!< Write protection of page 8 TO 9 */ 368 #define OB_WRP_PAGES10TO11 0x00000020U /*!< Write protection of page 10 TO 11 */ 369 #define OB_WRP_PAGES12TO13 0x00000040U /*!< Write protection of page 12 TO 13 */ 370 #define OB_WRP_PAGES14TO15 0x00000080U /*!< Write protection of page 14 TO 15 */ 371 #define OB_WRP_PAGES16TO17 0x00000100U /*!< Write protection of page 16 TO 17 */ 372 #define OB_WRP_PAGES18TO19 0x00000200U /*!< Write protection of page 18 TO 19 */ 373 #define OB_WRP_PAGES20TO21 0x00000400U /*!< Write protection of page 20 TO 21 */ 374 #define OB_WRP_PAGES22TO23 0x00000800U /*!< Write protection of page 22 TO 23 */ 375 #define OB_WRP_PAGES24TO25 0x00001000U /*!< Write protection of page 24 TO 25 */ 376 #define OB_WRP_PAGES26TO27 0x00002000U /*!< Write protection of page 26 TO 27 */ 377 #define OB_WRP_PAGES28TO29 0x00004000U /*!< Write protection of page 28 TO 29 */ 378 #define OB_WRP_PAGES30TO31 0x00008000U /*!< Write protection of page 30 TO 31 */ 379 #define OB_WRP_PAGES32TO33 0x00010000U /*!< Write protection of page 32 TO 33 */ 380 #define OB_WRP_PAGES34TO35 0x00020000U /*!< Write protection of page 34 TO 35 */ 381 #define OB_WRP_PAGES36TO37 0x00040000U /*!< Write protection of page 36 TO 37 */ 382 #define OB_WRP_PAGES38TO39 0x00080000U /*!< Write protection of page 38 TO 39 */ 383 #define OB_WRP_PAGES40TO41 0x00100000U /*!< Write protection of page 40 TO 41 */ 384 #define OB_WRP_PAGES42TO43 0x00200000U /*!< Write protection of page 42 TO 43 */ 385 #define OB_WRP_PAGES44TO45 0x00400000U /*!< Write protection of page 44 TO 45 */ 386 #define OB_WRP_PAGES46TO47 0x00800000U /*!< Write protection of page 46 TO 47 */ 387 #define OB_WRP_PAGES48TO49 0x01000000U /*!< Write protection of page 48 TO 49 */ 388 #define OB_WRP_PAGES50TO51 0x02000000U /*!< Write protection of page 50 TO 51 */ 389 #define OB_WRP_PAGES52TO53 0x04000000U /*!< Write protection of page 52 TO 53 */ 390 #define OB_WRP_PAGES54TO55 0x08000000U /*!< Write protection of page 54 TO 55 */ 391 #define OB_WRP_PAGES56TO57 0x10000000U /*!< Write protection of page 56 TO 57 */ 392 #define OB_WRP_PAGES58TO59 0x20000000U /*!< Write protection of page 58 TO 59 */ 393 #define OB_WRP_PAGES60TO61 0x40000000U /*!< Write protection of page 60 TO 61 */ 394 #define OB_WRP_PAGES62TO127 0x80000000U /*!< Write protection of page 62 TO 127 */ 395 #define OB_WRP_PAGES62TO255 0x80000000U /*!< Write protection of page 62 TO 255 */ 396 #define OB_WRP_PAGES62TO511 0x80000000U /*!< Write protection of page 62 TO 511 */ 397 #endif /* STM32F100xB || STM32F101xB || STM32F102xB || STM32F103xB */ 398 /* STM32F101xG || STM32F103xG */ 399 /* STM32F105xC || STM32F107xC */ 400 401 #define OB_WRP_ALLPAGES 0xFFFFFFFFU /*!< Write protection of all Pages */ 402 403 /* Low Density */ 404 #if defined(STM32F101x6) || defined(STM32F102x6) || defined(STM32F103x6) 405 #define OB_WRP_PAGES0TO31MASK 0x000000FFU 406 #endif /* STM32F101x6 || STM32F102x6 || STM32F103x6 */ 407 408 /* Medium Density */ 409 #if defined(STM32F100xB) || defined(STM32F101xB) || defined(STM32F102xB) || defined(STM32F103xB) 410 #define OB_WRP_PAGES0TO31MASK 0x000000FFU 411 #define OB_WRP_PAGES32TO63MASK 0x0000FF00U 412 #define OB_WRP_PAGES64TO95MASK 0x00FF0000U 413 #define OB_WRP_PAGES96TO127MASK 0xFF000000U 414 #endif /* STM32F100xB || STM32F101xB || STM32F102xB || STM32F103xB*/ 415 416 /* High Density */ 417 #if defined(STM32F100xE) || defined(STM32F101xE) || defined(STM32F103xE) 418 #define OB_WRP_PAGES0TO15MASK 0x000000FFU 419 #define OB_WRP_PAGES16TO31MASK 0x0000FF00U 420 #define OB_WRP_PAGES32TO47MASK 0x00FF0000U 421 #define OB_WRP_PAGES48TO255MASK 0xFF000000U 422 #endif /* STM32F100xE || STM32F101xE || STM32F103xE */ 423 424 /* XL Density */ 425 #if defined(STM32F101xG) || defined(STM32F103xG) 426 #define OB_WRP_PAGES0TO15MASK 0x000000FFU 427 #define OB_WRP_PAGES16TO31MASK 0x0000FF00U 428 #define OB_WRP_PAGES32TO47MASK 0x00FF0000U 429 #define OB_WRP_PAGES48TO511MASK 0xFF000000U 430 #endif /* STM32F101xG || STM32F103xG */ 431 432 /* Connectivity line devices */ 433 #if defined(STM32F105xC) || defined(STM32F107xC) 434 #define OB_WRP_PAGES0TO15MASK 0x000000FFU 435 #define OB_WRP_PAGES16TO31MASK 0x0000FF00U 436 #define OB_WRP_PAGES32TO47MASK 0x00FF0000U 437 #define OB_WRP_PAGES48TO127MASK 0xFF000000U 438 #endif /* STM32F105xC || STM32F107xC */ 439 440 /** 441 * @} 442 */ 443 444 /** @defgroup FLASHEx_OB_Read_Protection Option Byte Read Protection 445 * @{ 446 */ 447 #define OB_RDP_LEVEL_0 ((uint8_t)0xA5) 448 #define OB_RDP_LEVEL_1 ((uint8_t)0x00) 449 /** 450 * @} 451 */ 452 453 /** @defgroup FLASHEx_OB_IWatchdog Option Byte IWatchdog 454 * @{ 455 */ 456 #define OB_IWDG_SW ((uint16_t)0x0001) /*!< Software IWDG selected */ 457 #define OB_IWDG_HW ((uint16_t)0x0000) /*!< Hardware IWDG selected */ 458 /** 459 * @} 460 */ 461 462 /** @defgroup FLASHEx_OB_nRST_STOP Option Byte nRST STOP 463 * @{ 464 */ 465 #define OB_STOP_NO_RST ((uint16_t)0x0002) /*!< No reset generated when entering in STOP */ 466 #define OB_STOP_RST ((uint16_t)0x0000) /*!< Reset generated when entering in STOP */ 467 /** 468 * @} 469 */ 470 471 /** @defgroup FLASHEx_OB_nRST_STDBY Option Byte nRST STDBY 472 * @{ 473 */ 474 #define OB_STDBY_NO_RST ((uint16_t)0x0004) /*!< No reset generated when entering in STANDBY */ 475 #define OB_STDBY_RST ((uint16_t)0x0000) /*!< Reset generated when entering in STANDBY */ 476 /** 477 * @} 478 */ 479 480 #if defined(FLASH_BANK2_END) 481 /** @defgroup FLASHEx_OB_BOOT1 Option Byte BOOT1 482 * @{ 483 */ 484 #define OB_BOOT1_RESET ((uint16_t)0x0000) /*!< BOOT1 Reset */ 485 #define OB_BOOT1_SET ((uint16_t)0x0008) /*!< BOOT1 Set */ 486 /** 487 * @} 488 */ 489 #endif /* FLASH_BANK2_END */ 490 491 /** @defgroup FLASHEx_OB_Data_Address Option Byte Data Address 492 * @{ 493 */ 494 #define OB_DATA_ADDRESS_DATA0 0x1FFFF804U 495 #define OB_DATA_ADDRESS_DATA1 0x1FFFF806U 496 /** 497 * @} 498 */ 499 500 /** 501 * @} 502 */ 503 504 /** @addtogroup FLASHEx_Constants 505 * @{ 506 */ 507 508 /** @defgroup FLASH_Flag_definition Flag definition 509 * @brief Flag definition 510 * @{ 511 */ 512 #if defined(FLASH_BANK2_END) 513 #define FLASH_FLAG_BSY FLASH_FLAG_BSY_BANK1 /*!< FLASH Bank1 Busy flag */ 514 #define FLASH_FLAG_PGERR FLASH_FLAG_PGERR_BANK1 /*!< FLASH Bank1 Programming error flag */ 515 #define FLASH_FLAG_WRPERR FLASH_FLAG_WRPERR_BANK1 /*!< FLASH Bank1 Write protected error flag */ 516 #define FLASH_FLAG_EOP FLASH_FLAG_EOP_BANK1 /*!< FLASH Bank1 End of Operation flag */ 517 518 #define FLASH_FLAG_BSY_BANK1 FLASH_SR_BSY /*!< FLASH Bank1 Busy flag */ 519 #define FLASH_FLAG_PGERR_BANK1 FLASH_SR_PGERR /*!< FLASH Bank1 Programming error flag */ 520 #define FLASH_FLAG_WRPERR_BANK1 FLASH_SR_WRPRTERR /*!< FLASH Bank1 Write protected error flag */ 521 #define FLASH_FLAG_EOP_BANK1 FLASH_SR_EOP /*!< FLASH Bank1 End of Operation flag */ 522 523 #define FLASH_FLAG_BSY_BANK2 (FLASH_SR2_BSY << 16U) /*!< FLASH Bank2 Busy flag */ 524 #define FLASH_FLAG_PGERR_BANK2 (FLASH_SR2_PGERR << 16U) /*!< FLASH Bank2 Programming error flag */ 525 #define FLASH_FLAG_WRPERR_BANK2 (FLASH_SR2_WRPRTERR << 16U) /*!< FLASH Bank2 Write protected error flag */ 526 #define FLASH_FLAG_EOP_BANK2 (FLASH_SR2_EOP << 16U) /*!< FLASH Bank2 End of Operation flag */ 527 528 #else 529 530 #define FLASH_FLAG_BSY FLASH_SR_BSY /*!< FLASH Busy flag */ 531 #define FLASH_FLAG_PGERR FLASH_SR_PGERR /*!< FLASH Programming error flag */ 532 #define FLASH_FLAG_WRPERR FLASH_SR_WRPRTERR /*!< FLASH Write protected error flag */ 533 #define FLASH_FLAG_EOP FLASH_SR_EOP /*!< FLASH End of Operation flag */ 534 535 #endif 536 #define FLASH_FLAG_OPTVERR ((OBR_REG_INDEX << 8U | FLASH_OBR_OPTERR)) /*!< Option Byte Error */ 537 /** 538 * @} 539 */ 540 541 /** @defgroup FLASH_Interrupt_definition Interrupt definition 542 * @brief FLASH Interrupt definition 543 * @{ 544 */ 545 #if defined(FLASH_BANK2_END) 546 #define FLASH_IT_EOP FLASH_IT_EOP_BANK1 /*!< End of FLASH Operation Interrupt source Bank1 */ 547 #define FLASH_IT_ERR FLASH_IT_ERR_BANK1 /*!< Error Interrupt source Bank1 */ 548 549 #define FLASH_IT_EOP_BANK1 FLASH_CR_EOPIE /*!< End of FLASH Operation Interrupt source Bank1 */ 550 #define FLASH_IT_ERR_BANK1 FLASH_CR_ERRIE /*!< Error Interrupt source Bank1 */ 551 552 #define FLASH_IT_EOP_BANK2 (FLASH_CR2_EOPIE << 16U) /*!< End of FLASH Operation Interrupt source Bank2 */ 553 #define FLASH_IT_ERR_BANK2 (FLASH_CR2_ERRIE << 16U) /*!< Error Interrupt source Bank2 */ 554 555 #else 556 557 #define FLASH_IT_EOP FLASH_CR_EOPIE /*!< End of FLASH Operation Interrupt source */ 558 #define FLASH_IT_ERR FLASH_CR_ERRIE /*!< Error Interrupt source */ 559 560 #endif 561 /** 562 * @} 563 */ 564 565 /** 566 * @} 567 */ 568 569 570 /** 571 * @} 572 */ 573 574 /* Exported macro ------------------------------------------------------------*/ 575 /** @defgroup FLASHEx_Exported_Macros FLASHEx Exported Macros 576 * @{ 577 */ 578 579 /** @defgroup FLASH_Interrupt Interrupt 580 * @brief macros to handle FLASH interrupts 581 * @{ 582 */ 583 584 #if defined(FLASH_BANK2_END) 585 /** 586 * @brief Enable the specified FLASH interrupt. 587 * @param __INTERRUPT__ FLASH interrupt 588 * This parameter can be any combination of the following values: 589 * @arg @ref FLASH_IT_EOP_BANK1 End of FLASH Operation Interrupt on bank1 590 * @arg @ref FLASH_IT_ERR_BANK1 Error Interrupt on bank1 591 * @arg @ref FLASH_IT_EOP_BANK2 End of FLASH Operation Interrupt on bank2 592 * @arg @ref FLASH_IT_ERR_BANK2 Error Interrupt on bank2 593 * @retval none 594 */ 595 #define __HAL_FLASH_ENABLE_IT(__INTERRUPT__) do { \ 596 /* Enable Bank1 IT */ \ 597 SET_BIT(FLASH->CR, ((__INTERRUPT__) & 0x0000FFFFU)); \ 598 /* Enable Bank2 IT */ \ 599 SET_BIT(FLASH->CR2, ((__INTERRUPT__) >> 16U)); \ 600 } while(0U) 601 602 /** 603 * @brief Disable the specified FLASH interrupt. 604 * @param __INTERRUPT__ FLASH interrupt 605 * This parameter can be any combination of the following values: 606 * @arg @ref FLASH_IT_EOP_BANK1 End of FLASH Operation Interrupt on bank1 607 * @arg @ref FLASH_IT_ERR_BANK1 Error Interrupt on bank1 608 * @arg @ref FLASH_IT_EOP_BANK2 End of FLASH Operation Interrupt on bank2 609 * @arg @ref FLASH_IT_ERR_BANK2 Error Interrupt on bank2 610 * @retval none 611 */ 612 #define __HAL_FLASH_DISABLE_IT(__INTERRUPT__) do { \ 613 /* Disable Bank1 IT */ \ 614 CLEAR_BIT(FLASH->CR, ((__INTERRUPT__) & 0x0000FFFFU)); \ 615 /* Disable Bank2 IT */ \ 616 CLEAR_BIT(FLASH->CR2, ((__INTERRUPT__) >> 16U)); \ 617 } while(0U) 618 619 /** 620 * @brief Get the specified FLASH flag status. 621 * @param __FLAG__ specifies the FLASH flag to check. 622 * This parameter can be one of the following values: 623 * @arg @ref FLASH_FLAG_EOP_BANK1 FLASH End of Operation flag on bank1 624 * @arg @ref FLASH_FLAG_WRPERR_BANK1 FLASH Write protected error flag on bank1 625 * @arg @ref FLASH_FLAG_PGERR_BANK1 FLASH Programming error flag on bank1 626 * @arg @ref FLASH_FLAG_BSY_BANK1 FLASH Busy flag on bank1 627 * @arg @ref FLASH_FLAG_EOP_BANK2 FLASH End of Operation flag on bank2 628 * @arg @ref FLASH_FLAG_WRPERR_BANK2 FLASH Write protected error flag on bank2 629 * @arg @ref FLASH_FLAG_PGERR_BANK2 FLASH Programming error flag on bank2 630 * @arg @ref FLASH_FLAG_BSY_BANK2 FLASH Busy flag on bank2 631 * @arg @ref FLASH_FLAG_OPTVERR Loaded OB and its complement do not match 632 * @retval The new state of __FLAG__ (SET or RESET). 633 */ 634 #define __HAL_FLASH_GET_FLAG(__FLAG__) (((__FLAG__) == FLASH_FLAG_OPTVERR) ? \ 635 (FLASH->OBR & FLASH_OBR_OPTERR) : \ 636 ((((__FLAG__) & SR_FLAG_MASK) != RESET)? \ 637 (FLASH->SR & ((__FLAG__) & SR_FLAG_MASK)) : \ 638 (FLASH->SR2 & ((__FLAG__) >> 16U)))) 639 640 /** 641 * @brief Clear the specified FLASH flag. 642 * @param __FLAG__ specifies the FLASH flags to clear. 643 * This parameter can be any combination of the following values: 644 * @arg @ref FLASH_FLAG_EOP_BANK1 FLASH End of Operation flag on bank1 645 * @arg @ref FLASH_FLAG_WRPERR_BANK1 FLASH Write protected error flag on bank1 646 * @arg @ref FLASH_FLAG_PGERR_BANK1 FLASH Programming error flag on bank1 647 * @arg @ref FLASH_FLAG_BSY_BANK1 FLASH Busy flag on bank1 648 * @arg @ref FLASH_FLAG_EOP_BANK2 FLASH End of Operation flag on bank2 649 * @arg @ref FLASH_FLAG_WRPERR_BANK2 FLASH Write protected error flag on bank2 650 * @arg @ref FLASH_FLAG_PGERR_BANK2 FLASH Programming error flag on bank2 651 * @arg @ref FLASH_FLAG_BSY_BANK2 FLASH Busy flag on bank2 652 * @arg @ref FLASH_FLAG_OPTVERR Loaded OB and its complement do not match 653 * @retval none 654 */ 655 #define __HAL_FLASH_CLEAR_FLAG(__FLAG__) do { \ 656 /* Clear FLASH_FLAG_OPTVERR flag */ \ 657 if ((__FLAG__) == FLASH_FLAG_OPTVERR) \ 658 { \ 659 CLEAR_BIT(FLASH->OBR, FLASH_OBR_OPTERR); \ 660 } \ 661 else { \ 662 /* Clear Flag in Bank1 */ \ 663 if (((__FLAG__) & SR_FLAG_MASK) != RESET) \ 664 { \ 665 FLASH->SR = ((__FLAG__) & SR_FLAG_MASK); \ 666 } \ 667 /* Clear Flag in Bank2 */ \ 668 if (((__FLAG__) >> 16U) != RESET) \ 669 { \ 670 FLASH->SR2 = ((__FLAG__) >> 16U); \ 671 } \ 672 } \ 673 } while(0U) 674 #else 675 /** 676 * @brief Enable the specified FLASH interrupt. 677 * @param __INTERRUPT__ FLASH interrupt 678 * This parameter can be any combination of the following values: 679 * @arg @ref FLASH_IT_EOP End of FLASH Operation Interrupt 680 * @arg @ref FLASH_IT_ERR Error Interrupt 681 * @retval none 682 */ 683 #define __HAL_FLASH_ENABLE_IT(__INTERRUPT__) (FLASH->CR |= (__INTERRUPT__)) 684 685 /** 686 * @brief Disable the specified FLASH interrupt. 687 * @param __INTERRUPT__ FLASH interrupt 688 * This parameter can be any combination of the following values: 689 * @arg @ref FLASH_IT_EOP End of FLASH Operation Interrupt 690 * @arg @ref FLASH_IT_ERR Error Interrupt 691 * @retval none 692 */ 693 #define __HAL_FLASH_DISABLE_IT(__INTERRUPT__) (FLASH->CR &= ~(__INTERRUPT__)) 694 695 /** 696 * @brief Get the specified FLASH flag status. 697 * @param __FLAG__ specifies the FLASH flag to check. 698 * This parameter can be one of the following values: 699 * @arg @ref FLASH_FLAG_EOP FLASH End of Operation flag 700 * @arg @ref FLASH_FLAG_WRPERR FLASH Write protected error flag 701 * @arg @ref FLASH_FLAG_PGERR FLASH Programming error flag 702 * @arg @ref FLASH_FLAG_BSY FLASH Busy flag 703 * @arg @ref FLASH_FLAG_OPTVERR Loaded OB and its complement do not match 704 * @retval The new state of __FLAG__ (SET or RESET). 705 */ 706 #define __HAL_FLASH_GET_FLAG(__FLAG__) (((__FLAG__) == FLASH_FLAG_OPTVERR) ? \ 707 (FLASH->OBR & FLASH_OBR_OPTERR) : \ 708 (FLASH->SR & (__FLAG__))) 709 /** 710 * @brief Clear the specified FLASH flag. 711 * @param __FLAG__ specifies the FLASH flags to clear. 712 * This parameter can be any combination of the following values: 713 * @arg @ref FLASH_FLAG_EOP FLASH End of Operation flag 714 * @arg @ref FLASH_FLAG_WRPERR FLASH Write protected error flag 715 * @arg @ref FLASH_FLAG_PGERR FLASH Programming error flag 716 * @arg @ref FLASH_FLAG_OPTVERR Loaded OB and its complement do not match 717 * @retval none 718 */ 719 #define __HAL_FLASH_CLEAR_FLAG(__FLAG__) do { \ 720 /* Clear FLASH_FLAG_OPTVERR flag */ \ 721 if ((__FLAG__) == FLASH_FLAG_OPTVERR) \ 722 { \ 723 CLEAR_BIT(FLASH->OBR, FLASH_OBR_OPTERR); \ 724 } \ 725 else { \ 726 /* Clear Flag in Bank1 */ \ 727 FLASH->SR = (__FLAG__); \ 728 } \ 729 } while(0U) 730 731 #endif 732 733 /** 734 * @} 735 */ 736 737 /** 738 * @} 739 */ 740 741 /* Exported functions --------------------------------------------------------*/ 742 /** @addtogroup FLASHEx_Exported_Functions 743 * @{ 744 */ 745 746 /** @addtogroup FLASHEx_Exported_Functions_Group1 747 * @{ 748 */ 749 /* IO operation functions *****************************************************/ 750 HAL_StatusTypeDef HAL_FLASHEx_Erase(FLASH_EraseInitTypeDef *pEraseInit, uint32_t *PageError); 751 HAL_StatusTypeDef HAL_FLASHEx_Erase_IT(FLASH_EraseInitTypeDef *pEraseInit); 752 753 /** 754 * @} 755 */ 756 757 /** @addtogroup FLASHEx_Exported_Functions_Group2 758 * @{ 759 */ 760 /* Peripheral Control functions ***********************************************/ 761 HAL_StatusTypeDef HAL_FLASHEx_OBErase(void); 762 HAL_StatusTypeDef HAL_FLASHEx_OBProgram(FLASH_OBProgramInitTypeDef *pOBInit); 763 void HAL_FLASHEx_OBGetConfig(FLASH_OBProgramInitTypeDef *pOBInit); 764 uint32_t HAL_FLASHEx_OBGetUserData(uint32_t DATAAdress); 765 /** 766 * @} 767 */ 768 769 /** 770 * @} 771 */ 772 773 /** 774 * @} 775 */ 776 777 /** 778 * @} 779 */ 780 #ifdef __cplusplus 781 } 782 #endif 783 784 #endif /* __STM32F1xx_HAL_FLASH_EX_H */ 785 786 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 787
