1 /** 2 ****************************************************************************** 3 * @file stm32f1xx_hal_dma_ex.h 4 * @author MCD Application Team 5 * @brief Header file of DMA HAL extension module. 6 ****************************************************************************** 7 * @attention 8 * 9 * <h2><center>© Copyright (c) 2016 STMicroelectronics. 10 * All rights reserved.</center></h2> 11 * 12 * This software component is licensed by ST under BSD 3-Clause license, 13 * the "License"; You may not use this file except in compliance with the 14 * License. You may obtain a copy of the License at: 15 * opensource.org/licenses/BSD-3-Clause 16 * 17 ****************************************************************************** 18 */ 19 20 /* Define to prevent recursive inclusion -------------------------------------*/ 21 #ifndef __STM32F1xx_HAL_DMA_EX_H 22 #define __STM32F1xx_HAL_DMA_EX_H 23 24 #ifdef __cplusplus 25 extern "C" { 26 #endif 27 28 /* Includes ------------------------------------------------------------------*/ 29 #include "stm32f1xx_hal_def.h" 30 31 /** @addtogroup STM32F1xx_HAL_Driver 32 * @{ 33 */ 34 35 /** @defgroup DMAEx DMAEx 36 * @{ 37 */ 38 39 /* Exported types ------------------------------------------------------------*/ 40 /* Exported constants --------------------------------------------------------*/ 41 /* Exported macro ------------------------------------------------------------*/ 42 /** @defgroup DMAEx_Exported_Macros DMA Extended Exported Macros 43 * @{ 44 */ 45 /* Interrupt & Flag management */ 46 #if defined (STM32F100xE) || defined (STM32F101xE) || defined (STM32F101xG) || defined (STM32F103xE) || \ 47 defined (STM32F103xG) || defined (STM32F105xC) || defined (STM32F107xC) 48 /** @defgroup DMAEx_High_density_XL_density_Product_devices DMAEx High density and XL density product devices 49 * @{ 50 */ 51 52 /** 53 * @brief Returns the current DMA Channel transfer complete flag. 54 * @param __HANDLE__: DMA handle 55 * @retval The specified transfer complete flag index. 56 */ 57 #define __HAL_DMA_GET_TC_FLAG_INDEX(__HANDLE__) \ 58 (((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel1))? DMA_FLAG_TC1 :\ 59 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel2))? DMA_FLAG_TC2 :\ 60 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel3))? DMA_FLAG_TC3 :\ 61 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel4))? DMA_FLAG_TC4 :\ 62 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel5))? DMA_FLAG_TC5 :\ 63 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel6))? DMA_FLAG_TC6 :\ 64 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel7))? DMA_FLAG_TC7 :\ 65 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel1))? DMA_FLAG_TC1 :\ 66 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel2))? DMA_FLAG_TC2 :\ 67 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel3))? DMA_FLAG_TC3 :\ 68 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel4))? DMA_FLAG_TC4 :\ 69 DMA_FLAG_TC5) 70 71 /** 72 * @brief Returns the current DMA Channel half transfer complete flag. 73 * @param __HANDLE__: DMA handle 74 * @retval The specified half transfer complete flag index. 75 */ 76 #define __HAL_DMA_GET_HT_FLAG_INDEX(__HANDLE__)\ 77 (((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel1))? DMA_FLAG_HT1 :\ 78 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel2))? DMA_FLAG_HT2 :\ 79 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel3))? DMA_FLAG_HT3 :\ 80 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel4))? DMA_FLAG_HT4 :\ 81 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel5))? DMA_FLAG_HT5 :\ 82 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel6))? DMA_FLAG_HT6 :\ 83 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel7))? DMA_FLAG_HT7 :\ 84 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel1))? DMA_FLAG_HT1 :\ 85 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel2))? DMA_FLAG_HT2 :\ 86 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel3))? DMA_FLAG_HT3 :\ 87 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel4))? DMA_FLAG_HT4 :\ 88 DMA_FLAG_HT5) 89 90 /** 91 * @brief Returns the current DMA Channel transfer error flag. 92 * @param __HANDLE__: DMA handle 93 * @retval The specified transfer error flag index. 94 */ 95 #define __HAL_DMA_GET_TE_FLAG_INDEX(__HANDLE__)\ 96 (((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel1))? DMA_FLAG_TE1 :\ 97 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel2))? DMA_FLAG_TE2 :\ 98 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel3))? DMA_FLAG_TE3 :\ 99 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel4))? DMA_FLAG_TE4 :\ 100 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel5))? DMA_FLAG_TE5 :\ 101 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel6))? DMA_FLAG_TE6 :\ 102 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel7))? DMA_FLAG_TE7 :\ 103 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel1))? DMA_FLAG_TE1 :\ 104 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel2))? DMA_FLAG_TE2 :\ 105 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel3))? DMA_FLAG_TE3 :\ 106 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel4))? DMA_FLAG_TE4 :\ 107 DMA_FLAG_TE5) 108 109 /** 110 * @brief Return the current DMA Channel Global interrupt flag. 111 * @param __HANDLE__: DMA handle 112 * @retval The specified transfer error flag index. 113 */ 114 #define __HAL_DMA_GET_GI_FLAG_INDEX(__HANDLE__)\ 115 (((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel1))? DMA_FLAG_GL1 :\ 116 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel2))? DMA_FLAG_GL2 :\ 117 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel3))? DMA_FLAG_GL3 :\ 118 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel4))? DMA_FLAG_GL4 :\ 119 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel5))? DMA_FLAG_GL5 :\ 120 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel6))? DMA_FLAG_GL6 :\ 121 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel7))? DMA_FLAG_GL7 :\ 122 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel1))? DMA_FLAG_GL1 :\ 123 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel2))? DMA_FLAG_GL2 :\ 124 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel3))? DMA_FLAG_GL3 :\ 125 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel4))? DMA_FLAG_GL4 :\ 126 DMA_FLAG_GL5) 127 128 /** 129 * @brief Get the DMA Channel pending flags. 130 * @param __HANDLE__: DMA handle 131 * @param __FLAG__: Get the specified flag. 132 * This parameter can be any combination of the following values: 133 * @arg DMA_FLAG_TCx: Transfer complete flag 134 * @arg DMA_FLAG_HTx: Half transfer complete flag 135 * @arg DMA_FLAG_TEx: Transfer error flag 136 * Where x can be 1_7 or 1_5 (depending on DMA1 or DMA2) to select the DMA Channel flag. 137 * @retval The state of FLAG (SET or RESET). 138 */ 139 #define __HAL_DMA_GET_FLAG(__HANDLE__, __FLAG__)\ 140 (((uint32_t)((__HANDLE__)->Instance) > (uint32_t)DMA1_Channel7)? (DMA2->ISR & (__FLAG__)) :\ 141 (DMA1->ISR & (__FLAG__))) 142 143 /** 144 * @brief Clears the DMA Channel pending flags. 145 * @param __HANDLE__: DMA handle 146 * @param __FLAG__: specifies the flag to clear. 147 * This parameter can be any combination of the following values: 148 * @arg DMA_FLAG_TCx: Transfer complete flag 149 * @arg DMA_FLAG_HTx: Half transfer complete flag 150 * @arg DMA_FLAG_TEx: Transfer error flag 151 * Where x can be 1_7 or 1_5 (depending on DMA1 or DMA2) to select the DMA Channel flag. 152 * @retval None 153 */ 154 #define __HAL_DMA_CLEAR_FLAG(__HANDLE__, __FLAG__) \ 155 (((uint32_t)((__HANDLE__)->Instance) > (uint32_t)DMA1_Channel7)? (DMA2->IFCR = (__FLAG__)) :\ 156 (DMA1->IFCR = (__FLAG__))) 157 158 /** 159 * @} 160 */ 161 162 #else 163 /** @defgroup DMA_Low_density_Medium_density_Product_devices DMA Low density and Medium density product devices 164 * @{ 165 */ 166 167 /** 168 * @brief Returns the current DMA Channel transfer complete flag. 169 * @param __HANDLE__: DMA handle 170 * @retval The specified transfer complete flag index. 171 */ 172 #define __HAL_DMA_GET_TC_FLAG_INDEX(__HANDLE__) \ 173 (((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel1))? DMA_FLAG_TC1 :\ 174 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel2))? DMA_FLAG_TC2 :\ 175 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel3))? DMA_FLAG_TC3 :\ 176 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel4))? DMA_FLAG_TC4 :\ 177 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel5))? DMA_FLAG_TC5 :\ 178 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel6))? DMA_FLAG_TC6 :\ 179 DMA_FLAG_TC7) 180 181 /** 182 * @brief Return the current DMA Channel half transfer complete flag. 183 * @param __HANDLE__: DMA handle 184 * @retval The specified half transfer complete flag index. 185 */ 186 #define __HAL_DMA_GET_HT_FLAG_INDEX(__HANDLE__)\ 187 (((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel1))? DMA_FLAG_HT1 :\ 188 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel2))? DMA_FLAG_HT2 :\ 189 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel3))? DMA_FLAG_HT3 :\ 190 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel4))? DMA_FLAG_HT4 :\ 191 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel5))? DMA_FLAG_HT5 :\ 192 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel6))? DMA_FLAG_HT6 :\ 193 DMA_FLAG_HT7) 194 195 /** 196 * @brief Return the current DMA Channel transfer error flag. 197 * @param __HANDLE__: DMA handle 198 * @retval The specified transfer error flag index. 199 */ 200 #define __HAL_DMA_GET_TE_FLAG_INDEX(__HANDLE__)\ 201 (((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel1))? DMA_FLAG_TE1 :\ 202 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel2))? DMA_FLAG_TE2 :\ 203 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel3))? DMA_FLAG_TE3 :\ 204 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel4))? DMA_FLAG_TE4 :\ 205 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel5))? DMA_FLAG_TE5 :\ 206 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel6))? DMA_FLAG_TE6 :\ 207 DMA_FLAG_TE7) 208 209 /** 210 * @brief Return the current DMA Channel Global interrupt flag. 211 * @param __HANDLE__: DMA handle 212 * @retval The specified transfer error flag index. 213 */ 214 #define __HAL_DMA_GET_GI_FLAG_INDEX(__HANDLE__)\ 215 (((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel1))? DMA_FLAG_GL1 :\ 216 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel2))? DMA_FLAG_GL2 :\ 217 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel3))? DMA_FLAG_GL3 :\ 218 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel4))? DMA_FLAG_GL4 :\ 219 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel5))? DMA_FLAG_GL5 :\ 220 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel6))? DMA_FLAG_GL6 :\ 221 DMA_FLAG_GL7) 222 223 /** 224 * @brief Get the DMA Channel pending flags. 225 * @param __HANDLE__: DMA handle 226 * @param __FLAG__: Get the specified flag. 227 * This parameter can be any combination of the following values: 228 * @arg DMA_FLAG_TCx: Transfer complete flag 229 * @arg DMA_FLAG_HTx: Half transfer complete flag 230 * @arg DMA_FLAG_TEx: Transfer error flag 231 * @arg DMA_FLAG_GLx: Global interrupt flag 232 * Where x can be 1_7 to select the DMA Channel flag. 233 * @retval The state of FLAG (SET or RESET). 234 */ 235 236 #define __HAL_DMA_GET_FLAG(__HANDLE__, __FLAG__) (DMA1->ISR & (__FLAG__)) 237 238 /** 239 * @brief Clear the DMA Channel pending flags. 240 * @param __HANDLE__: DMA handle 241 * @param __FLAG__: specifies the flag to clear. 242 * This parameter can be any combination of the following values: 243 * @arg DMA_FLAG_TCx: Transfer complete flag 244 * @arg DMA_FLAG_HTx: Half transfer complete flag 245 * @arg DMA_FLAG_TEx: Transfer error flag 246 * @arg DMA_FLAG_GLx: Global interrupt flag 247 * Where x can be 1_7 to select the DMA Channel flag. 248 * @retval None 249 */ 250 #define __HAL_DMA_CLEAR_FLAG(__HANDLE__, __FLAG__) (DMA1->IFCR = (__FLAG__)) 251 252 /** 253 * @} 254 */ 255 256 #endif 257 258 /** 259 * @} 260 */ 261 262 /** 263 * @} 264 */ 265 266 /** 267 * @} 268 */ 269 270 #ifdef __cplusplus 271 } 272 #endif /* STM32F100xE || STM32F101xE || STM32F101xG || STM32F103xE || */ 273 /* STM32F103xG || STM32F105xC || STM32F107xC */ 274 275 #endif /* __STM32F1xx_HAL_DMA_H */ 276 277 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 278
