1 /**
2 ******************************************************************************
3 * @file stm32f0xx_ll_usart.c
4 * @author MCD Application Team
5 * @brief USART LL module driver.
6 ******************************************************************************
7 * @attention
8 *
9 * Copyright (c) 2016 STMicroelectronics.
10 * All rights reserved.
11 *
12 * This software is licensed under terms that can be found in the LICENSE file
13 * in the root directory of this software component.
14 * If no LICENSE file comes with this software, it is provided AS-IS.
15 *
16 ******************************************************************************
17 */
18 #if defined(USE_FULL_LL_DRIVER)
19
20 /* Includes ------------------------------------------------------------------*/
21 #include "stm32f0xx_ll_usart.h"
22 #include "stm32f0xx_ll_rcc.h"
23 #include "stm32f0xx_ll_bus.h"
24 #ifdef USE_FULL_ASSERT
25 #include "stm32_assert.h"
26 #else
27 #define assert_param(expr) ((void)0U)
28 #endif /* USE_FULL_ASSERT */
29
30 /** @addtogroup STM32F0xx_LL_Driver
31 * @{
32 */
33
34 #if defined(USART1) || defined(USART2) || defined(USART3) || defined(UART4) || defined(UART5) \
35 || defined(USART6) || defined(USART7) || defined(USART8)
36
37 /** @addtogroup USART_LL
38 * @{
39 */
40
41 /* Private types -------------------------------------------------------------*/
42 /* Private variables ---------------------------------------------------------*/
43 /* Private constants ---------------------------------------------------------*/
44 /** @addtogroup USART_LL_Private_Constants
45 * @{
46 */
47
48 /* Definition of default baudrate value used for USART initialisation */
49 #define USART_DEFAULT_BAUDRATE (9600U)
50
51 /**
52 * @}
53 */
54
55 /* Private macros ------------------------------------------------------------*/
56 /** @addtogroup USART_LL_Private_Macros
57 * @{
58 */
59
60 /* __BAUDRATE__ The maximum Baud Rate is derived from the maximum clock available
61 * divided by the smallest oversampling used on the USART (i.e. 8) */
62 #define IS_LL_USART_BAUDRATE(__BAUDRATE__) ((__BAUDRATE__) <= 6000000U)
63
64 /* __VALUE__ In case of oversampling by 16 and 8, BRR content must be greater than or equal to 16d. */
65 #define IS_LL_USART_BRR_MIN(__VALUE__) ((__VALUE__) >= 16U)
66
67 #define IS_LL_USART_DIRECTION(__VALUE__) (((__VALUE__) == LL_USART_DIRECTION_NONE) \
68 || ((__VALUE__) == LL_USART_DIRECTION_RX) \
69 || ((__VALUE__) == LL_USART_DIRECTION_TX) \
70 || ((__VALUE__) == LL_USART_DIRECTION_TX_RX))
71
72 #define IS_LL_USART_PARITY(__VALUE__) (((__VALUE__) == LL_USART_PARITY_NONE) \
73 || ((__VALUE__) == LL_USART_PARITY_EVEN) \
74 || ((__VALUE__) == LL_USART_PARITY_ODD))
75
76 #if defined(USART_7BITS_SUPPORT)
77 #define IS_LL_USART_DATAWIDTH(__VALUE__) (((__VALUE__) == LL_USART_DATAWIDTH_7B) \
78 || ((__VALUE__) == LL_USART_DATAWIDTH_8B) \
79 || ((__VALUE__) == LL_USART_DATAWIDTH_9B))
80 #else
81 #define IS_LL_USART_DATAWIDTH(__VALUE__) (((__VALUE__) == LL_USART_DATAWIDTH_8B) \
82 || ((__VALUE__) == LL_USART_DATAWIDTH_9B))
83 #endif /* USART_7BITS_SUPPORT */
84
85 #define IS_LL_USART_OVERSAMPLING(__VALUE__) (((__VALUE__) == LL_USART_OVERSAMPLING_16) \
86 || ((__VALUE__) == LL_USART_OVERSAMPLING_8))
87
88 #define IS_LL_USART_LASTBITCLKOUTPUT(__VALUE__) (((__VALUE__) == LL_USART_LASTCLKPULSE_NO_OUTPUT) \
89 || ((__VALUE__) == LL_USART_LASTCLKPULSE_OUTPUT))
90
91 #define IS_LL_USART_CLOCKPHASE(__VALUE__) (((__VALUE__) == LL_USART_PHASE_1EDGE) \
92 || ((__VALUE__) == LL_USART_PHASE_2EDGE))
93
94 #define IS_LL_USART_CLOCKPOLARITY(__VALUE__) (((__VALUE__) == LL_USART_POLARITY_LOW) \
95 || ((__VALUE__) == LL_USART_POLARITY_HIGH))
96
97 #define IS_LL_USART_CLOCKOUTPUT(__VALUE__) (((__VALUE__) == LL_USART_CLOCK_DISABLE) \
98 || ((__VALUE__) == LL_USART_CLOCK_ENABLE))
99
100 #if defined(USART_SMARTCARD_SUPPORT)
101 #define IS_LL_USART_STOPBITS(__VALUE__) (((__VALUE__) == LL_USART_STOPBITS_0_5) \
102 || ((__VALUE__) == LL_USART_STOPBITS_1) \
103 || ((__VALUE__) == LL_USART_STOPBITS_1_5) \
104 || ((__VALUE__) == LL_USART_STOPBITS_2))
105 #else
106 #define IS_LL_USART_STOPBITS(__VALUE__) (((__VALUE__) == LL_USART_STOPBITS_1) \
107 || ((__VALUE__) == LL_USART_STOPBITS_2))
108 #endif /* USART_SMARTCARD_SUPPORT */
109
110 #define IS_LL_USART_HWCONTROL(__VALUE__) (((__VALUE__) == LL_USART_HWCONTROL_NONE) \
111 || ((__VALUE__) == LL_USART_HWCONTROL_RTS) \
112 || ((__VALUE__) == LL_USART_HWCONTROL_CTS) \
113 || ((__VALUE__) == LL_USART_HWCONTROL_RTS_CTS))
114
115 /**
116 * @}
117 */
118
119 /* Private function prototypes -----------------------------------------------*/
120
121 /* Exported functions --------------------------------------------------------*/
122 /** @addtogroup USART_LL_Exported_Functions
123 * @{
124 */
125
126 /** @addtogroup USART_LL_EF_Init
127 * @{
128 */
129
130 /**
131 * @brief De-initialize USART registers (Registers restored to their default values).
132 * @param USARTx USART Instance
133 * @retval An ErrorStatus enumeration value:
134 * - SUCCESS: USART registers are de-initialized
135 * - ERROR: USART registers are not de-initialized
136 */
LL_USART_DeInit(const USART_TypeDef * USARTx)137 ErrorStatus LL_USART_DeInit(const USART_TypeDef *USARTx)
138 {
139 ErrorStatus status = SUCCESS;
140
141 /* Check the parameters */
142 assert_param(IS_UART_INSTANCE(USARTx));
143
144 if (USARTx == USART1)
145 {
146 /* Force reset of USART clock */
147 LL_APB1_GRP2_ForceReset(LL_APB1_GRP2_PERIPH_USART1);
148
149 /* Release reset of USART clock */
150 LL_APB1_GRP2_ReleaseReset(LL_APB1_GRP2_PERIPH_USART1);
151 }
152 #if defined(USART2)
153 else if (USARTx == USART2)
154 {
155 /* Force reset of USART clock */
156 LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_USART2);
157
158 /* Release reset of USART clock */
159 LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_USART2);
160 }
161 #endif /* USART2 */
162 #if defined(USART3)
163 else if (USARTx == USART3)
164 {
165 /* Force reset of USART clock */
166 LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_USART3);
167
168 /* Release reset of USART clock */
169 LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_USART3);
170 }
171 #endif /* USART3 */
172 #if defined(USART4)
173 else if (USARTx == USART4)
174 {
175 /* Force reset of USART clock */
176 LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_USART4);
177
178 /* Release reset of USART clock */
179 LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_USART4);
180 }
181 #endif /* USART4 */
182 #if defined(USART5)
183 else if (USARTx == USART5)
184 {
185 /* Force reset of USART clock */
186 LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_USART5);
187
188 /* Release reset of USART clock */
189 LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_USART5);
190 }
191 #endif /* USART5 */
192 #if defined(USART6)
193 else if (USARTx == USART6)
194 {
195 /* Force reset of USART clock */
196 LL_APB1_GRP2_ForceReset(LL_APB1_GRP2_PERIPH_USART6);
197
198 /* Release reset of USART clock */
199 LL_APB1_GRP2_ReleaseReset(LL_APB1_GRP2_PERIPH_USART6);
200 }
201 #endif /* USART6 */
202 #if defined(USART7)
203 else if (USARTx == USART7)
204 {
205 /* Force reset of USART clock */
206 LL_APB1_GRP2_ForceReset(LL_APB1_GRP2_PERIPH_USART7);
207
208 /* Release reset of USART clock */
209 LL_APB1_GRP2_ReleaseReset(LL_APB1_GRP2_PERIPH_USART7);
210 }
211 #endif /* USART7 */
212 #if defined(USART8)
213 else if (USARTx == USART8)
214 {
215 /* Force reset of USART clock */
216 LL_APB1_GRP2_ForceReset(LL_APB1_GRP2_PERIPH_USART8);
217
218 /* Release reset of USART clock */
219 LL_APB1_GRP2_ReleaseReset(LL_APB1_GRP2_PERIPH_USART8);
220 }
221 #endif /* USART8 */
222 else
223 {
224 status = ERROR;
225 }
226
227 return (status);
228 }
229
230 /**
231 * @brief Initialize USART registers according to the specified
232 * parameters in USART_InitStruct.
233 * @note As some bits in USART configuration registers can only be written when
234 * the USART is disabled (USART_CR1_UE bit =0), USART Peripheral should be in disabled state prior calling
235 * this function. Otherwise, ERROR result will be returned.
236 * @note Baud rate value stored in USART_InitStruct BaudRate field, should be valid (different from 0).
237 * @param USARTx USART Instance
238 * @param USART_InitStruct pointer to a LL_USART_InitTypeDef structure
239 * that contains the configuration information for the specified USART peripheral.
240 * @retval An ErrorStatus enumeration value:
241 * - SUCCESS: USART registers are initialized according to USART_InitStruct content
242 * - ERROR: Problem occurred during USART Registers initialization
243 */
LL_USART_Init(USART_TypeDef * USARTx,const LL_USART_InitTypeDef * USART_InitStruct)244 ErrorStatus LL_USART_Init(USART_TypeDef *USARTx, const LL_USART_InitTypeDef *USART_InitStruct)
245 {
246 ErrorStatus status = ERROR;
247 uint32_t periphclk = LL_RCC_PERIPH_FREQUENCY_NO;
248 #if defined(USART2)||defined(USART3)||defined(USART4)
249 LL_RCC_ClocksTypeDef RCC_Clocks;
250 #endif /* USART2 ||USART3 || USART4 */
251
252 /* Check the parameters */
253 assert_param(IS_UART_INSTANCE(USARTx));
254 assert_param(IS_LL_USART_BAUDRATE(USART_InitStruct->BaudRate));
255 assert_param(IS_LL_USART_DATAWIDTH(USART_InitStruct->DataWidth));
256 assert_param(IS_LL_USART_STOPBITS(USART_InitStruct->StopBits));
257 assert_param(IS_LL_USART_PARITY(USART_InitStruct->Parity));
258 assert_param(IS_LL_USART_DIRECTION(USART_InitStruct->TransferDirection));
259 assert_param(IS_LL_USART_HWCONTROL(USART_InitStruct->HardwareFlowControl));
260 assert_param(IS_LL_USART_OVERSAMPLING(USART_InitStruct->OverSampling));
261
262 /* USART needs to be in disabled state, in order to be able to configure some bits in
263 CRx registers */
264 if (LL_USART_IsEnabled(USARTx) == 0U)
265 {
266 /*---------------------------- USART CR1 Configuration ---------------------
267 * Configure USARTx CR1 (USART Word Length, Parity, Mode and Oversampling bits) with parameters:
268 * - DataWidth: USART_CR1_M bits according to USART_InitStruct->DataWidth value
269 * - Parity: USART_CR1_PCE, USART_CR1_PS bits according to USART_InitStruct->Parity value
270 * - TransferDirection: USART_CR1_TE, USART_CR1_RE bits according to USART_InitStruct->TransferDirection value
271 * - Oversampling: USART_CR1_OVER8 bit according to USART_InitStruct->OverSampling value.
272 */
273 MODIFY_REG(USARTx->CR1,
274 (USART_CR1_M | USART_CR1_PCE | USART_CR1_PS |
275 USART_CR1_TE | USART_CR1_RE | USART_CR1_OVER8),
276 (USART_InitStruct->DataWidth | USART_InitStruct->Parity |
277 USART_InitStruct->TransferDirection | USART_InitStruct->OverSampling));
278
279 /*---------------------------- USART CR2 Configuration ---------------------
280 * Configure USARTx CR2 (Stop bits) with parameters:
281 * - Stop Bits: USART_CR2_STOP bits according to USART_InitStruct->StopBits value.
282 * - CLKEN, CPOL, CPHA and LBCL bits are to be configured using LL_USART_ClockInit().
283 */
284 LL_USART_SetStopBitsLength(USARTx, USART_InitStruct->StopBits);
285
286 /*---------------------------- USART CR3 Configuration ---------------------
287 * Configure USARTx CR3 (Hardware Flow Control) with parameters:
288 * - HardwareFlowControl: USART_CR3_RTSE, USART_CR3_CTSE bits according to
289 * USART_InitStruct->HardwareFlowControl value.
290 */
291 LL_USART_SetHWFlowCtrl(USARTx, USART_InitStruct->HardwareFlowControl);
292
293 /*---------------------------- USART BRR Configuration ---------------------
294 * Retrieve Clock frequency used for USART Peripheral
295 */
296 if (USARTx == USART1)
297 {
298 periphclk = LL_RCC_GetUSARTClockFreq(LL_RCC_USART1_CLKSOURCE);
299 }
300 #if defined(USART2)
301 else if (USARTx == USART2)
302 {
303 #if defined(RCC_CFGR3_USART2SW)
304 periphclk = LL_RCC_GetUSARTClockFreq(LL_RCC_USART2_CLKSOURCE);
305 #else
306 /* USART2 clock is PCLK */
307 LL_RCC_GetSystemClocksFreq(&RCC_Clocks);
308 periphclk = RCC_Clocks.PCLK1_Frequency;
309 #endif /* USART2 Clock selector flag */
310 }
311 #endif /* USART2 */
312 #if defined(USART3)
313 else if (USARTx == USART3)
314 {
315 #if defined(RCC_CFGR3_USART3SW)
316 periphclk = LL_RCC_GetUSARTClockFreq(LL_RCC_USART3_CLKSOURCE);
317 #else
318 /* USART3 clock is PCLK */
319 LL_RCC_GetSystemClocksFreq(&RCC_Clocks);
320 periphclk = RCC_Clocks.PCLK1_Frequency;
321 #endif /* USART3 Clock selector flag */
322 }
323 #endif /* USART3 */
324 #if defined(USART4)
325 else if (USARTx == USART4)
326 {
327 /* USART4 clock is PCLK1 */
328 LL_RCC_GetSystemClocksFreq(&RCC_Clocks);
329 periphclk = RCC_Clocks.PCLK1_Frequency;
330 }
331 #endif /* USART4 */
332 #if defined(USART5)
333 else if (USARTx == USART5)
334 {
335 /* USART5 clock is PCLK1 */
336 LL_RCC_GetSystemClocksFreq(&RCC_Clocks);
337 periphclk = RCC_Clocks.PCLK1_Frequency;
338 }
339 #endif /* USART5 */
340 #if defined(USART6)
341 else if (USARTx == USART6)
342 {
343 /* USART6 clock is PCLK1 */
344 LL_RCC_GetSystemClocksFreq(&RCC_Clocks);
345 periphclk = RCC_Clocks.PCLK1_Frequency;
346 }
347 #endif /* USART6 */
348 #if defined(USART7)
349 else if (USARTx == USART7)
350 {
351 /* USART7 clock is PCLK */
352 LL_RCC_GetSystemClocksFreq(&RCC_Clocks);
353 periphclk = RCC_Clocks.PCLK1_Frequency;
354 }
355 #endif /* USART7 */
356 #if defined(USART8)
357 else if (USARTx == USART8)
358 {
359 /* USART8 clock is PCLK */
360 LL_RCC_GetSystemClocksFreq(&RCC_Clocks);
361 periphclk = RCC_Clocks.PCLK1_Frequency;
362 }
363 #endif /* USART8 */
364 else
365 {
366 /* Nothing to do, as error code is already assigned to ERROR value */
367 }
368
369 /* Configure the USART Baud Rate :
370 - valid baud rate value (different from 0) is required
371 - Peripheral clock as returned by RCC service, should be valid (different from 0).
372 */
373 if ((periphclk != LL_RCC_PERIPH_FREQUENCY_NO)
374 && (USART_InitStruct->BaudRate != 0U))
375 {
376 status = SUCCESS;
377 LL_USART_SetBaudRate(USARTx,
378 periphclk,
379 USART_InitStruct->OverSampling,
380 USART_InitStruct->BaudRate);
381
382 /* Check BRR is greater than or equal to 16d */
383 assert_param(IS_LL_USART_BRR_MIN(USARTx->BRR));
384 }
385 }
386 /* Endif (=> USART not in Disabled state => return ERROR) */
387
388 return (status);
389 }
390
391 /**
392 * @brief Set each @ref LL_USART_InitTypeDef field to default value.
393 * @param USART_InitStruct pointer to a @ref LL_USART_InitTypeDef structure
394 * whose fields will be set to default values.
395 * @retval None
396 */
397
LL_USART_StructInit(LL_USART_InitTypeDef * USART_InitStruct)398 void LL_USART_StructInit(LL_USART_InitTypeDef *USART_InitStruct)
399 {
400 /* Set USART_InitStruct fields to default values */
401 USART_InitStruct->BaudRate = USART_DEFAULT_BAUDRATE;
402 USART_InitStruct->DataWidth = LL_USART_DATAWIDTH_8B;
403 USART_InitStruct->StopBits = LL_USART_STOPBITS_1;
404 USART_InitStruct->Parity = LL_USART_PARITY_NONE ;
405 USART_InitStruct->TransferDirection = LL_USART_DIRECTION_TX_RX;
406 USART_InitStruct->HardwareFlowControl = LL_USART_HWCONTROL_NONE;
407 USART_InitStruct->OverSampling = LL_USART_OVERSAMPLING_16;
408 }
409
410 /**
411 * @brief Initialize USART Clock related settings according to the
412 * specified parameters in the USART_ClockInitStruct.
413 * @note As some bits in USART configuration registers can only be written when
414 * the USART is disabled (USART_CR1_UE bit =0), USART Peripheral should be in disabled state prior calling
415 * this function. Otherwise, ERROR result will be returned.
416 * @param USARTx USART Instance
417 * @param USART_ClockInitStruct pointer to a @ref LL_USART_ClockInitTypeDef structure
418 * that contains the Clock configuration information for the specified USART peripheral.
419 * @retval An ErrorStatus enumeration value:
420 * - SUCCESS: USART registers related to Clock settings are initialized according
421 * to USART_ClockInitStruct content
422 * - ERROR: Problem occurred during USART Registers initialization
423 */
LL_USART_ClockInit(USART_TypeDef * USARTx,const LL_USART_ClockInitTypeDef * USART_ClockInitStruct)424 ErrorStatus LL_USART_ClockInit(USART_TypeDef *USARTx, const LL_USART_ClockInitTypeDef *USART_ClockInitStruct)
425 {
426 ErrorStatus status = SUCCESS;
427
428 /* Check USART Instance and Clock signal output parameters */
429 assert_param(IS_UART_INSTANCE(USARTx));
430 assert_param(IS_LL_USART_CLOCKOUTPUT(USART_ClockInitStruct->ClockOutput));
431
432 /* USART needs to be in disabled state, in order to be able to configure some bits in
433 CRx registers */
434 if (LL_USART_IsEnabled(USARTx) == 0U)
435 {
436 /* If USART Clock signal is disabled */
437 if (USART_ClockInitStruct->ClockOutput == LL_USART_CLOCK_DISABLE)
438 {
439 /* Deactivate Clock signal delivery :
440 * - Disable Clock Output: USART_CR2_CLKEN cleared
441 */
442 LL_USART_DisableSCLKOutput(USARTx);
443 }
444 else
445 {
446 /* Ensure USART instance is USART capable */
447 assert_param(IS_USART_INSTANCE(USARTx));
448
449 /* Check clock related parameters */
450 assert_param(IS_LL_USART_CLOCKPOLARITY(USART_ClockInitStruct->ClockPolarity));
451 assert_param(IS_LL_USART_CLOCKPHASE(USART_ClockInitStruct->ClockPhase));
452 assert_param(IS_LL_USART_LASTBITCLKOUTPUT(USART_ClockInitStruct->LastBitClockPulse));
453
454 /*---------------------------- USART CR2 Configuration -----------------------
455 * Configure USARTx CR2 (Clock signal related bits) with parameters:
456 * - Enable Clock Output: USART_CR2_CLKEN set
457 * - Clock Polarity: USART_CR2_CPOL bit according to USART_ClockInitStruct->ClockPolarity value
458 * - Clock Phase: USART_CR2_CPHA bit according to USART_ClockInitStruct->ClockPhase value
459 * - Last Bit Clock Pulse Output: USART_CR2_LBCL bit according to USART_ClockInitStruct->LastBitClockPulse value.
460 */
461 MODIFY_REG(USARTx->CR2,
462 USART_CR2_CLKEN | USART_CR2_CPHA | USART_CR2_CPOL | USART_CR2_LBCL,
463 USART_CR2_CLKEN | USART_ClockInitStruct->ClockPolarity |
464 USART_ClockInitStruct->ClockPhase | USART_ClockInitStruct->LastBitClockPulse);
465 }
466 }
467 /* Else (USART not in Disabled state => return ERROR */
468 else
469 {
470 status = ERROR;
471 }
472
473 return (status);
474 }
475
476 /**
477 * @brief Set each field of a @ref LL_USART_ClockInitTypeDef type structure to default value.
478 * @param USART_ClockInitStruct pointer to a @ref LL_USART_ClockInitTypeDef structure
479 * whose fields will be set to default values.
480 * @retval None
481 */
LL_USART_ClockStructInit(LL_USART_ClockInitTypeDef * USART_ClockInitStruct)482 void LL_USART_ClockStructInit(LL_USART_ClockInitTypeDef *USART_ClockInitStruct)
483 {
484 /* Set LL_USART_ClockInitStruct fields with default values */
485 USART_ClockInitStruct->ClockOutput = LL_USART_CLOCK_DISABLE;
486 USART_ClockInitStruct->ClockPolarity = LL_USART_POLARITY_LOW; /* Not relevant when ClockOutput =
487 LL_USART_CLOCK_DISABLE */
488 USART_ClockInitStruct->ClockPhase = LL_USART_PHASE_1EDGE; /* Not relevant when ClockOutput =
489 LL_USART_CLOCK_DISABLE */
490 USART_ClockInitStruct->LastBitClockPulse = LL_USART_LASTCLKPULSE_NO_OUTPUT; /* Not relevant when ClockOutput =
491 LL_USART_CLOCK_DISABLE */
492 }
493
494 /**
495 * @}
496 */
497
498 /**
499 * @}
500 */
501
502 /**
503 * @}
504 */
505
506 #endif /* USART1 || USART2 || USART3 || UART4 || UART5 || USART6 || USART7 || USART8 */
507
508 /**
509 * @}
510 */
511
512 #endif /* USE_FULL_LL_DRIVER */
513
514
515
