1 /**
2 ******************************************************************************
3 * @file stm32f0xx_hal_tim_ex.c
4 * @author MCD Application Team
5 * @brief TIM HAL module driver.
6 * This file provides firmware functions to manage the following
7 * functionalities of the Timer Extended peripheral:
8 * + Time Hall Sensor Interface Initialization
9 * + Time Hall Sensor Interface Start
10 * + Time Complementary signal break and dead time configuration
11 * + Time Master and Slave synchronization configuration
12 * + Time OCRef clear configuration
13 * + Timer remapping capabilities configuration
14 ******************************************************************************
15 * @attention
16 *
17 * Copyright (c) 2016 STMicroelectronics.
18 * All rights reserved.
19 *
20 * This software is licensed under terms that can be found in the LICENSE file
21 * in the root directory of this software component.
22 * If no LICENSE file comes with this software, it is provided AS-IS.
23 *
24 ******************************************************************************
25 @verbatim
26 ==============================================================================
27 ##### TIMER Extended features #####
28 ==============================================================================
29 [..]
30 The Timer Extended features include:
31 (#) Complementary outputs with programmable dead-time for :
32 (++) Output Compare
33 (++) PWM generation (Edge and Center-aligned Mode)
34 (++) One-pulse mode output
35 (#) Synchronization circuit to control the timer with external signals and to
36 interconnect several timers together.
37 (#) Break input to put the timer output signals in reset state or in a known state.
38 (#) Supports incremental (quadrature) encoder and hall-sensor circuitry for
39 positioning purposes
40
41 ##### How to use this driver #####
42 ==============================================================================
43 [..]
44 (#) Initialize the TIM low level resources by implementing the following functions
45 depending on the selected feature:
46 (++) Hall Sensor output : HAL_TIMEx_HallSensor_MspInit()
47
48 (#) Initialize the TIM low level resources :
49 (##) Enable the TIM interface clock using __HAL_RCC_TIMx_CLK_ENABLE();
50 (##) TIM pins configuration
51 (+++) Enable the clock for the TIM GPIOs using the following function:
52 __HAL_RCC_GPIOx_CLK_ENABLE();
53 (+++) Configure these TIM pins in Alternate function mode using HAL_GPIO_Init();
54
55 (#) The external Clock can be configured, if needed (the default clock is the
56 internal clock from the APBx), using the following function:
57 HAL_TIM_ConfigClockSource, the clock configuration should be done before
58 any start function.
59
60 (#) Configure the TIM in the desired functioning mode using one of the
61 initialization function of this driver:
62 (++) HAL_TIMEx_HallSensor_Init() and HAL_TIMEx_ConfigCommutEvent(): to use the
63 Timer Hall Sensor Interface and the commutation event with the corresponding
64 Interrupt and DMA request if needed (Note that One Timer is used to interface
65 with the Hall sensor Interface and another Timer should be used to use
66 the commutation event).
67
68 (#) Activate the TIM peripheral using one of the start functions:
69 (++) Complementary Output Compare : HAL_TIMEx_OCN_Start(), HAL_TIMEx_OCN_Start_DMA(),
70 HAL_TIMEx_OCN_Start_IT()
71 (++) Complementary PWM generation : HAL_TIMEx_PWMN_Start(), HAL_TIMEx_PWMN_Start_DMA(),
72 HAL_TIMEx_PWMN_Start_IT()
73 (++) Complementary One-pulse mode output : HAL_TIMEx_OnePulseN_Start(), HAL_TIMEx_OnePulseN_Start_IT()
74 (++) Hall Sensor output : HAL_TIMEx_HallSensor_Start(), HAL_TIMEx_HallSensor_Start_DMA(),
75 HAL_TIMEx_HallSensor_Start_IT().
76
77 @endverbatim
78 ******************************************************************************
79 */
80
81 /* Includes ------------------------------------------------------------------*/
82 #include "stm32f0xx_hal.h"
83
84 /** @addtogroup STM32F0xx_HAL_Driver
85 * @{
86 */
87
88 /** @defgroup TIMEx TIMEx
89 * @brief TIM Extended HAL module driver
90 * @{
91 */
92
93 #ifdef HAL_TIM_MODULE_ENABLED
94
95 /* Private typedef -----------------------------------------------------------*/
96 /* Private define ------------------------------------------------------------*/
97 /* Private macros ------------------------------------------------------------*/
98 /* Private variables ---------------------------------------------------------*/
99 /* Private function prototypes -----------------------------------------------*/
100 static void TIM_DMADelayPulseNCplt(DMA_HandleTypeDef *hdma);
101 static void TIM_DMAErrorCCxN(DMA_HandleTypeDef *hdma);
102 static void TIM_CCxNChannelCmd(TIM_TypeDef *TIMx, uint32_t Channel, uint32_t ChannelNState);
103
104 /* Exported functions --------------------------------------------------------*/
105 /** @defgroup TIMEx_Exported_Functions TIM Extended Exported Functions
106 * @{
107 */
108
109 /** @defgroup TIMEx_Exported_Functions_Group1 Extended Timer Hall Sensor functions
110 * @brief Timer Hall Sensor functions
111 *
112 @verbatim
113 ==============================================================================
114 ##### Timer Hall Sensor functions #####
115 ==============================================================================
116 [..]
117 This section provides functions allowing to:
118 (+) Initialize and configure TIM HAL Sensor.
119 (+) De-initialize TIM HAL Sensor.
120 (+) Start the Hall Sensor Interface.
121 (+) Stop the Hall Sensor Interface.
122 (+) Start the Hall Sensor Interface and enable interrupts.
123 (+) Stop the Hall Sensor Interface and disable interrupts.
124 (+) Start the Hall Sensor Interface and enable DMA transfers.
125 (+) Stop the Hall Sensor Interface and disable DMA transfers.
126
127 @endverbatim
128 * @{
129 */
130 /**
131 * @brief Initializes the TIM Hall Sensor Interface and initialize the associated handle.
132 * @note When the timer instance is initialized in Hall Sensor Interface mode,
133 * timer channels 1 and channel 2 are reserved and cannot be used for
134 * other purpose.
135 * @param htim TIM Hall Sensor Interface handle
136 * @param sConfig TIM Hall Sensor configuration structure
137 * @retval HAL status
138 */
HAL_TIMEx_HallSensor_Init(TIM_HandleTypeDef * htim,const TIM_HallSensor_InitTypeDef * sConfig)139 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Init(TIM_HandleTypeDef *htim, const TIM_HallSensor_InitTypeDef *sConfig)
140 {
141 TIM_OC_InitTypeDef OC_Config;
142
143 /* Check the TIM handle allocation */
144 if (htim == NULL)
145 {
146 return HAL_ERROR;
147 }
148
149 /* Check the parameters */
150 assert_param(IS_TIM_HALL_SENSOR_INTERFACE_INSTANCE(htim->Instance));
151 assert_param(IS_TIM_COUNTER_MODE(htim->Init.CounterMode));
152 assert_param(IS_TIM_CLOCKDIVISION_DIV(htim->Init.ClockDivision));
153 assert_param(IS_TIM_AUTORELOAD_PRELOAD(htim->Init.AutoReloadPreload));
154 assert_param(IS_TIM_IC_POLARITY(sConfig->IC1Polarity));
155 assert_param(IS_TIM_PERIOD(htim, htim->Init.Period));
156 assert_param(IS_TIM_IC_PRESCALER(sConfig->IC1Prescaler));
157 assert_param(IS_TIM_IC_FILTER(sConfig->IC1Filter));
158
159 if (htim->State == HAL_TIM_STATE_RESET)
160 {
161 /* Allocate lock resource and initialize it */
162 htim->Lock = HAL_UNLOCKED;
163
164 #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
165 /* Reset interrupt callbacks to legacy week callbacks */
166 TIM_ResetCallback(htim);
167
168 if (htim->HallSensor_MspInitCallback == NULL)
169 {
170 htim->HallSensor_MspInitCallback = HAL_TIMEx_HallSensor_MspInit;
171 }
172 /* Init the low level hardware : GPIO, CLOCK, NVIC */
173 htim->HallSensor_MspInitCallback(htim);
174 #else
175 /* Init the low level hardware : GPIO, CLOCK, NVIC and DMA */
176 HAL_TIMEx_HallSensor_MspInit(htim);
177 #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
178 }
179
180 /* Set the TIM state */
181 htim->State = HAL_TIM_STATE_BUSY;
182
183 /* Configure the Time base in the Encoder Mode */
184 TIM_Base_SetConfig(htim->Instance, &htim->Init);
185
186 /* Configure the Channel 1 as Input Channel to interface with the three Outputs of the Hall sensor */
187 TIM_TI1_SetConfig(htim->Instance, sConfig->IC1Polarity, TIM_ICSELECTION_TRC, sConfig->IC1Filter);
188
189 /* Reset the IC1PSC Bits */
190 htim->Instance->CCMR1 &= ~TIM_CCMR1_IC1PSC;
191 /* Set the IC1PSC value */
192 htim->Instance->CCMR1 |= sConfig->IC1Prescaler;
193
194 /* Enable the Hall sensor interface (XOR function of the three inputs) */
195 htim->Instance->CR2 |= TIM_CR2_TI1S;
196
197 /* Select the TIM_TS_TI1F_ED signal as Input trigger for the TIM */
198 htim->Instance->SMCR &= ~TIM_SMCR_TS;
199 htim->Instance->SMCR |= TIM_TS_TI1F_ED;
200
201 /* Use the TIM_TS_TI1F_ED signal to reset the TIM counter each edge detection */
202 htim->Instance->SMCR &= ~TIM_SMCR_SMS;
203 htim->Instance->SMCR |= TIM_SLAVEMODE_RESET;
204
205 /* Program channel 2 in PWM 2 mode with the desired Commutation_Delay*/
206 OC_Config.OCFastMode = TIM_OCFAST_DISABLE;
207 OC_Config.OCIdleState = TIM_OCIDLESTATE_RESET;
208 OC_Config.OCMode = TIM_OCMODE_PWM2;
209 OC_Config.OCNIdleState = TIM_OCNIDLESTATE_RESET;
210 OC_Config.OCNPolarity = TIM_OCNPOLARITY_HIGH;
211 OC_Config.OCPolarity = TIM_OCPOLARITY_HIGH;
212 OC_Config.Pulse = sConfig->Commutation_Delay;
213
214 TIM_OC2_SetConfig(htim->Instance, &OC_Config);
215
216 /* Select OC2REF as trigger output on TRGO: write the MMS bits in the TIMx_CR2
217 register to 101 */
218 htim->Instance->CR2 &= ~TIM_CR2_MMS;
219 htim->Instance->CR2 |= TIM_TRGO_OC2REF;
220
221 /* Initialize the DMA burst operation state */
222 htim->DMABurstState = HAL_DMA_BURST_STATE_READY;
223
224 /* Initialize the TIM channels state */
225 TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY);
226 TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY);
227 TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY);
228 TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY);
229
230 /* Initialize the TIM state*/
231 htim->State = HAL_TIM_STATE_READY;
232
233 return HAL_OK;
234 }
235
236 /**
237 * @brief DeInitializes the TIM Hall Sensor interface
238 * @param htim TIM Hall Sensor Interface handle
239 * @retval HAL status
240 */
HAL_TIMEx_HallSensor_DeInit(TIM_HandleTypeDef * htim)241 HAL_StatusTypeDef HAL_TIMEx_HallSensor_DeInit(TIM_HandleTypeDef *htim)
242 {
243 /* Check the parameters */
244 assert_param(IS_TIM_INSTANCE(htim->Instance));
245
246 htim->State = HAL_TIM_STATE_BUSY;
247
248 /* Disable the TIM Peripheral Clock */
249 __HAL_TIM_DISABLE(htim);
250
251 #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
252 if (htim->HallSensor_MspDeInitCallback == NULL)
253 {
254 htim->HallSensor_MspDeInitCallback = HAL_TIMEx_HallSensor_MspDeInit;
255 }
256 /* DeInit the low level hardware */
257 htim->HallSensor_MspDeInitCallback(htim);
258 #else
259 /* DeInit the low level hardware: GPIO, CLOCK, NVIC */
260 HAL_TIMEx_HallSensor_MspDeInit(htim);
261 #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
262
263 /* Change the DMA burst operation state */
264 htim->DMABurstState = HAL_DMA_BURST_STATE_RESET;
265
266 /* Change the TIM channels state */
267 TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_RESET);
268 TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_RESET);
269 TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_RESET);
270 TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_RESET);
271
272 /* Change TIM state */
273 htim->State = HAL_TIM_STATE_RESET;
274
275 /* Release Lock */
276 __HAL_UNLOCK(htim);
277
278 return HAL_OK;
279 }
280
281 /**
282 * @brief Initializes the TIM Hall Sensor MSP.
283 * @param htim TIM Hall Sensor Interface handle
284 * @retval None
285 */
HAL_TIMEx_HallSensor_MspInit(TIM_HandleTypeDef * htim)286 __weak void HAL_TIMEx_HallSensor_MspInit(TIM_HandleTypeDef *htim)
287 {
288 /* Prevent unused argument(s) compilation warning */
289 UNUSED(htim);
290
291 /* NOTE : This function should not be modified, when the callback is needed,
292 the HAL_TIMEx_HallSensor_MspInit could be implemented in the user file
293 */
294 }
295
296 /**
297 * @brief DeInitializes TIM Hall Sensor MSP.
298 * @param htim TIM Hall Sensor Interface handle
299 * @retval None
300 */
HAL_TIMEx_HallSensor_MspDeInit(TIM_HandleTypeDef * htim)301 __weak void HAL_TIMEx_HallSensor_MspDeInit(TIM_HandleTypeDef *htim)
302 {
303 /* Prevent unused argument(s) compilation warning */
304 UNUSED(htim);
305
306 /* NOTE : This function should not be modified, when the callback is needed,
307 the HAL_TIMEx_HallSensor_MspDeInit could be implemented in the user file
308 */
309 }
310
311 /**
312 * @brief Starts the TIM Hall Sensor Interface.
313 * @param htim TIM Hall Sensor Interface handle
314 * @retval HAL status
315 */
HAL_TIMEx_HallSensor_Start(TIM_HandleTypeDef * htim)316 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start(TIM_HandleTypeDef *htim)
317 {
318 uint32_t tmpsmcr;
319 HAL_TIM_ChannelStateTypeDef channel_1_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_1);
320 HAL_TIM_ChannelStateTypeDef channel_2_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_2);
321 HAL_TIM_ChannelStateTypeDef complementary_channel_1_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHANNEL_1);
322 HAL_TIM_ChannelStateTypeDef complementary_channel_2_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHANNEL_2);
323
324 /* Check the parameters */
325 assert_param(IS_TIM_HALL_SENSOR_INTERFACE_INSTANCE(htim->Instance));
326
327 /* Check the TIM channels state */
328 if ((channel_1_state != HAL_TIM_CHANNEL_STATE_READY)
329 || (channel_2_state != HAL_TIM_CHANNEL_STATE_READY)
330 || (complementary_channel_1_state != HAL_TIM_CHANNEL_STATE_READY)
331 || (complementary_channel_2_state != HAL_TIM_CHANNEL_STATE_READY))
332 {
333 return HAL_ERROR;
334 }
335
336 /* Set the TIM channels state */
337 TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY);
338 TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY);
339 TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY);
340 TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY);
341
342 /* Enable the Input Capture channel 1
343 (in the Hall Sensor Interface the three possible channels that can be used are TIM_CHANNEL_1,
344 TIM_CHANNEL_2 and TIM_CHANNEL_3) */
345 TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_ENABLE);
346
347 /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */
348 if (IS_TIM_SLAVE_INSTANCE(htim->Instance))
349 {
350 tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS;
351 if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr))
352 {
353 __HAL_TIM_ENABLE(htim);
354 }
355 }
356 else
357 {
358 __HAL_TIM_ENABLE(htim);
359 }
360
361 /* Return function status */
362 return HAL_OK;
363 }
364
365 /**
366 * @brief Stops the TIM Hall sensor Interface.
367 * @param htim TIM Hall Sensor Interface handle
368 * @retval HAL status
369 */
HAL_TIMEx_HallSensor_Stop(TIM_HandleTypeDef * htim)370 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop(TIM_HandleTypeDef *htim)
371 {
372 /* Check the parameters */
373 assert_param(IS_TIM_HALL_SENSOR_INTERFACE_INSTANCE(htim->Instance));
374
375 /* Disable the Input Capture channels 1, 2 and 3
376 (in the Hall Sensor Interface the three possible channels that can be used are TIM_CHANNEL_1,
377 TIM_CHANNEL_2 and TIM_CHANNEL_3) */
378 TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_DISABLE);
379
380 /* Disable the Peripheral */
381 __HAL_TIM_DISABLE(htim);
382
383 /* Set the TIM channels state */
384 TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY);
385 TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY);
386 TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY);
387 TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY);
388
389 /* Return function status */
390 return HAL_OK;
391 }
392
393 /**
394 * @brief Starts the TIM Hall Sensor Interface in interrupt mode.
395 * @param htim TIM Hall Sensor Interface handle
396 * @retval HAL status
397 */
HAL_TIMEx_HallSensor_Start_IT(TIM_HandleTypeDef * htim)398 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start_IT(TIM_HandleTypeDef *htim)
399 {
400 uint32_t tmpsmcr;
401 HAL_TIM_ChannelStateTypeDef channel_1_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_1);
402 HAL_TIM_ChannelStateTypeDef channel_2_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_2);
403 HAL_TIM_ChannelStateTypeDef complementary_channel_1_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHANNEL_1);
404 HAL_TIM_ChannelStateTypeDef complementary_channel_2_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHANNEL_2);
405
406 /* Check the parameters */
407 assert_param(IS_TIM_HALL_SENSOR_INTERFACE_INSTANCE(htim->Instance));
408
409 /* Check the TIM channels state */
410 if ((channel_1_state != HAL_TIM_CHANNEL_STATE_READY)
411 || (channel_2_state != HAL_TIM_CHANNEL_STATE_READY)
412 || (complementary_channel_1_state != HAL_TIM_CHANNEL_STATE_READY)
413 || (complementary_channel_2_state != HAL_TIM_CHANNEL_STATE_READY))
414 {
415 return HAL_ERROR;
416 }
417
418 /* Set the TIM channels state */
419 TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY);
420 TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY);
421 TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY);
422 TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY);
423
424 /* Enable the capture compare Interrupts 1 event */
425 __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC1);
426
427 /* Enable the Input Capture channel 1
428 (in the Hall Sensor Interface the three possible channels that can be used are TIM_CHANNEL_1,
429 TIM_CHANNEL_2 and TIM_CHANNEL_3) */
430 TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_ENABLE);
431
432 /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */
433 if (IS_TIM_SLAVE_INSTANCE(htim->Instance))
434 {
435 tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS;
436 if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr))
437 {
438 __HAL_TIM_ENABLE(htim);
439 }
440 }
441 else
442 {
443 __HAL_TIM_ENABLE(htim);
444 }
445
446 /* Return function status */
447 return HAL_OK;
448 }
449
450 /**
451 * @brief Stops the TIM Hall Sensor Interface in interrupt mode.
452 * @param htim TIM Hall Sensor Interface handle
453 * @retval HAL status
454 */
HAL_TIMEx_HallSensor_Stop_IT(TIM_HandleTypeDef * htim)455 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop_IT(TIM_HandleTypeDef *htim)
456 {
457 /* Check the parameters */
458 assert_param(IS_TIM_HALL_SENSOR_INTERFACE_INSTANCE(htim->Instance));
459
460 /* Disable the Input Capture channel 1
461 (in the Hall Sensor Interface the three possible channels that can be used are TIM_CHANNEL_1,
462 TIM_CHANNEL_2 and TIM_CHANNEL_3) */
463 TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_DISABLE);
464
465 /* Disable the capture compare Interrupts event */
466 __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC1);
467
468 /* Disable the Peripheral */
469 __HAL_TIM_DISABLE(htim);
470
471 /* Set the TIM channels state */
472 TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY);
473 TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY);
474 TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY);
475 TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY);
476
477 /* Return function status */
478 return HAL_OK;
479 }
480
481 /**
482 * @brief Starts the TIM Hall Sensor Interface in DMA mode.
483 * @param htim TIM Hall Sensor Interface handle
484 * @param pData The destination Buffer address.
485 * @param Length The length of data to be transferred from TIM peripheral to memory.
486 * @retval HAL status
487 */
HAL_TIMEx_HallSensor_Start_DMA(TIM_HandleTypeDef * htim,uint32_t * pData,uint16_t Length)488 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start_DMA(TIM_HandleTypeDef *htim, uint32_t *pData, uint16_t Length)
489 {
490 uint32_t tmpsmcr;
491 HAL_TIM_ChannelStateTypeDef channel_1_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_1);
492 HAL_TIM_ChannelStateTypeDef complementary_channel_1_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHANNEL_1);
493
494 /* Check the parameters */
495 assert_param(IS_TIM_HALL_SENSOR_INTERFACE_INSTANCE(htim->Instance));
496
497 /* Set the TIM channel state */
498 if ((channel_1_state == HAL_TIM_CHANNEL_STATE_BUSY)
499 || (complementary_channel_1_state == HAL_TIM_CHANNEL_STATE_BUSY))
500 {
501 return HAL_BUSY;
502 }
503 else if ((channel_1_state == HAL_TIM_CHANNEL_STATE_READY)
504 && (complementary_channel_1_state == HAL_TIM_CHANNEL_STATE_READY))
505 {
506 if ((pData == NULL) || (Length == 0U))
507 {
508 return HAL_ERROR;
509 }
510 else
511 {
512 TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY);
513 TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY);
514 }
515 }
516 else
517 {
518 return HAL_ERROR;
519 }
520
521 /* Enable the Input Capture channel 1
522 (in the Hall Sensor Interface the three possible channels that can be used are TIM_CHANNEL_1,
523 TIM_CHANNEL_2 and TIM_CHANNEL_3) */
524 TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_ENABLE);
525
526 /* Set the DMA Input Capture 1 Callbacks */
527 htim->hdma[TIM_DMA_ID_CC1]->XferCpltCallback = TIM_DMACaptureCplt;
528 htim->hdma[TIM_DMA_ID_CC1]->XferHalfCpltCallback = TIM_DMACaptureHalfCplt;
529 /* Set the DMA error callback */
530 htim->hdma[TIM_DMA_ID_CC1]->XferErrorCallback = TIM_DMAError ;
531
532 /* Enable the DMA channel for Capture 1*/
533 if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC1], (uint32_t)&htim->Instance->CCR1, (uint32_t)pData, Length) != HAL_OK)
534 {
535 /* Return error status */
536 return HAL_ERROR;
537 }
538 /* Enable the capture compare 1 Interrupt */
539 __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC1);
540
541 /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */
542 if (IS_TIM_SLAVE_INSTANCE(htim->Instance))
543 {
544 tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS;
545 if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr))
546 {
547 __HAL_TIM_ENABLE(htim);
548 }
549 }
550 else
551 {
552 __HAL_TIM_ENABLE(htim);
553 }
554
555 /* Return function status */
556 return HAL_OK;
557 }
558
559 /**
560 * @brief Stops the TIM Hall Sensor Interface in DMA mode.
561 * @param htim TIM Hall Sensor Interface handle
562 * @retval HAL status
563 */
HAL_TIMEx_HallSensor_Stop_DMA(TIM_HandleTypeDef * htim)564 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop_DMA(TIM_HandleTypeDef *htim)
565 {
566 /* Check the parameters */
567 assert_param(IS_TIM_HALL_SENSOR_INTERFACE_INSTANCE(htim->Instance));
568
569 /* Disable the Input Capture channel 1
570 (in the Hall Sensor Interface the three possible channels that can be used are TIM_CHANNEL_1,
571 TIM_CHANNEL_2 and TIM_CHANNEL_3) */
572 TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_DISABLE);
573
574
575 /* Disable the capture compare Interrupts 1 event */
576 __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC1);
577
578 (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC1]);
579
580 /* Disable the Peripheral */
581 __HAL_TIM_DISABLE(htim);
582
583 /* Set the TIM channel state */
584 TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY);
585 TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY);
586
587 /* Return function status */
588 return HAL_OK;
589 }
590
591 /**
592 * @}
593 */
594
595 /** @defgroup TIMEx_Exported_Functions_Group2 Extended Timer Complementary Output Compare functions
596 * @brief Timer Complementary Output Compare functions
597 *
598 @verbatim
599 ==============================================================================
600 ##### Timer Complementary Output Compare functions #####
601 ==============================================================================
602 [..]
603 This section provides functions allowing to:
604 (+) Start the Complementary Output Compare/PWM.
605 (+) Stop the Complementary Output Compare/PWM.
606 (+) Start the Complementary Output Compare/PWM and enable interrupts.
607 (+) Stop the Complementary Output Compare/PWM and disable interrupts.
608 (+) Start the Complementary Output Compare/PWM and enable DMA transfers.
609 (+) Stop the Complementary Output Compare/PWM and disable DMA transfers.
610
611 @endverbatim
612 * @{
613 */
614
615 /**
616 * @brief Starts the TIM Output Compare signal generation on the complementary
617 * output.
618 * @param htim TIM Output Compare handle
619 * @param Channel TIM Channel to be enabled
620 * This parameter can be one of the following values:
621 * @arg TIM_CHANNEL_1: TIM Channel 1 selected
622 * @arg TIM_CHANNEL_2: TIM Channel 2 selected
623 * @arg TIM_CHANNEL_3: TIM Channel 3 selected
624 * @retval HAL status
625 */
HAL_TIMEx_OCN_Start(TIM_HandleTypeDef * htim,uint32_t Channel)626 HAL_StatusTypeDef HAL_TIMEx_OCN_Start(TIM_HandleTypeDef *htim, uint32_t Channel)
627 {
628 uint32_t tmpsmcr;
629
630 /* Check the parameters */
631 assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
632
633 /* Check the TIM complementary channel state */
634 if (TIM_CHANNEL_N_STATE_GET(htim, Channel) != HAL_TIM_CHANNEL_STATE_READY)
635 {
636 return HAL_ERROR;
637 }
638
639 /* Set the TIM complementary channel state */
640 TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_BUSY);
641
642 /* Enable the Capture compare channel N */
643 TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE);
644
645 /* Enable the Main Output */
646 __HAL_TIM_MOE_ENABLE(htim);
647
648 /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */
649 if (IS_TIM_SLAVE_INSTANCE(htim->Instance))
650 {
651 tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS;
652 if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr))
653 {
654 __HAL_TIM_ENABLE(htim);
655 }
656 }
657 else
658 {
659 __HAL_TIM_ENABLE(htim);
660 }
661
662 /* Return function status */
663 return HAL_OK;
664 }
665
666 /**
667 * @brief Stops the TIM Output Compare signal generation on the complementary
668 * output.
669 * @param htim TIM handle
670 * @param Channel TIM Channel to be disabled
671 * This parameter can be one of the following values:
672 * @arg TIM_CHANNEL_1: TIM Channel 1 selected
673 * @arg TIM_CHANNEL_2: TIM Channel 2 selected
674 * @arg TIM_CHANNEL_3: TIM Channel 3 selected
675 * @retval HAL status
676 */
HAL_TIMEx_OCN_Stop(TIM_HandleTypeDef * htim,uint32_t Channel)677 HAL_StatusTypeDef HAL_TIMEx_OCN_Stop(TIM_HandleTypeDef *htim, uint32_t Channel)
678 {
679 /* Check the parameters */
680 assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
681
682 /* Disable the Capture compare channel N */
683 TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE);
684
685 /* Disable the Main Output */
686 __HAL_TIM_MOE_DISABLE(htim);
687
688 /* Disable the Peripheral */
689 __HAL_TIM_DISABLE(htim);
690
691 /* Set the TIM complementary channel state */
692 TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY);
693
694 /* Return function status */
695 return HAL_OK;
696 }
697
698 /**
699 * @brief Starts the TIM Output Compare signal generation in interrupt mode
700 * on the complementary output.
701 * @param htim TIM OC handle
702 * @param Channel TIM Channel to be enabled
703 * This parameter can be one of the following values:
704 * @arg TIM_CHANNEL_1: TIM Channel 1 selected
705 * @arg TIM_CHANNEL_2: TIM Channel 2 selected
706 * @arg TIM_CHANNEL_3: TIM Channel 3 selected
707 * @retval HAL status
708 */
HAL_TIMEx_OCN_Start_IT(TIM_HandleTypeDef * htim,uint32_t Channel)709 HAL_StatusTypeDef HAL_TIMEx_OCN_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel)
710 {
711 HAL_StatusTypeDef status = HAL_OK;
712 uint32_t tmpsmcr;
713
714 /* Check the parameters */
715 assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
716
717 /* Check the TIM complementary channel state */
718 if (TIM_CHANNEL_N_STATE_GET(htim, Channel) != HAL_TIM_CHANNEL_STATE_READY)
719 {
720 return HAL_ERROR;
721 }
722
723 /* Set the TIM complementary channel state */
724 TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_BUSY);
725
726 switch (Channel)
727 {
728 case TIM_CHANNEL_1:
729 {
730 /* Enable the TIM Output Compare interrupt */
731 __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC1);
732 break;
733 }
734
735 case TIM_CHANNEL_2:
736 {
737 /* Enable the TIM Output Compare interrupt */
738 __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC2);
739 break;
740 }
741
742 case TIM_CHANNEL_3:
743 {
744 /* Enable the TIM Output Compare interrupt */
745 __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC3);
746 break;
747 }
748
749
750 default:
751 status = HAL_ERROR;
752 break;
753 }
754
755 if (status == HAL_OK)
756 {
757 /* Enable the TIM Break interrupt */
758 __HAL_TIM_ENABLE_IT(htim, TIM_IT_BREAK);
759
760 /* Enable the Capture compare channel N */
761 TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE);
762
763 /* Enable the Main Output */
764 __HAL_TIM_MOE_ENABLE(htim);
765
766 /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */
767 if (IS_TIM_SLAVE_INSTANCE(htim->Instance))
768 {
769 tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS;
770 if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr))
771 {
772 __HAL_TIM_ENABLE(htim);
773 }
774 }
775 else
776 {
777 __HAL_TIM_ENABLE(htim);
778 }
779 }
780
781 /* Return function status */
782 return status;
783 }
784
785 /**
786 * @brief Stops the TIM Output Compare signal generation in interrupt mode
787 * on the complementary output.
788 * @param htim TIM Output Compare handle
789 * @param Channel TIM Channel to be disabled
790 * This parameter can be one of the following values:
791 * @arg TIM_CHANNEL_1: TIM Channel 1 selected
792 * @arg TIM_CHANNEL_2: TIM Channel 2 selected
793 * @arg TIM_CHANNEL_3: TIM Channel 3 selected
794 * @retval HAL status
795 */
HAL_TIMEx_OCN_Stop_IT(TIM_HandleTypeDef * htim,uint32_t Channel)796 HAL_StatusTypeDef HAL_TIMEx_OCN_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel)
797 {
798 HAL_StatusTypeDef status = HAL_OK;
799 uint32_t tmpccer;
800
801 /* Check the parameters */
802 assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
803
804 switch (Channel)
805 {
806 case TIM_CHANNEL_1:
807 {
808 /* Disable the TIM Output Compare interrupt */
809 __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC1);
810 break;
811 }
812
813 case TIM_CHANNEL_2:
814 {
815 /* Disable the TIM Output Compare interrupt */
816 __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC2);
817 break;
818 }
819
820 case TIM_CHANNEL_3:
821 {
822 /* Disable the TIM Output Compare interrupt */
823 __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC3);
824 break;
825 }
826
827 default:
828 status = HAL_ERROR;
829 break;
830 }
831
832 if (status == HAL_OK)
833 {
834 /* Disable the Capture compare channel N */
835 TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE);
836
837 /* Disable the TIM Break interrupt (only if no more channel is active) */
838 tmpccer = htim->Instance->CCER;
839 if ((tmpccer & (TIM_CCER_CC1NE | TIM_CCER_CC2NE | TIM_CCER_CC3NE)) == (uint32_t)RESET)
840 {
841 __HAL_TIM_DISABLE_IT(htim, TIM_IT_BREAK);
842 }
843
844 /* Disable the Main Output */
845 __HAL_TIM_MOE_DISABLE(htim);
846
847 /* Disable the Peripheral */
848 __HAL_TIM_DISABLE(htim);
849
850 /* Set the TIM complementary channel state */
851 TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY);
852 }
853
854 /* Return function status */
855 return status;
856 }
857
858 /**
859 * @brief Starts the TIM Output Compare signal generation in DMA mode
860 * on the complementary output.
861 * @param htim TIM Output Compare handle
862 * @param Channel TIM Channel to be enabled
863 * This parameter can be one of the following values:
864 * @arg TIM_CHANNEL_1: TIM Channel 1 selected
865 * @arg TIM_CHANNEL_2: TIM Channel 2 selected
866 * @arg TIM_CHANNEL_3: TIM Channel 3 selected
867 * @param pData The source Buffer address.
868 * @param Length The length of data to be transferred from memory to TIM peripheral
869 * @retval HAL status
870 */
HAL_TIMEx_OCN_Start_DMA(TIM_HandleTypeDef * htim,uint32_t Channel,const uint32_t * pData,uint16_t Length)871 HAL_StatusTypeDef HAL_TIMEx_OCN_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel, const uint32_t *pData,
872 uint16_t Length)
873 {
874 HAL_StatusTypeDef status = HAL_OK;
875 uint32_t tmpsmcr;
876
877 /* Check the parameters */
878 assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
879
880 /* Set the TIM complementary channel state */
881 if (TIM_CHANNEL_N_STATE_GET(htim, Channel) == HAL_TIM_CHANNEL_STATE_BUSY)
882 {
883 return HAL_BUSY;
884 }
885 else if (TIM_CHANNEL_N_STATE_GET(htim, Channel) == HAL_TIM_CHANNEL_STATE_READY)
886 {
887 if ((pData == NULL) || (Length == 0U))
888 {
889 return HAL_ERROR;
890 }
891 else
892 {
893 TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_BUSY);
894 }
895 }
896 else
897 {
898 return HAL_ERROR;
899 }
900
901 switch (Channel)
902 {
903 case TIM_CHANNEL_1:
904 {
905 /* Set the DMA compare callbacks */
906 htim->hdma[TIM_DMA_ID_CC1]->XferCpltCallback = TIM_DMADelayPulseNCplt;
907 htim->hdma[TIM_DMA_ID_CC1]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt;
908
909 /* Set the DMA error callback */
910 htim->hdma[TIM_DMA_ID_CC1]->XferErrorCallback = TIM_DMAErrorCCxN ;
911
912 /* Enable the DMA channel */
913 if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC1], (uint32_t)pData, (uint32_t)&htim->Instance->CCR1,
914 Length) != HAL_OK)
915 {
916 /* Return error status */
917 return HAL_ERROR;
918 }
919 /* Enable the TIM Output Compare DMA request */
920 __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC1);
921 break;
922 }
923
924 case TIM_CHANNEL_2:
925 {
926 /* Set the DMA compare callbacks */
927 htim->hdma[TIM_DMA_ID_CC2]->XferCpltCallback = TIM_DMADelayPulseNCplt;
928 htim->hdma[TIM_DMA_ID_CC2]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt;
929
930 /* Set the DMA error callback */
931 htim->hdma[TIM_DMA_ID_CC2]->XferErrorCallback = TIM_DMAErrorCCxN ;
932
933 /* Enable the DMA channel */
934 if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC2], (uint32_t)pData, (uint32_t)&htim->Instance->CCR2,
935 Length) != HAL_OK)
936 {
937 /* Return error status */
938 return HAL_ERROR;
939 }
940 /* Enable the TIM Output Compare DMA request */
941 __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC2);
942 break;
943 }
944
945 case TIM_CHANNEL_3:
946 {
947 /* Set the DMA compare callbacks */
948 htim->hdma[TIM_DMA_ID_CC3]->XferCpltCallback = TIM_DMADelayPulseNCplt;
949 htim->hdma[TIM_DMA_ID_CC3]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt;
950
951 /* Set the DMA error callback */
952 htim->hdma[TIM_DMA_ID_CC3]->XferErrorCallback = TIM_DMAErrorCCxN ;
953
954 /* Enable the DMA channel */
955 if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC3], (uint32_t)pData, (uint32_t)&htim->Instance->CCR3,
956 Length) != HAL_OK)
957 {
958 /* Return error status */
959 return HAL_ERROR;
960 }
961 /* Enable the TIM Output Compare DMA request */
962 __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC3);
963 break;
964 }
965
966 default:
967 status = HAL_ERROR;
968 break;
969 }
970
971 if (status == HAL_OK)
972 {
973 /* Enable the Capture compare channel N */
974 TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE);
975
976 /* Enable the Main Output */
977 __HAL_TIM_MOE_ENABLE(htim);
978
979 /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */
980 if (IS_TIM_SLAVE_INSTANCE(htim->Instance))
981 {
982 tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS;
983 if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr))
984 {
985 __HAL_TIM_ENABLE(htim);
986 }
987 }
988 else
989 {
990 __HAL_TIM_ENABLE(htim);
991 }
992 }
993
994 /* Return function status */
995 return status;
996 }
997
998 /**
999 * @brief Stops the TIM Output Compare signal generation in DMA mode
1000 * on the complementary output.
1001 * @param htim TIM Output Compare handle
1002 * @param Channel TIM Channel to be disabled
1003 * This parameter can be one of the following values:
1004 * @arg TIM_CHANNEL_1: TIM Channel 1 selected
1005 * @arg TIM_CHANNEL_2: TIM Channel 2 selected
1006 * @arg TIM_CHANNEL_3: TIM Channel 3 selected
1007 * @retval HAL status
1008 */
HAL_TIMEx_OCN_Stop_DMA(TIM_HandleTypeDef * htim,uint32_t Channel)1009 HAL_StatusTypeDef HAL_TIMEx_OCN_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel)
1010 {
1011 HAL_StatusTypeDef status = HAL_OK;
1012
1013 /* Check the parameters */
1014 assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
1015
1016 switch (Channel)
1017 {
1018 case TIM_CHANNEL_1:
1019 {
1020 /* Disable the TIM Output Compare DMA request */
1021 __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC1);
1022 (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC1]);
1023 break;
1024 }
1025
1026 case TIM_CHANNEL_2:
1027 {
1028 /* Disable the TIM Output Compare DMA request */
1029 __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC2);
1030 (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC2]);
1031 break;
1032 }
1033
1034 case TIM_CHANNEL_3:
1035 {
1036 /* Disable the TIM Output Compare DMA request */
1037 __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC3);
1038 (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC3]);
1039 break;
1040 }
1041
1042 default:
1043 status = HAL_ERROR;
1044 break;
1045 }
1046
1047 if (status == HAL_OK)
1048 {
1049 /* Disable the Capture compare channel N */
1050 TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE);
1051
1052 /* Disable the Main Output */
1053 __HAL_TIM_MOE_DISABLE(htim);
1054
1055 /* Disable the Peripheral */
1056 __HAL_TIM_DISABLE(htim);
1057
1058 /* Set the TIM complementary channel state */
1059 TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY);
1060 }
1061
1062 /* Return function status */
1063 return status;
1064 }
1065
1066 /**
1067 * @}
1068 */
1069
1070 /** @defgroup TIMEx_Exported_Functions_Group3 Extended Timer Complementary PWM functions
1071 * @brief Timer Complementary PWM functions
1072 *
1073 @verbatim
1074 ==============================================================================
1075 ##### Timer Complementary PWM functions #####
1076 ==============================================================================
1077 [..]
1078 This section provides functions allowing to:
1079 (+) Start the Complementary PWM.
1080 (+) Stop the Complementary PWM.
1081 (+) Start the Complementary PWM and enable interrupts.
1082 (+) Stop the Complementary PWM and disable interrupts.
1083 (+) Start the Complementary PWM and enable DMA transfers.
1084 (+) Stop the Complementary PWM and disable DMA transfers.
1085 (+) Start the Complementary Input Capture measurement.
1086 (+) Stop the Complementary Input Capture.
1087 (+) Start the Complementary Input Capture and enable interrupts.
1088 (+) Stop the Complementary Input Capture and disable interrupts.
1089 (+) Start the Complementary Input Capture and enable DMA transfers.
1090 (+) Stop the Complementary Input Capture and disable DMA transfers.
1091 (+) Start the Complementary One Pulse generation.
1092 (+) Stop the Complementary One Pulse.
1093 (+) Start the Complementary One Pulse and enable interrupts.
1094 (+) Stop the Complementary One Pulse and disable interrupts.
1095
1096 @endverbatim
1097 * @{
1098 */
1099
1100 /**
1101 * @brief Starts the PWM signal generation on the complementary output.
1102 * @param htim TIM handle
1103 * @param Channel TIM Channel to be enabled
1104 * This parameter can be one of the following values:
1105 * @arg TIM_CHANNEL_1: TIM Channel 1 selected
1106 * @arg TIM_CHANNEL_2: TIM Channel 2 selected
1107 * @arg TIM_CHANNEL_3: TIM Channel 3 selected
1108 * @retval HAL status
1109 */
HAL_TIMEx_PWMN_Start(TIM_HandleTypeDef * htim,uint32_t Channel)1110 HAL_StatusTypeDef HAL_TIMEx_PWMN_Start(TIM_HandleTypeDef *htim, uint32_t Channel)
1111 {
1112 uint32_t tmpsmcr;
1113
1114 /* Check the parameters */
1115 assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
1116
1117 /* Check the TIM complementary channel state */
1118 if (TIM_CHANNEL_N_STATE_GET(htim, Channel) != HAL_TIM_CHANNEL_STATE_READY)
1119 {
1120 return HAL_ERROR;
1121 }
1122
1123 /* Set the TIM complementary channel state */
1124 TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_BUSY);
1125
1126 /* Enable the complementary PWM output */
1127 TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE);
1128
1129 /* Enable the Main Output */
1130 __HAL_TIM_MOE_ENABLE(htim);
1131
1132 /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */
1133 if (IS_TIM_SLAVE_INSTANCE(htim->Instance))
1134 {
1135 tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS;
1136 if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr))
1137 {
1138 __HAL_TIM_ENABLE(htim);
1139 }
1140 }
1141 else
1142 {
1143 __HAL_TIM_ENABLE(htim);
1144 }
1145
1146 /* Return function status */
1147 return HAL_OK;
1148 }
1149
1150 /**
1151 * @brief Stops the PWM signal generation on the complementary output.
1152 * @param htim TIM handle
1153 * @param Channel TIM Channel to be disabled
1154 * This parameter can be one of the following values:
1155 * @arg TIM_CHANNEL_1: TIM Channel 1 selected
1156 * @arg TIM_CHANNEL_2: TIM Channel 2 selected
1157 * @arg TIM_CHANNEL_3: TIM Channel 3 selected
1158 * @retval HAL status
1159 */
HAL_TIMEx_PWMN_Stop(TIM_HandleTypeDef * htim,uint32_t Channel)1160 HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop(TIM_HandleTypeDef *htim, uint32_t Channel)
1161 {
1162 /* Check the parameters */
1163 assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
1164
1165 /* Disable the complementary PWM output */
1166 TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE);
1167
1168 /* Disable the Main Output */
1169 __HAL_TIM_MOE_DISABLE(htim);
1170
1171 /* Disable the Peripheral */
1172 __HAL_TIM_DISABLE(htim);
1173
1174 /* Set the TIM complementary channel state */
1175 TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY);
1176
1177 /* Return function status */
1178 return HAL_OK;
1179 }
1180
1181 /**
1182 * @brief Starts the PWM signal generation in interrupt mode on the
1183 * complementary output.
1184 * @param htim TIM handle
1185 * @param Channel TIM Channel to be disabled
1186 * This parameter can be one of the following values:
1187 * @arg TIM_CHANNEL_1: TIM Channel 1 selected
1188 * @arg TIM_CHANNEL_2: TIM Channel 2 selected
1189 * @arg TIM_CHANNEL_3: TIM Channel 3 selected
1190 * @retval HAL status
1191 */
HAL_TIMEx_PWMN_Start_IT(TIM_HandleTypeDef * htim,uint32_t Channel)1192 HAL_StatusTypeDef HAL_TIMEx_PWMN_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel)
1193 {
1194 HAL_StatusTypeDef status = HAL_OK;
1195 uint32_t tmpsmcr;
1196
1197 /* Check the parameters */
1198 assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
1199
1200 /* Check the TIM complementary channel state */
1201 if (TIM_CHANNEL_N_STATE_GET(htim, Channel) != HAL_TIM_CHANNEL_STATE_READY)
1202 {
1203 return HAL_ERROR;
1204 }
1205
1206 /* Set the TIM complementary channel state */
1207 TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_BUSY);
1208
1209 switch (Channel)
1210 {
1211 case TIM_CHANNEL_1:
1212 {
1213 /* Enable the TIM Capture/Compare 1 interrupt */
1214 __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC1);
1215 break;
1216 }
1217
1218 case TIM_CHANNEL_2:
1219 {
1220 /* Enable the TIM Capture/Compare 2 interrupt */
1221 __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC2);
1222 break;
1223 }
1224
1225 case TIM_CHANNEL_3:
1226 {
1227 /* Enable the TIM Capture/Compare 3 interrupt */
1228 __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC3);
1229 break;
1230 }
1231
1232 default:
1233 status = HAL_ERROR;
1234 break;
1235 }
1236
1237 if (status == HAL_OK)
1238 {
1239 /* Enable the TIM Break interrupt */
1240 __HAL_TIM_ENABLE_IT(htim, TIM_IT_BREAK);
1241
1242 /* Enable the complementary PWM output */
1243 TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE);
1244
1245 /* Enable the Main Output */
1246 __HAL_TIM_MOE_ENABLE(htim);
1247
1248 /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */
1249 if (IS_TIM_SLAVE_INSTANCE(htim->Instance))
1250 {
1251 tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS;
1252 if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr))
1253 {
1254 __HAL_TIM_ENABLE(htim);
1255 }
1256 }
1257 else
1258 {
1259 __HAL_TIM_ENABLE(htim);
1260 }
1261 }
1262
1263 /* Return function status */
1264 return status;
1265 }
1266
1267 /**
1268 * @brief Stops the PWM signal generation in interrupt mode on the
1269 * complementary output.
1270 * @param htim TIM handle
1271 * @param Channel TIM Channel to be disabled
1272 * This parameter can be one of the following values:
1273 * @arg TIM_CHANNEL_1: TIM Channel 1 selected
1274 * @arg TIM_CHANNEL_2: TIM Channel 2 selected
1275 * @arg TIM_CHANNEL_3: TIM Channel 3 selected
1276 * @retval HAL status
1277 */
HAL_TIMEx_PWMN_Stop_IT(TIM_HandleTypeDef * htim,uint32_t Channel)1278 HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel)
1279 {
1280 HAL_StatusTypeDef status = HAL_OK;
1281 uint32_t tmpccer;
1282
1283 /* Check the parameters */
1284 assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
1285
1286 switch (Channel)
1287 {
1288 case TIM_CHANNEL_1:
1289 {
1290 /* Disable the TIM Capture/Compare 1 interrupt */
1291 __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC1);
1292 break;
1293 }
1294
1295 case TIM_CHANNEL_2:
1296 {
1297 /* Disable the TIM Capture/Compare 2 interrupt */
1298 __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC2);
1299 break;
1300 }
1301
1302 case TIM_CHANNEL_3:
1303 {
1304 /* Disable the TIM Capture/Compare 3 interrupt */
1305 __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC3);
1306 break;
1307 }
1308
1309 default:
1310 status = HAL_ERROR;
1311 break;
1312 }
1313
1314 if (status == HAL_OK)
1315 {
1316 /* Disable the complementary PWM output */
1317 TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE);
1318
1319 /* Disable the TIM Break interrupt (only if no more channel is active) */
1320 tmpccer = htim->Instance->CCER;
1321 if ((tmpccer & (TIM_CCER_CC1NE | TIM_CCER_CC2NE | TIM_CCER_CC3NE)) == (uint32_t)RESET)
1322 {
1323 __HAL_TIM_DISABLE_IT(htim, TIM_IT_BREAK);
1324 }
1325
1326 /* Disable the Main Output */
1327 __HAL_TIM_MOE_DISABLE(htim);
1328
1329 /* Disable the Peripheral */
1330 __HAL_TIM_DISABLE(htim);
1331
1332 /* Set the TIM complementary channel state */
1333 TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY);
1334 }
1335
1336 /* Return function status */
1337 return status;
1338 }
1339
1340 /**
1341 * @brief Starts the TIM PWM signal generation in DMA mode on the
1342 * complementary output
1343 * @param htim TIM handle
1344 * @param Channel TIM Channel to be enabled
1345 * This parameter can be one of the following values:
1346 * @arg TIM_CHANNEL_1: TIM Channel 1 selected
1347 * @arg TIM_CHANNEL_2: TIM Channel 2 selected
1348 * @arg TIM_CHANNEL_3: TIM Channel 3 selected
1349 * @param pData The source Buffer address.
1350 * @param Length The length of data to be transferred from memory to TIM peripheral
1351 * @retval HAL status
1352 */
HAL_TIMEx_PWMN_Start_DMA(TIM_HandleTypeDef * htim,uint32_t Channel,const uint32_t * pData,uint16_t Length)1353 HAL_StatusTypeDef HAL_TIMEx_PWMN_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel, const uint32_t *pData,
1354 uint16_t Length)
1355 {
1356 HAL_StatusTypeDef status = HAL_OK;
1357 uint32_t tmpsmcr;
1358
1359 /* Check the parameters */
1360 assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
1361
1362 /* Set the TIM complementary channel state */
1363 if (TIM_CHANNEL_N_STATE_GET(htim, Channel) == HAL_TIM_CHANNEL_STATE_BUSY)
1364 {
1365 return HAL_BUSY;
1366 }
1367 else if (TIM_CHANNEL_N_STATE_GET(htim, Channel) == HAL_TIM_CHANNEL_STATE_READY)
1368 {
1369 if ((pData == NULL) || (Length == 0U))
1370 {
1371 return HAL_ERROR;
1372 }
1373 else
1374 {
1375 TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_BUSY);
1376 }
1377 }
1378 else
1379 {
1380 return HAL_ERROR;
1381 }
1382
1383 switch (Channel)
1384 {
1385 case TIM_CHANNEL_1:
1386 {
1387 /* Set the DMA compare callbacks */
1388 htim->hdma[TIM_DMA_ID_CC1]->XferCpltCallback = TIM_DMADelayPulseNCplt;
1389 htim->hdma[TIM_DMA_ID_CC1]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt;
1390
1391 /* Set the DMA error callback */
1392 htim->hdma[TIM_DMA_ID_CC1]->XferErrorCallback = TIM_DMAErrorCCxN ;
1393
1394 /* Enable the DMA channel */
1395 if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC1], (uint32_t)pData, (uint32_t)&htim->Instance->CCR1,
1396 Length) != HAL_OK)
1397 {
1398 /* Return error status */
1399 return HAL_ERROR;
1400 }
1401 /* Enable the TIM Capture/Compare 1 DMA request */
1402 __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC1);
1403 break;
1404 }
1405
1406 case TIM_CHANNEL_2:
1407 {
1408 /* Set the DMA compare callbacks */
1409 htim->hdma[TIM_DMA_ID_CC2]->XferCpltCallback = TIM_DMADelayPulseNCplt;
1410 htim->hdma[TIM_DMA_ID_CC2]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt;
1411
1412 /* Set the DMA error callback */
1413 htim->hdma[TIM_DMA_ID_CC2]->XferErrorCallback = TIM_DMAErrorCCxN ;
1414
1415 /* Enable the DMA channel */
1416 if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC2], (uint32_t)pData, (uint32_t)&htim->Instance->CCR2,
1417 Length) != HAL_OK)
1418 {
1419 /* Return error status */
1420 return HAL_ERROR;
1421 }
1422 /* Enable the TIM Capture/Compare 2 DMA request */
1423 __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC2);
1424 break;
1425 }
1426
1427 case TIM_CHANNEL_3:
1428 {
1429 /* Set the DMA compare callbacks */
1430 htim->hdma[TIM_DMA_ID_CC3]->XferCpltCallback = TIM_DMADelayPulseNCplt;
1431 htim->hdma[TIM_DMA_ID_CC3]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt;
1432
1433 /* Set the DMA error callback */
1434 htim->hdma[TIM_DMA_ID_CC3]->XferErrorCallback = TIM_DMAErrorCCxN ;
1435
1436 /* Enable the DMA channel */
1437 if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC3], (uint32_t)pData, (uint32_t)&htim->Instance->CCR3,
1438 Length) != HAL_OK)
1439 {
1440 /* Return error status */
1441 return HAL_ERROR;
1442 }
1443 /* Enable the TIM Capture/Compare 3 DMA request */
1444 __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC3);
1445 break;
1446 }
1447
1448 default:
1449 status = HAL_ERROR;
1450 break;
1451 }
1452
1453 if (status == HAL_OK)
1454 {
1455 /* Enable the complementary PWM output */
1456 TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE);
1457
1458 /* Enable the Main Output */
1459 __HAL_TIM_MOE_ENABLE(htim);
1460
1461 /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */
1462 if (IS_TIM_SLAVE_INSTANCE(htim->Instance))
1463 {
1464 tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS;
1465 if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr))
1466 {
1467 __HAL_TIM_ENABLE(htim);
1468 }
1469 }
1470 else
1471 {
1472 __HAL_TIM_ENABLE(htim);
1473 }
1474 }
1475
1476 /* Return function status */
1477 return status;
1478 }
1479
1480 /**
1481 * @brief Stops the TIM PWM signal generation in DMA mode on the complementary
1482 * output
1483 * @param htim TIM handle
1484 * @param Channel TIM Channel to be disabled
1485 * This parameter can be one of the following values:
1486 * @arg TIM_CHANNEL_1: TIM Channel 1 selected
1487 * @arg TIM_CHANNEL_2: TIM Channel 2 selected
1488 * @arg TIM_CHANNEL_3: TIM Channel 3 selected
1489 * @retval HAL status
1490 */
HAL_TIMEx_PWMN_Stop_DMA(TIM_HandleTypeDef * htim,uint32_t Channel)1491 HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel)
1492 {
1493 HAL_StatusTypeDef status = HAL_OK;
1494
1495 /* Check the parameters */
1496 assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
1497
1498 switch (Channel)
1499 {
1500 case TIM_CHANNEL_1:
1501 {
1502 /* Disable the TIM Capture/Compare 1 DMA request */
1503 __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC1);
1504 (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC1]);
1505 break;
1506 }
1507
1508 case TIM_CHANNEL_2:
1509 {
1510 /* Disable the TIM Capture/Compare 2 DMA request */
1511 __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC2);
1512 (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC2]);
1513 break;
1514 }
1515
1516 case TIM_CHANNEL_3:
1517 {
1518 /* Disable the TIM Capture/Compare 3 DMA request */
1519 __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC3);
1520 (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC3]);
1521 break;
1522 }
1523
1524 default:
1525 status = HAL_ERROR;
1526 break;
1527 }
1528
1529 if (status == HAL_OK)
1530 {
1531 /* Disable the complementary PWM output */
1532 TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE);
1533
1534 /* Disable the Main Output */
1535 __HAL_TIM_MOE_DISABLE(htim);
1536
1537 /* Disable the Peripheral */
1538 __HAL_TIM_DISABLE(htim);
1539
1540 /* Set the TIM complementary channel state */
1541 TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY);
1542 }
1543
1544 /* Return function status */
1545 return status;
1546 }
1547
1548 /**
1549 * @}
1550 */
1551
1552 /** @defgroup TIMEx_Exported_Functions_Group4 Extended Timer Complementary One Pulse functions
1553 * @brief Timer Complementary One Pulse functions
1554 *
1555 @verbatim
1556 ==============================================================================
1557 ##### Timer Complementary One Pulse functions #####
1558 ==============================================================================
1559 [..]
1560 This section provides functions allowing to:
1561 (+) Start the Complementary One Pulse generation.
1562 (+) Stop the Complementary One Pulse.
1563 (+) Start the Complementary One Pulse and enable interrupts.
1564 (+) Stop the Complementary One Pulse and disable interrupts.
1565
1566 @endverbatim
1567 * @{
1568 */
1569
1570 /**
1571 * @brief Starts the TIM One Pulse signal generation on the complementary
1572 * output.
1573 * @note OutputChannel must match the pulse output channel chosen when calling
1574 * @ref HAL_TIM_OnePulse_ConfigChannel().
1575 * @param htim TIM One Pulse handle
1576 * @param OutputChannel pulse output channel to enable
1577 * This parameter can be one of the following values:
1578 * @arg TIM_CHANNEL_1: TIM Channel 1 selected
1579 * @arg TIM_CHANNEL_2: TIM Channel 2 selected
1580 * @retval HAL status
1581 */
HAL_TIMEx_OnePulseN_Start(TIM_HandleTypeDef * htim,uint32_t OutputChannel)1582 HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Start(TIM_HandleTypeDef *htim, uint32_t OutputChannel)
1583 {
1584 uint32_t input_channel = (OutputChannel == TIM_CHANNEL_1) ? TIM_CHANNEL_2 : TIM_CHANNEL_1;
1585 HAL_TIM_ChannelStateTypeDef channel_1_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_1);
1586 HAL_TIM_ChannelStateTypeDef channel_2_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_2);
1587 HAL_TIM_ChannelStateTypeDef complementary_channel_1_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHANNEL_1);
1588 HAL_TIM_ChannelStateTypeDef complementary_channel_2_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHANNEL_2);
1589
1590 /* Check the parameters */
1591 assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, OutputChannel));
1592
1593 /* Check the TIM channels state */
1594 if ((channel_1_state != HAL_TIM_CHANNEL_STATE_READY)
1595 || (channel_2_state != HAL_TIM_CHANNEL_STATE_READY)
1596 || (complementary_channel_1_state != HAL_TIM_CHANNEL_STATE_READY)
1597 || (complementary_channel_2_state != HAL_TIM_CHANNEL_STATE_READY))
1598 {
1599 return HAL_ERROR;
1600 }
1601
1602 /* Set the TIM channels state */
1603 TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY);
1604 TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY);
1605 TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY);
1606 TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY);
1607
1608 /* Enable the complementary One Pulse output channel and the Input Capture channel */
1609 TIM_CCxNChannelCmd(htim->Instance, OutputChannel, TIM_CCxN_ENABLE);
1610 TIM_CCxChannelCmd(htim->Instance, input_channel, TIM_CCx_ENABLE);
1611
1612 /* Enable the Main Output */
1613 __HAL_TIM_MOE_ENABLE(htim);
1614
1615 /* Return function status */
1616 return HAL_OK;
1617 }
1618
1619 /**
1620 * @brief Stops the TIM One Pulse signal generation on the complementary
1621 * output.
1622 * @note OutputChannel must match the pulse output channel chosen when calling
1623 * @ref HAL_TIM_OnePulse_ConfigChannel().
1624 * @param htim TIM One Pulse handle
1625 * @param OutputChannel pulse output channel to disable
1626 * This parameter can be one of the following values:
1627 * @arg TIM_CHANNEL_1: TIM Channel 1 selected
1628 * @arg TIM_CHANNEL_2: TIM Channel 2 selected
1629 * @retval HAL status
1630 */
HAL_TIMEx_OnePulseN_Stop(TIM_HandleTypeDef * htim,uint32_t OutputChannel)1631 HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Stop(TIM_HandleTypeDef *htim, uint32_t OutputChannel)
1632 {
1633 uint32_t input_channel = (OutputChannel == TIM_CHANNEL_1) ? TIM_CHANNEL_2 : TIM_CHANNEL_1;
1634
1635 /* Check the parameters */
1636 assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, OutputChannel));
1637
1638 /* Disable the complementary One Pulse output channel and the Input Capture channel */
1639 TIM_CCxNChannelCmd(htim->Instance, OutputChannel, TIM_CCxN_DISABLE);
1640 TIM_CCxChannelCmd(htim->Instance, input_channel, TIM_CCx_DISABLE);
1641
1642 /* Disable the Main Output */
1643 __HAL_TIM_MOE_DISABLE(htim);
1644
1645 /* Disable the Peripheral */
1646 __HAL_TIM_DISABLE(htim);
1647
1648 /* Set the TIM channels state */
1649 TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY);
1650 TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY);
1651 TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY);
1652 TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY);
1653
1654 /* Return function status */
1655 return HAL_OK;
1656 }
1657
1658 /**
1659 * @brief Starts the TIM One Pulse signal generation in interrupt mode on the
1660 * complementary channel.
1661 * @note OutputChannel must match the pulse output channel chosen when calling
1662 * @ref HAL_TIM_OnePulse_ConfigChannel().
1663 * @param htim TIM One Pulse handle
1664 * @param OutputChannel pulse output channel to enable
1665 * This parameter can be one of the following values:
1666 * @arg TIM_CHANNEL_1: TIM Channel 1 selected
1667 * @arg TIM_CHANNEL_2: TIM Channel 2 selected
1668 * @retval HAL status
1669 */
HAL_TIMEx_OnePulseN_Start_IT(TIM_HandleTypeDef * htim,uint32_t OutputChannel)1670 HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Start_IT(TIM_HandleTypeDef *htim, uint32_t OutputChannel)
1671 {
1672 uint32_t input_channel = (OutputChannel == TIM_CHANNEL_1) ? TIM_CHANNEL_2 : TIM_CHANNEL_1;
1673 HAL_TIM_ChannelStateTypeDef channel_1_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_1);
1674 HAL_TIM_ChannelStateTypeDef channel_2_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_2);
1675 HAL_TIM_ChannelStateTypeDef complementary_channel_1_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHANNEL_1);
1676 HAL_TIM_ChannelStateTypeDef complementary_channel_2_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHANNEL_2);
1677
1678 /* Check the parameters */
1679 assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, OutputChannel));
1680
1681 /* Check the TIM channels state */
1682 if ((channel_1_state != HAL_TIM_CHANNEL_STATE_READY)
1683 || (channel_2_state != HAL_TIM_CHANNEL_STATE_READY)
1684 || (complementary_channel_1_state != HAL_TIM_CHANNEL_STATE_READY)
1685 || (complementary_channel_2_state != HAL_TIM_CHANNEL_STATE_READY))
1686 {
1687 return HAL_ERROR;
1688 }
1689
1690 /* Set the TIM channels state */
1691 TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY);
1692 TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY);
1693 TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY);
1694 TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY);
1695
1696 /* Enable the TIM Capture/Compare 1 interrupt */
1697 __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC1);
1698
1699 /* Enable the TIM Capture/Compare 2 interrupt */
1700 __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC2);
1701
1702 /* Enable the complementary One Pulse output channel and the Input Capture channel */
1703 TIM_CCxNChannelCmd(htim->Instance, OutputChannel, TIM_CCxN_ENABLE);
1704 TIM_CCxChannelCmd(htim->Instance, input_channel, TIM_CCx_ENABLE);
1705
1706 /* Enable the Main Output */
1707 __HAL_TIM_MOE_ENABLE(htim);
1708
1709 /* Return function status */
1710 return HAL_OK;
1711 }
1712
1713 /**
1714 * @brief Stops the TIM One Pulse signal generation in interrupt mode on the
1715 * complementary channel.
1716 * @note OutputChannel must match the pulse output channel chosen when calling
1717 * @ref HAL_TIM_OnePulse_ConfigChannel().
1718 * @param htim TIM One Pulse handle
1719 * @param OutputChannel pulse output channel to disable
1720 * This parameter can be one of the following values:
1721 * @arg TIM_CHANNEL_1: TIM Channel 1 selected
1722 * @arg TIM_CHANNEL_2: TIM Channel 2 selected
1723 * @retval HAL status
1724 */
HAL_TIMEx_OnePulseN_Stop_IT(TIM_HandleTypeDef * htim,uint32_t OutputChannel)1725 HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Stop_IT(TIM_HandleTypeDef *htim, uint32_t OutputChannel)
1726 {
1727 uint32_t input_channel = (OutputChannel == TIM_CHANNEL_1) ? TIM_CHANNEL_2 : TIM_CHANNEL_1;
1728
1729 /* Check the parameters */
1730 assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, OutputChannel));
1731
1732 /* Disable the TIM Capture/Compare 1 interrupt */
1733 __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC1);
1734
1735 /* Disable the TIM Capture/Compare 2 interrupt */
1736 __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC2);
1737
1738 /* Disable the complementary One Pulse output channel and the Input Capture channel */
1739 TIM_CCxNChannelCmd(htim->Instance, OutputChannel, TIM_CCxN_DISABLE);
1740 TIM_CCxChannelCmd(htim->Instance, input_channel, TIM_CCx_DISABLE);
1741
1742 /* Disable the Main Output */
1743 __HAL_TIM_MOE_DISABLE(htim);
1744
1745 /* Disable the Peripheral */
1746 __HAL_TIM_DISABLE(htim);
1747
1748 /* Set the TIM channels state */
1749 TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY);
1750 TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY);
1751 TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY);
1752 TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY);
1753
1754 /* Return function status */
1755 return HAL_OK;
1756 }
1757
1758 /**
1759 * @}
1760 */
1761
1762 /** @defgroup TIMEx_Exported_Functions_Group5 Extended Peripheral Control functions
1763 * @brief Peripheral Control functions
1764 *
1765 @verbatim
1766 ==============================================================================
1767 ##### Peripheral Control functions #####
1768 ==============================================================================
1769 [..]
1770 This section provides functions allowing to:
1771 (+) Configure the commutation event in case of use of the Hall sensor interface.
1772 (+) Configure Output channels for OC and PWM mode.
1773
1774 (+) Configure Complementary channels, break features and dead time.
1775 (+) Configure Master synchronization.
1776 (+) Configure timer remapping capabilities.
1777
1778 @endverbatim
1779 * @{
1780 */
1781
1782 /**
1783 * @brief Configure the TIM commutation event sequence.
1784 * @note This function is mandatory to use the commutation event in order to
1785 * update the configuration at each commutation detection on the TRGI input of the Timer,
1786 * the typical use of this feature is with the use of another Timer(interface Timer)
1787 * configured in Hall sensor interface, this interface Timer will generate the
1788 * commutation at its TRGO output (connected to Timer used in this function) each time
1789 * the TI1 of the Interface Timer detect a commutation at its input TI1.
1790 * @param htim TIM handle
1791 * @param InputTrigger the Internal trigger corresponding to the Timer Interfacing with the Hall sensor
1792 * This parameter can be one of the following values:
1793 * @arg TIM_TS_ITR0: Internal trigger 0 selected
1794 * @arg TIM_TS_ITR1: Internal trigger 1 selected
1795 * @arg TIM_TS_ITR2: Internal trigger 2 selected
1796 * @arg TIM_TS_ITR3: Internal trigger 3 selected
1797 * @arg TIM_TS_NONE: No trigger is needed
1798 * @param CommutationSource the Commutation Event source
1799 * This parameter can be one of the following values:
1800 * @arg TIM_COMMUTATION_TRGI: Commutation source is the TRGI of the Interface Timer
1801 * @arg TIM_COMMUTATION_SOFTWARE: Commutation source is set by software using the COMG bit
1802 * @retval HAL status
1803 */
HAL_TIMEx_ConfigCommutEvent(TIM_HandleTypeDef * htim,uint32_t InputTrigger,uint32_t CommutationSource)1804 HAL_StatusTypeDef HAL_TIMEx_ConfigCommutEvent(TIM_HandleTypeDef *htim, uint32_t InputTrigger,
1805 uint32_t CommutationSource)
1806 {
1807 /* Check the parameters */
1808 assert_param(IS_TIM_COMMUTATION_EVENT_INSTANCE(htim->Instance));
1809 assert_param(IS_TIM_INTERNAL_TRIGGEREVENT_SELECTION(InputTrigger));
1810
1811 __HAL_LOCK(htim);
1812
1813 if ((InputTrigger == TIM_TS_ITR0) || (InputTrigger == TIM_TS_ITR1) ||
1814 (InputTrigger == TIM_TS_ITR2) || (InputTrigger == TIM_TS_ITR3))
1815 {
1816 /* Select the Input trigger */
1817 htim->Instance->SMCR &= ~TIM_SMCR_TS;
1818 htim->Instance->SMCR |= InputTrigger;
1819 }
1820
1821 /* Select the Capture Compare preload feature */
1822 htim->Instance->CR2 |= TIM_CR2_CCPC;
1823 /* Select the Commutation event source */
1824 htim->Instance->CR2 &= ~TIM_CR2_CCUS;
1825 htim->Instance->CR2 |= CommutationSource;
1826
1827 /* Disable Commutation Interrupt */
1828 __HAL_TIM_DISABLE_IT(htim, TIM_IT_COM);
1829
1830 /* Disable Commutation DMA request */
1831 __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_COM);
1832
1833 __HAL_UNLOCK(htim);
1834
1835 return HAL_OK;
1836 }
1837
1838 /**
1839 * @brief Configure the TIM commutation event sequence with interrupt.
1840 * @note This function is mandatory to use the commutation event in order to
1841 * update the configuration at each commutation detection on the TRGI input of the Timer,
1842 * the typical use of this feature is with the use of another Timer(interface Timer)
1843 * configured in Hall sensor interface, this interface Timer will generate the
1844 * commutation at its TRGO output (connected to Timer used in this function) each time
1845 * the TI1 of the Interface Timer detect a commutation at its input TI1.
1846 * @param htim TIM handle
1847 * @param InputTrigger the Internal trigger corresponding to the Timer Interfacing with the Hall sensor
1848 * This parameter can be one of the following values:
1849 * @arg TIM_TS_ITR0: Internal trigger 0 selected
1850 * @arg TIM_TS_ITR1: Internal trigger 1 selected
1851 * @arg TIM_TS_ITR2: Internal trigger 2 selected
1852 * @arg TIM_TS_ITR3: Internal trigger 3 selected
1853 * @arg TIM_TS_NONE: No trigger is needed
1854 * @param CommutationSource the Commutation Event source
1855 * This parameter can be one of the following values:
1856 * @arg TIM_COMMUTATION_TRGI: Commutation source is the TRGI of the Interface Timer
1857 * @arg TIM_COMMUTATION_SOFTWARE: Commutation source is set by software using the COMG bit
1858 * @retval HAL status
1859 */
HAL_TIMEx_ConfigCommutEvent_IT(TIM_HandleTypeDef * htim,uint32_t InputTrigger,uint32_t CommutationSource)1860 HAL_StatusTypeDef HAL_TIMEx_ConfigCommutEvent_IT(TIM_HandleTypeDef *htim, uint32_t InputTrigger,
1861 uint32_t CommutationSource)
1862 {
1863 /* Check the parameters */
1864 assert_param(IS_TIM_COMMUTATION_EVENT_INSTANCE(htim->Instance));
1865 assert_param(IS_TIM_INTERNAL_TRIGGEREVENT_SELECTION(InputTrigger));
1866
1867 __HAL_LOCK(htim);
1868
1869 if ((InputTrigger == TIM_TS_ITR0) || (InputTrigger == TIM_TS_ITR1) ||
1870 (InputTrigger == TIM_TS_ITR2) || (InputTrigger == TIM_TS_ITR3))
1871 {
1872 /* Select the Input trigger */
1873 htim->Instance->SMCR &= ~TIM_SMCR_TS;
1874 htim->Instance->SMCR |= InputTrigger;
1875 }
1876
1877 /* Select the Capture Compare preload feature */
1878 htim->Instance->CR2 |= TIM_CR2_CCPC;
1879 /* Select the Commutation event source */
1880 htim->Instance->CR2 &= ~TIM_CR2_CCUS;
1881 htim->Instance->CR2 |= CommutationSource;
1882
1883 /* Disable Commutation DMA request */
1884 __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_COM);
1885
1886 /* Enable the Commutation Interrupt */
1887 __HAL_TIM_ENABLE_IT(htim, TIM_IT_COM);
1888
1889 __HAL_UNLOCK(htim);
1890
1891 return HAL_OK;
1892 }
1893
1894 /**
1895 * @brief Configure the TIM commutation event sequence with DMA.
1896 * @note This function is mandatory to use the commutation event in order to
1897 * update the configuration at each commutation detection on the TRGI input of the Timer,
1898 * the typical use of this feature is with the use of another Timer(interface Timer)
1899 * configured in Hall sensor interface, this interface Timer will generate the
1900 * commutation at its TRGO output (connected to Timer used in this function) each time
1901 * the TI1 of the Interface Timer detect a commutation at its input TI1.
1902 * @note The user should configure the DMA in his own software, in This function only the COMDE bit is set
1903 * @param htim TIM handle
1904 * @param InputTrigger the Internal trigger corresponding to the Timer Interfacing with the Hall sensor
1905 * This parameter can be one of the following values:
1906 * @arg TIM_TS_ITR0: Internal trigger 0 selected
1907 * @arg TIM_TS_ITR1: Internal trigger 1 selected
1908 * @arg TIM_TS_ITR2: Internal trigger 2 selected
1909 * @arg TIM_TS_ITR3: Internal trigger 3 selected
1910 * @arg TIM_TS_NONE: No trigger is needed
1911 * @param CommutationSource the Commutation Event source
1912 * This parameter can be one of the following values:
1913 * @arg TIM_COMMUTATION_TRGI: Commutation source is the TRGI of the Interface Timer
1914 * @arg TIM_COMMUTATION_SOFTWARE: Commutation source is set by software using the COMG bit
1915 * @retval HAL status
1916 */
HAL_TIMEx_ConfigCommutEvent_DMA(TIM_HandleTypeDef * htim,uint32_t InputTrigger,uint32_t CommutationSource)1917 HAL_StatusTypeDef HAL_TIMEx_ConfigCommutEvent_DMA(TIM_HandleTypeDef *htim, uint32_t InputTrigger,
1918 uint32_t CommutationSource)
1919 {
1920 /* Check the parameters */
1921 assert_param(IS_TIM_COMMUTATION_EVENT_INSTANCE(htim->Instance));
1922 assert_param(IS_TIM_INTERNAL_TRIGGEREVENT_SELECTION(InputTrigger));
1923
1924 __HAL_LOCK(htim);
1925
1926 if ((InputTrigger == TIM_TS_ITR0) || (InputTrigger == TIM_TS_ITR1) ||
1927 (InputTrigger == TIM_TS_ITR2) || (InputTrigger == TIM_TS_ITR3))
1928 {
1929 /* Select the Input trigger */
1930 htim->Instance->SMCR &= ~TIM_SMCR_TS;
1931 htim->Instance->SMCR |= InputTrigger;
1932 }
1933
1934 /* Select the Capture Compare preload feature */
1935 htim->Instance->CR2 |= TIM_CR2_CCPC;
1936 /* Select the Commutation event source */
1937 htim->Instance->CR2 &= ~TIM_CR2_CCUS;
1938 htim->Instance->CR2 |= CommutationSource;
1939
1940 /* Enable the Commutation DMA Request */
1941 /* Set the DMA Commutation Callback */
1942 htim->hdma[TIM_DMA_ID_COMMUTATION]->XferCpltCallback = TIMEx_DMACommutationCplt;
1943 htim->hdma[TIM_DMA_ID_COMMUTATION]->XferHalfCpltCallback = TIMEx_DMACommutationHalfCplt;
1944 /* Set the DMA error callback */
1945 htim->hdma[TIM_DMA_ID_COMMUTATION]->XferErrorCallback = TIM_DMAError;
1946
1947 /* Disable Commutation Interrupt */
1948 __HAL_TIM_DISABLE_IT(htim, TIM_IT_COM);
1949
1950 /* Enable the Commutation DMA Request */
1951 __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_COM);
1952
1953 __HAL_UNLOCK(htim);
1954
1955 return HAL_OK;
1956 }
1957
1958 /**
1959 * @brief Configures the TIM in master mode.
1960 * @param htim TIM handle.
1961 * @param sMasterConfig pointer to a TIM_MasterConfigTypeDef structure that
1962 * contains the selected trigger output (TRGO) and the Master/Slave
1963 * mode.
1964 * @retval HAL status
1965 */
HAL_TIMEx_MasterConfigSynchronization(TIM_HandleTypeDef * htim,const TIM_MasterConfigTypeDef * sMasterConfig)1966 HAL_StatusTypeDef HAL_TIMEx_MasterConfigSynchronization(TIM_HandleTypeDef *htim,
1967 const TIM_MasterConfigTypeDef *sMasterConfig)
1968 {
1969 uint32_t tmpcr2;
1970 uint32_t tmpsmcr;
1971
1972 /* Check the parameters */
1973 assert_param(IS_TIM_MASTER_INSTANCE(htim->Instance));
1974 assert_param(IS_TIM_TRGO_SOURCE(sMasterConfig->MasterOutputTrigger));
1975 assert_param(IS_TIM_MSM_STATE(sMasterConfig->MasterSlaveMode));
1976
1977 /* Check input state */
1978 __HAL_LOCK(htim);
1979
1980 /* Change the handler state */
1981 htim->State = HAL_TIM_STATE_BUSY;
1982
1983 /* Get the TIMx CR2 register value */
1984 tmpcr2 = htim->Instance->CR2;
1985
1986 /* Get the TIMx SMCR register value */
1987 tmpsmcr = htim->Instance->SMCR;
1988
1989 /* Reset the MMS Bits */
1990 tmpcr2 &= ~TIM_CR2_MMS;
1991 /* Select the TRGO source */
1992 tmpcr2 |= sMasterConfig->MasterOutputTrigger;
1993
1994 /* Update TIMx CR2 */
1995 htim->Instance->CR2 = tmpcr2;
1996
1997 if (IS_TIM_SLAVE_INSTANCE(htim->Instance))
1998 {
1999 /* Reset the MSM Bit */
2000 tmpsmcr &= ~TIM_SMCR_MSM;
2001 /* Set master mode */
2002 tmpsmcr |= sMasterConfig->MasterSlaveMode;
2003
2004 /* Update TIMx SMCR */
2005 htim->Instance->SMCR = tmpsmcr;
2006 }
2007
2008 /* Change the htim state */
2009 htim->State = HAL_TIM_STATE_READY;
2010
2011 __HAL_UNLOCK(htim);
2012
2013 return HAL_OK;
2014 }
2015
2016 /**
2017 * @brief Configures the Break feature, dead time, Lock level, OSSI/OSSR State
2018 * and the AOE(automatic output enable).
2019 * @param htim TIM handle
2020 * @param sBreakDeadTimeConfig pointer to a TIM_ConfigBreakDeadConfigTypeDef structure that
2021 * contains the BDTR Register configuration information for the TIM peripheral.
2022 * @note Interrupts can be generated when an active level is detected on the
2023 * break input, the break 2 input or the system break input. Break
2024 * interrupt can be enabled by calling the @ref __HAL_TIM_ENABLE_IT macro.
2025 * @retval HAL status
2026 */
HAL_TIMEx_ConfigBreakDeadTime(TIM_HandleTypeDef * htim,const TIM_BreakDeadTimeConfigTypeDef * sBreakDeadTimeConfig)2027 HAL_StatusTypeDef HAL_TIMEx_ConfigBreakDeadTime(TIM_HandleTypeDef *htim,
2028 const TIM_BreakDeadTimeConfigTypeDef *sBreakDeadTimeConfig)
2029 {
2030 /* Keep this variable initialized to 0 as it is used to configure BDTR register */
2031 uint32_t tmpbdtr = 0U;
2032
2033 /* Check the parameters */
2034 assert_param(IS_TIM_BREAK_INSTANCE(htim->Instance));
2035 assert_param(IS_TIM_OSSR_STATE(sBreakDeadTimeConfig->OffStateRunMode));
2036 assert_param(IS_TIM_OSSI_STATE(sBreakDeadTimeConfig->OffStateIDLEMode));
2037 assert_param(IS_TIM_LOCK_LEVEL(sBreakDeadTimeConfig->LockLevel));
2038 assert_param(IS_TIM_DEADTIME(sBreakDeadTimeConfig->DeadTime));
2039 assert_param(IS_TIM_BREAK_STATE(sBreakDeadTimeConfig->BreakState));
2040 assert_param(IS_TIM_BREAK_POLARITY(sBreakDeadTimeConfig->BreakPolarity));
2041 assert_param(IS_TIM_AUTOMATIC_OUTPUT_STATE(sBreakDeadTimeConfig->AutomaticOutput));
2042
2043 /* Check input state */
2044 __HAL_LOCK(htim);
2045
2046 /* Set the Lock level, the Break enable Bit and the Polarity, the OSSR State,
2047 the OSSI State, the dead time value and the Automatic Output Enable Bit */
2048
2049 /* Set the BDTR bits */
2050 MODIFY_REG(tmpbdtr, TIM_BDTR_DTG, sBreakDeadTimeConfig->DeadTime);
2051 MODIFY_REG(tmpbdtr, TIM_BDTR_LOCK, sBreakDeadTimeConfig->LockLevel);
2052 MODIFY_REG(tmpbdtr, TIM_BDTR_OSSI, sBreakDeadTimeConfig->OffStateIDLEMode);
2053 MODIFY_REG(tmpbdtr, TIM_BDTR_OSSR, sBreakDeadTimeConfig->OffStateRunMode);
2054 MODIFY_REG(tmpbdtr, TIM_BDTR_BKE, sBreakDeadTimeConfig->BreakState);
2055 MODIFY_REG(tmpbdtr, TIM_BDTR_BKP, sBreakDeadTimeConfig->BreakPolarity);
2056 MODIFY_REG(tmpbdtr, TIM_BDTR_AOE, sBreakDeadTimeConfig->AutomaticOutput);
2057
2058
2059 /* Set TIMx_BDTR */
2060 htim->Instance->BDTR = tmpbdtr;
2061
2062 __HAL_UNLOCK(htim);
2063
2064 return HAL_OK;
2065 }
2066
2067 /**
2068 * @brief Configures the TIMx Remapping input capabilities.
2069 * @param htim TIM handle.
2070 * @param Remap specifies the TIM remapping source.
2071 * For TIM14, the parameter can have the following values:
2072 * @arg TIM_TIM14_GPIO: TIM14 TI1 is connected to GPIO
2073 * @arg TIM_TIM14_RTC: TIM14 TI1 is connected to RTC_clock
2074 * @arg TIM_TIM14_HSE: TIM14 TI1 is connected to HSE/32
2075 * @arg TIM_TIM14_MCO: TIM14 TI1 is connected to MCO
2076 *
2077 * @retval HAL status
2078 */
HAL_TIMEx_RemapConfig(TIM_HandleTypeDef * htim,uint32_t Remap)2079 HAL_StatusTypeDef HAL_TIMEx_RemapConfig(TIM_HandleTypeDef *htim, uint32_t Remap)
2080 {
2081
2082 /* Check parameters */
2083 assert_param(IS_TIM_REMAP(htim->Instance, Remap));
2084
2085 __HAL_LOCK(htim);
2086
2087 /* Set the Timer remapping configuration */
2088 WRITE_REG(htim->Instance->OR, Remap);
2089
2090 __HAL_UNLOCK(htim);
2091
2092 return HAL_OK;
2093 }
2094
2095 /**
2096 * @}
2097 */
2098
2099 /** @defgroup TIMEx_Exported_Functions_Group6 Extended Callbacks functions
2100 * @brief Extended Callbacks functions
2101 *
2102 @verbatim
2103 ==============================================================================
2104 ##### Extended Callbacks functions #####
2105 ==============================================================================
2106 [..]
2107 This section provides Extended TIM callback functions:
2108 (+) Timer Commutation callback
2109 (+) Timer Break callback
2110
2111 @endverbatim
2112 * @{
2113 */
2114
2115 /**
2116 * @brief Hall commutation changed callback in non-blocking mode
2117 * @param htim TIM handle
2118 * @retval None
2119 */
HAL_TIMEx_CommutCallback(TIM_HandleTypeDef * htim)2120 __weak void HAL_TIMEx_CommutCallback(TIM_HandleTypeDef *htim)
2121 {
2122 /* Prevent unused argument(s) compilation warning */
2123 UNUSED(htim);
2124
2125 /* NOTE : This function should not be modified, when the callback is needed,
2126 the HAL_TIMEx_CommutCallback could be implemented in the user file
2127 */
2128 }
2129 /**
2130 * @brief Hall commutation changed half complete callback in non-blocking mode
2131 * @param htim TIM handle
2132 * @retval None
2133 */
HAL_TIMEx_CommutHalfCpltCallback(TIM_HandleTypeDef * htim)2134 __weak void HAL_TIMEx_CommutHalfCpltCallback(TIM_HandleTypeDef *htim)
2135 {
2136 /* Prevent unused argument(s) compilation warning */
2137 UNUSED(htim);
2138
2139 /* NOTE : This function should not be modified, when the callback is needed,
2140 the HAL_TIMEx_CommutHalfCpltCallback could be implemented in the user file
2141 */
2142 }
2143
2144 /**
2145 * @brief Hall Break detection callback in non-blocking mode
2146 * @param htim TIM handle
2147 * @retval None
2148 */
HAL_TIMEx_BreakCallback(TIM_HandleTypeDef * htim)2149 __weak void HAL_TIMEx_BreakCallback(TIM_HandleTypeDef *htim)
2150 {
2151 /* Prevent unused argument(s) compilation warning */
2152 UNUSED(htim);
2153
2154 /* NOTE : This function should not be modified, when the callback is needed,
2155 the HAL_TIMEx_BreakCallback could be implemented in the user file
2156 */
2157 }
2158 /**
2159 * @}
2160 */
2161
2162 /** @defgroup TIMEx_Exported_Functions_Group7 Extended Peripheral State functions
2163 * @brief Extended Peripheral State functions
2164 *
2165 @verbatim
2166 ==============================================================================
2167 ##### Extended Peripheral State functions #####
2168 ==============================================================================
2169 [..]
2170 This subsection permits to get in run-time the status of the peripheral
2171 and the data flow.
2172
2173 @endverbatim
2174 * @{
2175 */
2176
2177 /**
2178 * @brief Return the TIM Hall Sensor interface handle state.
2179 * @param htim TIM Hall Sensor handle
2180 * @retval HAL state
2181 */
HAL_TIMEx_HallSensor_GetState(const TIM_HandleTypeDef * htim)2182 HAL_TIM_StateTypeDef HAL_TIMEx_HallSensor_GetState(const TIM_HandleTypeDef *htim)
2183 {
2184 return htim->State;
2185 }
2186
2187 /**
2188 * @brief Return actual state of the TIM complementary channel.
2189 * @param htim TIM handle
2190 * @param ChannelN TIM Complementary channel
2191 * This parameter can be one of the following values:
2192 * @arg TIM_CHANNEL_1: TIM Channel 1
2193 * @arg TIM_CHANNEL_2: TIM Channel 2
2194 * @arg TIM_CHANNEL_3: TIM Channel 3
2195 * @retval TIM Complementary channel state
2196 */
HAL_TIMEx_GetChannelNState(const TIM_HandleTypeDef * htim,uint32_t ChannelN)2197 HAL_TIM_ChannelStateTypeDef HAL_TIMEx_GetChannelNState(const TIM_HandleTypeDef *htim, uint32_t ChannelN)
2198 {
2199 HAL_TIM_ChannelStateTypeDef channel_state;
2200
2201 /* Check the parameters */
2202 assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, ChannelN));
2203
2204 channel_state = TIM_CHANNEL_N_STATE_GET(htim, ChannelN);
2205
2206 return channel_state;
2207 }
2208 /**
2209 * @}
2210 */
2211
2212 /**
2213 * @}
2214 */
2215
2216 /* Private functions ---------------------------------------------------------*/
2217 /** @defgroup TIMEx_Private_Functions TIM Extended Private Functions
2218 * @{
2219 */
2220
2221 /**
2222 * @brief TIM DMA Commutation callback.
2223 * @param hdma pointer to DMA handle.
2224 * @retval None
2225 */
TIMEx_DMACommutationCplt(DMA_HandleTypeDef * hdma)2226 void TIMEx_DMACommutationCplt(DMA_HandleTypeDef *hdma)
2227 {
2228 TIM_HandleTypeDef *htim = (TIM_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent;
2229
2230 /* Change the htim state */
2231 htim->State = HAL_TIM_STATE_READY;
2232
2233 #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
2234 htim->CommutationCallback(htim);
2235 #else
2236 HAL_TIMEx_CommutCallback(htim);
2237 #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
2238 }
2239
2240 /**
2241 * @brief TIM DMA Commutation half complete callback.
2242 * @param hdma pointer to DMA handle.
2243 * @retval None
2244 */
TIMEx_DMACommutationHalfCplt(DMA_HandleTypeDef * hdma)2245 void TIMEx_DMACommutationHalfCplt(DMA_HandleTypeDef *hdma)
2246 {
2247 TIM_HandleTypeDef *htim = (TIM_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent;
2248
2249 /* Change the htim state */
2250 htim->State = HAL_TIM_STATE_READY;
2251
2252 #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
2253 htim->CommutationHalfCpltCallback(htim);
2254 #else
2255 HAL_TIMEx_CommutHalfCpltCallback(htim);
2256 #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
2257 }
2258
2259
2260 /**
2261 * @brief TIM DMA Delay Pulse complete callback (complementary channel).
2262 * @param hdma pointer to DMA handle.
2263 * @retval None
2264 */
TIM_DMADelayPulseNCplt(DMA_HandleTypeDef * hdma)2265 static void TIM_DMADelayPulseNCplt(DMA_HandleTypeDef *hdma)
2266 {
2267 TIM_HandleTypeDef *htim = (TIM_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent;
2268
2269 if (hdma == htim->hdma[TIM_DMA_ID_CC1])
2270 {
2271 htim->Channel = HAL_TIM_ACTIVE_CHANNEL_1;
2272
2273 if (hdma->Init.Mode == DMA_NORMAL)
2274 {
2275 TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY);
2276 }
2277 }
2278 else if (hdma == htim->hdma[TIM_DMA_ID_CC2])
2279 {
2280 htim->Channel = HAL_TIM_ACTIVE_CHANNEL_2;
2281
2282 if (hdma->Init.Mode == DMA_NORMAL)
2283 {
2284 TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY);
2285 }
2286 }
2287 else if (hdma == htim->hdma[TIM_DMA_ID_CC3])
2288 {
2289 htim->Channel = HAL_TIM_ACTIVE_CHANNEL_3;
2290
2291 if (hdma->Init.Mode == DMA_NORMAL)
2292 {
2293 TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_3, HAL_TIM_CHANNEL_STATE_READY);
2294 }
2295 }
2296 else if (hdma == htim->hdma[TIM_DMA_ID_CC4])
2297 {
2298 htim->Channel = HAL_TIM_ACTIVE_CHANNEL_4;
2299
2300 if (hdma->Init.Mode == DMA_NORMAL)
2301 {
2302 TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_4, HAL_TIM_CHANNEL_STATE_READY);
2303 }
2304 }
2305 else
2306 {
2307 /* nothing to do */
2308 }
2309
2310 #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
2311 htim->PWM_PulseFinishedCallback(htim);
2312 #else
2313 HAL_TIM_PWM_PulseFinishedCallback(htim);
2314 #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
2315
2316 htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED;
2317 }
2318
2319 /**
2320 * @brief TIM DMA error callback (complementary channel)
2321 * @param hdma pointer to DMA handle.
2322 * @retval None
2323 */
TIM_DMAErrorCCxN(DMA_HandleTypeDef * hdma)2324 static void TIM_DMAErrorCCxN(DMA_HandleTypeDef *hdma)
2325 {
2326 TIM_HandleTypeDef *htim = (TIM_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent;
2327
2328 if (hdma == htim->hdma[TIM_DMA_ID_CC1])
2329 {
2330 htim->Channel = HAL_TIM_ACTIVE_CHANNEL_1;
2331 TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY);
2332 }
2333 else if (hdma == htim->hdma[TIM_DMA_ID_CC2])
2334 {
2335 htim->Channel = HAL_TIM_ACTIVE_CHANNEL_2;
2336 TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY);
2337 }
2338 else if (hdma == htim->hdma[TIM_DMA_ID_CC3])
2339 {
2340 htim->Channel = HAL_TIM_ACTIVE_CHANNEL_3;
2341 TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_3, HAL_TIM_CHANNEL_STATE_READY);
2342 }
2343 else
2344 {
2345 /* nothing to do */
2346 }
2347
2348 #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
2349 htim->ErrorCallback(htim);
2350 #else
2351 HAL_TIM_ErrorCallback(htim);
2352 #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
2353
2354 htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED;
2355 }
2356
2357 /**
2358 * @brief Enables or disables the TIM Capture Compare Channel xN.
2359 * @param TIMx to select the TIM peripheral
2360 * @param Channel specifies the TIM Channel
2361 * This parameter can be one of the following values:
2362 * @arg TIM_CHANNEL_1: TIM Channel 1
2363 * @arg TIM_CHANNEL_2: TIM Channel 2
2364 * @arg TIM_CHANNEL_3: TIM Channel 3
2365 * @param ChannelNState specifies the TIM Channel CCxNE bit new state.
2366 * This parameter can be: TIM_CCxN_ENABLE or TIM_CCxN_Disable.
2367 * @retval None
2368 */
TIM_CCxNChannelCmd(TIM_TypeDef * TIMx,uint32_t Channel,uint32_t ChannelNState)2369 static void TIM_CCxNChannelCmd(TIM_TypeDef *TIMx, uint32_t Channel, uint32_t ChannelNState)
2370 {
2371 uint32_t tmp;
2372
2373 tmp = TIM_CCER_CC1NE << (Channel & 0x1FU); /* 0x1FU = 31 bits max shift */
2374
2375 /* Reset the CCxNE Bit */
2376 TIMx->CCER &= ~tmp;
2377
2378 /* Set or reset the CCxNE Bit */
2379 TIMx->CCER |= (uint32_t)(ChannelNState << (Channel & 0x1FU)); /* 0x1FU = 31 bits max shift */
2380 }
2381 /**
2382 * @}
2383 */
2384
2385 #endif /* HAL_TIM_MODULE_ENABLED */
2386 /**
2387 * @}
2388 */
2389
2390 /**
2391 * @}
2392 */
2393
