1 /**
2 ******************************************************************************
3 * @file stm32f0xx_hal_dac_ex.c
4 * @author MCD Application Team
5 * @brief DAC HAL module driver.
6 * This file provides firmware functions to manage the extended
7 * functionalities of the DAC peripheral.
8 *
9 *
10 ******************************************************************************
11 * @attention
12 *
13 * Copyright (c) 2016 STMicroelectronics.
14 * All rights reserved.
15 *
16 * This software is licensed under terms that can be found in the LICENSE file
17 * in the root directory of this software component.
18 * If no LICENSE file comes with this software, it is provided AS-IS.
19 *
20 ******************************************************************************
21 @verbatim
22 ==============================================================================
23 ##### How to use this driver #####
24 ==============================================================================
25 [..]
26 (+) When Dual mode is enabled (i.e. DAC Channel1 and Channel2 are used simultaneously) :
27 Use HAL_DACEx_DualGetValue() to get digital data to be converted and use
28 HAL_DACEx_DualSetValue() to set digital value to converted simultaneously in Channel 1 and Channel 2.
29 (+) Use HAL_DACEx_TriangleWaveGenerate() to generate Triangle signal.
30 (+) Use HAL_DACEx_NoiseWaveGenerate() to generate Noise signal.
31
32 @endverbatim
33 ******************************************************************************
34 */
35
36
37 /* Includes ------------------------------------------------------------------*/
38 #include "stm32f0xx_hal.h"
39
40 /** @addtogroup STM32F0xx_HAL_Driver
41 * @{
42 */
43
44 #ifdef HAL_DAC_MODULE_ENABLED
45
46 /** @addtogroup DAC
47 * @{
48 */
49
50 #if defined(STM32F051x8) || defined(STM32F058xx) || \
51 defined(STM32F071xB) || defined(STM32F072xB) || defined(STM32F078xx) || \
52 defined(STM32F091xC) || defined(STM32F098xx)
53
54 /** @addtogroup DAC_Private_Functions
55 * @{
56 */
57 static void DAC_DMAConvCpltCh1(DMA_HandleTypeDef *hdma);
58 static void DAC_DMAErrorCh1(DMA_HandleTypeDef *hdma);
59 static void DAC_DMAHalfConvCpltCh1(DMA_HandleTypeDef *hdma);
60 /**
61 * @}
62 */
63
64 #endif /* STM32F051x8 STM32F058xx */
65 /* STM32F071xB STM32F072xB STM32F078xx */
66 /* STM32F091xC STM32F098xx */
67
68 #if defined(STM32F071xB) || defined(STM32F072xB) || defined(STM32F078xx) || \
69 defined(STM32F091xC) || defined(STM32F098xx)
70
71 /** @addtogroup DAC_Private_Functions
72 * @{
73 */
74
75 /* DAC_DMAConvCpltCh2 / DAC_DMAErrorCh2 / DAC_DMAHalfConvCpltCh2 */
76 /* are set by HAL_DAC_Start_DMA */
77
78 void DAC_DMAConvCpltCh2(DMA_HandleTypeDef *hdma);
79 void DAC_DMAErrorCh2(DMA_HandleTypeDef *hdma);
80 void DAC_DMAHalfConvCpltCh2(DMA_HandleTypeDef *hdma);
81 /**
82 * @}
83 */
84
85 #endif /* STM32F071xB STM32F072xB STM32F078xx */
86 /* STM32F091xC STM32F098xx */
87
88 /** @addtogroup DAC_Exported_Functions
89 * @{
90 */
91
92 /** @addtogroup DAC_Exported_Functions_Group3
93 * @{
94 */
95
96 #if defined(STM32F071xB) || defined(STM32F072xB) || defined(STM32F078xx) || \
97 defined(STM32F091xC) || defined(STM32F098xx)
98
99 /**
100 * @brief Configures the selected DAC channel.
101 * @param hdac pointer to a DAC_HandleTypeDef structure that contains
102 * the configuration information for the specified DAC.
103 * @param sConfig DAC configuration structure.
104 * @param Channel The selected DAC channel.
105 * This parameter can be one of the following values:
106 * @arg DAC_CHANNEL_1: DAC Channel1 selected
107 * @arg DAC_CHANNEL_2: DAC Channel2 selected
108 * @retval HAL status
109 */
HAL_DAC_ConfigChannel(DAC_HandleTypeDef * hdac,DAC_ChannelConfTypeDef * sConfig,uint32_t Channel)110 HAL_StatusTypeDef HAL_DAC_ConfigChannel(DAC_HandleTypeDef* hdac, DAC_ChannelConfTypeDef* sConfig, uint32_t Channel)
111 {
112 uint32_t tmpreg1 = 0U, tmpreg2 = 0U;
113
114 /* Check the DAC parameters */
115 assert_param(IS_DAC_TRIGGER(sConfig->DAC_Trigger));
116 assert_param(IS_DAC_OUTPUT_BUFFER_STATE(sConfig->DAC_OutputBuffer));
117 assert_param(IS_DAC_TRIGGER(sConfig->DAC_Trigger));
118 assert_param(IS_DAC_CHANNEL(Channel));
119
120 /* Process locked */
121 __HAL_LOCK(hdac);
122
123 /* Change DAC state */
124 hdac->State = HAL_DAC_STATE_BUSY;
125
126 /* Get the DAC CR value */
127 tmpreg1 = hdac->Instance->CR;
128 /* Clear BOFFx, TENx, TSELx, WAVEx and MAMPx bits */
129 tmpreg1 &= ~(((uint32_t)(DAC_CR_MAMP1 | DAC_CR_WAVE1 | DAC_CR_TSEL1 | DAC_CR_TEN1 | DAC_CR_BOFF1)) << Channel);
130 /* Configure for the selected DAC channel: buffer output, trigger */
131 /* Set TSELx and TENx bits according to DAC_Trigger value */
132 /* Set BOFFx bit according to DAC_OutputBuffer value */
133 tmpreg2 = (sConfig->DAC_Trigger | sConfig->DAC_OutputBuffer);
134 /* Calculate CR register value depending on DAC_Channel */
135 tmpreg1 |= tmpreg2 << Channel;
136 /* Write to DAC CR */
137 hdac->Instance->CR = tmpreg1;
138
139 /* Change DAC state */
140 hdac->State = HAL_DAC_STATE_READY;
141
142 /* Process unlocked */
143 __HAL_UNLOCK(hdac);
144
145 /* Return function status */
146 return HAL_OK;
147 }
148
149 #endif /* STM32F071xB STM32F072xB STM32F078xx */
150 /* STM32F091xC STM32F098xx */
151
152 #if defined (STM32F051x8) || defined (STM32F058xx)
153
154 /**
155 * @brief Configures the selected DAC channel.
156 * @param hdac pointer to a DAC_HandleTypeDef structure that contains
157 * the configuration information for the specified DAC.
158 * @param sConfig DAC configuration structure.
159 * @param Channel The selected DAC channel.
160 * This parameter can be one of the following values:
161 * @arg DAC_CHANNEL_1: DAC Channel1 selected
162 * @retval HAL status
163 */
HAL_DAC_ConfigChannel(DAC_HandleTypeDef * hdac,DAC_ChannelConfTypeDef * sConfig,uint32_t Channel)164 HAL_StatusTypeDef HAL_DAC_ConfigChannel(DAC_HandleTypeDef* hdac, DAC_ChannelConfTypeDef* sConfig, uint32_t Channel)
165 {
166 uint32_t tmpreg1 = 0U, tmpreg2 = 0U;
167
168 /* Check the DAC parameters */
169 assert_param(IS_DAC_TRIGGER(sConfig->DAC_Trigger));
170 assert_param(IS_DAC_OUTPUT_BUFFER_STATE(sConfig->DAC_OutputBuffer));
171 assert_param(IS_DAC_TRIGGER(sConfig->DAC_Trigger));
172 assert_param(IS_DAC_CHANNEL(Channel));
173
174 /* Process locked */
175 __HAL_LOCK(hdac);
176
177 /* Change DAC state */
178 hdac->State = HAL_DAC_STATE_BUSY;
179
180 /* Get the DAC CR value */
181 tmpreg1 = hdac->Instance->CR;
182 /* Clear BOFFx, TENx, TSELx, WAVEx and MAMPx bits */
183 tmpreg1 &= ~(((uint32_t)(DAC_CR_TSEL1 | DAC_CR_TEN1 | DAC_CR_BOFF1)) << Channel);
184 /* Configure for the selected DAC channel: buffer output, trigger */
185 /* Set TSELx and TENx bits according to DAC_Trigger value */
186 /* Set BOFFx bit according to DAC_OutputBuffer value */
187 tmpreg2 = (sConfig->DAC_Trigger | sConfig->DAC_OutputBuffer);
188 /* Calculate CR register value depending on DAC_Channel */
189 tmpreg1 |= tmpreg2 << Channel;
190 /* Write to DAC CR */
191 hdac->Instance->CR = tmpreg1;
192
193 /* Change DAC state */
194 hdac->State = HAL_DAC_STATE_READY;
195
196 /* Process unlocked */
197 __HAL_UNLOCK(hdac);
198
199 /* Return function status */
200 return HAL_OK;
201 }
202
203 #endif /* STM32F051x8 STM32F058xx */
204
205 #if defined(STM32F071xB) || defined(STM32F072xB) || defined(STM32F078xx) || \
206 defined(STM32F091xC) || defined(STM32F098xx)
207 /* DAC 1 has 2 channels 1 & 2 */
208
209 /**
210 * @brief Returns the last data output value of the selected DAC channel.
211 * @param hdac pointer to a DAC_HandleTypeDef structure that contains
212 * the configuration information for the specified DAC.
213 * @param Channel The selected DAC channel.
214 * This parameter can be one of the following values:
215 * @arg DAC_CHANNEL_1: DAC Channel1 selected
216 * @arg DAC_CHANNEL_2: DAC Channel2 selected
217 * @retval The selected DAC channel data output value.
218 */
HAL_DAC_GetValue(DAC_HandleTypeDef * hdac,uint32_t Channel)219 uint32_t HAL_DAC_GetValue(DAC_HandleTypeDef* hdac, uint32_t Channel)
220 {
221 /* Check the parameters */
222 assert_param(IS_DAC_CHANNEL(Channel));
223
224 /* Returns the DAC channel data output register value */
225 if(Channel == DAC_CHANNEL_1)
226 {
227 return hdac->Instance->DOR1;
228 }
229 else
230 {
231 return hdac->Instance->DOR2;
232 }
233 }
234
235 #endif /* STM32F071xB STM32F072xB STM32F078xx */
236 /* STM32F091xC STM32F098xx */
237
238 #if defined (STM32F051x8) || defined (STM32F058xx)
239
240 /* DAC 1 has 1 channels */
241
242 /**
243 * @brief Returns the last data output value of the selected DAC channel.
244 * @param hdac pointer to a DAC_HandleTypeDef structure that contains
245 * the configuration information for the specified DAC.
246 * @param Channel The selected DAC channel.
247 * This parameter can be one of the following values:
248 * @arg DAC_CHANNEL_1: DAC Channel1 selected
249 * @retval The selected DAC channel data output value.
250 */
HAL_DAC_GetValue(DAC_HandleTypeDef * hdac,uint32_t Channel)251 uint32_t HAL_DAC_GetValue(DAC_HandleTypeDef* hdac, uint32_t Channel)
252 {
253 /* Check the parameters */
254 assert_param(IS_DAC_CHANNEL(Channel));
255
256 /* Returns the DAC channel data output register value */
257 return hdac->Instance->DOR1;
258 }
259
260
261
262 #endif /* STM32F051x8 STM32F058xx */
263
264 /**
265 * @}
266 */
267
268 /** @addtogroup DAC_Exported_Functions_Group2
269 * @{
270 */
271
272 #if defined(STM32F071xB) || defined(STM32F072xB) || defined(STM32F078xx) || \
273 defined(STM32F091xC) || defined(STM32F098xx)
274
275 /**
276 * @brief Enables DAC and starts conversion of channel.
277 * @param hdac pointer to a DAC_HandleTypeDef structure that contains
278 * the configuration information for the specified DAC.
279 * @param Channel The selected DAC channel.
280 * This parameter can be one of the following values:
281 * @arg DAC_CHANNEL_1: DAC Channel1 selected
282 * @arg DAC_CHANNEL_2: DAC Channel2 selected
283 * @retval HAL status
284 */
HAL_DAC_Start(DAC_HandleTypeDef * hdac,uint32_t Channel)285 HAL_StatusTypeDef HAL_DAC_Start(DAC_HandleTypeDef* hdac, uint32_t Channel)
286 {
287 /* Check the parameters */
288 assert_param(IS_DAC_CHANNEL(Channel));
289
290 /* Process locked */
291 __HAL_LOCK(hdac);
292
293 /* Change DAC state */
294 hdac->State = HAL_DAC_STATE_BUSY;
295
296 /* Enable the Peripharal */
297 __HAL_DAC_ENABLE(hdac, Channel);
298
299 if(Channel == DAC_CHANNEL_1)
300 {
301 /* Check if software trigger enabled */
302 if((hdac->Instance->CR & (DAC_CR_TEN1 | DAC_CR_TSEL1)) == (DAC_CR_TEN1 | DAC_CR_TSEL1))
303 {
304 /* Enable the selected DAC software conversion */
305 SET_BIT(hdac->Instance->SWTRIGR, DAC_SWTRIGR_SWTRIG1);
306 }
307 }
308 else
309 {
310 /* Check if software trigger enabled */
311 if((hdac->Instance->CR & (DAC_CR_TEN2 | DAC_CR_TSEL2)) == (DAC_CR_TEN2 | DAC_CR_TSEL2))
312 {
313 /* Enable the selected DAC software conversion*/
314 SET_BIT(hdac->Instance->SWTRIGR, DAC_SWTRIGR_SWTRIG2);
315 }
316 }
317
318 /* Change DAC state */
319 hdac->State = HAL_DAC_STATE_READY;
320
321 /* Process unlocked */
322 __HAL_UNLOCK(hdac);
323
324 /* Return function status */
325 return HAL_OK;
326 }
327
328 /**
329 * @brief Enables DAC and starts conversion of channel.
330 * @param hdac pointer to a DAC_HandleTypeDef structure that contains
331 * the configuration information for the specified DAC.
332 * @param Channel The selected DAC channel.
333 * This parameter can be one of the following values:
334 * @arg DAC_CHANNEL_1: DAC Channel1 selected
335 * @arg DAC_CHANNEL_2: DAC Channel2 selected
336 * @param pData The destination peripheral Buffer address.
337 * @param Length The length of data to be transferred from memory to DAC peripheral
338 * @param Alignment Specifies the data alignment for DAC channel.
339 * This parameter can be one of the following values:
340 * @arg DAC_ALIGN_8B_R: 8bit right data alignment selected
341 * @arg DAC_ALIGN_12B_L: 12bit left data alignment selected
342 * @arg DAC_ALIGN_12B_R: 12bit right data alignment selected
343 * @retval HAL status
344 */
HAL_DAC_Start_DMA(DAC_HandleTypeDef * hdac,uint32_t Channel,uint32_t * pData,uint32_t Length,uint32_t Alignment)345 HAL_StatusTypeDef HAL_DAC_Start_DMA(DAC_HandleTypeDef* hdac, uint32_t Channel, uint32_t* pData, uint32_t Length, uint32_t Alignment)
346 {
347 uint32_t tmpreg = 0U;
348
349 /* Check the parameters */
350 assert_param(IS_DAC_CHANNEL(Channel));
351 assert_param(IS_DAC_ALIGN(Alignment));
352
353 /* Process locked */
354 __HAL_LOCK(hdac);
355
356 /* Change DAC state */
357 hdac->State = HAL_DAC_STATE_BUSY;
358
359 if(Channel == DAC_CHANNEL_1)
360 {
361 /* Set the DMA transfer complete callback for channel1 */
362 hdac->DMA_Handle1->XferCpltCallback = DAC_DMAConvCpltCh1;
363
364 /* Set the DMA half transfer complete callback for channel1 */
365 hdac->DMA_Handle1->XferHalfCpltCallback = DAC_DMAHalfConvCpltCh1;
366
367 /* Set the DMA error callback for channel1 */
368 hdac->DMA_Handle1->XferErrorCallback = DAC_DMAErrorCh1;
369
370 /* Enable the selected DAC channel1 DMA request */
371 SET_BIT(hdac->Instance->CR, DAC_CR_DMAEN1);
372
373 /* Case of use of channel 1 */
374 switch(Alignment)
375 {
376 case DAC_ALIGN_12B_R:
377 /* Get DHR12R1 address */
378 tmpreg = (uint32_t)&hdac->Instance->DHR12R1;
379 break;
380 case DAC_ALIGN_12B_L:
381 /* Get DHR12L1 address */
382 tmpreg = (uint32_t)&hdac->Instance->DHR12L1;
383 break;
384 case DAC_ALIGN_8B_R:
385 /* Get DHR8R1 address */
386 tmpreg = (uint32_t)&hdac->Instance->DHR8R1;
387 break;
388 default:
389 break;
390 }
391 }
392 else
393 {
394 /* Set the DMA transfer complete callback for channel2 */
395 hdac->DMA_Handle2->XferCpltCallback = DAC_DMAConvCpltCh2;
396
397 /* Set the DMA half transfer complete callback for channel2 */
398 hdac->DMA_Handle2->XferHalfCpltCallback = DAC_DMAHalfConvCpltCh2;
399
400 /* Set the DMA error callback for channel2 */
401 hdac->DMA_Handle2->XferErrorCallback = DAC_DMAErrorCh2;
402
403 /* Enable the selected DAC channel2 DMA request */
404 SET_BIT(hdac->Instance->CR, DAC_CR_DMAEN2);
405
406 /* Case of use of channel 2 */
407 switch(Alignment)
408 {
409 case DAC_ALIGN_12B_R:
410 /* Get DHR12R2 address */
411 tmpreg = (uint32_t)&hdac->Instance->DHR12R2;
412 break;
413 case DAC_ALIGN_12B_L:
414 /* Get DHR12L2 address */
415 tmpreg = (uint32_t)&hdac->Instance->DHR12L2;
416 break;
417 case DAC_ALIGN_8B_R:
418 /* Get DHR8R2 address */
419 tmpreg = (uint32_t)&hdac->Instance->DHR8R2;
420 break;
421 default:
422 break;
423 }
424 }
425
426 /* Enable the DMA channel */
427 if(Channel == DAC_CHANNEL_1)
428 {
429 /* Enable the DAC DMA underrun interrupt */
430 __HAL_DAC_ENABLE_IT(hdac, DAC_IT_DMAUDR1);
431
432 /* Enable the DMA channel */
433 HAL_DMA_Start_IT(hdac->DMA_Handle1, (uint32_t)pData, tmpreg, Length);
434 }
435 else
436 {
437 /* Enable the DAC DMA underrun interrupt */
438 __HAL_DAC_ENABLE_IT(hdac, DAC_IT_DMAUDR2);
439
440 /* Enable the DMA channel */
441 HAL_DMA_Start_IT(hdac->DMA_Handle2, (uint32_t)pData, tmpreg, Length);
442 }
443
444 /* Enable the Peripharal */
445 __HAL_DAC_ENABLE(hdac, Channel);
446
447 /* Process Unlocked */
448 __HAL_UNLOCK(hdac);
449
450 /* Return function status */
451 return HAL_OK;
452 }
453
454
455
456 #endif /* STM32F071xB STM32F072xB STM32F078xx */
457 /* STM32F091xC STM32F098xx */
458
459 #if defined (STM32F051x8) || defined (STM32F058xx)
460
HAL_DAC_Start(DAC_HandleTypeDef * hdac,uint32_t Channel)461 HAL_StatusTypeDef HAL_DAC_Start(DAC_HandleTypeDef* hdac, uint32_t Channel)
462 {
463 /* Check the parameters */
464 assert_param(IS_DAC_CHANNEL(Channel));
465
466 /* Process locked */
467 __HAL_LOCK(hdac);
468
469 /* Change DAC state */
470 hdac->State = HAL_DAC_STATE_BUSY;
471
472 /* Enable the Peripharal */
473 __HAL_DAC_ENABLE(hdac, Channel);
474
475 if(Channel == DAC_CHANNEL_1)
476 {
477 /* Check if software trigger enabled */
478 if((hdac->Instance->CR & (DAC_CR_TEN1 | DAC_CR_TSEL1)) == (DAC_CR_TEN1 | DAC_CR_TSEL1))
479 {
480 /* Enable the selected DAC software conversion */
481 SET_BIT(hdac->Instance->SWTRIGR, DAC_SWTRIGR_SWTRIG1);
482 }
483 }
484
485 /* Change DAC state */
486 hdac->State = HAL_DAC_STATE_READY;
487
488 /* Process unlocked */
489 __HAL_UNLOCK(hdac);
490
491 /* Return function status */
492 return HAL_OK;
493 }
494
495 /**
496 * @brief Enables DAC and starts conversion of channel.
497 * @param hdac pointer to a DAC_HandleTypeDef structure that contains
498 * the configuration information for the specified DAC.
499 * @param Channel The selected DAC channel.
500 * This parameter can be one of the following values:
501 * @arg DAC_CHANNEL_1: DAC Channel1 selected
502 * @param pData The destination peripheral Buffer address.
503 * @param Length The length of data to be transferred from memory to DAC peripheral
504 * @param Alignment Specifies the data alignment for DAC channel.
505 * This parameter can be one of the following values:
506 * @arg DAC_ALIGN_8B_R: 8bit right data alignment selected
507 * @arg DAC_ALIGN_12B_L: 12bit left data alignment selected
508 * @arg DAC_ALIGN_12B_R: 12bit right data alignment selected
509 * @retval HAL status
510 */
HAL_DAC_Start_DMA(DAC_HandleTypeDef * hdac,uint32_t Channel,uint32_t * pData,uint32_t Length,uint32_t Alignment)511 HAL_StatusTypeDef HAL_DAC_Start_DMA(DAC_HandleTypeDef* hdac, uint32_t Channel, uint32_t* pData, uint32_t Length, uint32_t Alignment)
512 {
513 uint32_t tmpreg = 0U;
514
515 /* Check the parameters */
516 assert_param(IS_DAC_CHANNEL(Channel));
517 assert_param(IS_DAC_ALIGN(Alignment));
518
519 /* Process locked */
520 __HAL_LOCK(hdac);
521
522 /* Change DAC state */
523 hdac->State = HAL_DAC_STATE_BUSY;
524
525 /* Set the DMA transfer complete callback for channel1 */
526 hdac->DMA_Handle1->XferCpltCallback = DAC_DMAConvCpltCh1;
527
528 /* Set the DMA half transfer complete callback for channel1 */
529 hdac->DMA_Handle1->XferHalfCpltCallback = DAC_DMAHalfConvCpltCh1;
530
531 /* Set the DMA error callback for channel1 */
532 hdac->DMA_Handle1->XferErrorCallback = DAC_DMAErrorCh1;
533
534 /* Enable the selected DAC channel1 DMA request */
535 SET_BIT(hdac->Instance->CR, DAC_CR_DMAEN1);
536
537 /* Case of use of channel 1 */
538 switch(Alignment)
539 {
540 case DAC_ALIGN_12B_R:
541 /* Get DHR12R1 address */
542 tmpreg = (uint32_t)&hdac->Instance->DHR12R1;
543 break;
544 case DAC_ALIGN_12B_L:
545 /* Get DHR12L1 address */
546 tmpreg = (uint32_t)&hdac->Instance->DHR12L1;
547 break;
548 case DAC_ALIGN_8B_R:
549 /* Get DHR8R1 address */
550 tmpreg = (uint32_t)&hdac->Instance->DHR8R1;
551 break;
552 default:
553 break;
554 }
555
556 /* Enable the DMA channel */
557 /* Enable the DAC DMA underrun interrupt */
558 __HAL_DAC_ENABLE_IT(hdac, DAC_IT_DMAUDR1);
559
560 /* Enable the DMA channel */
561 HAL_DMA_Start_IT(hdac->DMA_Handle1, (uint32_t)pData, tmpreg, Length);
562
563 /* Enable the DAC DMA underrun interrupt */
564 __HAL_DAC_ENABLE_IT(hdac, DAC_IT_DMAUDR1);
565
566 /* Enable the DMA channel */
567 HAL_DMA_Start_IT(hdac->DMA_Handle1, (uint32_t)pData, tmpreg, Length);
568
569 /* Enable the Peripharal */
570 __HAL_DAC_ENABLE(hdac, Channel);
571
572 /* Process Unlocked */
573 __HAL_UNLOCK(hdac);
574
575 /* Return function status */
576 return HAL_OK;
577 }
578
579 #endif /* STM32F051x8 STM32F058xx */
580
581 #if defined(STM32F071xB) || defined(STM32F072xB) || defined(STM32F078xx) || \
582 defined(STM32F091xC) || defined(STM32F098xx)
583 /* DAC channel 2 is available on top of DAC channel 1 */
584
585 /**
586 * @brief Handles DAC interrupt request
587 * @param hdac pointer to a DAC_HandleTypeDef structure that contains
588 * the configuration information for the specified DAC.
589 * @retval None
590 */
HAL_DAC_IRQHandler(DAC_HandleTypeDef * hdac)591 void HAL_DAC_IRQHandler(DAC_HandleTypeDef* hdac)
592 {
593 if(__HAL_DAC_GET_IT_SOURCE(hdac, DAC_IT_DMAUDR1))
594 {
595 /* Check underrun channel 1 flag */
596 if(__HAL_DAC_GET_FLAG(hdac, DAC_FLAG_DMAUDR1))
597 {
598 /* Change DAC state to error state */
599 hdac->State = HAL_DAC_STATE_ERROR;
600
601 /* Set DAC error code to channel1 DMA underrun error */
602 hdac->ErrorCode |= HAL_DAC_ERROR_DMAUNDERRUNCH1;
603
604 /* Clear the underrun flag */
605 __HAL_DAC_CLEAR_FLAG(hdac,DAC_FLAG_DMAUDR1);
606
607 /* Disable the selected DAC channel1 DMA request */
608 hdac->Instance->CR &= ~DAC_CR_DMAEN1;
609
610 /* Error callback */
611 HAL_DAC_DMAUnderrunCallbackCh1(hdac);
612 }
613 }
614 if(__HAL_DAC_GET_IT_SOURCE(hdac, DAC_IT_DMAUDR2))
615 {
616 /* Check underrun channel 2 flag */
617 if(__HAL_DAC_GET_FLAG(hdac, DAC_FLAG_DMAUDR2))
618 {
619 /* Change DAC state to error state */
620 hdac->State = HAL_DAC_STATE_ERROR;
621
622 /* Set DAC error code to channel2 DMA underrun error */
623 hdac->ErrorCode |= HAL_DAC_ERROR_DMAUNDERRUNCH2;
624
625 /* Clear the underrun flag */
626 __HAL_DAC_CLEAR_FLAG(hdac,DAC_FLAG_DMAUDR2);
627
628 /* Disable the selected DAC channel1 DMA request */
629 hdac->Instance->CR &= ~DAC_CR_DMAEN2;
630
631 /* Error callback */
632 HAL_DACEx_DMAUnderrunCallbackCh2(hdac);
633 }
634 }
635 }
636
637 #endif /* STM32F071xB STM32F072xB STM32F078xx */
638 /* STM32F091xC STM32F098xx */
639
640 #if defined (STM32F051x8) || defined (STM32F058xx)
641 /* DAC channel 2 is NOT available. Only DAC channel 1 is available */
642
643 /**
644 * @brief Handles DAC interrupt request
645 * @param hdac pointer to a DAC_HandleTypeDef structure that contains
646 * the configuration information for the specified DAC.
647 * @retval None
648 */
HAL_DAC_IRQHandler(DAC_HandleTypeDef * hdac)649 void HAL_DAC_IRQHandler(DAC_HandleTypeDef* hdac)
650 {
651 if(__HAL_DAC_GET_IT_SOURCE(hdac, DAC_IT_DMAUDR1))
652 {
653 /* Check Overrun flag */
654 if(__HAL_DAC_GET_FLAG(hdac, DAC_FLAG_DMAUDR1))
655 {
656 /* Change DAC state to error state */
657 hdac->State = HAL_DAC_STATE_ERROR;
658
659 /* Set DAC error code to chanel1 DMA underrun error */
660 hdac->ErrorCode |= HAL_DAC_ERROR_DMAUNDERRUNCH1;
661
662 /* Clear the underrun flag */
663 __HAL_DAC_CLEAR_FLAG(hdac,DAC_FLAG_DMAUDR1);
664
665 /* Disable the selected DAC channel1 DMA request */
666 hdac->Instance->CR &= ~DAC_CR_DMAEN1;
667
668 /* Error callback */
669 HAL_DAC_DMAUnderrunCallbackCh1(hdac);
670 }
671 }
672 }
673
674 #endif /* STM32F051x8 STM32F058xx */
675
676 /**
677 * @}
678 */
679
680 /**
681 * @}
682 */
683
684 #if defined(STM32F051x8) || defined(STM32F058xx) || \
685 defined(STM32F071xB) || defined(STM32F072xB) || defined(STM32F078xx) || \
686 defined(STM32F091xC) || defined(STM32F098xx)
687
688 /** @addtogroup DAC_Private_Functions
689 * @{
690 */
691
692 /**
693 * @brief DMA conversion complete callback.
694 * @param hdma pointer to a DMA_HandleTypeDef structure that contains
695 * the configuration information for the specified DMA module.
696 * @retval None
697 */
DAC_DMAConvCpltCh1(DMA_HandleTypeDef * hdma)698 static void DAC_DMAConvCpltCh1(DMA_HandleTypeDef *hdma)
699 {
700 DAC_HandleTypeDef* hdac = ( DAC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
701
702 HAL_DAC_ConvCpltCallbackCh1(hdac);
703
704 hdac->State= HAL_DAC_STATE_READY;
705 }
706
707 /**
708 * @brief DMA half transfer complete callback.
709 * @param hdma pointer to a DMA_HandleTypeDef structure that contains
710 * the configuration information for the specified DMA module.
711 * @retval None
712 */
DAC_DMAHalfConvCpltCh1(DMA_HandleTypeDef * hdma)713 static void DAC_DMAHalfConvCpltCh1(DMA_HandleTypeDef *hdma)
714 {
715 DAC_HandleTypeDef* hdac = ( DAC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
716 /* Conversion complete callback */
717 HAL_DAC_ConvHalfCpltCallbackCh1(hdac);
718 }
719
720 /**
721 * @brief DMA error callback
722 * @param hdma pointer to a DMA_HandleTypeDef structure that contains
723 * the configuration information for the specified DMA module.
724 * @retval None
725 */
DAC_DMAErrorCh1(DMA_HandleTypeDef * hdma)726 static void DAC_DMAErrorCh1(DMA_HandleTypeDef *hdma)
727 {
728 DAC_HandleTypeDef* hdac = ( DAC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
729
730 /* Set DAC error code to DMA error */
731 hdac->ErrorCode |= HAL_DAC_ERROR_DMA;
732
733 HAL_DAC_ErrorCallbackCh1(hdac);
734
735 hdac->State= HAL_DAC_STATE_READY;
736 }
737 /**
738 * @}
739 */
740 #endif /* STM32F051x8 STM32F058xx */
741 /* STM32F071xB STM32F072xB STM32F078xx */
742 /* STM32F091xC STM32F098xx */
743
744 #if defined(STM32F071xB) || defined(STM32F072xB) || defined(STM32F078xx) || \
745 defined(STM32F091xC) || defined(STM32F098xx)
746
747 /** @addtogroup DAC_Private_Functions
748 * @{
749 */
750
751 /**
752 * @brief DMA conversion complete callback.
753 * @param hdma pointer to a DMA_HandleTypeDef structure that contains
754 * the configuration information for the specified DMA module.
755 * @retval None
756 */
DAC_DMAConvCpltCh2(DMA_HandleTypeDef * hdma)757 void DAC_DMAConvCpltCh2(DMA_HandleTypeDef *hdma)
758 {
759 DAC_HandleTypeDef* hdac = ( DAC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
760
761 #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1)
762 hdac->ConvCpltCallbackCh2(hdac);
763 #else
764 HAL_DACEx_ConvCpltCallbackCh2(hdac);
765 #endif
766
767 hdac->State= HAL_DAC_STATE_READY;
768 }
769
770 /**
771 * @brief DMA half transfer complete callback.
772 * @param hdma pointer to a DMA_HandleTypeDef structure that contains
773 * the configuration information for the specified DMA module.
774 * @retval None
775 */
DAC_DMAHalfConvCpltCh2(DMA_HandleTypeDef * hdma)776 void DAC_DMAHalfConvCpltCh2(DMA_HandleTypeDef *hdma)
777 {
778 DAC_HandleTypeDef* hdac = ( DAC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
779
780 /* Conversion complete callback */
781 #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1)
782 hdac->ConvHalfCpltCallbackCh2(hdac);
783 #else
784 HAL_DACEx_ConvHalfCpltCallbackCh2(hdac);
785 #endif
786 }
787
788 /**
789 * @brief DMA error callback
790 * @param hdma pointer to a DMA_HandleTypeDef structure that contains
791 * the configuration information for the specified DMA module.
792 * @retval None
793 */
DAC_DMAErrorCh2(DMA_HandleTypeDef * hdma)794 void DAC_DMAErrorCh2(DMA_HandleTypeDef *hdma)
795 {
796 DAC_HandleTypeDef* hdac = ( DAC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
797
798 /* Set DAC error code to DMA error */
799 hdac->ErrorCode |= HAL_DAC_ERROR_DMA;
800
801 #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1)
802 hdac->ErrorCallbackCh2(hdac);
803 #else
804 HAL_DACEx_ErrorCallbackCh2(hdac);
805 #endif
806 hdac->State= HAL_DAC_STATE_READY;
807 }
808
809 /**
810 * @}
811 */
812
813 #endif /* STM32F071xB STM32F072xB STM32F078xx */
814 /* STM32F091xC STM32F098xx */
815
816 /**
817 * @}
818 */
819
820 /** @defgroup DACEx DACEx
821 * @brief DACEx driver module
822 * @{
823 */
824
825 /* Private typedef -----------------------------------------------------------*/
826 /* Private define ------------------------------------------------------------*/
827 /* Private macro -------------------------------------------------------------*/
828 /** @defgroup DACEx_Private_Macros DACEx Private Macros
829 * @{
830 */
831 /**
832 * @}
833 */
834
835 /* Private variables ---------------------------------------------------------*/
836 /* Private function prototypes -----------------------------------------------*/
837 /* Private functions ---------------------------------------------------------*/
838
839 /** @defgroup DACEx_Exported_Functions DACEx Exported Functions
840 * @{
841 */
842
843 /** @defgroup DACEx_Exported_Functions_Group1 Extended features functions
844 * @brief Extended features functions
845 *
846 @verbatim
847 ==============================================================================
848 ##### Extended features functions #####
849 ==============================================================================
850 [..] This section provides functions allowing to:
851 (+) Start conversion.
852 (+) Stop conversion.
853 (+) Start conversion and enable DMA transfer.
854 (+) Stop conversion and disable DMA transfer.
855 (+) Get result of conversion.
856 (+) Get result of dual mode conversion.
857
858 @endverbatim
859 * @{
860 */
861
862 #if defined(STM32F071xB) || defined(STM32F072xB) || defined(STM32F078xx) || \
863 defined(STM32F091xC) || defined(STM32F098xx)
864
865 /**
866 * @brief Returns the last data output value of the selected DAC channel.
867 * @param hdac pointer to a DAC_HandleTypeDef structure that contains
868 * the configuration information for the specified DAC.
869 * @retval The selected DAC channel data output value.
870 */
HAL_DACEx_DualGetValue(DAC_HandleTypeDef * hdac)871 uint32_t HAL_DACEx_DualGetValue(DAC_HandleTypeDef* hdac)
872 {
873 uint32_t tmp = 0U;
874
875 tmp |= hdac->Instance->DOR1;
876
877 /* DAC channel 2 is present in DAC 1 */
878 tmp |= hdac->Instance->DOR2 << 16U;
879
880 /* Returns the DAC channel data output register value */
881 return tmp;
882 }
883
884 #endif /* STM32F071xB STM32F072xB STM32F078xx */
885 /* STM32F091xC STM32F098xx */
886
887 #if defined (STM32F051x8) || defined (STM32F058xx)
888
889 /**
890 * @brief Returns the last data output value of the selected DAC channel.
891 * @param hdac pointer to a DAC_HandleTypeDef structure that contains
892 * the configuration information for the specified DAC.
893 * @retval The selected DAC channel data output value.
894 */
HAL_DACEx_DualGetValue(DAC_HandleTypeDef * hdac)895 uint32_t HAL_DACEx_DualGetValue(DAC_HandleTypeDef* hdac)
896 {
897 uint32_t tmp = 0U;
898
899 tmp |= hdac->Instance->DOR1;
900
901 /* Returns the DAC channel data output register value */
902 return tmp;
903 }
904
905 #endif /* STM32F051x8 STM32F058xx */
906
907 #if defined(STM32F071xB) || defined(STM32F072xB) || defined(STM32F078xx) || \
908 defined(STM32F091xC) || defined(STM32F098xx)
909
910 /**
911 * @brief Enables or disables the selected DAC channel wave generation.
912 * @param hdac pointer to a DAC_HandleTypeDef structure that contains
913 * the configuration information for the specified DAC.
914 * @param Channel The selected DAC channel.
915 * This parameter can be one of the following values:
916 * DAC_CHANNEL_1 / DAC_CHANNEL_2
917 * @param Amplitude Select max triangle amplitude.
918 * This parameter can be one of the following values:
919 * @arg DAC_TRIANGLEAMPLITUDE_1: Select max triangle amplitude of 1
920 * @arg DAC_TRIANGLEAMPLITUDE_3: Select max triangle amplitude of 3
921 * @arg DAC_TRIANGLEAMPLITUDE_7: Select max triangle amplitude of 7
922 * @arg DAC_TRIANGLEAMPLITUDE_15: Select max triangle amplitude of 15
923 * @arg DAC_TRIANGLEAMPLITUDE_31: Select max triangle amplitude of 31
924 * @arg DAC_TRIANGLEAMPLITUDE_63: Select max triangle amplitude of 63
925 * @arg DAC_TRIANGLEAMPLITUDE_127: Select max triangle amplitude of 127
926 * @arg DAC_TRIANGLEAMPLITUDE_255: Select max triangle amplitude of 255
927 * @arg DAC_TRIANGLEAMPLITUDE_511: Select max triangle amplitude of 511
928 * @arg DAC_TRIANGLEAMPLITUDE_1023: Select max triangle amplitude of 1023
929 * @arg DAC_TRIANGLEAMPLITUDE_2047: Select max triangle amplitude of 2047
930 * @arg DAC_TRIANGLEAMPLITUDE_4095: Select max triangle amplitude of 4095
931 * @retval HAL status
932 */
HAL_DACEx_TriangleWaveGenerate(DAC_HandleTypeDef * hdac,uint32_t Channel,uint32_t Amplitude)933 HAL_StatusTypeDef HAL_DACEx_TriangleWaveGenerate(DAC_HandleTypeDef* hdac, uint32_t Channel, uint32_t Amplitude)
934 {
935 /* Check the parameters */
936 assert_param(IS_DAC_CHANNEL(Channel));
937 assert_param(IS_DAC_LFSR_UNMASK_TRIANGLE_AMPLITUDE(Amplitude));
938
939 /* Process locked */
940 __HAL_LOCK(hdac);
941
942 /* Change DAC state */
943 hdac->State = HAL_DAC_STATE_BUSY;
944
945 /* Enable the selected wave generation for the selected DAC channel */
946 MODIFY_REG(hdac->Instance->CR, ((DAC_CR_WAVE1)|(DAC_CR_MAMP1))<<Channel, (DAC_CR_WAVE1_1 | Amplitude) << Channel);
947
948 /* Change DAC state */
949 hdac->State = HAL_DAC_STATE_READY;
950
951 /* Process unlocked */
952 __HAL_UNLOCK(hdac);
953
954 /* Return function status */
955 return HAL_OK;
956 }
957
958 /**
959 * @brief Enables or disables the selected DAC channel wave generation.
960 * @param hdac pointer to a DAC_HandleTypeDef structure that contains
961 * the configuration information for the specified DAC.
962 * @param Channel The selected DAC channel.
963 * This parameter can be one of the following values:
964 * DAC_CHANNEL_1 / DAC_CHANNEL_2
965 * @param Amplitude Unmask DAC channel LFSR for noise wave generation.
966 * This parameter can be one of the following values:
967 * @arg DAC_LFSRUNMASK_BIT0: Unmask DAC channel LFSR bit0 for noise wave generation
968 * @arg DAC_LFSRUNMASK_BITS1_0: Unmask DAC channel LFSR bit[1:0] for noise wave generation
969 * @arg DAC_LFSRUNMASK_BITS2_0: Unmask DAC channel LFSR bit[2:0] for noise wave generation
970 * @arg DAC_LFSRUNMASK_BITS3_0: Unmask DAC channel LFSR bit[3:0] for noise wave generation
971 * @arg DAC_LFSRUNMASK_BITS4_0: Unmask DAC channel LFSR bit[4:0] for noise wave generation
972 * @arg DAC_LFSRUNMASK_BITS5_0: Unmask DAC channel LFSR bit[5:0] for noise wave generation
973 * @arg DAC_LFSRUNMASK_BITS6_0: Unmask DAC channel LFSR bit[6:0] for noise wave generation
974 * @arg DAC_LFSRUNMASK_BITS7_0: Unmask DAC channel LFSR bit[7:0] for noise wave generation
975 * @arg DAC_LFSRUNMASK_BITS8_0: Unmask DAC channel LFSR bit[8:0] for noise wave generation
976 * @arg DAC_LFSRUNMASK_BITS9_0: Unmask DAC channel LFSR bit[9:0] for noise wave generation
977 * @arg DAC_LFSRUNMASK_BITS10_0: Unmask DAC channel LFSR bit[10:0] for noise wave generation
978 * @arg DAC_LFSRUNMASK_BITS11_0: Unmask DAC channel LFSR bit[11:0] for noise wave generation
979 * @retval HAL status
980 */
HAL_DACEx_NoiseWaveGenerate(DAC_HandleTypeDef * hdac,uint32_t Channel,uint32_t Amplitude)981 HAL_StatusTypeDef HAL_DACEx_NoiseWaveGenerate(DAC_HandleTypeDef* hdac, uint32_t Channel, uint32_t Amplitude)
982 {
983 /* Check the parameters */
984 assert_param(IS_DAC_CHANNEL(Channel));
985 assert_param(IS_DAC_LFSR_UNMASK_TRIANGLE_AMPLITUDE(Amplitude));
986
987 /* Process locked */
988 __HAL_LOCK(hdac);
989
990 /* Change DAC state */
991 hdac->State = HAL_DAC_STATE_BUSY;
992
993 /* Enable the selected wave generation for the selected DAC channel */
994 MODIFY_REG(hdac->Instance->CR, ((DAC_CR_WAVE1)|(DAC_CR_MAMP1))<<Channel, (DAC_CR_WAVE1_0 | Amplitude) << Channel);
995
996 /* Change DAC state */
997 hdac->State = HAL_DAC_STATE_READY;
998
999 /* Process unlocked */
1000 __HAL_UNLOCK(hdac);
1001
1002 /* Return function status */
1003 return HAL_OK;
1004 }
1005
1006 #endif /* STM32F071xB STM32F072xB STM32F078xx */
1007 /* STM32F091xC STM32F098xx */
1008
1009 /**
1010 * @}
1011 */
1012
1013 /**
1014 * @}
1015 */
1016
1017 #if defined(STM32F051x8) || defined(STM32F058xx) || \
1018 defined(STM32F071xB) || defined(STM32F072xB) || defined(STM32F078xx) || \
1019 defined(STM32F091xC) || defined(STM32F098xx)
1020
1021 /** @addtogroup DACEx_Exported_Functions
1022 * @{
1023 */
1024
1025 /** @addtogroup DACEx_Exported_Functions_Group1
1026 * @brief Extended features functions
1027 * @{
1028 */
1029
1030 /**
1031 * @brief Set the specified data holding register value for dual DAC channel.
1032 * @param hdac pointer to a DAC_HandleTypeDef structure that contains
1033 * the configuration information for the specified DAC.
1034 * @param Alignment Specifies the data alignment for dual channel DAC.
1035 * This parameter can be one of the following values:
1036 * DAC_ALIGN_8B_R: 8bit right data alignment selected
1037 * DAC_ALIGN_12B_L: 12bit left data alignment selected
1038 * DAC_ALIGN_12B_R: 12bit right data alignment selected
1039 * @param Data1 Data for DAC Channel2 to be loaded in the selected data holding register.
1040 * @param Data2 Data for DAC Channel1 to be loaded in the selected data holding register.
1041 * @note In dual mode, a unique register access is required to write in both
1042 * DAC channels at the same time.
1043 * @retval HAL status
1044 */
HAL_DACEx_DualSetValue(DAC_HandleTypeDef * hdac,uint32_t Alignment,uint32_t Data1,uint32_t Data2)1045 HAL_StatusTypeDef HAL_DACEx_DualSetValue(DAC_HandleTypeDef* hdac, uint32_t Alignment, uint32_t Data1, uint32_t Data2)
1046 {
1047 uint32_t data = 0U, tmp = 0U;
1048
1049 /* Check the parameters */
1050 assert_param(IS_DAC_ALIGN(Alignment));
1051 assert_param(IS_DAC_DATA(Data1));
1052 assert_param(IS_DAC_DATA(Data2));
1053
1054 /* Calculate and set dual DAC data holding register value */
1055 if (Alignment == DAC_ALIGN_8B_R)
1056 {
1057 data = ((uint32_t)Data2 << 8U) | Data1;
1058 }
1059 else
1060 {
1061 data = ((uint32_t)Data2 << 16U) | Data1;
1062 }
1063
1064 tmp = (uint32_t)hdac->Instance;
1065 tmp += DAC_DHR12RD_ALIGNMENT(Alignment);
1066
1067 /* Set the dual DAC selected data holding register */
1068 *(__IO uint32_t *)tmp = data;
1069
1070 /* Return function status */
1071 return HAL_OK;
1072 }
1073
1074 /**
1075 * @}
1076 */
1077
1078 /**
1079 * @}
1080 */
1081
1082 #endif /* STM32F051x8 STM32F058xx */
1083 /* STM32F071xB STM32F072xB STM32F078xx */
1084 /* STM32F091xC STM32F098xx */
1085
1086 #if defined(STM32F071xB) || defined(STM32F072xB) || defined(STM32F078xx) || \
1087 defined(STM32F091xC) || defined(STM32F098xx)
1088
1089 /** @addtogroup DACEx_Exported_Functions
1090 * @{
1091 */
1092
1093 /** @addtogroup DACEx_Exported_Functions_Group1
1094 * @brief Extended features functions
1095 * @{
1096 */
1097
1098 /**
1099 * @brief Conversion complete callback in non blocking mode for Channel2
1100 * @param hdac pointer to a DAC_HandleTypeDef structure that contains
1101 * the configuration information for the specified DAC.
1102 * @retval None
1103 */
HAL_DACEx_ConvCpltCallbackCh2(DAC_HandleTypeDef * hdac)1104 __weak void HAL_DACEx_ConvCpltCallbackCh2(DAC_HandleTypeDef* hdac)
1105 {
1106 /* Prevent unused argument(s) compilation warning */
1107 UNUSED(hdac);
1108
1109 /* NOTE : This function Should not be modified, when the callback is needed,
1110 the HAL_DAC_ConvCpltCallback could be implemented in the user file
1111 */
1112 }
1113
1114 /**
1115 * @brief Conversion half DMA transfer callback in non blocking mode for Channel2
1116 * @param hdac pointer to a DAC_HandleTypeDef structure that contains
1117 * the configuration information for the specified DAC.
1118 * @retval None
1119 */
HAL_DACEx_ConvHalfCpltCallbackCh2(DAC_HandleTypeDef * hdac)1120 __weak void HAL_DACEx_ConvHalfCpltCallbackCh2(DAC_HandleTypeDef* hdac)
1121 {
1122 /* Prevent unused argument(s) compilation warning */
1123 UNUSED(hdac);
1124
1125 /* NOTE : This function Should not be modified, when the callback is needed,
1126 the HAL_DAC_ConvHalfCpltCallbackCh2 could be implemented in the user file
1127 */
1128 }
1129
1130 /**
1131 * @brief Error DAC callback for Channel2.
1132 * @param hdac pointer to a DAC_HandleTypeDef structure that contains
1133 * the configuration information for the specified DAC.
1134 * @retval None
1135 */
HAL_DACEx_ErrorCallbackCh2(DAC_HandleTypeDef * hdac)1136 __weak void HAL_DACEx_ErrorCallbackCh2(DAC_HandleTypeDef *hdac)
1137 {
1138 /* Prevent unused argument(s) compilation warning */
1139 UNUSED(hdac);
1140
1141 /* NOTE : This function Should not be modified, when the callback is needed,
1142 the HAL_DAC_ErrorCallback could be implemented in the user file
1143 */
1144 }
1145
1146 /**
1147 * @brief DMA underrun DAC callback for channel2.
1148 * @param hdac pointer to a DAC_HandleTypeDef structure that contains
1149 * the configuration information for the specified DAC.
1150 * @retval None
1151 */
HAL_DACEx_DMAUnderrunCallbackCh2(DAC_HandleTypeDef * hdac)1152 __weak void HAL_DACEx_DMAUnderrunCallbackCh2(DAC_HandleTypeDef *hdac)
1153 {
1154 /* Prevent unused argument(s) compilation warning */
1155 UNUSED(hdac);
1156
1157 /* NOTE : This function Should not be modified, when the callback is needed,
1158 the HAL_DAC_DMAUnderrunCallbackCh2 could be implemented in the user file
1159 */
1160 }
1161
1162 /**
1163 * @}
1164 */
1165
1166 /**
1167 * @}
1168 */
1169
1170 #endif /* STM32F071xB STM32F072xB STM32F078xx */
1171 /* STM32F091xC STM32F098xx */
1172
1173 /**
1174 * @}
1175 */
1176
1177 #endif /* HAL_DAC_MODULE_ENABLED */
1178
1179 /**
1180 * @}
1181 */
1182
1183
