1 /**
2 ******************************************************************************
3 * @file stm32f0xx_hal_adc.c
4 * @author MCD Application Team
5 * @brief This file provides firmware functions to manage the following
6 * functionalities of the Analog to Digital Convertor (ADC)
7 * peripheral:
8 * + Initialization and de-initialization functions
9 * + Peripheral Control functions
10 * + Peripheral State functions
11 * Other functions (extended functions) are available in file
12 * "stm32f0xx_hal_adc_ex.c".
13 *
14 ******************************************************************************
15 * @attention
16 *
17 * Copyright (c) 2016 STMicroelectronics.
18 * All rights reserved.
19 *
20 * This software is licensed under terms that can be found in the LICENSE file
21 * in the root directory of this software component.
22 * If no LICENSE file comes with this software, it is provided AS-IS.
23 *
24 ******************************************************************************
25 @verbatim
26 ==============================================================================
27 ##### ADC peripheral features #####
28 ==============================================================================
29 [..]
30 (+) 12-bit, 10-bit, 8-bit or 6-bit configurable resolution
31
32 (+) Interrupt generation at the end of regular conversion and in case of
33 analog watchdog or overrun events.
34
35 (+) Single and continuous conversion modes.
36
37 (+) Scan mode for conversion of several channels sequentially.
38
39 (+) Data alignment with in-built data coherency.
40
41 (+) Programmable sampling time (common for all channels)
42
43 (+) ADC conversion of regular group.
44
45 (+) External trigger (timer or EXTI) with configurable polarity
46
47 (+) DMA request generation for transfer of conversions data of regular group.
48
49 (+) ADC calibration
50
51 (+) ADC supply requirements: 2.4 V to 3.6 V at full speed and down to 1.8 V at
52 slower speed.
53
54 (+) ADC input range: from Vref- (connected to Vssa) to Vref+ (connected to
55 Vdda or to an external voltage reference).
56
57
58 ##### How to use this driver #####
59 ==============================================================================
60 [..]
61
62 *** Configuration of top level parameters related to ADC ***
63 ============================================================
64 [..]
65
66 (#) Enable the ADC interface
67 (++) As prerequisite, ADC clock must be configured at RCC top level.
68 Caution: On STM32F0, ADC clock frequency max is 14MHz (refer
69 to device datasheet).
70 Therefore, ADC clock prescaler must be configured in
71 function of ADC clock source frequency to remain below
72 this maximum frequency.
73
74 (++) Two clock settings are mandatory:
75 (+++) ADC clock (core clock, also possibly conversion clock).
76
77 (+++) ADC clock (conversions clock).
78 Two possible clock sources: synchronous clock derived from APB clock
79 or asynchronous clock derived from ADC dedicated HSI RC oscillator
80 14MHz.
81 If asynchronous clock is selected, parameter "HSI14State" must be set either:
82 - to "...HSI14State = RCC_HSI14_ADC_CONTROL" to let the ADC control
83 the HSI14 oscillator enable/disable (if not used to supply the main
84 system clock): feature used if ADC mode LowPowerAutoPowerOff is
85 enabled.
86 - to "...HSI14State = RCC_HSI14_ON" to maintain the HSI14 oscillator
87 always enabled: can be used to supply the main system clock.
88
89 (+++) Example:
90 Into HAL_ADC_MspInit() (recommended code location) or with
91 other device clock parameters configuration:
92 (+++) __HAL_RCC_ADC1_CLK_ENABLE(); (mandatory)
93
94 HI14 enable or let under control of ADC: (optional: if asynchronous clock selected)
95 (+++) RCC_OscInitTypeDef RCC_OscInitStructure;
96 (+++) RCC_OscInitStructure.OscillatorType = RCC_OSCILLATORTYPE_HSI14;
97 (+++) RCC_OscInitStructure.HSI14CalibrationValue = RCC_HSI14CALIBRATION_DEFAULT;
98 (+++) RCC_OscInitStructure.HSI14State = RCC_HSI14_ADC_CONTROL;
99 (+++) RCC_OscInitStructure.PLL... (optional if used for system clock)
100 (+++) HAL_RCC_OscConfig(&RCC_OscInitStructure);
101
102 (++) ADC clock source and clock prescaler are configured at ADC level with
103 parameter "ClockPrescaler" using function HAL_ADC_Init().
104
105 (#) ADC pins configuration
106 (++) Enable the clock for the ADC GPIOs
107 using macro __HAL_RCC_GPIOx_CLK_ENABLE()
108 (++) Configure these ADC pins in analog mode
109 using function HAL_GPIO_Init()
110
111 (#) Optionally, in case of usage of ADC with interruptions:
112 (++) Configure the NVIC for ADC
113 using function HAL_NVIC_EnableIRQ(ADCx_IRQn)
114 (++) Insert the ADC interruption handler function HAL_ADC_IRQHandler()
115 into the function of corresponding ADC interruption vector
116 ADCx_IRQHandler().
117
118 (#) Optionally, in case of usage of DMA:
119 (++) Configure the DMA (DMA channel, mode normal or circular, ...)
120 using function HAL_DMA_Init().
121 (++) Configure the NVIC for DMA
122 using function HAL_NVIC_EnableIRQ(DMAx_Channelx_IRQn)
123 (++) Insert the ADC interruption handler function HAL_ADC_IRQHandler()
124 into the function of corresponding DMA interruption vector
125 DMAx_Channelx_IRQHandler().
126
127 *** Configuration of ADC, group regular, channels parameters ***
128 ================================================================
129 [..]
130
131 (#) Configure the ADC parameters (resolution, data alignment, ...)
132 and regular group parameters (conversion trigger, sequencer, ...)
133 using function HAL_ADC_Init().
134
135 (#) Configure the channels for regular group parameters (channel number,
136 channel rank into sequencer, ..., into regular group)
137 using function HAL_ADC_ConfigChannel().
138
139 (#) Optionally, configure the analog watchdog parameters (channels
140 monitored, thresholds, ...)
141 using function HAL_ADC_AnalogWDGConfig().
142
143 *** Execution of ADC conversions ***
144 ====================================
145 [..]
146
147 (#) Optionally, perform an automatic ADC calibration to improve the
148 conversion accuracy
149 using function HAL_ADCEx_Calibration_Start().
150
151 (#) ADC driver can be used among three modes: polling, interruption,
152 transfer by DMA.
153
154 (++) ADC conversion by polling:
155 (+++) Activate the ADC peripheral and start conversions
156 using function HAL_ADC_Start()
157 (+++) Wait for ADC conversion completion
158 using function HAL_ADC_PollForConversion()
159 (+++) Retrieve conversion results
160 using function HAL_ADC_GetValue()
161 (+++) Stop conversion and disable the ADC peripheral
162 using function HAL_ADC_Stop()
163
164 (++) ADC conversion by interruption:
165 (+++) Activate the ADC peripheral and start conversions
166 using function HAL_ADC_Start_IT()
167 (+++) Wait for ADC conversion completion by call of function
168 HAL_ADC_ConvCpltCallback()
169 (this function must be implemented in user program)
170 (+++) Retrieve conversion results
171 using function HAL_ADC_GetValue()
172 (+++) Stop conversion and disable the ADC peripheral
173 using function HAL_ADC_Stop_IT()
174
175 (++) ADC conversion with transfer by DMA:
176 (+++) Activate the ADC peripheral and start conversions
177 using function HAL_ADC_Start_DMA()
178 (+++) Wait for ADC conversion completion by call of function
179 HAL_ADC_ConvCpltCallback() or HAL_ADC_ConvHalfCpltCallback()
180 (these functions must be implemented in user program)
181 (+++) Conversion results are automatically transferred by DMA into
182 destination variable address.
183 (+++) Stop conversion and disable the ADC peripheral
184 using function HAL_ADC_Stop_DMA()
185
186 [..]
187
188 (@) Callback functions must be implemented in user program:
189 (+@) HAL_ADC_ErrorCallback()
190 (+@) HAL_ADC_LevelOutOfWindowCallback() (callback of analog watchdog)
191 (+@) HAL_ADC_ConvCpltCallback()
192 (+@) HAL_ADC_ConvHalfCpltCallback
193
194 *** Deinitialization of ADC ***
195 ============================================================
196 [..]
197
198 (#) Disable the ADC interface
199 (++) ADC clock can be hard reset and disabled at RCC top level.
200 (++) Hard reset of ADC peripherals
201 using macro __ADCx_FORCE_RESET(), __ADCx_RELEASE_RESET().
202 (++) ADC clock disable
203 using the equivalent macro/functions as configuration step.
204 (+++) Example:
205 Into HAL_ADC_MspDeInit() (recommended code location) or with
206 other device clock parameters configuration:
207 (+++) RCC_OscInitStructure.OscillatorType = RCC_OSCILLATORTYPE_HSI14;
208 (+++) RCC_OscInitStructure.HSI14State = RCC_HSI14_OFF; (if not used for system clock)
209 (+++) HAL_RCC_OscConfig(&RCC_OscInitStructure);
210
211 (#) ADC pins configuration
212 (++) Disable the clock for the ADC GPIOs
213 using macro __HAL_RCC_GPIOx_CLK_DISABLE()
214
215 (#) Optionally, in case of usage of ADC with interruptions:
216 (++) Disable the NVIC for ADC
217 using function HAL_NVIC_DisableIRQ(ADCx_IRQn)
218
219 (#) Optionally, in case of usage of DMA:
220 (++) Deinitialize the DMA
221 using function HAL_DMA_DeInit().
222 (++) Disable the NVIC for DMA
223 using function HAL_NVIC_DisableIRQ(DMAx_Channelx_IRQn)
224
225 [..]
226
227 *** Callback registration ***
228 =============================================
229 [..]
230
231 The compilation flag USE_HAL_ADC_REGISTER_CALLBACKS, when set to 1,
232 allows the user to configure dynamically the driver callbacks.
233 Use Functions HAL_ADC_RegisterCallback()
234 to register an interrupt callback.
235 [..]
236
237 Function HAL_ADC_RegisterCallback() allows to register following callbacks:
238 (+) ConvCpltCallback : ADC conversion complete callback
239 (+) ConvHalfCpltCallback : ADC conversion DMA half-transfer callback
240 (+) LevelOutOfWindowCallback : ADC analog watchdog 1 callback
241 (+) ErrorCallback : ADC error callback
242 (+) MspInitCallback : ADC Msp Init callback
243 (+) MspDeInitCallback : ADC Msp DeInit callback
244 This function takes as parameters the HAL peripheral handle, the Callback ID
245 and a pointer to the user callback function.
246 [..]
247
248 Use function HAL_ADC_UnRegisterCallback to reset a callback to the default
249 weak function.
250 [..]
251
252 HAL_ADC_UnRegisterCallback takes as parameters the HAL peripheral handle,
253 and the Callback ID.
254 This function allows to reset following callbacks:
255 (+) ConvCpltCallback : ADC conversion complete callback
256 (+) ConvHalfCpltCallback : ADC conversion DMA half-transfer callback
257 (+) LevelOutOfWindowCallback : ADC analog watchdog 1 callback
258 (+) ErrorCallback : ADC error callback
259 (+) MspInitCallback : ADC Msp Init callback
260 (+) MspDeInitCallback : ADC Msp DeInit callback
261 [..]
262
263 By default, after the HAL_ADC_Init() and when the state is HAL_ADC_STATE_RESET
264 all callbacks are set to the corresponding weak functions:
265 examples HAL_ADC_ConvCpltCallback(), HAL_ADC_ErrorCallback().
266 Exception done for MspInit and MspDeInit functions that are
267 reset to the legacy weak functions in the HAL_ADC_Init()/ HAL_ADC_DeInit() only when
268 these callbacks are null (not registered beforehand).
269 [..]
270
271 If MspInit or MspDeInit are not null, the HAL_ADC_Init()/ HAL_ADC_DeInit()
272 keep and use the user MspInit/MspDeInit callbacks (registered beforehand) whatever the state.
273 [..]
274
275 Callbacks can be registered/unregistered in HAL_ADC_STATE_READY state only.
276 Exception done MspInit/MspDeInit functions that can be registered/unregistered
277 in HAL_ADC_STATE_READY or HAL_ADC_STATE_RESET state,
278 thus registered (user) MspInit/DeInit callbacks can be used during the Init/DeInit.
279 [..]
280
281 Then, the user first registers the MspInit/MspDeInit user callbacks
282 using HAL_ADC_RegisterCallback() before calling HAL_ADC_DeInit()
283 or HAL_ADC_Init() function.
284 [..]
285
286 When the compilation flag USE_HAL_ADC_REGISTER_CALLBACKS is set to 0 or
287 not defined, the callback registration feature is not available and all callbacks
288 are set to the corresponding weak functions.
289
290 @endverbatim
291 */
292
293 /* Includes ------------------------------------------------------------------*/
294 #include "stm32f0xx_hal.h"
295
296 /** @addtogroup STM32F0xx_HAL_Driver
297 * @{
298 */
299
300 /** @defgroup ADC ADC
301 * @brief ADC HAL module driver
302 * @{
303 */
304
305 #ifdef HAL_ADC_MODULE_ENABLED
306
307 /* Private typedef -----------------------------------------------------------*/
308 /* Private define ------------------------------------------------------------*/
309 /** @defgroup ADC_Private_Constants ADC Private Constants
310 * @{
311 */
312
313 /* Fixed timeout values for ADC calibration, enable settling time, disable */
314 /* settling time. */
315 /* Values defined to be higher than worst cases: low clock frequency, */
316 /* maximum prescaler. */
317 /* Ex of profile low frequency : Clock source at 0.1 MHz, ADC clock */
318 /* prescaler 4, sampling time 7.5 ADC clock cycles, resolution 12 bits. */
319 /* Unit: ms */
320 #define ADC_ENABLE_TIMEOUT ( 2U)
321 #define ADC_DISABLE_TIMEOUT ( 2U)
322 #define ADC_STOP_CONVERSION_TIMEOUT ( 2U)
323
324 /* Delay for ADC stabilization time. */
325 /* Maximum delay is 1us (refer to device datasheet, parameter tSTAB). */
326 /* Unit: us */
327 #define ADC_STAB_DELAY_US ( 1U)
328
329 /* Delay for temperature sensor stabilization time. */
330 /* Maximum delay is 10us (refer to device datasheet, parameter tSTART). */
331 /* Unit: us */
332 #define ADC_TEMPSENSOR_DELAY_US ( 10U)
333
334 /**
335 * @}
336 */
337
338 /* Private macro -------------------------------------------------------------*/
339 /* Private variables ---------------------------------------------------------*/
340 /* Private function prototypes -----------------------------------------------*/
341 /** @defgroup ADC_Private_Functions ADC Private Functions
342 * @{
343 */
344 static HAL_StatusTypeDef ADC_Enable(ADC_HandleTypeDef* hadc);
345 static HAL_StatusTypeDef ADC_Disable(ADC_HandleTypeDef* hadc);
346 static HAL_StatusTypeDef ADC_ConversionStop(ADC_HandleTypeDef* hadc);
347 static void ADC_DMAConvCplt(DMA_HandleTypeDef *hdma);
348 static void ADC_DMAHalfConvCplt(DMA_HandleTypeDef *hdma);
349 static void ADC_DMAError(DMA_HandleTypeDef *hdma);
350 /**
351 * @}
352 */
353
354 /* Exported functions ---------------------------------------------------------*/
355
356 /** @defgroup ADC_Exported_Functions ADC Exported Functions
357 * @{
358 */
359
360 /** @defgroup ADC_Exported_Functions_Group1 Initialization/de-initialization functions
361 * @brief Initialization and Configuration functions
362 *
363 @verbatim
364 ===============================================================================
365 ##### Initialization and de-initialization functions #####
366 ===============================================================================
367 [..] This section provides functions allowing to:
368 (+) Initialize and configure the ADC.
369 (+) De-initialize the ADC
370 @endverbatim
371 * @{
372 */
373
374 /**
375 * @brief Initializes the ADC peripheral and regular group according to
376 * parameters specified in structure "ADC_InitTypeDef".
377 * @note As prerequisite, ADC clock must be configured at RCC top level
378 * depending on both possible clock sources: APB clock of HSI clock.
379 * See commented example code below that can be copied and uncommented
380 * into HAL_ADC_MspInit().
381 * @note Possibility to update parameters on the fly:
382 * This function initializes the ADC MSP (HAL_ADC_MspInit()) only when
383 * coming from ADC state reset. Following calls to this function can
384 * be used to reconfigure some parameters of ADC_InitTypeDef
385 * structure on the fly, without modifying MSP configuration. If ADC
386 * MSP has to be modified again, HAL_ADC_DeInit() must be called
387 * before HAL_ADC_Init().
388 * The setting of these parameters is conditioned to ADC state.
389 * For parameters constraints, see comments of structure
390 * "ADC_InitTypeDef".
391 * @note This function configures the ADC within 2 scopes: scope of entire
392 * ADC and scope of regular group. For parameters details, see comments
393 * of structure "ADC_InitTypeDef".
394 * @param hadc ADC handle
395 * @retval HAL status
396 */
HAL_ADC_Init(ADC_HandleTypeDef * hadc)397 HAL_StatusTypeDef HAL_ADC_Init(ADC_HandleTypeDef* hadc)
398 {
399 HAL_StatusTypeDef tmp_hal_status = HAL_OK;
400 uint32_t tmpCFGR1 = 0U;
401
402 /* Check ADC handle */
403 if(hadc == NULL)
404 {
405 return HAL_ERROR;
406 }
407
408 /* Check the parameters */
409 assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
410 assert_param(IS_ADC_CLOCKPRESCALER(hadc->Init.ClockPrescaler));
411 assert_param(IS_ADC_RESOLUTION(hadc->Init.Resolution));
412 assert_param(IS_ADC_DATA_ALIGN(hadc->Init.DataAlign));
413 assert_param(IS_ADC_SCAN_MODE(hadc->Init.ScanConvMode));
414 assert_param(IS_FUNCTIONAL_STATE(hadc->Init.ContinuousConvMode));
415 assert_param(IS_FUNCTIONAL_STATE(hadc->Init.DiscontinuousConvMode));
416 assert_param(IS_ADC_EXTTRIG_EDGE(hadc->Init.ExternalTrigConvEdge));
417 assert_param(IS_ADC_EXTTRIG(hadc->Init.ExternalTrigConv));
418 assert_param(IS_FUNCTIONAL_STATE(hadc->Init.DMAContinuousRequests));
419 assert_param(IS_ADC_EOC_SELECTION(hadc->Init.EOCSelection));
420 assert_param(IS_ADC_OVERRUN(hadc->Init.Overrun));
421 assert_param(IS_FUNCTIONAL_STATE(hadc->Init.LowPowerAutoWait));
422 assert_param(IS_FUNCTIONAL_STATE(hadc->Init.LowPowerAutoPowerOff));
423
424 /* As prerequisite, into HAL_ADC_MspInit(), ADC clock must be configured */
425 /* at RCC top level depending on both possible clock sources: */
426 /* APB clock or HSI clock. */
427 /* Refer to header of this file for more details on clock enabling procedure*/
428
429 /* Actions performed only if ADC is coming from state reset: */
430 /* - Initialization of ADC MSP */
431 /* - ADC voltage regulator enable */
432 if (hadc->State == HAL_ADC_STATE_RESET)
433 {
434 /* Initialize ADC error code */
435 ADC_CLEAR_ERRORCODE(hadc);
436
437 /* Allocate lock resource and initialize it */
438 hadc->Lock = HAL_UNLOCKED;
439
440 #if (USE_HAL_ADC_REGISTER_CALLBACKS == 1)
441 /* Init the ADC Callback settings */
442 hadc->ConvCpltCallback = HAL_ADC_ConvCpltCallback; /* Legacy weak callback */
443 hadc->ConvHalfCpltCallback = HAL_ADC_ConvHalfCpltCallback; /* Legacy weak callback */
444 hadc->LevelOutOfWindowCallback = HAL_ADC_LevelOutOfWindowCallback; /* Legacy weak callback */
445 hadc->ErrorCallback = HAL_ADC_ErrorCallback; /* Legacy weak callback */
446
447 if (hadc->MspInitCallback == NULL)
448 {
449 hadc->MspInitCallback = HAL_ADC_MspInit; /* Legacy weak MspInit */
450 }
451
452 /* Init the low level hardware */
453 hadc->MspInitCallback(hadc);
454 #else
455 /* Init the low level hardware */
456 HAL_ADC_MspInit(hadc);
457 #endif /* USE_HAL_ADC_REGISTER_CALLBACKS */
458 }
459
460 /* Configuration of ADC parameters if previous preliminary actions are */
461 /* correctly completed. */
462 /* and if there is no conversion on going on regular group (ADC can be */
463 /* enabled anyway, in case of call of this function to update a parameter */
464 /* on the fly). */
465 if (HAL_IS_BIT_CLR(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL) &&
466 (tmp_hal_status == HAL_OK) &&
467 (ADC_IS_CONVERSION_ONGOING_REGULAR(hadc) == RESET) )
468 {
469 /* Set ADC state */
470 ADC_STATE_CLR_SET(hadc->State,
471 HAL_ADC_STATE_REG_BUSY,
472 HAL_ADC_STATE_BUSY_INTERNAL);
473
474 /* Parameters update conditioned to ADC state: */
475 /* Parameters that can be updated only when ADC is disabled: */
476 /* - ADC clock mode */
477 /* - ADC clock prescaler */
478 /* - ADC resolution */
479 if (ADC_IS_ENABLE(hadc) == RESET)
480 {
481 /* Some parameters of this register are not reset, since they are set */
482 /* by other functions and must be kept in case of usage of this */
483 /* function on the fly (update of a parameter of ADC_InitTypeDef */
484 /* without needing to reconfigure all other ADC groups/channels */
485 /* parameters): */
486 /* - internal measurement paths: Vbat, temperature sensor, Vref */
487 /* (set into HAL_ADC_ConfigChannel() ) */
488
489 /* Configuration of ADC resolution */
490 MODIFY_REG(hadc->Instance->CFGR1,
491 ADC_CFGR1_RES ,
492 hadc->Init.Resolution );
493
494 /* Configuration of ADC clock mode: clock source AHB or HSI with */
495 /* selectable prescaler */
496 MODIFY_REG(hadc->Instance->CFGR2 ,
497 ADC_CFGR2_CKMODE ,
498 hadc->Init.ClockPrescaler );
499 }
500
501 /* Configuration of ADC: */
502 /* - discontinuous mode */
503 /* - LowPowerAutoWait mode */
504 /* - LowPowerAutoPowerOff mode */
505 /* - continuous conversion mode */
506 /* - overrun */
507 /* - external trigger to start conversion */
508 /* - external trigger polarity */
509 /* - data alignment */
510 /* - resolution */
511 /* - scan direction */
512 /* - DMA continuous request */
513 hadc->Instance->CFGR1 &= ~( ADC_CFGR1_DISCEN |
514 ADC_CFGR1_AUTOFF |
515 ADC_CFGR1_AUTDLY |
516 ADC_CFGR1_CONT |
517 ADC_CFGR1_OVRMOD |
518 ADC_CFGR1_EXTSEL |
519 ADC_CFGR1_EXTEN |
520 ADC_CFGR1_ALIGN |
521 ADC_CFGR1_SCANDIR |
522 ADC_CFGR1_DMACFG );
523
524 tmpCFGR1 |= (ADC_CFGR1_AUTOWAIT((uint32_t)hadc->Init.LowPowerAutoWait) |
525 ADC_CFGR1_AUTOOFF((uint32_t)hadc->Init.LowPowerAutoPowerOff) |
526 ADC_CFGR1_CONTINUOUS((uint32_t)hadc->Init.ContinuousConvMode) |
527 ADC_CFGR1_OVERRUN(hadc->Init.Overrun) |
528 hadc->Init.DataAlign |
529 ADC_SCANDIR(hadc->Init.ScanConvMode) |
530 ADC_CFGR1_DMACONTREQ((uint32_t)hadc->Init.DMAContinuousRequests) );
531
532 /* Enable discontinuous mode only if continuous mode is disabled */
533 if (hadc->Init.DiscontinuousConvMode == ENABLE)
534 {
535 if (hadc->Init.ContinuousConvMode == DISABLE)
536 {
537 /* Enable the selected ADC group regular discontinuous mode */
538 tmpCFGR1 |= ADC_CFGR1_DISCEN;
539 }
540 else
541 {
542 /* ADC regular group discontinuous was intended to be enabled, */
543 /* but ADC regular group modes continuous and sequencer discontinuous */
544 /* cannot be enabled simultaneously. */
545
546 /* Update ADC state machine to error */
547 SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG);
548
549 /* Set ADC error code to ADC IP internal error */
550 SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL);
551 }
552 }
553
554 /* Enable external trigger if trigger selection is different of software */
555 /* start. */
556 /* Note: This configuration keeps the hardware feature of parameter */
557 /* ExternalTrigConvEdge "trigger edge none" equivalent to */
558 /* software start. */
559 if (hadc->Init.ExternalTrigConv != ADC_SOFTWARE_START)
560 {
561 tmpCFGR1 |= ( hadc->Init.ExternalTrigConv |
562 hadc->Init.ExternalTrigConvEdge );
563 }
564
565 /* Update ADC configuration register with previous settings */
566 hadc->Instance->CFGR1 |= tmpCFGR1;
567
568 /* Channel sampling time configuration */
569 /* Management of parameters "SamplingTimeCommon" and "SamplingTime" */
570 /* (obsolete): sampling time set in this function if parameter */
571 /* "SamplingTimeCommon" has been set to a valid sampling time. */
572 /* Otherwise, sampling time is set into ADC channel initialization */
573 /* structure with parameter "SamplingTime" (obsolete). */
574 if (IS_ADC_SAMPLE_TIME(hadc->Init.SamplingTimeCommon))
575 {
576 /* Channel sampling time configuration */
577 /* Clear the old sample time */
578 hadc->Instance->SMPR &= ~(ADC_SMPR_SMP);
579
580 /* Set the new sample time */
581 hadc->Instance->SMPR |= ADC_SMPR_SET(hadc->Init.SamplingTimeCommon);
582 }
583
584 /* Check back that ADC registers have effectively been configured to */
585 /* ensure of no potential problem of ADC core IP clocking. */
586 /* Check through register CFGR1 (excluding analog watchdog configuration: */
587 /* set into separate dedicated function, and bits of ADC resolution set */
588 /* out of temporary variable 'tmpCFGR1'). */
589 if ((hadc->Instance->CFGR1 & ~(ADC_CFGR1_AWDCH | ADC_CFGR1_AWDEN | ADC_CFGR1_AWDSGL | ADC_CFGR1_RES))
590 == tmpCFGR1)
591 {
592 /* Set ADC error code to none */
593 ADC_CLEAR_ERRORCODE(hadc);
594
595 /* Set the ADC state */
596 ADC_STATE_CLR_SET(hadc->State,
597 HAL_ADC_STATE_BUSY_INTERNAL,
598 HAL_ADC_STATE_READY);
599 }
600 else
601 {
602 /* Update ADC state machine to error */
603 ADC_STATE_CLR_SET(hadc->State,
604 HAL_ADC_STATE_BUSY_INTERNAL,
605 HAL_ADC_STATE_ERROR_INTERNAL);
606
607 /* Set ADC error code to ADC IP internal error */
608 SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL);
609
610 tmp_hal_status = HAL_ERROR;
611 }
612
613 }
614 else
615 {
616 /* Update ADC state machine to error */
617 SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL);
618
619 tmp_hal_status = HAL_ERROR;
620 }
621
622 /* Return function status */
623 return tmp_hal_status;
624 }
625
626
627 /**
628 * @brief Deinitialize the ADC peripheral registers to their default reset
629 * values, with deinitialization of the ADC MSP.
630 * @note For devices with several ADCs: reset of ADC common registers is done
631 * only if all ADCs sharing the same common group are disabled.
632 * If this is not the case, reset of these common parameters reset is
633 * bypassed without error reporting: it can be the intended behaviour in
634 * case of reset of a single ADC while the other ADCs sharing the same
635 * common group is still running.
636 * @param hadc ADC handle
637 * @retval HAL status
638 */
HAL_ADC_DeInit(ADC_HandleTypeDef * hadc)639 HAL_StatusTypeDef HAL_ADC_DeInit(ADC_HandleTypeDef* hadc)
640 {
641 HAL_StatusTypeDef tmp_hal_status = HAL_OK;
642
643 /* Check ADC handle */
644 if(hadc == NULL)
645 {
646 return HAL_ERROR;
647 }
648
649 /* Check the parameters */
650 assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
651
652 /* Set ADC state */
653 SET_BIT(hadc->State, HAL_ADC_STATE_BUSY_INTERNAL);
654
655 /* Stop potential conversion on going, on regular group */
656 tmp_hal_status = ADC_ConversionStop(hadc);
657
658 /* Disable ADC peripheral if conversions are effectively stopped */
659 if (tmp_hal_status == HAL_OK)
660 {
661 /* Disable the ADC peripheral */
662 tmp_hal_status = ADC_Disable(hadc);
663
664 /* Check if ADC is effectively disabled */
665 if (tmp_hal_status != HAL_ERROR)
666 {
667 /* Change ADC state */
668 hadc->State = HAL_ADC_STATE_READY;
669 }
670 }
671
672
673 /* Configuration of ADC parameters if previous preliminary actions are */
674 /* correctly completed. */
675 if (tmp_hal_status != HAL_ERROR)
676 {
677
678 /* ========== Reset ADC registers ========== */
679 /* Reset register IER */
680 __HAL_ADC_DISABLE_IT(hadc, (ADC_IT_AWD | ADC_IT_OVR |
681 ADC_IT_EOS | ADC_IT_EOC |
682 ADC_IT_EOSMP | ADC_IT_RDY ) );
683
684 /* Reset register ISR */
685 __HAL_ADC_CLEAR_FLAG(hadc, (ADC_FLAG_AWD | ADC_FLAG_OVR |
686 ADC_FLAG_EOS | ADC_FLAG_EOC |
687 ADC_FLAG_EOSMP | ADC_FLAG_RDY ) );
688
689 /* Reset register CR */
690 /* Bits ADC_CR_ADCAL, ADC_CR_ADSTP, ADC_CR_ADSTART are in access mode */
691 /* "read-set": no direct reset applicable. */
692
693 /* Reset register CFGR1 */
694 hadc->Instance->CFGR1 &= ~(ADC_CFGR1_AWDCH | ADC_CFGR1_AWDEN | ADC_CFGR1_AWDSGL | ADC_CFGR1_DISCEN |
695 ADC_CFGR1_AUTOFF | ADC_CFGR1_WAIT | ADC_CFGR1_CONT | ADC_CFGR1_OVRMOD |
696 ADC_CFGR1_EXTEN | ADC_CFGR1_EXTSEL | ADC_CFGR1_ALIGN | ADC_CFGR1_RES |
697 ADC_CFGR1_SCANDIR | ADC_CFGR1_DMACFG | ADC_CFGR1_DMAEN );
698
699 /* Reset register CFGR2 */
700 /* Note: Update of ADC clock mode is conditioned to ADC state disabled: */
701 /* already done above. */
702 hadc->Instance->CFGR2 &= ~ADC_CFGR2_CKMODE;
703
704 /* Reset register SMPR */
705 hadc->Instance->SMPR &= ~ADC_SMPR_SMP;
706
707 /* Reset register TR1 */
708 hadc->Instance->TR &= ~(ADC_TR_HT | ADC_TR_LT);
709
710 /* Reset register CHSELR */
711 hadc->Instance->CHSELR &= ~(ADC_CHSELR_CHSEL18 | ADC_CHSELR_CHSEL17 | ADC_CHSELR_CHSEL16 |
712 ADC_CHSELR_CHSEL15 | ADC_CHSELR_CHSEL14 | ADC_CHSELR_CHSEL13 | ADC_CHSELR_CHSEL12 |
713 ADC_CHSELR_CHSEL11 | ADC_CHSELR_CHSEL10 | ADC_CHSELR_CHSEL9 | ADC_CHSELR_CHSEL8 |
714 ADC_CHSELR_CHSEL7 | ADC_CHSELR_CHSEL6 | ADC_CHSELR_CHSEL5 | ADC_CHSELR_CHSEL4 |
715 ADC_CHSELR_CHSEL3 | ADC_CHSELR_CHSEL2 | ADC_CHSELR_CHSEL1 | ADC_CHSELR_CHSEL0 );
716
717 /* Reset register DR */
718 /* bits in access mode read only, no direct reset applicable*/
719
720 /* Reset register CCR */
721 ADC->CCR &= ~(ADC_CCR_ALL);
722
723 /* ========== Hard reset ADC peripheral ========== */
724 /* Performs a global reset of the entire ADC peripheral: ADC state is */
725 /* forced to a similar state after device power-on. */
726 /* If needed, copy-paste and uncomment the following reset code into */
727 /* function "void HAL_ADC_MspInit(ADC_HandleTypeDef* hadc)": */
728 /* */
729 /* __HAL_RCC_ADC1_FORCE_RESET() */
730 /* __HAL_RCC_ADC1_RELEASE_RESET() */
731
732 #if (USE_HAL_ADC_REGISTER_CALLBACKS == 1)
733 if (hadc->MspDeInitCallback == NULL)
734 {
735 hadc->MspDeInitCallback = HAL_ADC_MspDeInit; /* Legacy weak MspDeInit */
736 }
737
738 /* DeInit the low level hardware */
739 hadc->MspDeInitCallback(hadc);
740 #else
741 /* DeInit the low level hardware */
742 HAL_ADC_MspDeInit(hadc);
743 #endif /* USE_HAL_ADC_REGISTER_CALLBACKS */
744
745 /* Set ADC error code to none */
746 ADC_CLEAR_ERRORCODE(hadc);
747
748 /* Set ADC state */
749 hadc->State = HAL_ADC_STATE_RESET;
750 }
751
752 /* Process unlocked */
753 __HAL_UNLOCK(hadc);
754
755 /* Return function status */
756 return tmp_hal_status;
757 }
758
759
760 /**
761 * @brief Initializes the ADC MSP.
762 * @param hadc ADC handle
763 * @retval None
764 */
HAL_ADC_MspInit(ADC_HandleTypeDef * hadc)765 __weak void HAL_ADC_MspInit(ADC_HandleTypeDef* hadc)
766 {
767 /* Prevent unused argument(s) compilation warning */
768 UNUSED(hadc);
769
770 /* NOTE : This function should not be modified. When the callback is needed,
771 function HAL_ADC_MspInit must be implemented in the user file.
772 */
773 }
774
775 /**
776 * @brief DeInitializes the ADC MSP.
777 * @param hadc ADC handle
778 * @retval None
779 */
HAL_ADC_MspDeInit(ADC_HandleTypeDef * hadc)780 __weak void HAL_ADC_MspDeInit(ADC_HandleTypeDef* hadc)
781 {
782 /* Prevent unused argument(s) compilation warning */
783 UNUSED(hadc);
784
785 /* NOTE : This function should not be modified. When the callback is needed,
786 function HAL_ADC_MspDeInit must be implemented in the user file.
787 */
788 }
789
790 #if (USE_HAL_ADC_REGISTER_CALLBACKS == 1)
791 /**
792 * @brief Register a User ADC Callback
793 * To be used instead of the weak predefined callback
794 * @param hadc Pointer to a ADC_HandleTypeDef structure that contains
795 * the configuration information for the specified ADC.
796 * @param CallbackID ID of the callback to be registered
797 * This parameter can be one of the following values:
798 * @arg @ref HAL_ADC_CONVERSION_COMPLETE_CB_ID ADC conversion complete callback ID
799 * @arg @ref HAL_ADC_CONVERSION_HALF_CB_ID ADC conversion complete callback ID
800 * @arg @ref HAL_ADC_LEVEL_OUT_OF_WINDOW_1_CB_ID ADC analog watchdog 1 callback ID
801 * @arg @ref HAL_ADC_ERROR_CB_ID ADC error callback ID
802 * @arg @ref HAL_ADC_INJ_CONVERSION_COMPLETE_CB_ID ADC group injected conversion complete callback ID
803 * @arg @ref HAL_ADC_MSPINIT_CB_ID ADC Msp Init callback ID
804 * @arg @ref HAL_ADC_MSPDEINIT_CB_ID ADC Msp DeInit callback ID
805 * @arg @ref HAL_ADC_MSPINIT_CB_ID MspInit callback ID
806 * @arg @ref HAL_ADC_MSPDEINIT_CB_ID MspDeInit callback ID
807 * @param pCallback pointer to the Callback function
808 * @retval HAL status
809 */
HAL_ADC_RegisterCallback(ADC_HandleTypeDef * hadc,HAL_ADC_CallbackIDTypeDef CallbackID,pADC_CallbackTypeDef pCallback)810 HAL_StatusTypeDef HAL_ADC_RegisterCallback(ADC_HandleTypeDef *hadc, HAL_ADC_CallbackIDTypeDef CallbackID, pADC_CallbackTypeDef pCallback)
811 {
812 HAL_StatusTypeDef status = HAL_OK;
813
814 if (pCallback == NULL)
815 {
816 /* Update the error code */
817 hadc->ErrorCode |= HAL_ADC_ERROR_INVALID_CALLBACK;
818
819 return HAL_ERROR;
820 }
821
822 if ((hadc->State & HAL_ADC_STATE_READY) != 0)
823 {
824 switch (CallbackID)
825 {
826 case HAL_ADC_CONVERSION_COMPLETE_CB_ID :
827 hadc->ConvCpltCallback = pCallback;
828 break;
829
830 case HAL_ADC_CONVERSION_HALF_CB_ID :
831 hadc->ConvHalfCpltCallback = pCallback;
832 break;
833
834 case HAL_ADC_LEVEL_OUT_OF_WINDOW_1_CB_ID :
835 hadc->LevelOutOfWindowCallback = pCallback;
836 break;
837
838 case HAL_ADC_ERROR_CB_ID :
839 hadc->ErrorCallback = pCallback;
840 break;
841
842 case HAL_ADC_MSPINIT_CB_ID :
843 hadc->MspInitCallback = pCallback;
844 break;
845
846 case HAL_ADC_MSPDEINIT_CB_ID :
847 hadc->MspDeInitCallback = pCallback;
848 break;
849
850 default :
851 /* Update the error code */
852 hadc->ErrorCode |= HAL_ADC_ERROR_INVALID_CALLBACK;
853
854 /* Return error status */
855 status = HAL_ERROR;
856 break;
857 }
858 }
859 else if (HAL_ADC_STATE_RESET == hadc->State)
860 {
861 switch (CallbackID)
862 {
863 case HAL_ADC_MSPINIT_CB_ID :
864 hadc->MspInitCallback = pCallback;
865 break;
866
867 case HAL_ADC_MSPDEINIT_CB_ID :
868 hadc->MspDeInitCallback = pCallback;
869 break;
870
871 default :
872 /* Update the error code */
873 hadc->ErrorCode |= HAL_ADC_ERROR_INVALID_CALLBACK;
874
875 /* Return error status */
876 status = HAL_ERROR;
877 break;
878 }
879 }
880 else
881 {
882 /* Update the error code */
883 hadc->ErrorCode |= HAL_ADC_ERROR_INVALID_CALLBACK;
884
885 /* Return error status */
886 status = HAL_ERROR;
887 }
888
889 return status;
890 }
891
892 /**
893 * @brief Unregister a ADC Callback
894 * ADC callback is redirected to the weak predefined callback
895 * @param hadc Pointer to a ADC_HandleTypeDef structure that contains
896 * the configuration information for the specified ADC.
897 * @param CallbackID ID of the callback to be unregistered
898 * This parameter can be one of the following values:
899 * @arg @ref HAL_ADC_CONVERSION_COMPLETE_CB_ID ADC conversion complete callback ID
900 * @arg @ref HAL_ADC_CONVERSION_HALF_CB_ID ADC conversion complete callback ID
901 * @arg @ref HAL_ADC_LEVEL_OUT_OF_WINDOW_1_CB_ID ADC analog watchdog 1 callback ID
902 * @arg @ref HAL_ADC_ERROR_CB_ID ADC error callback ID
903 * @arg @ref HAL_ADC_INJ_CONVERSION_COMPLETE_CB_ID ADC group injected conversion complete callback ID
904 * @arg @ref HAL_ADC_MSPINIT_CB_ID ADC Msp Init callback ID
905 * @arg @ref HAL_ADC_MSPDEINIT_CB_ID ADC Msp DeInit callback ID
906 * @arg @ref HAL_ADC_MSPINIT_CB_ID MspInit callback ID
907 * @arg @ref HAL_ADC_MSPDEINIT_CB_ID MspDeInit callback ID
908 * @retval HAL status
909 */
HAL_ADC_UnRegisterCallback(ADC_HandleTypeDef * hadc,HAL_ADC_CallbackIDTypeDef CallbackID)910 HAL_StatusTypeDef HAL_ADC_UnRegisterCallback(ADC_HandleTypeDef *hadc, HAL_ADC_CallbackIDTypeDef CallbackID)
911 {
912 HAL_StatusTypeDef status = HAL_OK;
913
914 if ((hadc->State & HAL_ADC_STATE_READY) != 0)
915 {
916 switch (CallbackID)
917 {
918 case HAL_ADC_CONVERSION_COMPLETE_CB_ID :
919 hadc->ConvCpltCallback = HAL_ADC_ConvCpltCallback;
920 break;
921
922 case HAL_ADC_CONVERSION_HALF_CB_ID :
923 hadc->ConvHalfCpltCallback = HAL_ADC_ConvHalfCpltCallback;
924 break;
925
926 case HAL_ADC_LEVEL_OUT_OF_WINDOW_1_CB_ID :
927 hadc->LevelOutOfWindowCallback = HAL_ADC_LevelOutOfWindowCallback;
928 break;
929
930 case HAL_ADC_ERROR_CB_ID :
931 hadc->ErrorCallback = HAL_ADC_ErrorCallback;
932 break;
933
934 case HAL_ADC_MSPINIT_CB_ID :
935 hadc->MspInitCallback = HAL_ADC_MspInit; /* Legacy weak MspInit */
936 break;
937
938 case HAL_ADC_MSPDEINIT_CB_ID :
939 hadc->MspDeInitCallback = HAL_ADC_MspDeInit; /* Legacy weak MspDeInit */
940 break;
941
942 default :
943 /* Update the error code */
944 hadc->ErrorCode |= HAL_ADC_ERROR_INVALID_CALLBACK;
945
946 /* Return error status */
947 status = HAL_ERROR;
948 break;
949 }
950 }
951 else if (HAL_ADC_STATE_RESET == hadc->State)
952 {
953 switch (CallbackID)
954 {
955 case HAL_ADC_MSPINIT_CB_ID :
956 hadc->MspInitCallback = HAL_ADC_MspInit; /* Legacy weak MspInit */
957 break;
958
959 case HAL_ADC_MSPDEINIT_CB_ID :
960 hadc->MspDeInitCallback = HAL_ADC_MspDeInit; /* Legacy weak MspDeInit */
961 break;
962
963 default :
964 /* Update the error code */
965 hadc->ErrorCode |= HAL_ADC_ERROR_INVALID_CALLBACK;
966
967 /* Return error status */
968 status = HAL_ERROR;
969 break;
970 }
971 }
972 else
973 {
974 /* Update the error code */
975 hadc->ErrorCode |= HAL_ADC_ERROR_INVALID_CALLBACK;
976
977 /* Return error status */
978 status = HAL_ERROR;
979 }
980
981 return status;
982 }
983
984 #endif /* USE_HAL_ADC_REGISTER_CALLBACKS */
985
986 /**
987 * @}
988 */
989
990 /** @defgroup ADC_Exported_Functions_Group2 IO operation functions
991 * @brief IO operation functions
992 *
993 @verbatim
994 ===============================================================================
995 ##### IO operation functions #####
996 ===============================================================================
997 [..] This section provides functions allowing to:
998 (+) Start conversion of regular group.
999 (+) Stop conversion of regular group.
1000 (+) Poll for conversion complete on regular group.
1001 (+) Poll for conversion event.
1002 (+) Get result of regular channel conversion.
1003 (+) Start conversion of regular group and enable interruptions.
1004 (+) Stop conversion of regular group and disable interruptions.
1005 (+) Handle ADC interrupt request
1006 (+) Start conversion of regular group and enable DMA transfer.
1007 (+) Stop conversion of regular group and disable ADC DMA transfer.
1008 @endverbatim
1009 * @{
1010 */
1011
1012 /**
1013 * @brief Enables ADC, starts conversion of regular group.
1014 * Interruptions enabled in this function: None.
1015 * @param hadc ADC handle
1016 * @retval HAL status
1017 */
HAL_ADC_Start(ADC_HandleTypeDef * hadc)1018 HAL_StatusTypeDef HAL_ADC_Start(ADC_HandleTypeDef* hadc)
1019 {
1020 HAL_StatusTypeDef tmp_hal_status = HAL_OK;
1021
1022 /* Check the parameters */
1023 assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
1024
1025 /* Perform ADC enable and conversion start if no conversion is on going */
1026 if (ADC_IS_CONVERSION_ONGOING_REGULAR(hadc) == RESET)
1027 {
1028 /* Process locked */
1029 __HAL_LOCK(hadc);
1030
1031 /* Enable the ADC peripheral */
1032 /* If low power mode AutoPowerOff is enabled, power-on/off phases are */
1033 /* performed automatically by hardware. */
1034 if (hadc->Init.LowPowerAutoPowerOff != ENABLE)
1035 {
1036 tmp_hal_status = ADC_Enable(hadc);
1037 }
1038
1039 /* Start conversion if ADC is effectively enabled */
1040 if (tmp_hal_status == HAL_OK)
1041 {
1042 /* Set ADC state */
1043 /* - Clear state bitfield related to regular group conversion results */
1044 /* - Set state bitfield related to regular operation */
1045 ADC_STATE_CLR_SET(hadc->State,
1046 HAL_ADC_STATE_READY | HAL_ADC_STATE_REG_EOC | HAL_ADC_STATE_REG_OVR | HAL_ADC_STATE_REG_EOSMP,
1047 HAL_ADC_STATE_REG_BUSY);
1048
1049 /* Reset ADC all error code fields */
1050 ADC_CLEAR_ERRORCODE(hadc);
1051
1052 /* Process unlocked */
1053 /* Unlock before starting ADC conversions: in case of potential */
1054 /* interruption, to let the process to ADC IRQ Handler. */
1055 __HAL_UNLOCK(hadc);
1056
1057 /* Clear regular group conversion flag and overrun flag */
1058 /* (To ensure of no unknown state from potential previous ADC */
1059 /* operations) */
1060 __HAL_ADC_CLEAR_FLAG(hadc, (ADC_FLAG_EOC | ADC_FLAG_EOS | ADC_FLAG_OVR));
1061
1062 /* Enable conversion of regular group. */
1063 /* If software start has been selected, conversion starts immediately. */
1064 /* If external trigger has been selected, conversion will start at next */
1065 /* trigger event. */
1066 hadc->Instance->CR |= ADC_CR_ADSTART;
1067 }
1068 }
1069 else
1070 {
1071 tmp_hal_status = HAL_BUSY;
1072 }
1073
1074 /* Return function status */
1075 return tmp_hal_status;
1076 }
1077
1078 /**
1079 * @brief Stop ADC conversion of regular group, disable ADC peripheral.
1080 * @param hadc ADC handle
1081 * @retval HAL status.
1082 */
HAL_ADC_Stop(ADC_HandleTypeDef * hadc)1083 HAL_StatusTypeDef HAL_ADC_Stop(ADC_HandleTypeDef* hadc)
1084 {
1085 HAL_StatusTypeDef tmp_hal_status = HAL_OK;
1086
1087 /* Check the parameters */
1088 assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
1089
1090 /* Process locked */
1091 __HAL_LOCK(hadc);
1092
1093 /* 1. Stop potential conversion on going, on regular group */
1094 tmp_hal_status = ADC_ConversionStop(hadc);
1095
1096 /* Disable ADC peripheral if conversions are effectively stopped */
1097 if (tmp_hal_status == HAL_OK)
1098 {
1099 /* 2. Disable the ADC peripheral */
1100 tmp_hal_status = ADC_Disable(hadc);
1101
1102 /* Check if ADC is effectively disabled */
1103 if (tmp_hal_status == HAL_OK)
1104 {
1105 /* Set ADC state */
1106 ADC_STATE_CLR_SET(hadc->State,
1107 HAL_ADC_STATE_REG_BUSY,
1108 HAL_ADC_STATE_READY);
1109 }
1110 }
1111
1112 /* Process unlocked */
1113 __HAL_UNLOCK(hadc);
1114
1115 /* Return function status */
1116 return tmp_hal_status;
1117 }
1118
1119 /**
1120 * @brief Wait for regular group conversion to be completed.
1121 * @note ADC conversion flags EOS (end of sequence) and EOC (end of
1122 * conversion) are cleared by this function, with an exception:
1123 * if low power feature "LowPowerAutoWait" is enabled, flags are
1124 * not cleared to not interfere with this feature until data register
1125 * is read using function HAL_ADC_GetValue().
1126 * @note This function cannot be used in a particular setup: ADC configured
1127 * in DMA mode and polling for end of each conversion (ADC init
1128 * parameter "EOCSelection" set to ADC_EOC_SINGLE_CONV).
1129 * In this case, DMA resets the flag EOC and polling cannot be
1130 * performed on each conversion. Nevertheless, polling can still
1131 * be performed on the complete sequence (ADC init
1132 * parameter "EOCSelection" set to ADC_EOC_SEQ_CONV).
1133 * @param hadc ADC handle
1134 * @param Timeout Timeout value in millisecond.
1135 * @retval HAL status
1136 */
HAL_ADC_PollForConversion(ADC_HandleTypeDef * hadc,uint32_t Timeout)1137 HAL_StatusTypeDef HAL_ADC_PollForConversion(ADC_HandleTypeDef* hadc, uint32_t Timeout)
1138 {
1139 uint32_t tickstart;
1140 uint32_t tmp_Flag_EOC;
1141
1142 /* Check the parameters */
1143 assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
1144
1145 /* If end of conversion selected to end of sequence */
1146 if (hadc->Init.EOCSelection == ADC_EOC_SEQ_CONV)
1147 {
1148 tmp_Flag_EOC = ADC_FLAG_EOS;
1149 }
1150 /* If end of conversion selected to end of each conversion */
1151 else /* ADC_EOC_SINGLE_CONV */
1152 {
1153 /* Verification that ADC configuration is compliant with polling for */
1154 /* each conversion: */
1155 /* Particular case is ADC configured in DMA mode and ADC sequencer with */
1156 /* several ranks and polling for end of each conversion. */
1157 /* For code simplicity sake, this particular case is generalized to */
1158 /* ADC configured in DMA mode and and polling for end of each conversion. */
1159 if (HAL_IS_BIT_SET(hadc->Instance->CFGR1, ADC_CFGR1_DMAEN))
1160 {
1161 /* Update ADC state machine to error */
1162 SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG);
1163
1164 /* Process unlocked */
1165 __HAL_UNLOCK(hadc);
1166
1167 return HAL_ERROR;
1168 }
1169 else
1170 {
1171 tmp_Flag_EOC = (ADC_FLAG_EOC | ADC_FLAG_EOS);
1172 }
1173 }
1174
1175 /* Get tick count */
1176 tickstart = HAL_GetTick();
1177
1178 /* Wait until End of Conversion flag is raised */
1179 while(HAL_IS_BIT_CLR(hadc->Instance->ISR, tmp_Flag_EOC))
1180 {
1181 /* Check if timeout is disabled (set to infinite wait) */
1182 if(Timeout != HAL_MAX_DELAY)
1183 {
1184 if((Timeout == 0) || ((HAL_GetTick()-tickstart) > Timeout))
1185 {
1186 /* New check to avoid false timeout detection in case of preemption */
1187 if(HAL_IS_BIT_CLR(hadc->Instance->ISR, tmp_Flag_EOC))
1188 {
1189 /* Update ADC state machine to timeout */
1190 SET_BIT(hadc->State, HAL_ADC_STATE_TIMEOUT);
1191
1192 /* Process unlocked */
1193 __HAL_UNLOCK(hadc);
1194
1195 return HAL_TIMEOUT;
1196 }
1197 }
1198 }
1199 }
1200
1201 /* Update ADC state machine */
1202 SET_BIT(hadc->State, HAL_ADC_STATE_REG_EOC);
1203
1204 /* Determine whether any further conversion upcoming on group regular */
1205 /* by external trigger, continuous mode or scan sequence on going. */
1206 if(ADC_IS_SOFTWARE_START_REGULAR(hadc) &&
1207 (hadc->Init.ContinuousConvMode == DISABLE) )
1208 {
1209 /* If End of Sequence is reached, disable interrupts */
1210 if( __HAL_ADC_GET_FLAG(hadc, ADC_FLAG_EOS) )
1211 {
1212 /* Allowed to modify bits ADC_IT_EOC/ADC_IT_EOS only if bit */
1213 /* ADSTART==0 (no conversion on going) */
1214 if (ADC_IS_CONVERSION_ONGOING_REGULAR(hadc) == RESET)
1215 {
1216 /* Disable ADC end of single conversion interrupt on group regular */
1217 /* Note: Overrun interrupt was enabled with EOC interrupt in */
1218 /* HAL_Start_IT(), but is not disabled here because can be used */
1219 /* by overrun IRQ process below. */
1220 __HAL_ADC_DISABLE_IT(hadc, ADC_IT_EOC | ADC_IT_EOS);
1221
1222 /* Set ADC state */
1223 ADC_STATE_CLR_SET(hadc->State,
1224 HAL_ADC_STATE_REG_BUSY,
1225 HAL_ADC_STATE_READY);
1226 }
1227 else
1228 {
1229 /* Change ADC state to error state */
1230 SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG);
1231
1232 /* Set ADC error code to ADC IP internal error */
1233 SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL);
1234 }
1235 }
1236 }
1237
1238 /* Clear end of conversion flag of regular group if low power feature */
1239 /* "LowPowerAutoWait " is disabled, to not interfere with this feature */
1240 /* until data register is read using function HAL_ADC_GetValue(). */
1241 if (hadc->Init.LowPowerAutoWait == DISABLE)
1242 {
1243 /* Clear regular group conversion flag */
1244 __HAL_ADC_CLEAR_FLAG(hadc, (ADC_FLAG_EOC | ADC_FLAG_EOS));
1245 }
1246
1247 /* Return ADC state */
1248 return HAL_OK;
1249 }
1250
1251 /**
1252 * @brief Poll for conversion event.
1253 * @param hadc ADC handle
1254 * @param EventType the ADC event type.
1255 * This parameter can be one of the following values:
1256 * @arg ADC_AWD_EVENT: ADC Analog watchdog event
1257 * @arg ADC_OVR_EVENT: ADC Overrun event
1258 * @param Timeout Timeout value in millisecond.
1259 * @retval HAL status
1260 */
HAL_ADC_PollForEvent(ADC_HandleTypeDef * hadc,uint32_t EventType,uint32_t Timeout)1261 HAL_StatusTypeDef HAL_ADC_PollForEvent(ADC_HandleTypeDef* hadc, uint32_t EventType, uint32_t Timeout)
1262 {
1263 uint32_t tickstart=0;
1264
1265 /* Check the parameters */
1266 assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
1267 assert_param(IS_ADC_EVENT_TYPE(EventType));
1268
1269 /* Get tick count */
1270 tickstart = HAL_GetTick();
1271
1272 /* Check selected event flag */
1273 while(__HAL_ADC_GET_FLAG(hadc, EventType) == RESET)
1274 {
1275 /* Check if timeout is disabled (set to infinite wait) */
1276 if(Timeout != HAL_MAX_DELAY)
1277 {
1278 if((Timeout == 0U) || ((HAL_GetTick()-tickstart) > Timeout))
1279 {
1280 /* New check to avoid false timeout detection in case of preemption */
1281 if(__HAL_ADC_GET_FLAG(hadc, EventType) == RESET)
1282 {
1283 /* Update ADC state machine to timeout */
1284 SET_BIT(hadc->State, HAL_ADC_STATE_TIMEOUT);
1285
1286 /* Process unlocked */
1287 __HAL_UNLOCK(hadc);
1288
1289 return HAL_TIMEOUT;
1290 }
1291 }
1292 }
1293 }
1294
1295 switch(EventType)
1296 {
1297 /* Analog watchdog (level out of window) event */
1298 case ADC_AWD_EVENT:
1299 /* Set ADC state */
1300 SET_BIT(hadc->State, HAL_ADC_STATE_AWD1);
1301
1302 /* Clear ADC analog watchdog flag */
1303 __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_AWD);
1304 break;
1305
1306 /* Overrun event */
1307 default: /* Case ADC_OVR_EVENT */
1308 /* If overrun is set to overwrite previous data, overrun event is not */
1309 /* considered as an error. */
1310 /* (cf ref manual "Managing conversions without using the DMA and without */
1311 /* overrun ") */
1312 if (hadc->Init.Overrun == ADC_OVR_DATA_PRESERVED)
1313 {
1314 /* Set ADC state */
1315 SET_BIT(hadc->State, HAL_ADC_STATE_REG_OVR);
1316
1317 /* Set ADC error code to overrun */
1318 SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_OVR);
1319 }
1320
1321 /* Clear ADC Overrun flag */
1322 __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_OVR);
1323 break;
1324 }
1325
1326 /* Return ADC state */
1327 return HAL_OK;
1328 }
1329
1330 /**
1331 * @brief Enables ADC, starts conversion of regular group with interruption.
1332 * Interruptions enabled in this function:
1333 * - EOC (end of conversion of regular group) or EOS (end of
1334 * sequence of regular group) depending on ADC initialization
1335 * parameter "EOCSelection"
1336 * - overrun (if available)
1337 * Each of these interruptions has its dedicated callback function.
1338 * @param hadc ADC handle
1339 * @retval HAL status
1340 */
HAL_ADC_Start_IT(ADC_HandleTypeDef * hadc)1341 HAL_StatusTypeDef HAL_ADC_Start_IT(ADC_HandleTypeDef* hadc)
1342 {
1343 HAL_StatusTypeDef tmp_hal_status = HAL_OK;
1344
1345 /* Check the parameters */
1346 assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
1347
1348 /* Perform ADC enable and conversion start if no conversion is on going */
1349 if (ADC_IS_CONVERSION_ONGOING_REGULAR(hadc) == RESET)
1350 {
1351 /* Process locked */
1352 __HAL_LOCK(hadc);
1353
1354 /* Enable the ADC peripheral */
1355 /* If low power mode AutoPowerOff is enabled, power-on/off phases are */
1356 /* performed automatically by hardware. */
1357 if (hadc->Init.LowPowerAutoPowerOff != ENABLE)
1358 {
1359 tmp_hal_status = ADC_Enable(hadc);
1360 }
1361
1362 /* Start conversion if ADC is effectively enabled */
1363 if (tmp_hal_status == HAL_OK)
1364 {
1365 /* Set ADC state */
1366 /* - Clear state bitfield related to regular group conversion results */
1367 /* - Set state bitfield related to regular operation */
1368 ADC_STATE_CLR_SET(hadc->State,
1369 HAL_ADC_STATE_READY | HAL_ADC_STATE_REG_EOC | HAL_ADC_STATE_REG_OVR | HAL_ADC_STATE_REG_EOSMP,
1370 HAL_ADC_STATE_REG_BUSY);
1371
1372 /* Reset ADC all error code fields */
1373 ADC_CLEAR_ERRORCODE(hadc);
1374
1375 /* Process unlocked */
1376 /* Unlock before starting ADC conversions: in case of potential */
1377 /* interruption, to let the process to ADC IRQ Handler. */
1378 __HAL_UNLOCK(hadc);
1379
1380 /* Clear regular group conversion flag and overrun flag */
1381 /* (To ensure of no unknown state from potential previous ADC */
1382 /* operations) */
1383 __HAL_ADC_CLEAR_FLAG(hadc, (ADC_FLAG_EOC | ADC_FLAG_EOS | ADC_FLAG_OVR));
1384
1385 /* Enable ADC end of conversion interrupt */
1386 /* Enable ADC overrun interrupt */
1387 switch(hadc->Init.EOCSelection)
1388 {
1389 case ADC_EOC_SEQ_CONV:
1390 __HAL_ADC_DISABLE_IT(hadc, ADC_IT_EOC);
1391 __HAL_ADC_ENABLE_IT(hadc, (ADC_IT_EOS | ADC_IT_OVR));
1392 break;
1393 /* case ADC_EOC_SINGLE_CONV */
1394 default:
1395 __HAL_ADC_ENABLE_IT(hadc, (ADC_IT_EOC | ADC_IT_EOS | ADC_IT_OVR));
1396 break;
1397 }
1398
1399 /* Enable conversion of regular group. */
1400 /* If software start has been selected, conversion starts immediately. */
1401 /* If external trigger has been selected, conversion will start at next */
1402 /* trigger event. */
1403 hadc->Instance->CR |= ADC_CR_ADSTART;
1404 }
1405 }
1406 else
1407 {
1408 tmp_hal_status = HAL_BUSY;
1409 }
1410
1411 /* Return function status */
1412 return tmp_hal_status;
1413 }
1414
1415
1416 /**
1417 * @brief Stop ADC conversion of regular group, disable interruption of
1418 * end-of-conversion, disable ADC peripheral.
1419 * @param hadc ADC handle
1420 * @retval HAL status.
1421 */
HAL_ADC_Stop_IT(ADC_HandleTypeDef * hadc)1422 HAL_StatusTypeDef HAL_ADC_Stop_IT(ADC_HandleTypeDef* hadc)
1423 {
1424 HAL_StatusTypeDef tmp_hal_status = HAL_OK;
1425
1426 /* Check the parameters */
1427 assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
1428
1429 /* Process locked */
1430 __HAL_LOCK(hadc);
1431
1432 /* 1. Stop potential conversion on going, on regular group */
1433 tmp_hal_status = ADC_ConversionStop(hadc);
1434
1435 /* Disable ADC peripheral if conversions are effectively stopped */
1436 if (tmp_hal_status == HAL_OK)
1437 {
1438 /* Disable ADC end of conversion interrupt for regular group */
1439 /* Disable ADC overrun interrupt */
1440 __HAL_ADC_DISABLE_IT(hadc, (ADC_IT_EOC | ADC_IT_EOS | ADC_IT_OVR));
1441
1442 /* 2. Disable the ADC peripheral */
1443 tmp_hal_status = ADC_Disable(hadc);
1444
1445 /* Check if ADC is effectively disabled */
1446 if (tmp_hal_status == HAL_OK)
1447 {
1448 /* Set ADC state */
1449 ADC_STATE_CLR_SET(hadc->State,
1450 HAL_ADC_STATE_REG_BUSY,
1451 HAL_ADC_STATE_READY);
1452 }
1453 }
1454
1455 /* Process unlocked */
1456 __HAL_UNLOCK(hadc);
1457
1458 /* Return function status */
1459 return tmp_hal_status;
1460 }
1461
1462 /**
1463 * @brief Enables ADC, starts conversion of regular group and transfers result
1464 * through DMA.
1465 * Interruptions enabled in this function:
1466 * - DMA transfer complete
1467 * - DMA half transfer
1468 * - overrun
1469 * Each of these interruptions has its dedicated callback function.
1470 * @param hadc ADC handle
1471 * @param pData The destination Buffer address.
1472 * @param Length The length of data to be transferred from ADC peripheral to memory.
1473 * @retval None
1474 */
HAL_ADC_Start_DMA(ADC_HandleTypeDef * hadc,uint32_t * pData,uint32_t Length)1475 HAL_StatusTypeDef HAL_ADC_Start_DMA(ADC_HandleTypeDef* hadc, uint32_t* pData, uint32_t Length)
1476 {
1477 HAL_StatusTypeDef tmp_hal_status = HAL_OK;
1478
1479 /* Check the parameters */
1480 assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
1481
1482 /* Perform ADC enable and conversion start if no conversion is on going */
1483 if (ADC_IS_CONVERSION_ONGOING_REGULAR(hadc) == RESET)
1484 {
1485 /* Process locked */
1486 __HAL_LOCK(hadc);
1487
1488 /* Enable the ADC peripheral */
1489 /* If low power mode AutoPowerOff is enabled, power-on/off phases are */
1490 /* performed automatically by hardware. */
1491 if (hadc->Init.LowPowerAutoPowerOff != ENABLE)
1492 {
1493 tmp_hal_status = ADC_Enable(hadc);
1494 }
1495
1496 /* Start conversion if ADC is effectively enabled */
1497 if (tmp_hal_status == HAL_OK)
1498 {
1499 /* Set ADC state */
1500 /* - Clear state bitfield related to regular group conversion results */
1501 /* - Set state bitfield related to regular operation */
1502 ADC_STATE_CLR_SET(hadc->State,
1503 HAL_ADC_STATE_READY | HAL_ADC_STATE_REG_EOC | HAL_ADC_STATE_REG_OVR | HAL_ADC_STATE_REG_EOSMP,
1504 HAL_ADC_STATE_REG_BUSY);
1505
1506 /* Reset ADC all error code fields */
1507 ADC_CLEAR_ERRORCODE(hadc);
1508
1509 /* Process unlocked */
1510 /* Unlock before starting ADC conversions: in case of potential */
1511 /* interruption, to let the process to ADC IRQ Handler. */
1512 __HAL_UNLOCK(hadc);
1513
1514 /* Set the DMA transfer complete callback */
1515 hadc->DMA_Handle->XferCpltCallback = ADC_DMAConvCplt;
1516
1517 /* Set the DMA half transfer complete callback */
1518 hadc->DMA_Handle->XferHalfCpltCallback = ADC_DMAHalfConvCplt;
1519
1520 /* Set the DMA error callback */
1521 hadc->DMA_Handle->XferErrorCallback = ADC_DMAError;
1522
1523
1524 /* Manage ADC and DMA start: ADC overrun interruption, DMA start, ADC */
1525 /* start (in case of SW start): */
1526
1527 /* Clear regular group conversion flag and overrun flag */
1528 /* (To ensure of no unknown state from potential previous ADC */
1529 /* operations) */
1530 __HAL_ADC_CLEAR_FLAG(hadc, (ADC_FLAG_EOC | ADC_FLAG_EOS | ADC_FLAG_OVR));
1531
1532 /* Enable ADC overrun interrupt */
1533 __HAL_ADC_ENABLE_IT(hadc, ADC_IT_OVR);
1534
1535 /* Enable ADC DMA mode */
1536 hadc->Instance->CFGR1 |= ADC_CFGR1_DMAEN;
1537
1538 /* Start the DMA channel */
1539 HAL_DMA_Start_IT(hadc->DMA_Handle, (uint32_t)&hadc->Instance->DR, (uint32_t)pData, Length);
1540
1541 /* Enable conversion of regular group. */
1542 /* If software start has been selected, conversion starts immediately. */
1543 /* If external trigger has been selected, conversion will start at next */
1544 /* trigger event. */
1545 hadc->Instance->CR |= ADC_CR_ADSTART;
1546 }
1547 }
1548 else
1549 {
1550 tmp_hal_status = HAL_BUSY;
1551 }
1552
1553 /* Return function status */
1554 return tmp_hal_status;
1555 }
1556
1557 /**
1558 * @brief Stop ADC conversion of regular group, disable ADC DMA transfer, disable
1559 * ADC peripheral.
1560 * Each of these interruptions has its dedicated callback function.
1561 * @param hadc ADC handle
1562 * @retval HAL status.
1563 */
HAL_ADC_Stop_DMA(ADC_HandleTypeDef * hadc)1564 HAL_StatusTypeDef HAL_ADC_Stop_DMA(ADC_HandleTypeDef* hadc)
1565 {
1566 HAL_StatusTypeDef tmp_hal_status = HAL_OK;
1567
1568 /* Check the parameters */
1569 assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
1570
1571 /* Process locked */
1572 __HAL_LOCK(hadc);
1573
1574 /* 1. Stop potential conversion on going, on regular group */
1575 tmp_hal_status = ADC_ConversionStop(hadc);
1576
1577 /* Disable ADC peripheral if conversions are effectively stopped */
1578 if (tmp_hal_status == HAL_OK)
1579 {
1580 /* Disable ADC DMA (ADC DMA configuration ADC_CFGR_DMACFG is kept) */
1581 hadc->Instance->CFGR1 &= ~ADC_CFGR1_DMAEN;
1582
1583 /* Disable the DMA channel (in case of DMA in circular mode or stop while */
1584 /* while DMA transfer is on going) */
1585 if (hadc->DMA_Handle->State == HAL_DMA_STATE_BUSY)
1586 {
1587 tmp_hal_status = HAL_DMA_Abort(hadc->DMA_Handle);
1588
1589 /* Check if DMA channel effectively disabled */
1590 if (tmp_hal_status != HAL_OK)
1591 {
1592 /* Update ADC state machine to error */
1593 SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_DMA);
1594 }
1595 }
1596
1597 /* Disable ADC overrun interrupt */
1598 __HAL_ADC_DISABLE_IT(hadc, ADC_IT_OVR);
1599
1600 /* 2. Disable the ADC peripheral */
1601 /* Update "tmp_hal_status" only if DMA channel disabling passed, to keep */
1602 /* in memory a potential failing status. */
1603 if (tmp_hal_status == HAL_OK)
1604 {
1605 tmp_hal_status = ADC_Disable(hadc);
1606 }
1607 else
1608 {
1609 ADC_Disable(hadc);
1610 }
1611
1612 /* Check if ADC is effectively disabled */
1613 if (tmp_hal_status == HAL_OK)
1614 {
1615 /* Set ADC state */
1616 ADC_STATE_CLR_SET(hadc->State,
1617 HAL_ADC_STATE_REG_BUSY,
1618 HAL_ADC_STATE_READY);
1619 }
1620
1621 }
1622
1623 /* Process unlocked */
1624 __HAL_UNLOCK(hadc);
1625
1626 /* Return function status */
1627 return tmp_hal_status;
1628 }
1629
1630 /**
1631 * @brief Get ADC regular group conversion result.
1632 * @note Reading register DR automatically clears ADC flag EOC
1633 * (ADC group regular end of unitary conversion).
1634 * @note This function does not clear ADC flag EOS
1635 * (ADC group regular end of sequence conversion).
1636 * Occurrence of flag EOS rising:
1637 * - If sequencer is composed of 1 rank, flag EOS is equivalent
1638 * to flag EOC.
1639 * - If sequencer is composed of several ranks, during the scan
1640 * sequence flag EOC only is raised, at the end of the scan sequence
1641 * both flags EOC and EOS are raised.
1642 * To clear this flag, either use function:
1643 * in programming model IT: @ref HAL_ADC_IRQHandler(), in programming
1644 * model polling: @ref HAL_ADC_PollForConversion()
1645 * or @ref __HAL_ADC_CLEAR_FLAG(&hadc, ADC_FLAG_EOS).
1646 * @param hadc ADC handle
1647 * @retval ADC group regular conversion data
1648 */
HAL_ADC_GetValue(ADC_HandleTypeDef * hadc)1649 uint32_t HAL_ADC_GetValue(ADC_HandleTypeDef* hadc)
1650 {
1651 /* Check the parameters */
1652 assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
1653
1654 /* Note: EOC flag is not cleared here by software because automatically */
1655 /* cleared by hardware when reading register DR. */
1656
1657 /* Return ADC converted value */
1658 return hadc->Instance->DR;
1659 }
1660
1661 /**
1662 * @brief Handles ADC interrupt request.
1663 * @param hadc ADC handle
1664 * @retval None
1665 */
HAL_ADC_IRQHandler(ADC_HandleTypeDef * hadc)1666 void HAL_ADC_IRQHandler(ADC_HandleTypeDef* hadc)
1667 {
1668 uint32_t tmp_isr = hadc->Instance->ISR;
1669 uint32_t tmp_ier = hadc->Instance->IER;
1670
1671 /* Check the parameters */
1672 assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
1673 assert_param(IS_FUNCTIONAL_STATE(hadc->Init.ContinuousConvMode));
1674 assert_param(IS_ADC_EOC_SELECTION(hadc->Init.EOCSelection));
1675
1676 /* ========== Check End of Conversion flag for regular group ========== */
1677 if( (((tmp_isr & ADC_FLAG_EOC) == ADC_FLAG_EOC) && ((tmp_ier & ADC_IT_EOC) == ADC_IT_EOC)) ||
1678 (((tmp_isr & ADC_FLAG_EOS) == ADC_FLAG_EOS) && ((tmp_ier & ADC_IT_EOS) == ADC_IT_EOS)) )
1679 {
1680 /* Update state machine on conversion status if not in error state */
1681 if (HAL_IS_BIT_CLR(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL))
1682 {
1683 /* Set ADC state */
1684 SET_BIT(hadc->State, HAL_ADC_STATE_REG_EOC);
1685 }
1686
1687 /* Determine whether any further conversion upcoming on group regular */
1688 /* by external trigger, continuous mode or scan sequence on going. */
1689 if(ADC_IS_SOFTWARE_START_REGULAR(hadc) &&
1690 (hadc->Init.ContinuousConvMode == DISABLE) )
1691 {
1692 /* If End of Sequence is reached, disable interrupts */
1693 if((tmp_isr & ADC_FLAG_EOS) == ADC_FLAG_EOS)
1694 {
1695 /* Allowed to modify bits ADC_IT_EOC/ADC_IT_EOS only if bit */
1696 /* ADSTART==0 (no conversion on going) */
1697 if (ADC_IS_CONVERSION_ONGOING_REGULAR(hadc) == RESET)
1698 {
1699 /* Disable ADC end of single conversion interrupt on group regular */
1700 /* Note: Overrun interrupt was enabled with EOC interrupt in */
1701 /* HAL_Start_IT(), but is not disabled here because can be used */
1702 /* by overrun IRQ process below. */
1703 __HAL_ADC_DISABLE_IT(hadc, ADC_IT_EOC | ADC_IT_EOS);
1704
1705 /* Set ADC state */
1706 ADC_STATE_CLR_SET(hadc->State,
1707 HAL_ADC_STATE_REG_BUSY,
1708 HAL_ADC_STATE_READY);
1709 }
1710 else
1711 {
1712 /* Change ADC state to error state */
1713 SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG);
1714
1715 /* Set ADC error code to ADC IP internal error */
1716 SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL);
1717 }
1718 }
1719 }
1720
1721 /* Note: into callback, to determine if conversion has been triggered */
1722 /* from EOC or EOS, possibility to use: */
1723 /* " if( __HAL_ADC_GET_FLAG(&hadc, ADC_FLAG_EOS)) " */
1724 #if (USE_HAL_ADC_REGISTER_CALLBACKS == 1)
1725 hadc->ConvCpltCallback(hadc);
1726 #else
1727 HAL_ADC_ConvCpltCallback(hadc);
1728 #endif /* USE_HAL_ADC_REGISTER_CALLBACKS */
1729
1730
1731 /* Clear regular group conversion flag */
1732 /* Note: in case of overrun set to ADC_OVR_DATA_PRESERVED, end of */
1733 /* conversion flags clear induces the release of the preserved data.*/
1734 /* Therefore, if the preserved data value is needed, it must be */
1735 /* read preliminarily into HAL_ADC_ConvCpltCallback(). */
1736 __HAL_ADC_CLEAR_FLAG(hadc, (ADC_FLAG_EOC | ADC_FLAG_EOS) );
1737 }
1738
1739 /* ========== Check Analog watchdog flags ========== */
1740 if(((tmp_isr & ADC_FLAG_AWD) == ADC_FLAG_AWD) && ((tmp_ier & ADC_IT_AWD) == ADC_IT_AWD))
1741 {
1742 /* Set ADC state */
1743 SET_BIT(hadc->State, HAL_ADC_STATE_AWD1);
1744
1745 #if (USE_HAL_ADC_REGISTER_CALLBACKS == 1)
1746 hadc->LevelOutOfWindowCallback(hadc);
1747 #else
1748 HAL_ADC_LevelOutOfWindowCallback(hadc);
1749 #endif /* USE_HAL_ADC_REGISTER_CALLBACKS */
1750
1751 /* Clear ADC Analog watchdog flag */
1752 __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_AWD);
1753
1754 }
1755
1756
1757 /* ========== Check Overrun flag ========== */
1758 if(((tmp_isr & ADC_FLAG_OVR) == ADC_FLAG_OVR) && ((tmp_ier & ADC_IT_OVR) == ADC_IT_OVR))
1759 {
1760 /* If overrun is set to overwrite previous data (default setting), */
1761 /* overrun event is not considered as an error. */
1762 /* (cf ref manual "Managing conversions without using the DMA and without */
1763 /* overrun ") */
1764 /* Exception for usage with DMA overrun event always considered as an */
1765 /* error. */
1766 if ((hadc->Init.Overrun == ADC_OVR_DATA_PRESERVED) ||
1767 HAL_IS_BIT_SET(hadc->Instance->CFGR1, ADC_CFGR1_DMAEN) )
1768 {
1769 /* Set ADC error code to overrun */
1770 SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_OVR);
1771
1772 /* Clear ADC overrun flag */
1773 __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_OVR);
1774
1775 #if (USE_HAL_ADC_REGISTER_CALLBACKS == 1)
1776 hadc->ErrorCallback(hadc);
1777 #else
1778 HAL_ADC_ErrorCallback(hadc);
1779 #endif /* USE_HAL_ADC_REGISTER_CALLBACKS */
1780 }
1781
1782 /* Clear the Overrun flag */
1783 __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_OVR);
1784 }
1785
1786 }
1787
1788
1789 /**
1790 * @brief Conversion complete callback in non blocking mode
1791 * @param hadc ADC handle
1792 * @retval None
1793 */
HAL_ADC_ConvCpltCallback(ADC_HandleTypeDef * hadc)1794 __weak void HAL_ADC_ConvCpltCallback(ADC_HandleTypeDef* hadc)
1795 {
1796 /* Prevent unused argument(s) compilation warning */
1797 UNUSED(hadc);
1798
1799 /* NOTE : This function should not be modified. When the callback is needed,
1800 function HAL_ADC_ConvCpltCallback must be implemented in the user file.
1801 */
1802 }
1803
1804 /**
1805 * @brief Conversion DMA half-transfer callback in non blocking mode
1806 * @param hadc ADC handle
1807 * @retval None
1808 */
HAL_ADC_ConvHalfCpltCallback(ADC_HandleTypeDef * hadc)1809 __weak void HAL_ADC_ConvHalfCpltCallback(ADC_HandleTypeDef* hadc)
1810 {
1811 /* Prevent unused argument(s) compilation warning */
1812 UNUSED(hadc);
1813
1814 /* NOTE : This function should not be modified. When the callback is needed,
1815 function HAL_ADC_ConvHalfCpltCallback must be implemented in the user file.
1816 */
1817 }
1818
1819 /**
1820 * @brief Analog watchdog callback in non blocking mode.
1821 * @param hadc ADC handle
1822 * @retval None
1823 */
HAL_ADC_LevelOutOfWindowCallback(ADC_HandleTypeDef * hadc)1824 __weak void HAL_ADC_LevelOutOfWindowCallback(ADC_HandleTypeDef* hadc)
1825 {
1826 /* Prevent unused argument(s) compilation warning */
1827 UNUSED(hadc);
1828
1829 /* NOTE : This function should not be modified. When the callback is needed,
1830 function HAL_ADC_LevelOoutOfWindowCallback must be implemented in the user file.
1831 */
1832 }
1833
1834 /**
1835 * @brief ADC error callback in non blocking mode
1836 * (ADC conversion with interruption or transfer by DMA)
1837 * @param hadc ADC handle
1838 * @retval None
1839 */
HAL_ADC_ErrorCallback(ADC_HandleTypeDef * hadc)1840 __weak void HAL_ADC_ErrorCallback(ADC_HandleTypeDef *hadc)
1841 {
1842 /* Prevent unused argument(s) compilation warning */
1843 UNUSED(hadc);
1844
1845 /* NOTE : This function should not be modified. When the callback is needed,
1846 function HAL_ADC_ErrorCallback must be implemented in the user file.
1847 */
1848 }
1849
1850
1851 /**
1852 * @}
1853 */
1854
1855 /** @defgroup ADC_Exported_Functions_Group3 Peripheral Control functions
1856 * @brief Peripheral Control functions
1857 *
1858 @verbatim
1859 ===============================================================================
1860 ##### Peripheral Control functions #####
1861 ===============================================================================
1862 [..] This section provides functions allowing to:
1863 (+) Configure channels on regular group
1864 (+) Configure the analog watchdog
1865
1866 @endverbatim
1867 * @{
1868 */
1869
1870 /**
1871 * @brief Configures the the selected channel to be linked to the regular
1872 * group.
1873 * @note In case of usage of internal measurement channels:
1874 * VrefInt/Vbat/TempSensor.
1875 * Sampling time constraints must be respected (sampling time can be
1876 * adjusted in function of ADC clock frequency and sampling time
1877 * setting).
1878 * Refer to device datasheet for timings values, parameters TS_vrefint,
1879 * TS_vbat, TS_temp (values rough order: 5us to 17us).
1880 * These internal paths can be be disabled using function
1881 * HAL_ADC_DeInit().
1882 * @note Possibility to update parameters on the fly:
1883 * This function initializes channel into regular group, following
1884 * calls to this function can be used to reconfigure some parameters
1885 * of structure "ADC_ChannelConfTypeDef" on the fly, without resetting
1886 * the ADC.
1887 * The setting of these parameters is conditioned to ADC state.
1888 * For parameters constraints, see comments of structure
1889 * "ADC_ChannelConfTypeDef".
1890 * @param hadc ADC handle
1891 * @param sConfig Structure of ADC channel for regular group.
1892 * @retval HAL status
1893 */
HAL_ADC_ConfigChannel(ADC_HandleTypeDef * hadc,ADC_ChannelConfTypeDef * sConfig)1894 HAL_StatusTypeDef HAL_ADC_ConfigChannel(ADC_HandleTypeDef* hadc, ADC_ChannelConfTypeDef* sConfig)
1895 {
1896 HAL_StatusTypeDef tmp_hal_status = HAL_OK;
1897 __IO uint32_t wait_loop_index = 0U;
1898
1899 /* Check the parameters */
1900 assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
1901 assert_param(IS_ADC_CHANNEL(sConfig->Channel));
1902 assert_param(IS_ADC_RANK(sConfig->Rank));
1903
1904 if (! IS_ADC_SAMPLE_TIME(hadc->Init.SamplingTimeCommon))
1905 {
1906 assert_param(IS_ADC_SAMPLE_TIME(sConfig->SamplingTime));
1907 }
1908
1909 /* Process locked */
1910 __HAL_LOCK(hadc);
1911
1912 /* Parameters update conditioned to ADC state: */
1913 /* Parameters that can be updated when ADC is disabled or enabled without */
1914 /* conversion on going on regular group: */
1915 /* - Channel number */
1916 /* - Channel sampling time */
1917 /* - Management of internal measurement channels: VrefInt/TempSensor/Vbat */
1918 if (ADC_IS_CONVERSION_ONGOING_REGULAR(hadc) == RESET)
1919 {
1920 /* Configure channel: depending on rank setting, add it or remove it from */
1921 /* ADC conversion sequencer. */
1922 if (sConfig->Rank != ADC_RANK_NONE)
1923 {
1924 /* Regular sequence configuration */
1925 /* Set the channel selection register from the selected channel */
1926 hadc->Instance->CHSELR |= ADC_CHSELR_CHANNEL(sConfig->Channel);
1927
1928 /* Channel sampling time configuration */
1929 /* Management of parameters "SamplingTimeCommon" and "SamplingTime" */
1930 /* (obsolete): sampling time set in this function with */
1931 /* parameter "SamplingTime" (obsolete) only if not already set into */
1932 /* ADC initialization structure with parameter "SamplingTimeCommon". */
1933 if (! IS_ADC_SAMPLE_TIME(hadc->Init.SamplingTimeCommon))
1934 {
1935 /* Modify sampling time if needed (not needed in case of recurrence */
1936 /* for several channels programmed consecutively into the sequencer) */
1937 if (sConfig->SamplingTime != ADC_GET_SAMPLINGTIME(hadc))
1938 {
1939 /* Channel sampling time configuration */
1940 /* Clear the old sample time */
1941 hadc->Instance->SMPR &= ~(ADC_SMPR_SMP);
1942
1943 /* Set the new sample time */
1944 hadc->Instance->SMPR |= ADC_SMPR_SET(sConfig->SamplingTime);
1945 }
1946 }
1947
1948 /* Management of internal measurement channels: VrefInt/TempSensor/Vbat */
1949 /* internal measurement paths enable: If internal channel selected, */
1950 /* enable dedicated internal buffers and path. */
1951 /* Note: these internal measurement paths can be disabled using */
1952 /* HAL_ADC_DeInit() or removing the channel from sequencer with */
1953 /* channel configuration parameter "Rank". */
1954 if(ADC_IS_CHANNEL_INTERNAL(sConfig->Channel))
1955 {
1956 /* If Channel_16 is selected, enable Temp. sensor measurement path. */
1957 /* If Channel_17 is selected, enable VREFINT measurement path. */
1958 /* If Channel_18 is selected, enable VBAT measurement path. */
1959 ADC->CCR |= ADC_CHANNEL_INTERNAL_PATH(sConfig->Channel);
1960
1961 /* If Temp. sensor is selected, wait for stabilization delay */
1962 if (sConfig->Channel == ADC_CHANNEL_TEMPSENSOR)
1963 {
1964 /* Delay for temperature sensor stabilization time */
1965 /* Compute number of CPU cycles to wait for */
1966 wait_loop_index = (ADC_TEMPSENSOR_DELAY_US * (SystemCoreClock / 1000000U));
1967 while(wait_loop_index != 0U)
1968 {
1969 wait_loop_index--;
1970 }
1971 }
1972 }
1973 }
1974 else
1975 {
1976 /* Regular sequence configuration */
1977 /* Reset the channel selection register from the selected channel */
1978 hadc->Instance->CHSELR &= ~ADC_CHSELR_CHANNEL(sConfig->Channel);
1979
1980 /* Management of internal measurement channels: VrefInt/TempSensor/Vbat */
1981 /* internal measurement paths disable: If internal channel selected, */
1982 /* disable dedicated internal buffers and path. */
1983 if(ADC_IS_CHANNEL_INTERNAL(sConfig->Channel))
1984 {
1985 /* If Channel_16 is selected, disable Temp. sensor measurement path. */
1986 /* If Channel_17 is selected, disable VREFINT measurement path. */
1987 /* If Channel_18 is selected, disable VBAT measurement path. */
1988 ADC->CCR &= ~ADC_CHANNEL_INTERNAL_PATH(sConfig->Channel);
1989 }
1990 }
1991
1992 }
1993
1994 /* If a conversion is on going on regular group, no update on regular */
1995 /* channel could be done on neither of the channel configuration structure */
1996 /* parameters. */
1997 else
1998 {
1999 /* Update ADC state machine to error */
2000 SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG);
2001
2002 tmp_hal_status = HAL_ERROR;
2003 }
2004
2005 /* Process unlocked */
2006 __HAL_UNLOCK(hadc);
2007
2008 /* Return function status */
2009 return tmp_hal_status;
2010 }
2011
2012
2013 /**
2014 * @brief Configures the analog watchdog.
2015 * @note Possibility to update parameters on the fly:
2016 * This function initializes the selected analog watchdog, following
2017 * calls to this function can be used to reconfigure some parameters
2018 * of structure "ADC_AnalogWDGConfTypeDef" on the fly, without resetting
2019 * the ADC.
2020 * The setting of these parameters is conditioned to ADC state.
2021 * For parameters constraints, see comments of structure
2022 * "ADC_AnalogWDGConfTypeDef".
2023 * @param hadc ADC handle
2024 * @param AnalogWDGConfig Structure of ADC analog watchdog configuration
2025 * @retval HAL status
2026 */
HAL_ADC_AnalogWDGConfig(ADC_HandleTypeDef * hadc,ADC_AnalogWDGConfTypeDef * AnalogWDGConfig)2027 HAL_StatusTypeDef HAL_ADC_AnalogWDGConfig(ADC_HandleTypeDef* hadc, ADC_AnalogWDGConfTypeDef* AnalogWDGConfig)
2028 {
2029 HAL_StatusTypeDef tmp_hal_status = HAL_OK;
2030
2031 uint32_t tmpAWDHighThresholdShifted;
2032 uint32_t tmpAWDLowThresholdShifted;
2033
2034 /* Check the parameters */
2035 assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
2036 assert_param(IS_ADC_ANALOG_WATCHDOG_MODE(AnalogWDGConfig->WatchdogMode));
2037 assert_param(IS_FUNCTIONAL_STATE(AnalogWDGConfig->ITMode));
2038
2039 /* Verify if threshold is within the selected ADC resolution */
2040 assert_param(IS_ADC_RANGE(ADC_GET_RESOLUTION(hadc), AnalogWDGConfig->HighThreshold));
2041 assert_param(IS_ADC_RANGE(ADC_GET_RESOLUTION(hadc), AnalogWDGConfig->LowThreshold));
2042
2043 if(AnalogWDGConfig->WatchdogMode == ADC_ANALOGWATCHDOG_SINGLE_REG)
2044 {
2045 assert_param(IS_ADC_CHANNEL(AnalogWDGConfig->Channel));
2046 }
2047
2048 /* Process locked */
2049 __HAL_LOCK(hadc);
2050
2051 /* Parameters update conditioned to ADC state: */
2052 /* Parameters that can be updated when ADC is disabled or enabled without */
2053 /* conversion on going on regular group: */
2054 /* - Analog watchdog channels */
2055 /* - Analog watchdog thresholds */
2056 if (ADC_IS_CONVERSION_ONGOING_REGULAR(hadc) == RESET)
2057 {
2058 /* Configuration of analog watchdog: */
2059 /* - Set the analog watchdog enable mode: one or overall group of */
2060 /* channels. */
2061 /* - Set the Analog watchdog channel (is not used if watchdog */
2062 /* mode "all channels": ADC_CFGR_AWD1SGL=0). */
2063 hadc->Instance->CFGR1 &= ~( ADC_CFGR1_AWDSGL |
2064 ADC_CFGR1_AWDEN |
2065 ADC_CFGR1_AWDCH );
2066
2067 hadc->Instance->CFGR1 |= ( AnalogWDGConfig->WatchdogMode |
2068 ADC_CFGR_AWDCH(AnalogWDGConfig->Channel) );
2069
2070 /* Shift the offset in function of the selected ADC resolution: Thresholds*/
2071 /* have to be left-aligned on bit 11, the LSB (right bits) are set to 0 */
2072 tmpAWDHighThresholdShifted = ADC_AWD1THRESHOLD_SHIFT_RESOLUTION(hadc, AnalogWDGConfig->HighThreshold);
2073 tmpAWDLowThresholdShifted = ADC_AWD1THRESHOLD_SHIFT_RESOLUTION(hadc, AnalogWDGConfig->LowThreshold);
2074
2075 /* Set the high and low thresholds */
2076 hadc->Instance->TR &= ~(ADC_TR_HT | ADC_TR_LT);
2077 hadc->Instance->TR |= ( ADC_TRX_HIGHTHRESHOLD (tmpAWDHighThresholdShifted) |
2078 tmpAWDLowThresholdShifted );
2079
2080 /* Clear the ADC Analog watchdog flag (in case of left enabled by */
2081 /* previous ADC operations) to be ready to use for HAL_ADC_IRQHandler() */
2082 /* or HAL_ADC_PollForEvent(). */
2083 __HAL_ADC_CLEAR_FLAG(hadc, ADC_IT_AWD);
2084
2085 /* Configure ADC Analog watchdog interrupt */
2086 if(AnalogWDGConfig->ITMode == ENABLE)
2087 {
2088 /* Enable the ADC Analog watchdog interrupt */
2089 __HAL_ADC_ENABLE_IT(hadc, ADC_IT_AWD);
2090 }
2091 else
2092 {
2093 /* Disable the ADC Analog watchdog interrupt */
2094 __HAL_ADC_DISABLE_IT(hadc, ADC_IT_AWD);
2095 }
2096
2097 }
2098 /* If a conversion is on going on regular group, no update could be done */
2099 /* on neither of the AWD configuration structure parameters. */
2100 else
2101 {
2102 /* Update ADC state machine to error */
2103 SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG);
2104
2105 tmp_hal_status = HAL_ERROR;
2106 }
2107
2108
2109 /* Process unlocked */
2110 __HAL_UNLOCK(hadc);
2111
2112 /* Return function status */
2113 return tmp_hal_status;
2114 }
2115
2116
2117 /**
2118 * @}
2119 */
2120
2121
2122 /** @defgroup ADC_Exported_Functions_Group4 Peripheral State functions
2123 * @brief Peripheral State functions
2124 *
2125 @verbatim
2126 ===============================================================================
2127 ##### Peripheral State and Errors functions #####
2128 ===============================================================================
2129 [..]
2130 This subsection provides functions to get in run-time the status of the
2131 peripheral.
2132 (+) Check the ADC state
2133 (+) Check the ADC error code
2134
2135 @endverbatim
2136 * @{
2137 */
2138
2139 /**
2140 * @brief Return the ADC state
2141 * @note ADC state machine is managed by bitfields, ADC status must be
2142 * compared with states bits.
2143 * For example:
2144 * " if (HAL_IS_BIT_SET(HAL_ADC_GetState(hadc1), HAL_ADC_STATE_REG_BUSY)) "
2145 * " if (HAL_IS_BIT_SET(HAL_ADC_GetState(hadc1), HAL_ADC_STATE_AWD1) ) "
2146 * @param hadc ADC handle
2147 * @retval HAL state
2148 */
HAL_ADC_GetState(ADC_HandleTypeDef * hadc)2149 uint32_t HAL_ADC_GetState(ADC_HandleTypeDef* hadc)
2150 {
2151 /* Check the parameters */
2152 assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
2153
2154 /* Return ADC state */
2155 return hadc->State;
2156 }
2157
2158 /**
2159 * @brief Return the ADC error code
2160 * @param hadc ADC handle
2161 * @retval ADC Error Code
2162 */
HAL_ADC_GetError(ADC_HandleTypeDef * hadc)2163 uint32_t HAL_ADC_GetError(ADC_HandleTypeDef *hadc)
2164 {
2165 return hadc->ErrorCode;
2166 }
2167
2168 /**
2169 * @}
2170 */
2171
2172 /**
2173 * @}
2174 */
2175
2176 /** @defgroup ADC_Private_Functions ADC Private Functions
2177 * @{
2178 */
2179
2180 /**
2181 * @brief Enable the selected ADC.
2182 * @note Prerequisite condition to use this function: ADC must be disabled
2183 * and voltage regulator must be enabled (done into HAL_ADC_Init()).
2184 * @note If low power mode AutoPowerOff is enabled, power-on/off phases are
2185 * performed automatically by hardware.
2186 * In this mode, this function is useless and must not be called because
2187 * flag ADC_FLAG_RDY is not usable.
2188 * Therefore, this function must be called under condition of
2189 * "if (hadc->Init.LowPowerAutoPowerOff != ENABLE)".
2190 * @param hadc ADC handle
2191 * @retval HAL status.
2192 */
ADC_Enable(ADC_HandleTypeDef * hadc)2193 static HAL_StatusTypeDef ADC_Enable(ADC_HandleTypeDef* hadc)
2194 {
2195 uint32_t tickstart = 0U;
2196 __IO uint32_t wait_loop_index = 0U;
2197
2198 /* ADC enable and wait for ADC ready (in case of ADC is disabled or */
2199 /* enabling phase not yet completed: flag ADC ready not yet set). */
2200 /* Timeout implemented to not be stuck if ADC cannot be enabled (possible */
2201 /* causes: ADC clock not running, ...). */
2202 if (ADC_IS_ENABLE(hadc) == RESET)
2203 {
2204 /* Check if conditions to enable the ADC are fulfilled */
2205 if (ADC_ENABLING_CONDITIONS(hadc) == RESET)
2206 {
2207 /* Update ADC state machine to error */
2208 SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL);
2209
2210 /* Set ADC error code to ADC IP internal error */
2211 SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL);
2212
2213 return HAL_ERROR;
2214 }
2215
2216 /* Enable the ADC peripheral */
2217 __HAL_ADC_ENABLE(hadc);
2218
2219 /* Delay for ADC stabilization time */
2220 /* Compute number of CPU cycles to wait for */
2221 wait_loop_index = (ADC_STAB_DELAY_US * (SystemCoreClock / 1000000U));
2222 while(wait_loop_index != 0U)
2223 {
2224 wait_loop_index--;
2225 }
2226
2227 /* Get tick count */
2228 tickstart = HAL_GetTick();
2229
2230 /* Wait for ADC effectively enabled */
2231 while(__HAL_ADC_GET_FLAG(hadc, ADC_FLAG_RDY) == RESET)
2232 {
2233 if((HAL_GetTick() - tickstart) > ADC_ENABLE_TIMEOUT)
2234 {
2235 /* New check to avoid false timeout detection in case of preemption */
2236 if(__HAL_ADC_GET_FLAG(hadc, ADC_FLAG_RDY) == RESET)
2237 {
2238 /* Update ADC state machine to error */
2239 SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL);
2240
2241 /* Set ADC error code to ADC IP internal error */
2242 SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL);
2243
2244 return HAL_ERROR;
2245 }
2246 }
2247 }
2248 }
2249
2250 /* Return HAL status */
2251 return HAL_OK;
2252 }
2253
2254 /**
2255 * @brief Disable the selected ADC.
2256 * @note Prerequisite condition to use this function: ADC conversions must be
2257 * stopped.
2258 * @param hadc ADC handle
2259 * @retval HAL status.
2260 */
ADC_Disable(ADC_HandleTypeDef * hadc)2261 static HAL_StatusTypeDef ADC_Disable(ADC_HandleTypeDef* hadc)
2262 {
2263 uint32_t tickstart = 0U;
2264
2265 /* Verification if ADC is not already disabled: */
2266 /* Note: forbidden to disable ADC (set bit ADC_CR_ADDIS) if ADC is already */
2267 /* disabled. */
2268 if (ADC_IS_ENABLE(hadc) != RESET)
2269 {
2270 /* Check if conditions to disable the ADC are fulfilled */
2271 if (ADC_DISABLING_CONDITIONS(hadc) != RESET)
2272 {
2273 /* Disable the ADC peripheral */
2274 __HAL_ADC_DISABLE(hadc);
2275 }
2276 else
2277 {
2278 /* Update ADC state machine to error */
2279 SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL);
2280
2281 /* Set ADC error code to ADC IP internal error */
2282 SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL);
2283
2284 return HAL_ERROR;
2285 }
2286
2287 /* Wait for ADC effectively disabled */
2288 /* Get tick count */
2289 tickstart = HAL_GetTick();
2290
2291 while(HAL_IS_BIT_SET(hadc->Instance->CR, ADC_CR_ADEN))
2292 {
2293 if((HAL_GetTick() - tickstart) > ADC_DISABLE_TIMEOUT)
2294 {
2295 /* New check to avoid false timeout detection in case of preemption */
2296 if(HAL_IS_BIT_SET(hadc->Instance->CR, ADC_CR_ADEN))
2297 {
2298 /* Update ADC state machine to error */
2299 SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL);
2300
2301 /* Set ADC error code to ADC IP internal error */
2302 SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL);
2303
2304 return HAL_ERROR;
2305 }
2306 }
2307 }
2308 }
2309
2310 /* Return HAL status */
2311 return HAL_OK;
2312 }
2313
2314
2315 /**
2316 * @brief Stop ADC conversion.
2317 * @note Prerequisite condition to use this function: ADC conversions must be
2318 * stopped to disable the ADC.
2319 * @param hadc ADC handle
2320 * @retval HAL status.
2321 */
ADC_ConversionStop(ADC_HandleTypeDef * hadc)2322 static HAL_StatusTypeDef ADC_ConversionStop(ADC_HandleTypeDef* hadc)
2323 {
2324 uint32_t tickstart = 0U;
2325
2326 /* Check the parameters */
2327 assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
2328
2329 /* Verification if ADC is not already stopped on regular group to bypass */
2330 /* this function if not needed. */
2331 if (ADC_IS_CONVERSION_ONGOING_REGULAR(hadc))
2332 {
2333
2334 /* Stop potential conversion on going on regular group */
2335 /* Software is allowed to set ADSTP only when ADSTART=1 and ADDIS=0 */
2336 if (HAL_IS_BIT_SET(hadc->Instance->CR, ADC_CR_ADSTART) &&
2337 HAL_IS_BIT_CLR(hadc->Instance->CR, ADC_CR_ADDIS) )
2338 {
2339 /* Stop conversions on regular group */
2340 hadc->Instance->CR |= ADC_CR_ADSTP;
2341 }
2342
2343 /* Wait for conversion effectively stopped */
2344 /* Get tick count */
2345 tickstart = HAL_GetTick();
2346
2347 while((hadc->Instance->CR & ADC_CR_ADSTART) != RESET)
2348 {
2349 if((HAL_GetTick() - tickstart) > ADC_STOP_CONVERSION_TIMEOUT)
2350 {
2351 /* New check to avoid false timeout detection in case of preemption */
2352 if((hadc->Instance->CR & ADC_CR_ADSTART) != RESET)
2353 {
2354 /* Update ADC state machine to error */
2355 SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL);
2356
2357 /* Set ADC error code to ADC IP internal error */
2358 SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL);
2359
2360 return HAL_ERROR;
2361 }
2362 }
2363 }
2364 }
2365
2366 /* Return HAL status */
2367 return HAL_OK;
2368 }
2369
2370
2371 /**
2372 * @brief DMA transfer complete callback.
2373 * @param hdma pointer to DMA handle.
2374 * @retval None
2375 */
ADC_DMAConvCplt(DMA_HandleTypeDef * hdma)2376 static void ADC_DMAConvCplt(DMA_HandleTypeDef *hdma)
2377 {
2378 /* Retrieve ADC handle corresponding to current DMA handle */
2379 ADC_HandleTypeDef* hadc = ( ADC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
2380
2381 /* Update state machine on conversion status if not in error state */
2382 if (HAL_IS_BIT_CLR(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL | HAL_ADC_STATE_ERROR_DMA))
2383 {
2384 /* Set ADC state */
2385 SET_BIT(hadc->State, HAL_ADC_STATE_REG_EOC);
2386
2387 /* Determine whether any further conversion upcoming on group regular */
2388 /* by external trigger, continuous mode or scan sequence on going. */
2389 if(ADC_IS_SOFTWARE_START_REGULAR(hadc) &&
2390 (hadc->Init.ContinuousConvMode == DISABLE) )
2391 {
2392 /* If End of Sequence is reached, disable interrupts */
2393 if( __HAL_ADC_GET_FLAG(hadc, ADC_FLAG_EOS) )
2394 {
2395 /* Allowed to modify bits ADC_IT_EOC/ADC_IT_EOS only if bit */
2396 /* ADSTART==0 (no conversion on going) */
2397 if (ADC_IS_CONVERSION_ONGOING_REGULAR(hadc) == RESET)
2398 {
2399 /* Disable ADC end of single conversion interrupt on group regular */
2400 /* Note: Overrun interrupt was enabled with EOC interrupt in */
2401 /* HAL_Start_IT(), but is not disabled here because can be used */
2402 /* by overrun IRQ process below. */
2403 __HAL_ADC_DISABLE_IT(hadc, ADC_IT_EOC | ADC_IT_EOS);
2404
2405 /* Set ADC state */
2406 ADC_STATE_CLR_SET(hadc->State,
2407 HAL_ADC_STATE_REG_BUSY,
2408 HAL_ADC_STATE_READY);
2409 }
2410 else
2411 {
2412 /* Change ADC state to error state */
2413 SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG);
2414
2415 /* Set ADC error code to ADC IP internal error */
2416 SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL);
2417 }
2418 }
2419 }
2420
2421 /* Conversion complete callback */
2422 #if (USE_HAL_ADC_REGISTER_CALLBACKS == 1)
2423 hadc->ConvCpltCallback(hadc);
2424 #else
2425 HAL_ADC_ConvCpltCallback(hadc);
2426 #endif /* USE_HAL_ADC_REGISTER_CALLBACKS */
2427 }
2428 else
2429 {
2430 /* Call DMA error callback */
2431 hadc->DMA_Handle->XferErrorCallback(hdma);
2432 }
2433
2434 }
2435
2436 /**
2437 * @brief DMA half transfer complete callback.
2438 * @param hdma pointer to DMA handle.
2439 * @retval None
2440 */
ADC_DMAHalfConvCplt(DMA_HandleTypeDef * hdma)2441 static void ADC_DMAHalfConvCplt(DMA_HandleTypeDef *hdma)
2442 {
2443 /* Retrieve ADC handle corresponding to current DMA handle */
2444 ADC_HandleTypeDef* hadc = ( ADC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
2445
2446 /* Half conversion callback */
2447 #if (USE_HAL_ADC_REGISTER_CALLBACKS == 1)
2448 hadc->ConvHalfCpltCallback(hadc);
2449 #else
2450 HAL_ADC_ConvHalfCpltCallback(hadc);
2451 #endif /* USE_HAL_ADC_REGISTER_CALLBACKS */
2452 }
2453
2454 /**
2455 * @brief DMA error callback
2456 * @param hdma pointer to DMA handle.
2457 * @retval None
2458 */
ADC_DMAError(DMA_HandleTypeDef * hdma)2459 static void ADC_DMAError(DMA_HandleTypeDef *hdma)
2460 {
2461 /* Retrieve ADC handle corresponding to current DMA handle */
2462 ADC_HandleTypeDef* hadc = ( ADC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
2463
2464 /* Set ADC state */
2465 SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_DMA);
2466
2467 /* Set ADC error code to DMA error */
2468 SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_DMA);
2469
2470 /* Error callback */
2471 #if (USE_HAL_ADC_REGISTER_CALLBACKS == 1)
2472 hadc->ErrorCallback(hadc);
2473 #else
2474 HAL_ADC_ErrorCallback(hadc);
2475 #endif /* USE_HAL_ADC_REGISTER_CALLBACKS */
2476 }
2477
2478 /**
2479 * @}
2480 */
2481
2482 #endif /* HAL_ADC_MODULE_ENABLED */
2483 /**
2484 * @}
2485 */
2486
2487 /**
2488 * @}
2489 */
2490
2491
