1 /**
2 ******************************************************************************
3 * @file stm32f0xx_ll_utils.h
4 * @author MCD Application Team
5 * @brief Header file of UTILS LL module.
6 ******************************************************************************
7 * @attention
8 *
9 * Copyright (c) 2016 STMicroelectronics.
10 * All rights reserved.
11 *
12 * This software is licensed under terms that can be found in the LICENSE file
13 * in the root directory of this software component.
14 * If no LICENSE file comes with this software, it is provided AS-IS.
15 *
16 ******************************************************************************
17 @verbatim
18 ==============================================================================
19 ##### How to use this driver #####
20 ==============================================================================
21 [..]
22 The LL UTILS driver contains a set of generic APIs that can be
23 used by user:
24 (+) Device electronic signature
25 (+) Timing functions
26 (+) PLL configuration functions
27
28 @endverbatim
29 ******************************************************************************
30 */
31
32 /* Define to prevent recursive inclusion -------------------------------------*/
33 #ifndef __STM32F0xx_LL_UTILS_H
34 #define __STM32F0xx_LL_UTILS_H
35
36 #ifdef __cplusplus
37 extern "C" {
38 #endif
39
40 /* Includes ------------------------------------------------------------------*/
41 #include "stm32f0xx.h"
42
43 /** @addtogroup STM32F0xx_LL_Driver
44 * @{
45 */
46
47 /** @defgroup UTILS_LL UTILS
48 * @{
49 */
50
51 /* Private types -------------------------------------------------------------*/
52 /* Private variables ---------------------------------------------------------*/
53
54 /* Private constants ---------------------------------------------------------*/
55 /** @defgroup UTILS_LL_Private_Constants UTILS Private Constants
56 * @{
57 */
58
59 /* Max delay can be used in LL_mDelay */
60 #define LL_MAX_DELAY 0xFFFFFFFFU
61
62 /**
63 * @brief Unique device ID register base address
64 */
65 #define UID_BASE_ADDRESS UID_BASE
66
67 /**
68 * @brief Flash size data register base address
69 */
70 #define FLASHSIZE_BASE_ADDRESS FLASHSIZE_BASE
71
72 /**
73 * @}
74 */
75
76 /* Private macros ------------------------------------------------------------*/
77 /** @defgroup UTILS_LL_Private_Macros UTILS Private Macros
78 * @{
79 */
80 /**
81 * @}
82 */
83 /* Exported types ------------------------------------------------------------*/
84 /** @defgroup UTILS_LL_ES_INIT UTILS Exported structures
85 * @{
86 */
87 /**
88 * @brief UTILS PLL structure definition
89 */
90 typedef struct
91 {
92 uint32_t PLLMul; /*!< Multiplication factor for PLL VCO input clock.
93 This parameter can be a value of @ref RCC_LL_EC_PLL_MUL
94
95 This feature can be modified afterwards using unitary function
96 @ref LL_RCC_PLL_ConfigDomain_SYS(). */
97
98 #if defined(RCC_PLLSRC_PREDIV1_SUPPORT)
99 uint32_t PLLDiv; /*!< Division factor for PLL VCO output clock.
100 This parameter can be a value of @ref RCC_LL_EC_PREDIV_DIV
101
102 This feature can be modified afterwards using unitary function
103 @ref LL_RCC_PLL_ConfigDomain_SYS(). */
104 #else
105 uint32_t Prediv; /*!< Division factor for HSE used as PLL clock source.
106 This parameter can be a value of @ref RCC_LL_EC_PREDIV_DIV
107
108 This feature can be modified afterwards using unitary function
109 @ref LL_RCC_PLL_ConfigDomain_SYS(). */
110 #endif /* RCC_PLLSRC_PREDIV1_SUPPORT */
111 } LL_UTILS_PLLInitTypeDef;
112
113 /**
114 * @brief UTILS System, AHB and APB buses clock configuration structure definition
115 */
116 typedef struct
117 {
118 uint32_t AHBCLKDivider; /*!< The AHB clock (HCLK) divider. This clock is derived from the system clock (SYSCLK).
119 This parameter can be a value of @ref RCC_LL_EC_SYSCLK_DIV
120
121 This feature can be modified afterwards using unitary function
122 @ref LL_RCC_SetAHBPrescaler(). */
123
124 uint32_t APB1CLKDivider; /*!< The APB1 clock (PCLK1) divider. This clock is derived from the AHB clock (HCLK).
125 This parameter can be a value of @ref RCC_LL_EC_APB1_DIV
126
127 This feature can be modified afterwards using unitary function
128 @ref LL_RCC_SetAPB1Prescaler(). */
129 } LL_UTILS_ClkInitTypeDef;
130
131 /**
132 * @}
133 */
134
135 /* Exported constants --------------------------------------------------------*/
136 /** @defgroup UTILS_LL_Exported_Constants UTILS Exported Constants
137 * @{
138 */
139
140 /** @defgroup UTILS_EC_HSE_BYPASS HSE Bypass activation
141 * @{
142 */
143 #define LL_UTILS_HSEBYPASS_OFF 0x00000000U /*!< HSE Bypass is not enabled */
144 #define LL_UTILS_HSEBYPASS_ON 0x00000001U /*!< HSE Bypass is enabled */
145 /**
146 * @}
147 */
148
149 /**
150 * @}
151 */
152
153 /* Exported macro ------------------------------------------------------------*/
154
155 /* Exported functions --------------------------------------------------------*/
156 /** @defgroup UTILS_LL_Exported_Functions UTILS Exported Functions
157 * @{
158 */
159
160 /** @defgroup UTILS_EF_DEVICE_ELECTRONIC_SIGNATURE DEVICE ELECTRONIC SIGNATURE
161 * @{
162 */
163
164 /**
165 * @brief Get Word0 of the unique device identifier (UID based on 96 bits)
166 * @retval UID[31:0]: X and Y coordinates on the wafer expressed in BCD format
167 */
LL_GetUID_Word0(void)168 __STATIC_INLINE uint32_t LL_GetUID_Word0(void)
169 {
170 return (uint32_t)(READ_REG(*((uint32_t *)UID_BASE_ADDRESS)));
171 }
172
173 /**
174 * @brief Get Word1 of the unique device identifier (UID based on 96 bits)
175 * @retval UID[63:32]: Wafer number (UID[39:32]) & LOT_NUM[23:0] (UID[63:40])
176 */
LL_GetUID_Word1(void)177 __STATIC_INLINE uint32_t LL_GetUID_Word1(void)
178 {
179 return (uint32_t)(READ_REG(*((uint32_t *)(UID_BASE_ADDRESS + 4U))));
180 }
181
182 /**
183 * @brief Get Word2 of the unique device identifier (UID based on 96 bits)
184 * @retval UID[95:64]: Lot number (ASCII encoded) - LOT_NUM[55:24]
185 */
LL_GetUID_Word2(void)186 __STATIC_INLINE uint32_t LL_GetUID_Word2(void)
187 {
188 return (uint32_t)(READ_REG(*((uint32_t *)(UID_BASE_ADDRESS + 8U))));
189 }
190
191 /**
192 * @brief Get Flash memory size
193 * @note This bitfield indicates the size of the device Flash memory expressed in
194 * Kbytes. As an example, 0x040 corresponds to 64 Kbytes.
195 * @retval FLASH_SIZE[15:0]: Flash memory size
196 */
LL_GetFlashSize(void)197 __STATIC_INLINE uint32_t LL_GetFlashSize(void)
198 {
199 return (uint16_t)(READ_REG(*((uint32_t *)FLASHSIZE_BASE_ADDRESS)));
200 }
201
202
203 /**
204 * @}
205 */
206
207 /** @defgroup UTILS_LL_EF_DELAY DELAY
208 * @{
209 */
210
211 /**
212 * @brief This function configures the Cortex-M SysTick source of the time base.
213 * @param HCLKFrequency HCLK frequency in Hz (can be calculated thanks to RCC helper macro)
214 * @note When a RTOS is used, it is recommended to avoid changing the SysTick
215 * configuration by calling this function, for a delay use rather osDelay RTOS service.
216 * @param Ticks Number of ticks
217 * @retval None
218 */
LL_InitTick(uint32_t HCLKFrequency,uint32_t Ticks)219 __STATIC_INLINE void LL_InitTick(uint32_t HCLKFrequency, uint32_t Ticks)
220 {
221 /* Configure the SysTick to have interrupt in 1ms time base */
222 SysTick->LOAD = (uint32_t)((HCLKFrequency / Ticks) - 1UL); /* set reload register */
223 SysTick->VAL = 0UL; /* Load the SysTick Counter Value */
224 SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk |
225 SysTick_CTRL_ENABLE_Msk; /* Enable the Systick Timer */
226 }
227
228 void LL_Init1msTick(uint32_t HCLKFrequency);
229 void LL_mDelay(uint32_t Delay);
230
231 /**
232 * @}
233 */
234
235 /** @defgroup UTILS_EF_SYSTEM SYSTEM
236 * @{
237 */
238
239 void LL_SetSystemCoreClock(uint32_t HCLKFrequency);
240 #if defined(FLASH_ACR_LATENCY)
241 ErrorStatus LL_SetFlashLatency(uint32_t Frequency);
242 #endif /* FLASH_ACR_LATENCY */
243 ErrorStatus LL_PLL_ConfigSystemClock_HSI(LL_UTILS_PLLInitTypeDef *UTILS_PLLInitStruct,
244 LL_UTILS_ClkInitTypeDef *UTILS_ClkInitStruct);
245 #if defined(RCC_CFGR_SW_HSI48)
246 ErrorStatus LL_PLL_ConfigSystemClock_HSI48(LL_UTILS_PLLInitTypeDef *UTILS_PLLInitStruct,
247 LL_UTILS_ClkInitTypeDef *UTILS_ClkInitStruct);
248 #endif /*RCC_CFGR_SW_HSI48*/
249 ErrorStatus LL_PLL_ConfigSystemClock_HSE(uint32_t HSEFrequency, uint32_t HSEBypass,
250 LL_UTILS_PLLInitTypeDef *UTILS_PLLInitStruct, LL_UTILS_ClkInitTypeDef *UTILS_ClkInitStruct);
251 ErrorStatus LL_SetFlashLatency(uint32_t Frequency);
252
253 /**
254 * @}
255 */
256
257 /**
258 * @}
259 */
260
261 /**
262 * @}
263 */
264
265 /**
266 * @}
267 */
268
269 #ifdef __cplusplus
270 }
271 #endif
272
273 #endif /* __STM32F0xx_LL_UTILS_H */
274