1 /**
2 ******************************************************************************
3 * @file stm32c0xx_ll_usart.c
4 * @author MCD Application Team
5 * @brief USART LL module driver.
6 ******************************************************************************
7 * @attention
8 *
9 * Copyright (c) 2022 STMicroelectronics.
10 * All rights reserved.
11 *
12 * This software is licensed under terms that can be found in the LICENSE file
13 * in the root directory of this software component.
14 * If no LICENSE file comes with this software, it is provided AS-IS.
15 *
16 ******************************************************************************
17 */
18 #if defined(USE_FULL_LL_DRIVER)
19
20 /* Includes ------------------------------------------------------------------*/
21 #include "stm32c0xx_ll_usart.h"
22 #include "stm32c0xx_ll_rcc.h"
23 #include "stm32c0xx_ll_bus.h"
24 #ifdef USE_FULL_ASSERT
25 #include "stm32_assert.h"
26 #else
27 #define assert_param(expr) ((void)0U)
28 #endif /* USE_FULL_ASSERT */
29
30 /** @addtogroup STM32C0xx_LL_Driver
31 * @{
32 */
33
34 #if defined(USART1) || defined(USART2)
35
36 /** @addtogroup USART_LL
37 * @{
38 */
39
40 /* Private types -------------------------------------------------------------*/
41 /* Private variables ---------------------------------------------------------*/
42 /* Private constants ---------------------------------------------------------*/
43 /** @addtogroup USART_LL_Private_Constants
44 * @{
45 */
46
47 /* Definition of default baudrate value used for USART initialisation */
48 #define USART_DEFAULT_BAUDRATE (9600U)
49
50 /**
51 * @}
52 */
53
54 /* Private macros ------------------------------------------------------------*/
55 /** @addtogroup USART_LL_Private_Macros
56 * @{
57 */
58
59 #define IS_LL_USART_PRESCALER(__VALUE__) (((__VALUE__) == LL_USART_PRESCALER_DIV1) \
60 || ((__VALUE__) == LL_USART_PRESCALER_DIV2) \
61 || ((__VALUE__) == LL_USART_PRESCALER_DIV4) \
62 || ((__VALUE__) == LL_USART_PRESCALER_DIV6) \
63 || ((__VALUE__) == LL_USART_PRESCALER_DIV8) \
64 || ((__VALUE__) == LL_USART_PRESCALER_DIV10) \
65 || ((__VALUE__) == LL_USART_PRESCALER_DIV12) \
66 || ((__VALUE__) == LL_USART_PRESCALER_DIV16) \
67 || ((__VALUE__) == LL_USART_PRESCALER_DIV32) \
68 || ((__VALUE__) == LL_USART_PRESCALER_DIV64) \
69 || ((__VALUE__) == LL_USART_PRESCALER_DIV128) \
70 || ((__VALUE__) == LL_USART_PRESCALER_DIV256))
71
72 /* __BAUDRATE__ The maximum Baud Rate is derived from the maximum clock available
73 * divided by the smallest oversampling used on the USART (i.e. 8) */
74 #define IS_LL_USART_BAUDRATE(__BAUDRATE__) ((__BAUDRATE__) <= 8000000U)
75
76 /* __VALUE__ In case of oversampling by 16 and 8, BRR content must be greater than or equal to 16d. */
77 #define IS_LL_USART_BRR_MIN(__VALUE__) ((__VALUE__) >= 16U)
78
79 #define IS_LL_USART_DIRECTION(__VALUE__) (((__VALUE__) == LL_USART_DIRECTION_NONE) \
80 || ((__VALUE__) == LL_USART_DIRECTION_RX) \
81 || ((__VALUE__) == LL_USART_DIRECTION_TX) \
82 || ((__VALUE__) == LL_USART_DIRECTION_TX_RX))
83
84 #define IS_LL_USART_PARITY(__VALUE__) (((__VALUE__) == LL_USART_PARITY_NONE) \
85 || ((__VALUE__) == LL_USART_PARITY_EVEN) \
86 || ((__VALUE__) == LL_USART_PARITY_ODD))
87
88 #define IS_LL_USART_DATAWIDTH(__VALUE__) (((__VALUE__) == LL_USART_DATAWIDTH_7B) \
89 || ((__VALUE__) == LL_USART_DATAWIDTH_8B) \
90 || ((__VALUE__) == LL_USART_DATAWIDTH_9B))
91
92 #define IS_LL_USART_OVERSAMPLING(__VALUE__) (((__VALUE__) == LL_USART_OVERSAMPLING_16) \
93 || ((__VALUE__) == LL_USART_OVERSAMPLING_8))
94
95 #define IS_LL_USART_LASTBITCLKOUTPUT(__VALUE__) (((__VALUE__) == LL_USART_LASTCLKPULSE_NO_OUTPUT) \
96 || ((__VALUE__) == LL_USART_LASTCLKPULSE_OUTPUT))
97
98 #define IS_LL_USART_CLOCKPHASE(__VALUE__) (((__VALUE__) == LL_USART_PHASE_1EDGE) \
99 || ((__VALUE__) == LL_USART_PHASE_2EDGE))
100
101 #define IS_LL_USART_CLOCKPOLARITY(__VALUE__) (((__VALUE__) == LL_USART_POLARITY_LOW) \
102 || ((__VALUE__) == LL_USART_POLARITY_HIGH))
103
104 #define IS_LL_USART_CLOCKOUTPUT(__VALUE__) (((__VALUE__) == LL_USART_CLOCK_DISABLE) \
105 || ((__VALUE__) == LL_USART_CLOCK_ENABLE))
106
107 #define IS_LL_USART_STOPBITS(__VALUE__) (((__VALUE__) == LL_USART_STOPBITS_0_5) \
108 || ((__VALUE__) == LL_USART_STOPBITS_1) \
109 || ((__VALUE__) == LL_USART_STOPBITS_1_5) \
110 || ((__VALUE__) == LL_USART_STOPBITS_2))
111
112 #define IS_LL_USART_HWCONTROL(__VALUE__) (((__VALUE__) == LL_USART_HWCONTROL_NONE) \
113 || ((__VALUE__) == LL_USART_HWCONTROL_RTS) \
114 || ((__VALUE__) == LL_USART_HWCONTROL_CTS) \
115 || ((__VALUE__) == LL_USART_HWCONTROL_RTS_CTS))
116
117 /**
118 * @}
119 */
120
121 /* Private function prototypes -----------------------------------------------*/
122
123 /* Exported functions --------------------------------------------------------*/
124 /** @addtogroup USART_LL_Exported_Functions
125 * @{
126 */
127
128 /** @addtogroup USART_LL_EF_Init
129 * @{
130 */
131
132 /**
133 * @brief De-initialize USART registers (Registers restored to their default values).
134 * @param USARTx USART Instance
135 * @retval An ErrorStatus enumeration value:
136 * - SUCCESS: USART registers are de-initialized
137 * - ERROR: USART registers are not de-initialized
138 */
LL_USART_DeInit(const USART_TypeDef * USARTx)139 ErrorStatus LL_USART_DeInit(const USART_TypeDef *USARTx)
140 {
141 ErrorStatus status = SUCCESS;
142
143 /* Check the parameters */
144 assert_param(IS_UART_INSTANCE(USARTx));
145
146 if (USARTx == USART1)
147 {
148 /* Force reset of USART clock */
149 LL_APB2_GRP1_ForceReset(LL_APB2_GRP1_PERIPH_USART1);
150
151 /* Release reset of USART clock */
152 LL_APB2_GRP1_ReleaseReset(LL_APB2_GRP1_PERIPH_USART1);
153 }
154 else if (USARTx == USART2)
155 {
156 /* Force reset of USART clock */
157 LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_USART2);
158
159 /* Release reset of USART clock */
160 LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_USART2);
161 }
162 else
163 {
164 status = ERROR;
165 }
166
167 return (status);
168 }
169
170 /**
171 * @brief Initialize USART registers according to the specified
172 * parameters in USART_InitStruct.
173 * @note As some bits in USART configuration registers can only be written when
174 * the USART is disabled (USART_CR1_UE bit =0), USART Peripheral should be in disabled state prior calling
175 * this function. Otherwise, ERROR result will be returned.
176 * @note Baud rate value stored in USART_InitStruct BaudRate field, should be valid (different from 0).
177 * @param USARTx USART Instance
178 * @param USART_InitStruct pointer to a LL_USART_InitTypeDef structure
179 * that contains the configuration information for the specified USART peripheral.
180 * @retval An ErrorStatus enumeration value:
181 * - SUCCESS: USART registers are initialized according to USART_InitStruct content
182 * - ERROR: Problem occurred during USART Registers initialization
183 */
LL_USART_Init(USART_TypeDef * USARTx,const LL_USART_InitTypeDef * USART_InitStruct)184 ErrorStatus LL_USART_Init(USART_TypeDef *USARTx, const LL_USART_InitTypeDef *USART_InitStruct)
185 {
186 ErrorStatus status = ERROR;
187 uint32_t periphclk = LL_RCC_PERIPH_FREQUENCY_NO;
188 LL_RCC_ClocksTypeDef RCC_Clocks;
189
190 /* Check the parameters */
191 assert_param(IS_UART_INSTANCE(USARTx));
192 assert_param(IS_LL_USART_PRESCALER(USART_InitStruct->PrescalerValue));
193 assert_param(IS_LL_USART_BAUDRATE(USART_InitStruct->BaudRate));
194 assert_param(IS_LL_USART_DATAWIDTH(USART_InitStruct->DataWidth));
195 assert_param(IS_LL_USART_STOPBITS(USART_InitStruct->StopBits));
196 assert_param(IS_LL_USART_PARITY(USART_InitStruct->Parity));
197 assert_param(IS_LL_USART_DIRECTION(USART_InitStruct->TransferDirection));
198 assert_param(IS_LL_USART_HWCONTROL(USART_InitStruct->HardwareFlowControl));
199 assert_param(IS_LL_USART_OVERSAMPLING(USART_InitStruct->OverSampling));
200
201 /* USART needs to be in disabled state, in order to be able to configure some bits in
202 CRx registers */
203 if (LL_USART_IsEnabled(USARTx) == 0U)
204 {
205 /*---------------------------- USART CR1 Configuration ---------------------
206 * Configure USARTx CR1 (USART Word Length, Parity, Mode and Oversampling bits) with parameters:
207 * - DataWidth: USART_CR1_M bits according to USART_InitStruct->DataWidth value
208 * - Parity: USART_CR1_PCE, USART_CR1_PS bits according to USART_InitStruct->Parity value
209 * - TransferDirection: USART_CR1_TE, USART_CR1_RE bits according to USART_InitStruct->TransferDirection value
210 * - Oversampling: USART_CR1_OVER8 bit according to USART_InitStruct->OverSampling value.
211 */
212 MODIFY_REG(USARTx->CR1,
213 (USART_CR1_M | USART_CR1_PCE | USART_CR1_PS |
214 USART_CR1_TE | USART_CR1_RE | USART_CR1_OVER8),
215 (USART_InitStruct->DataWidth | USART_InitStruct->Parity |
216 USART_InitStruct->TransferDirection | USART_InitStruct->OverSampling));
217
218 /*---------------------------- USART CR2 Configuration ---------------------
219 * Configure USARTx CR2 (Stop bits) with parameters:
220 * - Stop Bits: USART_CR2_STOP bits according to USART_InitStruct->StopBits value.
221 * - CLKEN, CPOL, CPHA and LBCL bits are to be configured using LL_USART_ClockInit().
222 */
223 LL_USART_SetStopBitsLength(USARTx, USART_InitStruct->StopBits);
224
225 /*---------------------------- USART CR3 Configuration ---------------------
226 * Configure USARTx CR3 (Hardware Flow Control) with parameters:
227 * - HardwareFlowControl: USART_CR3_RTSE, USART_CR3_CTSE bits according to
228 * USART_InitStruct->HardwareFlowControl value.
229 */
230 LL_USART_SetHWFlowCtrl(USARTx, USART_InitStruct->HardwareFlowControl);
231
232 /*---------------------------- USART BRR Configuration ---------------------
233 * Retrieve Clock frequency used for USART Peripheral
234 */
235 if (USARTx == USART1)
236 {
237 periphclk = LL_RCC_GetUSARTClockFreq(LL_RCC_USART1_CLKSOURCE);
238 }
239 else if (USARTx == USART2)
240 {
241 /* USART2 clock is PCLK */
242 LL_RCC_GetSystemClocksFreq(&RCC_Clocks);
243 periphclk = RCC_Clocks.PCLK1_Frequency;
244 }
245 else
246 {
247 /* Nothing to do, as error code is already assigned to ERROR value */
248 }
249
250 /* Configure the USART Baud Rate :
251 - prescaler value is required
252 - valid baud rate value (different from 0) is required
253 - Peripheral clock as returned by RCC service, should be valid (different from 0).
254 */
255 if ((periphclk != LL_RCC_PERIPH_FREQUENCY_NO)
256 && (USART_InitStruct->BaudRate != 0U))
257 {
258 status = SUCCESS;
259 LL_USART_SetBaudRate(USARTx,
260 periphclk,
261 USART_InitStruct->PrescalerValue,
262 USART_InitStruct->OverSampling,
263 USART_InitStruct->BaudRate);
264
265 /* Check BRR is greater than or equal to 16d */
266 assert_param(IS_LL_USART_BRR_MIN(USARTx->BRR));
267 }
268
269 /*---------------------------- USART PRESC Configuration -----------------------
270 * Configure USARTx PRESC (Prescaler) with parameters:
271 * - PrescalerValue: USART_PRESC_PRESCALER bits according to USART_InitStruct->PrescalerValue value.
272 */
273 LL_USART_SetPrescaler(USARTx, USART_InitStruct->PrescalerValue);
274 }
275 /* Endif (=> USART not in Disabled state => return ERROR) */
276
277 return (status);
278 }
279
280 /**
281 * @brief Set each @ref LL_USART_InitTypeDef field to default value.
282 * @param USART_InitStruct pointer to a @ref LL_USART_InitTypeDef structure
283 * whose fields will be set to default values.
284 * @retval None
285 */
286
LL_USART_StructInit(LL_USART_InitTypeDef * USART_InitStruct)287 void LL_USART_StructInit(LL_USART_InitTypeDef *USART_InitStruct)
288 {
289 /* Set USART_InitStruct fields to default values */
290 USART_InitStruct->PrescalerValue = LL_USART_PRESCALER_DIV1;
291 USART_InitStruct->BaudRate = USART_DEFAULT_BAUDRATE;
292 USART_InitStruct->DataWidth = LL_USART_DATAWIDTH_8B;
293 USART_InitStruct->StopBits = LL_USART_STOPBITS_1;
294 USART_InitStruct->Parity = LL_USART_PARITY_NONE ;
295 USART_InitStruct->TransferDirection = LL_USART_DIRECTION_TX_RX;
296 USART_InitStruct->HardwareFlowControl = LL_USART_HWCONTROL_NONE;
297 USART_InitStruct->OverSampling = LL_USART_OVERSAMPLING_16;
298 }
299
300 /**
301 * @brief Initialize USART Clock related settings according to the
302 * specified parameters in the USART_ClockInitStruct.
303 * @note As some bits in USART configuration registers can only be written when
304 * the USART is disabled (USART_CR1_UE bit =0), USART Peripheral should be in disabled state prior calling
305 * this function. Otherwise, ERROR result will be returned.
306 * @param USARTx USART Instance
307 * @param USART_ClockInitStruct pointer to a @ref LL_USART_ClockInitTypeDef structure
308 * that contains the Clock configuration information for the specified USART peripheral.
309 * @retval An ErrorStatus enumeration value:
310 * - SUCCESS: USART registers related to Clock settings are initialized according
311 * to USART_ClockInitStruct content
312 * - ERROR: Problem occurred during USART Registers initialization
313 */
LL_USART_ClockInit(USART_TypeDef * USARTx,const LL_USART_ClockInitTypeDef * USART_ClockInitStruct)314 ErrorStatus LL_USART_ClockInit(USART_TypeDef *USARTx, const LL_USART_ClockInitTypeDef *USART_ClockInitStruct)
315 {
316 ErrorStatus status = SUCCESS;
317
318 /* Check USART Instance and Clock signal output parameters */
319 assert_param(IS_UART_INSTANCE(USARTx));
320 assert_param(IS_LL_USART_CLOCKOUTPUT(USART_ClockInitStruct->ClockOutput));
321
322 /* USART needs to be in disabled state, in order to be able to configure some bits in
323 CRx registers */
324 if (LL_USART_IsEnabled(USARTx) == 0U)
325 {
326 /* Ensure USART instance is USART capable */
327 assert_param(IS_USART_INSTANCE(USARTx));
328
329 /* Check clock related parameters */
330 assert_param(IS_LL_USART_CLOCKPOLARITY(USART_ClockInitStruct->ClockPolarity));
331 assert_param(IS_LL_USART_CLOCKPHASE(USART_ClockInitStruct->ClockPhase));
332 assert_param(IS_LL_USART_LASTBITCLKOUTPUT(USART_ClockInitStruct->LastBitClockPulse));
333
334 /*---------------------------- USART CR2 Configuration -----------------------
335 * Configure USARTx CR2 (Clock signal related bits) with parameters:
336 * - Clock Output: USART_CR2_CLKEN bit according to USART_ClockInitStruct->ClockOutput value
337 * - Clock Polarity: USART_CR2_CPOL bit according to USART_ClockInitStruct->ClockPolarity value
338 * - Clock Phase: USART_CR2_CPHA bit according to USART_ClockInitStruct->ClockPhase value
339 * - Last Bit Clock Pulse Output: USART_CR2_LBCL bit according to USART_ClockInitStruct->LastBitClockPulse value.
340 */
341 MODIFY_REG(USARTx->CR2,
342 USART_CR2_CLKEN | USART_CR2_CPHA | USART_CR2_CPOL | USART_CR2_LBCL,
343 USART_ClockInitStruct->ClockOutput | USART_ClockInitStruct->ClockPolarity |
344 USART_ClockInitStruct->ClockPhase | USART_ClockInitStruct->LastBitClockPulse);
345 }
346 /* Else (USART not in Disabled state => return ERROR */
347 else
348 {
349 status = ERROR;
350 }
351
352 return (status);
353 }
354
355 /**
356 * @brief Set each field of a @ref LL_USART_ClockInitTypeDef type structure to default value.
357 * @param USART_ClockInitStruct pointer to a @ref LL_USART_ClockInitTypeDef structure
358 * whose fields will be set to default values.
359 * @retval None
360 */
LL_USART_ClockStructInit(LL_USART_ClockInitTypeDef * USART_ClockInitStruct)361 void LL_USART_ClockStructInit(LL_USART_ClockInitTypeDef *USART_ClockInitStruct)
362 {
363 /* Set LL_USART_ClockInitStruct fields with default values */
364 USART_ClockInitStruct->ClockOutput = LL_USART_CLOCK_DISABLE;
365 USART_ClockInitStruct->ClockPolarity = LL_USART_POLARITY_LOW; /* Not relevant when ClockOutput =
366 LL_USART_CLOCK_DISABLE */
367 USART_ClockInitStruct->ClockPhase = LL_USART_PHASE_1EDGE; /* Not relevant when ClockOutput =
368 LL_USART_CLOCK_DISABLE */
369 USART_ClockInitStruct->LastBitClockPulse = LL_USART_LASTCLKPULSE_NO_OUTPUT; /* Not relevant when ClockOutput =
370 LL_USART_CLOCK_DISABLE */
371 }
372
373 /**
374 * @}
375 */
376
377 /**
378 * @}
379 */
380
381 /**
382 * @}
383 */
384
385 #endif /* USART1 || USART2 */
386
387 /**
388 * @}
389 */
390
391 #endif /* USE_FULL_LL_DRIVER */
392
393
394
