1 /**
2 ******************************************************************************
3 * @file stm32c0xx_hal_tim_ex.c
4 * @author MCD Application Team
5 * @brief TIM HAL module driver.
6 * This file provides firmware functions to manage the following
7 * functionalities of the Timer Extended peripheral:
8 * + Time Hall Sensor Interface Initialization
9 * + Time Hall Sensor Interface Start
10 * + Time Complementary signal break and dead time configuration
11 * + Time Master and Slave synchronization configuration
12 * + Time Output Compare/PWM Channel Configuration (for channels 5 and 6)
13 * + Time OCRef clear configuration
14 * + Timer remapping capabilities configuration
15 ******************************************************************************
16 * @attention
17 *
18 * Copyright (c) 2022 STMicroelectronics.
19 * All rights reserved.
20 *
21 * This software is licensed under terms that can be found in the LICENSE file
22 * in the root directory of this software component.
23 * If no LICENSE file comes with this software, it is provided AS-IS.
24 *
25 ******************************************************************************
26 @verbatim
27 ==============================================================================
28 ##### TIMER Extended features #####
29 ==============================================================================
30 [..]
31 The Timer Extended features include:
32 (#) Complementary outputs with programmable dead-time for :
33 (++) Output Compare
34 (++) PWM generation (Edge and Center-aligned Mode)
35 (++) One-pulse mode output
36 (#) Synchronization circuit to control the timer with external signals and to
37 interconnect several timers together.
38 (#) Break input to put the timer output signals in reset state or in a known state.
39 (#) Supports incremental (quadrature) encoder and hall-sensor circuitry for
40 positioning purposes
41
42 ##### How to use this driver #####
43 ==============================================================================
44 [..]
45 (#) Initialize the TIM low level resources by implementing the following functions
46 depending on the selected feature:
47 (++) Hall Sensor output : HAL_TIMEx_HallSensor_MspInit()
48
49 (#) Initialize the TIM low level resources :
50 (##) Enable the TIM interface clock using __HAL_RCC_TIMx_CLK_ENABLE();
51 (##) TIM pins configuration
52 (+++) Enable the clock for the TIM GPIOs using the following function:
53 __HAL_RCC_GPIOx_CLK_ENABLE();
54 (+++) Configure these TIM pins in Alternate function mode using HAL_GPIO_Init();
55
56 (#) The external Clock can be configured, if needed (the default clock is the
57 internal clock from the APBx), using the following function:
58 HAL_TIM_ConfigClockSource, the clock configuration should be done before
59 any start function.
60
61 (#) Configure the TIM in the desired functioning mode using one of the
62 initialization function of this driver:
63 (++) HAL_TIMEx_HallSensor_Init() and HAL_TIMEx_ConfigCommutEvent(): to use the
64 Timer Hall Sensor Interface and the commutation event with the corresponding
65 Interrupt and DMA request if needed (Note that One Timer is used to interface
66 with the Hall sensor Interface and another Timer should be used to use
67 the commutation event).
68
69 (#) Activate the TIM peripheral using one of the start functions:
70 (++) Complementary Output Compare : HAL_TIMEx_OCN_Start(), HAL_TIMEx_OCN_Start_DMA(),
71 HAL_TIMEx_OCN_Start_IT()
72 (++) Complementary PWM generation : HAL_TIMEx_PWMN_Start(), HAL_TIMEx_PWMN_Start_DMA(),
73 HAL_TIMEx_PWMN_Start_IT()
74 (++) Complementary One-pulse mode output : HAL_TIMEx_OnePulseN_Start(), HAL_TIMEx_OnePulseN_Start_IT()
75 (++) Hall Sensor output : HAL_TIMEx_HallSensor_Start(), HAL_TIMEx_HallSensor_Start_DMA(),
76 HAL_TIMEx_HallSensor_Start_IT().
77
78 @endverbatim
79 ******************************************************************************
80 */
81
82 /* Includes ------------------------------------------------------------------*/
83 #include "stm32c0xx_hal.h"
84
85 /** @addtogroup STM32C0xx_HAL_Driver
86 * @{
87 */
88
89 /** @defgroup TIMEx TIMEx
90 * @brief TIM Extended HAL module driver
91 * @{
92 */
93
94 #ifdef HAL_TIM_MODULE_ENABLED
95
96 /* Private typedef -----------------------------------------------------------*/
97 /* Private define ------------------------------------------------------------*/
98 /* Private constants ---------------------------------------------------------*/
99 /** @defgroup TIMEx_Private_Constants TIM Extended Private Constants
100 * @{
101 */
102 /* Timeout for break input rearm */
103 #define TIM_BREAKINPUT_REARM_TIMEOUT 5UL /* 5 milliseconds */
104 /**
105 * @}
106 */
107 /* End of private constants --------------------------------------------------*/
108
109 /* Private macros ------------------------------------------------------------*/
110 /* Private variables ---------------------------------------------------------*/
111 /* Private function prototypes -----------------------------------------------*/
112 static void TIM_DMADelayPulseNCplt(DMA_HandleTypeDef *hdma);
113 static void TIM_DMAErrorCCxN(DMA_HandleTypeDef *hdma);
114 static void TIM_CCxNChannelCmd(TIM_TypeDef *TIMx, uint32_t Channel, uint32_t ChannelNState);
115
116 /* Exported functions --------------------------------------------------------*/
117 /** @defgroup TIMEx_Exported_Functions TIM Extended Exported Functions
118 * @{
119 */
120
121 /** @defgroup TIMEx_Exported_Functions_Group1 Extended Timer Hall Sensor functions
122 * @brief Timer Hall Sensor functions
123 *
124 @verbatim
125 ==============================================================================
126 ##### Timer Hall Sensor functions #####
127 ==============================================================================
128 [..]
129 This section provides functions allowing to:
130 (+) Initialize and configure TIM HAL Sensor.
131 (+) De-initialize TIM HAL Sensor.
132 (+) Start the Hall Sensor Interface.
133 (+) Stop the Hall Sensor Interface.
134 (+) Start the Hall Sensor Interface and enable interrupts.
135 (+) Stop the Hall Sensor Interface and disable interrupts.
136 (+) Start the Hall Sensor Interface and enable DMA transfers.
137 (+) Stop the Hall Sensor Interface and disable DMA transfers.
138
139 @endverbatim
140 * @{
141 */
142 /**
143 * @brief Initializes the TIM Hall Sensor Interface and initialize the associated handle.
144 * @note When the timer instance is initialized in Hall Sensor Interface mode,
145 * timer channels 1 and channel 2 are reserved and cannot be used for
146 * other purpose.
147 * @param htim TIM Hall Sensor Interface handle
148 * @param sConfig TIM Hall Sensor configuration structure
149 * @retval HAL status
150 */
HAL_TIMEx_HallSensor_Init(TIM_HandleTypeDef * htim,const TIM_HallSensor_InitTypeDef * sConfig)151 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Init(TIM_HandleTypeDef *htim, const TIM_HallSensor_InitTypeDef *sConfig)
152 {
153 TIM_OC_InitTypeDef OC_Config;
154
155 /* Check the TIM handle allocation */
156 if (htim == NULL)
157 {
158 return HAL_ERROR;
159 }
160
161 /* Check the parameters */
162 assert_param(IS_TIM_HALL_SENSOR_INTERFACE_INSTANCE(htim->Instance));
163 assert_param(IS_TIM_COUNTER_MODE(htim->Init.CounterMode));
164 assert_param(IS_TIM_CLOCKDIVISION_DIV(htim->Init.ClockDivision));
165 assert_param(IS_TIM_AUTORELOAD_PRELOAD(htim->Init.AutoReloadPreload));
166 assert_param(IS_TIM_IC_POLARITY(sConfig->IC1Polarity));
167 assert_param(IS_TIM_PERIOD(htim, htim->Init.Period));
168 assert_param(IS_TIM_IC_PRESCALER(sConfig->IC1Prescaler));
169 assert_param(IS_TIM_IC_FILTER(sConfig->IC1Filter));
170
171 if (htim->State == HAL_TIM_STATE_RESET)
172 {
173 /* Allocate lock resource and initialize it */
174 htim->Lock = HAL_UNLOCKED;
175
176 #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
177 /* Reset interrupt callbacks to legacy week callbacks */
178 TIM_ResetCallback(htim);
179
180 if (htim->HallSensor_MspInitCallback == NULL)
181 {
182 htim->HallSensor_MspInitCallback = HAL_TIMEx_HallSensor_MspInit;
183 }
184 /* Init the low level hardware : GPIO, CLOCK, NVIC */
185 htim->HallSensor_MspInitCallback(htim);
186 #else
187 /* Init the low level hardware : GPIO, CLOCK, NVIC and DMA */
188 HAL_TIMEx_HallSensor_MspInit(htim);
189 #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
190 }
191
192 /* Set the TIM state */
193 htim->State = HAL_TIM_STATE_BUSY;
194
195 /* Configure the Time base in the Encoder Mode */
196 TIM_Base_SetConfig(htim->Instance, &htim->Init);
197
198 /* Configure the Channel 1 as Input Channel to interface with the three Outputs of the Hall sensor */
199 TIM_TI1_SetConfig(htim->Instance, sConfig->IC1Polarity, TIM_ICSELECTION_TRC, sConfig->IC1Filter);
200
201 /* Reset the IC1PSC Bits */
202 htim->Instance->CCMR1 &= ~TIM_CCMR1_IC1PSC;
203 /* Set the IC1PSC value */
204 htim->Instance->CCMR1 |= sConfig->IC1Prescaler;
205
206 /* Enable the Hall sensor interface (XOR function of the three inputs) */
207 htim->Instance->CR2 |= TIM_CR2_TI1S;
208
209 /* Select the TIM_TS_TI1F_ED signal as Input trigger for the TIM */
210 htim->Instance->SMCR &= ~TIM_SMCR_TS;
211 htim->Instance->SMCR |= TIM_TS_TI1F_ED;
212
213 /* Use the TIM_TS_TI1F_ED signal to reset the TIM counter each edge detection */
214 htim->Instance->SMCR &= ~TIM_SMCR_SMS;
215 htim->Instance->SMCR |= TIM_SLAVEMODE_RESET;
216
217 /* Program channel 2 in PWM 2 mode with the desired Commutation_Delay*/
218 OC_Config.OCFastMode = TIM_OCFAST_DISABLE;
219 OC_Config.OCIdleState = TIM_OCIDLESTATE_RESET;
220 OC_Config.OCMode = TIM_OCMODE_PWM2;
221 OC_Config.OCNIdleState = TIM_OCNIDLESTATE_RESET;
222 OC_Config.OCNPolarity = TIM_OCNPOLARITY_HIGH;
223 OC_Config.OCPolarity = TIM_OCPOLARITY_HIGH;
224 OC_Config.Pulse = sConfig->Commutation_Delay;
225
226 TIM_OC2_SetConfig(htim->Instance, &OC_Config);
227
228 /* Select OC2REF as trigger output on TRGO: write the MMS bits in the TIMx_CR2
229 register to 101 */
230 htim->Instance->CR2 &= ~TIM_CR2_MMS;
231 htim->Instance->CR2 |= TIM_TRGO_OC2REF;
232
233 /* Initialize the DMA burst operation state */
234 htim->DMABurstState = HAL_DMA_BURST_STATE_READY;
235
236 /* Initialize the TIM channels state */
237 TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY);
238 TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY);
239 TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY);
240 TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY);
241
242 /* Initialize the TIM state*/
243 htim->State = HAL_TIM_STATE_READY;
244
245 return HAL_OK;
246 }
247
248 /**
249 * @brief DeInitializes the TIM Hall Sensor interface
250 * @param htim TIM Hall Sensor Interface handle
251 * @retval HAL status
252 */
HAL_TIMEx_HallSensor_DeInit(TIM_HandleTypeDef * htim)253 HAL_StatusTypeDef HAL_TIMEx_HallSensor_DeInit(TIM_HandleTypeDef *htim)
254 {
255 /* Check the parameters */
256 assert_param(IS_TIM_INSTANCE(htim->Instance));
257
258 htim->State = HAL_TIM_STATE_BUSY;
259
260 /* Disable the TIM Peripheral Clock */
261 __HAL_TIM_DISABLE(htim);
262
263 #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
264 if (htim->HallSensor_MspDeInitCallback == NULL)
265 {
266 htim->HallSensor_MspDeInitCallback = HAL_TIMEx_HallSensor_MspDeInit;
267 }
268 /* DeInit the low level hardware */
269 htim->HallSensor_MspDeInitCallback(htim);
270 #else
271 /* DeInit the low level hardware: GPIO, CLOCK, NVIC */
272 HAL_TIMEx_HallSensor_MspDeInit(htim);
273 #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
274
275 /* Change the DMA burst operation state */
276 htim->DMABurstState = HAL_DMA_BURST_STATE_RESET;
277
278 /* Change the TIM channels state */
279 TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_RESET);
280 TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_RESET);
281 TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_RESET);
282 TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_RESET);
283
284 /* Change TIM state */
285 htim->State = HAL_TIM_STATE_RESET;
286
287 /* Release Lock */
288 __HAL_UNLOCK(htim);
289
290 return HAL_OK;
291 }
292
293 /**
294 * @brief Initializes the TIM Hall Sensor MSP.
295 * @param htim TIM Hall Sensor Interface handle
296 * @retval None
297 */
HAL_TIMEx_HallSensor_MspInit(TIM_HandleTypeDef * htim)298 __weak void HAL_TIMEx_HallSensor_MspInit(TIM_HandleTypeDef *htim)
299 {
300 /* Prevent unused argument(s) compilation warning */
301 UNUSED(htim);
302
303 /* NOTE : This function should not be modified, when the callback is needed,
304 the HAL_TIMEx_HallSensor_MspInit could be implemented in the user file
305 */
306 }
307
308 /**
309 * @brief DeInitializes TIM Hall Sensor MSP.
310 * @param htim TIM Hall Sensor Interface handle
311 * @retval None
312 */
HAL_TIMEx_HallSensor_MspDeInit(TIM_HandleTypeDef * htim)313 __weak void HAL_TIMEx_HallSensor_MspDeInit(TIM_HandleTypeDef *htim)
314 {
315 /* Prevent unused argument(s) compilation warning */
316 UNUSED(htim);
317
318 /* NOTE : This function should not be modified, when the callback is needed,
319 the HAL_TIMEx_HallSensor_MspDeInit could be implemented in the user file
320 */
321 }
322
323 /**
324 * @brief Starts the TIM Hall Sensor Interface.
325 * @param htim TIM Hall Sensor Interface handle
326 * @retval HAL status
327 */
HAL_TIMEx_HallSensor_Start(TIM_HandleTypeDef * htim)328 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start(TIM_HandleTypeDef *htim)
329 {
330 uint32_t tmpsmcr;
331 HAL_TIM_ChannelStateTypeDef channel_1_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_1);
332 HAL_TIM_ChannelStateTypeDef channel_2_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_2);
333 HAL_TIM_ChannelStateTypeDef complementary_channel_1_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHANNEL_1);
334 HAL_TIM_ChannelStateTypeDef complementary_channel_2_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHANNEL_2);
335
336 /* Check the parameters */
337 assert_param(IS_TIM_HALL_SENSOR_INTERFACE_INSTANCE(htim->Instance));
338
339 /* Check the TIM channels state */
340 if ((channel_1_state != HAL_TIM_CHANNEL_STATE_READY)
341 || (channel_2_state != HAL_TIM_CHANNEL_STATE_READY)
342 || (complementary_channel_1_state != HAL_TIM_CHANNEL_STATE_READY)
343 || (complementary_channel_2_state != HAL_TIM_CHANNEL_STATE_READY))
344 {
345 return HAL_ERROR;
346 }
347
348 /* Set the TIM channels state */
349 TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY);
350 TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY);
351 TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY);
352 TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY);
353
354 /* Enable the Input Capture channel 1
355 (in the Hall Sensor Interface the three possible channels that can be used are TIM_CHANNEL_1,
356 TIM_CHANNEL_2 and TIM_CHANNEL_3) */
357 TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_ENABLE);
358
359 /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */
360 if (IS_TIM_SLAVE_INSTANCE(htim->Instance))
361 {
362 tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS;
363 if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr))
364 {
365 __HAL_TIM_ENABLE(htim);
366 }
367 }
368 else
369 {
370 __HAL_TIM_ENABLE(htim);
371 }
372
373 /* Return function status */
374 return HAL_OK;
375 }
376
377 /**
378 * @brief Stops the TIM Hall sensor Interface.
379 * @param htim TIM Hall Sensor Interface handle
380 * @retval HAL status
381 */
HAL_TIMEx_HallSensor_Stop(TIM_HandleTypeDef * htim)382 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop(TIM_HandleTypeDef *htim)
383 {
384 /* Check the parameters */
385 assert_param(IS_TIM_HALL_SENSOR_INTERFACE_INSTANCE(htim->Instance));
386
387 /* Disable the Input Capture channels 1, 2 and 3
388 (in the Hall Sensor Interface the three possible channels that can be used are TIM_CHANNEL_1,
389 TIM_CHANNEL_2 and TIM_CHANNEL_3) */
390 TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_DISABLE);
391
392 /* Disable the Peripheral */
393 __HAL_TIM_DISABLE(htim);
394
395 /* Set the TIM channels state */
396 TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY);
397 TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY);
398 TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY);
399 TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY);
400
401 /* Return function status */
402 return HAL_OK;
403 }
404
405 /**
406 * @brief Starts the TIM Hall Sensor Interface in interrupt mode.
407 * @param htim TIM Hall Sensor Interface handle
408 * @retval HAL status
409 */
HAL_TIMEx_HallSensor_Start_IT(TIM_HandleTypeDef * htim)410 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start_IT(TIM_HandleTypeDef *htim)
411 {
412 uint32_t tmpsmcr;
413 HAL_TIM_ChannelStateTypeDef channel_1_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_1);
414 HAL_TIM_ChannelStateTypeDef channel_2_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_2);
415 HAL_TIM_ChannelStateTypeDef complementary_channel_1_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHANNEL_1);
416 HAL_TIM_ChannelStateTypeDef complementary_channel_2_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHANNEL_2);
417
418 /* Check the parameters */
419 assert_param(IS_TIM_HALL_SENSOR_INTERFACE_INSTANCE(htim->Instance));
420
421 /* Check the TIM channels state */
422 if ((channel_1_state != HAL_TIM_CHANNEL_STATE_READY)
423 || (channel_2_state != HAL_TIM_CHANNEL_STATE_READY)
424 || (complementary_channel_1_state != HAL_TIM_CHANNEL_STATE_READY)
425 || (complementary_channel_2_state != HAL_TIM_CHANNEL_STATE_READY))
426 {
427 return HAL_ERROR;
428 }
429
430 /* Set the TIM channels state */
431 TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY);
432 TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY);
433 TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY);
434 TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY);
435
436 /* Enable the capture compare Interrupts 1 event */
437 __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC1);
438
439 /* Enable the Input Capture channel 1
440 (in the Hall Sensor Interface the three possible channels that can be used are TIM_CHANNEL_1,
441 TIM_CHANNEL_2 and TIM_CHANNEL_3) */
442 TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_ENABLE);
443
444 /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */
445 if (IS_TIM_SLAVE_INSTANCE(htim->Instance))
446 {
447 tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS;
448 if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr))
449 {
450 __HAL_TIM_ENABLE(htim);
451 }
452 }
453 else
454 {
455 __HAL_TIM_ENABLE(htim);
456 }
457
458 /* Return function status */
459 return HAL_OK;
460 }
461
462 /**
463 * @brief Stops the TIM Hall Sensor Interface in interrupt mode.
464 * @param htim TIM Hall Sensor Interface handle
465 * @retval HAL status
466 */
HAL_TIMEx_HallSensor_Stop_IT(TIM_HandleTypeDef * htim)467 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop_IT(TIM_HandleTypeDef *htim)
468 {
469 /* Check the parameters */
470 assert_param(IS_TIM_HALL_SENSOR_INTERFACE_INSTANCE(htim->Instance));
471
472 /* Disable the Input Capture channel 1
473 (in the Hall Sensor Interface the three possible channels that can be used are TIM_CHANNEL_1,
474 TIM_CHANNEL_2 and TIM_CHANNEL_3) */
475 TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_DISABLE);
476
477 /* Disable the capture compare Interrupts event */
478 __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC1);
479
480 /* Disable the Peripheral */
481 __HAL_TIM_DISABLE(htim);
482
483 /* Set the TIM channels state */
484 TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY);
485 TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY);
486 TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY);
487 TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY);
488
489 /* Return function status */
490 return HAL_OK;
491 }
492
493 /**
494 * @brief Starts the TIM Hall Sensor Interface in DMA mode.
495 * @param htim TIM Hall Sensor Interface handle
496 * @param pData The destination Buffer address.
497 * @param Length The length of data to be transferred from TIM peripheral to memory.
498 * @retval HAL status
499 */
HAL_TIMEx_HallSensor_Start_DMA(TIM_HandleTypeDef * htim,uint32_t * pData,uint16_t Length)500 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start_DMA(TIM_HandleTypeDef *htim, uint32_t *pData, uint16_t Length)
501 {
502 uint32_t tmpsmcr;
503 HAL_TIM_ChannelStateTypeDef channel_1_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_1);
504 HAL_TIM_ChannelStateTypeDef complementary_channel_1_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHANNEL_1);
505
506 /* Check the parameters */
507 assert_param(IS_TIM_HALL_SENSOR_INTERFACE_INSTANCE(htim->Instance));
508
509 /* Set the TIM channel state */
510 if ((channel_1_state == HAL_TIM_CHANNEL_STATE_BUSY)
511 || (complementary_channel_1_state == HAL_TIM_CHANNEL_STATE_BUSY))
512 {
513 return HAL_BUSY;
514 }
515 else if ((channel_1_state == HAL_TIM_CHANNEL_STATE_READY)
516 && (complementary_channel_1_state == HAL_TIM_CHANNEL_STATE_READY))
517 {
518 if ((pData == NULL) || (Length == 0U))
519 {
520 return HAL_ERROR;
521 }
522 else
523 {
524 TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY);
525 TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY);
526 }
527 }
528 else
529 {
530 return HAL_ERROR;
531 }
532
533 /* Enable the Input Capture channel 1
534 (in the Hall Sensor Interface the three possible channels that can be used are TIM_CHANNEL_1,
535 TIM_CHANNEL_2 and TIM_CHANNEL_3) */
536 TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_ENABLE);
537
538 /* Set the DMA Input Capture 1 Callbacks */
539 htim->hdma[TIM_DMA_ID_CC1]->XferCpltCallback = TIM_DMACaptureCplt;
540 htim->hdma[TIM_DMA_ID_CC1]->XferHalfCpltCallback = TIM_DMACaptureHalfCplt;
541 /* Set the DMA error callback */
542 htim->hdma[TIM_DMA_ID_CC1]->XferErrorCallback = TIM_DMAError ;
543
544 /* Enable the DMA channel for Capture 1*/
545 if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC1], (uint32_t)&htim->Instance->CCR1, (uint32_t)pData, Length) != HAL_OK)
546 {
547 /* Return error status */
548 return HAL_ERROR;
549 }
550 /* Enable the capture compare 1 Interrupt */
551 __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC1);
552
553 /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */
554 if (IS_TIM_SLAVE_INSTANCE(htim->Instance))
555 {
556 tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS;
557 if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr))
558 {
559 __HAL_TIM_ENABLE(htim);
560 }
561 }
562 else
563 {
564 __HAL_TIM_ENABLE(htim);
565 }
566
567 /* Return function status */
568 return HAL_OK;
569 }
570
571 /**
572 * @brief Stops the TIM Hall Sensor Interface in DMA mode.
573 * @param htim TIM Hall Sensor Interface handle
574 * @retval HAL status
575 */
HAL_TIMEx_HallSensor_Stop_DMA(TIM_HandleTypeDef * htim)576 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop_DMA(TIM_HandleTypeDef *htim)
577 {
578 /* Check the parameters */
579 assert_param(IS_TIM_HALL_SENSOR_INTERFACE_INSTANCE(htim->Instance));
580
581 /* Disable the Input Capture channel 1
582 (in the Hall Sensor Interface the three possible channels that can be used are TIM_CHANNEL_1,
583 TIM_CHANNEL_2 and TIM_CHANNEL_3) */
584 TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_DISABLE);
585
586
587 /* Disable the capture compare Interrupts 1 event */
588 __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC1);
589
590 (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC1]);
591
592 /* Disable the Peripheral */
593 __HAL_TIM_DISABLE(htim);
594
595 /* Set the TIM channel state */
596 TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY);
597 TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY);
598
599 /* Return function status */
600 return HAL_OK;
601 }
602
603 /**
604 * @}
605 */
606
607 /** @defgroup TIMEx_Exported_Functions_Group2 Extended Timer Complementary Output Compare functions
608 * @brief Timer Complementary Output Compare functions
609 *
610 @verbatim
611 ==============================================================================
612 ##### Timer Complementary Output Compare functions #####
613 ==============================================================================
614 [..]
615 This section provides functions allowing to:
616 (+) Start the Complementary Output Compare/PWM.
617 (+) Stop the Complementary Output Compare/PWM.
618 (+) Start the Complementary Output Compare/PWM and enable interrupts.
619 (+) Stop the Complementary Output Compare/PWM and disable interrupts.
620 (+) Start the Complementary Output Compare/PWM and enable DMA transfers.
621 (+) Stop the Complementary Output Compare/PWM and disable DMA transfers.
622
623 @endverbatim
624 * @{
625 */
626
627 /**
628 * @brief Starts the TIM Output Compare signal generation on the complementary
629 * output.
630 * @param htim TIM Output Compare handle
631 * @param Channel TIM Channel to be enabled
632 * This parameter can be one of the following values:
633 * @arg TIM_CHANNEL_1: TIM Channel 1 selected
634 * @arg TIM_CHANNEL_2: TIM Channel 2 selected
635 * @arg TIM_CHANNEL_3: TIM Channel 3 selected
636 * @retval HAL status
637 */
HAL_TIMEx_OCN_Start(TIM_HandleTypeDef * htim,uint32_t Channel)638 HAL_StatusTypeDef HAL_TIMEx_OCN_Start(TIM_HandleTypeDef *htim, uint32_t Channel)
639 {
640 uint32_t tmpsmcr;
641
642 /* Check the parameters */
643 assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
644
645 /* Check the TIM complementary channel state */
646 if (TIM_CHANNEL_N_STATE_GET(htim, Channel) != HAL_TIM_CHANNEL_STATE_READY)
647 {
648 return HAL_ERROR;
649 }
650
651 /* Set the TIM complementary channel state */
652 TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_BUSY);
653
654 /* Enable the Capture compare channel N */
655 TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE);
656
657 /* Enable the Main Output */
658 __HAL_TIM_MOE_ENABLE(htim);
659
660 /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */
661 if (IS_TIM_SLAVE_INSTANCE(htim->Instance))
662 {
663 tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS;
664 if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr))
665 {
666 __HAL_TIM_ENABLE(htim);
667 }
668 }
669 else
670 {
671 __HAL_TIM_ENABLE(htim);
672 }
673
674 /* Return function status */
675 return HAL_OK;
676 }
677
678 /**
679 * @brief Stops the TIM Output Compare signal generation on the complementary
680 * output.
681 * @param htim TIM handle
682 * @param Channel TIM Channel to be disabled
683 * This parameter can be one of the following values:
684 * @arg TIM_CHANNEL_1: TIM Channel 1 selected
685 * @arg TIM_CHANNEL_2: TIM Channel 2 selected
686 * @arg TIM_CHANNEL_3: TIM Channel 3 selected
687 * @retval HAL status
688 */
HAL_TIMEx_OCN_Stop(TIM_HandleTypeDef * htim,uint32_t Channel)689 HAL_StatusTypeDef HAL_TIMEx_OCN_Stop(TIM_HandleTypeDef *htim, uint32_t Channel)
690 {
691 /* Check the parameters */
692 assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
693
694 /* Disable the Capture compare channel N */
695 TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE);
696
697 /* Disable the Main Output */
698 __HAL_TIM_MOE_DISABLE(htim);
699
700 /* Disable the Peripheral */
701 __HAL_TIM_DISABLE(htim);
702
703 /* Set the TIM complementary channel state */
704 TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY);
705
706 /* Return function status */
707 return HAL_OK;
708 }
709
710 /**
711 * @brief Starts the TIM Output Compare signal generation in interrupt mode
712 * on the complementary output.
713 * @param htim TIM OC handle
714 * @param Channel TIM Channel to be enabled
715 * This parameter can be one of the following values:
716 * @arg TIM_CHANNEL_1: TIM Channel 1 selected
717 * @arg TIM_CHANNEL_2: TIM Channel 2 selected
718 * @arg TIM_CHANNEL_3: TIM Channel 3 selected
719 * @retval HAL status
720 */
HAL_TIMEx_OCN_Start_IT(TIM_HandleTypeDef * htim,uint32_t Channel)721 HAL_StatusTypeDef HAL_TIMEx_OCN_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel)
722 {
723 HAL_StatusTypeDef status = HAL_OK;
724 uint32_t tmpsmcr;
725
726 /* Check the parameters */
727 assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
728
729 /* Check the TIM complementary channel state */
730 if (TIM_CHANNEL_N_STATE_GET(htim, Channel) != HAL_TIM_CHANNEL_STATE_READY)
731 {
732 return HAL_ERROR;
733 }
734
735 /* Set the TIM complementary channel state */
736 TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_BUSY);
737
738 switch (Channel)
739 {
740 case TIM_CHANNEL_1:
741 {
742 /* Enable the TIM Output Compare interrupt */
743 __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC1);
744 break;
745 }
746
747 case TIM_CHANNEL_2:
748 {
749 /* Enable the TIM Output Compare interrupt */
750 __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC2);
751 break;
752 }
753
754 case TIM_CHANNEL_3:
755 {
756 /* Enable the TIM Output Compare interrupt */
757 __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC3);
758 break;
759 }
760
761
762 default:
763 status = HAL_ERROR;
764 break;
765 }
766
767 if (status == HAL_OK)
768 {
769 /* Enable the TIM Break interrupt */
770 __HAL_TIM_ENABLE_IT(htim, TIM_IT_BREAK);
771
772 /* Enable the Capture compare channel N */
773 TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE);
774
775 /* Enable the Main Output */
776 __HAL_TIM_MOE_ENABLE(htim);
777
778 /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */
779 if (IS_TIM_SLAVE_INSTANCE(htim->Instance))
780 {
781 tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS;
782 if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr))
783 {
784 __HAL_TIM_ENABLE(htim);
785 }
786 }
787 else
788 {
789 __HAL_TIM_ENABLE(htim);
790 }
791 }
792
793 /* Return function status */
794 return status;
795 }
796
797 /**
798 * @brief Stops the TIM Output Compare signal generation in interrupt mode
799 * on the complementary output.
800 * @param htim TIM Output Compare handle
801 * @param Channel TIM Channel to be disabled
802 * This parameter can be one of the following values:
803 * @arg TIM_CHANNEL_1: TIM Channel 1 selected
804 * @arg TIM_CHANNEL_2: TIM Channel 2 selected
805 * @arg TIM_CHANNEL_3: TIM Channel 3 selected
806 * @retval HAL status
807 */
HAL_TIMEx_OCN_Stop_IT(TIM_HandleTypeDef * htim,uint32_t Channel)808 HAL_StatusTypeDef HAL_TIMEx_OCN_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel)
809 {
810 HAL_StatusTypeDef status = HAL_OK;
811 uint32_t tmpccer;
812
813 /* Check the parameters */
814 assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
815
816 switch (Channel)
817 {
818 case TIM_CHANNEL_1:
819 {
820 /* Disable the TIM Output Compare interrupt */
821 __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC1);
822 break;
823 }
824
825 case TIM_CHANNEL_2:
826 {
827 /* Disable the TIM Output Compare interrupt */
828 __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC2);
829 break;
830 }
831
832 case TIM_CHANNEL_3:
833 {
834 /* Disable the TIM Output Compare interrupt */
835 __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC3);
836 break;
837 }
838
839 default:
840 status = HAL_ERROR;
841 break;
842 }
843
844 if (status == HAL_OK)
845 {
846 /* Disable the Capture compare channel N */
847 TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE);
848
849 /* Disable the TIM Break interrupt (only if no more channel is active) */
850 tmpccer = htim->Instance->CCER;
851 if ((tmpccer & (TIM_CCER_CC1NE | TIM_CCER_CC2NE | TIM_CCER_CC3NE)) == (uint32_t)RESET)
852 {
853 __HAL_TIM_DISABLE_IT(htim, TIM_IT_BREAK);
854 }
855
856 /* Disable the Main Output */
857 __HAL_TIM_MOE_DISABLE(htim);
858
859 /* Disable the Peripheral */
860 __HAL_TIM_DISABLE(htim);
861
862 /* Set the TIM complementary channel state */
863 TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY);
864 }
865
866 /* Return function status */
867 return status;
868 }
869
870 /**
871 * @brief Starts the TIM Output Compare signal generation in DMA mode
872 * on the complementary output.
873 * @param htim TIM Output Compare handle
874 * @param Channel TIM Channel to be enabled
875 * This parameter can be one of the following values:
876 * @arg TIM_CHANNEL_1: TIM Channel 1 selected
877 * @arg TIM_CHANNEL_2: TIM Channel 2 selected
878 * @arg TIM_CHANNEL_3: TIM Channel 3 selected
879 * @param pData The source Buffer address.
880 * @param Length The length of data to be transferred from memory to TIM peripheral
881 * @retval HAL status
882 */
HAL_TIMEx_OCN_Start_DMA(TIM_HandleTypeDef * htim,uint32_t Channel,const uint32_t * pData,uint16_t Length)883 HAL_StatusTypeDef HAL_TIMEx_OCN_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel, const uint32_t *pData,
884 uint16_t Length)
885 {
886 HAL_StatusTypeDef status = HAL_OK;
887 uint32_t tmpsmcr;
888
889 /* Check the parameters */
890 assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
891
892 /* Set the TIM complementary channel state */
893 if (TIM_CHANNEL_N_STATE_GET(htim, Channel) == HAL_TIM_CHANNEL_STATE_BUSY)
894 {
895 return HAL_BUSY;
896 }
897 else if (TIM_CHANNEL_N_STATE_GET(htim, Channel) == HAL_TIM_CHANNEL_STATE_READY)
898 {
899 if ((pData == NULL) || (Length == 0U))
900 {
901 return HAL_ERROR;
902 }
903 else
904 {
905 TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_BUSY);
906 }
907 }
908 else
909 {
910 return HAL_ERROR;
911 }
912
913 switch (Channel)
914 {
915 case TIM_CHANNEL_1:
916 {
917 /* Set the DMA compare callbacks */
918 htim->hdma[TIM_DMA_ID_CC1]->XferCpltCallback = TIM_DMADelayPulseNCplt;
919 htim->hdma[TIM_DMA_ID_CC1]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt;
920
921 /* Set the DMA error callback */
922 htim->hdma[TIM_DMA_ID_CC1]->XferErrorCallback = TIM_DMAErrorCCxN ;
923
924 /* Enable the DMA channel */
925 if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC1], (uint32_t)pData, (uint32_t)&htim->Instance->CCR1,
926 Length) != HAL_OK)
927 {
928 /* Return error status */
929 return HAL_ERROR;
930 }
931 /* Enable the TIM Output Compare DMA request */
932 __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC1);
933 break;
934 }
935
936 case TIM_CHANNEL_2:
937 {
938 /* Set the DMA compare callbacks */
939 htim->hdma[TIM_DMA_ID_CC2]->XferCpltCallback = TIM_DMADelayPulseNCplt;
940 htim->hdma[TIM_DMA_ID_CC2]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt;
941
942 /* Set the DMA error callback */
943 htim->hdma[TIM_DMA_ID_CC2]->XferErrorCallback = TIM_DMAErrorCCxN ;
944
945 /* Enable the DMA channel */
946 if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC2], (uint32_t)pData, (uint32_t)&htim->Instance->CCR2,
947 Length) != HAL_OK)
948 {
949 /* Return error status */
950 return HAL_ERROR;
951 }
952 /* Enable the TIM Output Compare DMA request */
953 __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC2);
954 break;
955 }
956
957 case TIM_CHANNEL_3:
958 {
959 /* Set the DMA compare callbacks */
960 htim->hdma[TIM_DMA_ID_CC3]->XferCpltCallback = TIM_DMADelayPulseNCplt;
961 htim->hdma[TIM_DMA_ID_CC3]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt;
962
963 /* Set the DMA error callback */
964 htim->hdma[TIM_DMA_ID_CC3]->XferErrorCallback = TIM_DMAErrorCCxN ;
965
966 /* Enable the DMA channel */
967 if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC3], (uint32_t)pData, (uint32_t)&htim->Instance->CCR3,
968 Length) != HAL_OK)
969 {
970 /* Return error status */
971 return HAL_ERROR;
972 }
973 /* Enable the TIM Output Compare DMA request */
974 __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC3);
975 break;
976 }
977
978 default:
979 status = HAL_ERROR;
980 break;
981 }
982
983 if (status == HAL_OK)
984 {
985 /* Enable the Capture compare channel N */
986 TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE);
987
988 /* Enable the Main Output */
989 __HAL_TIM_MOE_ENABLE(htim);
990
991 /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */
992 if (IS_TIM_SLAVE_INSTANCE(htim->Instance))
993 {
994 tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS;
995 if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr))
996 {
997 __HAL_TIM_ENABLE(htim);
998 }
999 }
1000 else
1001 {
1002 __HAL_TIM_ENABLE(htim);
1003 }
1004 }
1005
1006 /* Return function status */
1007 return status;
1008 }
1009
1010 /**
1011 * @brief Stops the TIM Output Compare signal generation in DMA mode
1012 * on the complementary output.
1013 * @param htim TIM Output Compare handle
1014 * @param Channel TIM Channel to be disabled
1015 * This parameter can be one of the following values:
1016 * @arg TIM_CHANNEL_1: TIM Channel 1 selected
1017 * @arg TIM_CHANNEL_2: TIM Channel 2 selected
1018 * @arg TIM_CHANNEL_3: TIM Channel 3 selected
1019 * @retval HAL status
1020 */
HAL_TIMEx_OCN_Stop_DMA(TIM_HandleTypeDef * htim,uint32_t Channel)1021 HAL_StatusTypeDef HAL_TIMEx_OCN_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel)
1022 {
1023 HAL_StatusTypeDef status = HAL_OK;
1024
1025 /* Check the parameters */
1026 assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
1027
1028 switch (Channel)
1029 {
1030 case TIM_CHANNEL_1:
1031 {
1032 /* Disable the TIM Output Compare DMA request */
1033 __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC1);
1034 (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC1]);
1035 break;
1036 }
1037
1038 case TIM_CHANNEL_2:
1039 {
1040 /* Disable the TIM Output Compare DMA request */
1041 __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC2);
1042 (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC2]);
1043 break;
1044 }
1045
1046 case TIM_CHANNEL_3:
1047 {
1048 /* Disable the TIM Output Compare DMA request */
1049 __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC3);
1050 (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC3]);
1051 break;
1052 }
1053
1054 default:
1055 status = HAL_ERROR;
1056 break;
1057 }
1058
1059 if (status == HAL_OK)
1060 {
1061 /* Disable the Capture compare channel N */
1062 TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE);
1063
1064 /* Disable the Main Output */
1065 __HAL_TIM_MOE_DISABLE(htim);
1066
1067 /* Disable the Peripheral */
1068 __HAL_TIM_DISABLE(htim);
1069
1070 /* Set the TIM complementary channel state */
1071 TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY);
1072 }
1073
1074 /* Return function status */
1075 return status;
1076 }
1077
1078 /**
1079 * @}
1080 */
1081
1082 /** @defgroup TIMEx_Exported_Functions_Group3 Extended Timer Complementary PWM functions
1083 * @brief Timer Complementary PWM functions
1084 *
1085 @verbatim
1086 ==============================================================================
1087 ##### Timer Complementary PWM functions #####
1088 ==============================================================================
1089 [..]
1090 This section provides functions allowing to:
1091 (+) Start the Complementary PWM.
1092 (+) Stop the Complementary PWM.
1093 (+) Start the Complementary PWM and enable interrupts.
1094 (+) Stop the Complementary PWM and disable interrupts.
1095 (+) Start the Complementary PWM and enable DMA transfers.
1096 (+) Stop the Complementary PWM and disable DMA transfers.
1097 (+) Start the Complementary Input Capture measurement.
1098 (+) Stop the Complementary Input Capture.
1099 (+) Start the Complementary Input Capture and enable interrupts.
1100 (+) Stop the Complementary Input Capture and disable interrupts.
1101 (+) Start the Complementary Input Capture and enable DMA transfers.
1102 (+) Stop the Complementary Input Capture and disable DMA transfers.
1103 (+) Start the Complementary One Pulse generation.
1104 (+) Stop the Complementary One Pulse.
1105 (+) Start the Complementary One Pulse and enable interrupts.
1106 (+) Stop the Complementary One Pulse and disable interrupts.
1107
1108 @endverbatim
1109 * @{
1110 */
1111
1112 /**
1113 * @brief Starts the PWM signal generation on the complementary output.
1114 * @param htim TIM handle
1115 * @param Channel TIM Channel to be enabled
1116 * This parameter can be one of the following values:
1117 * @arg TIM_CHANNEL_1: TIM Channel 1 selected
1118 * @arg TIM_CHANNEL_2: TIM Channel 2 selected
1119 * @arg TIM_CHANNEL_3: TIM Channel 3 selected
1120 * @retval HAL status
1121 */
HAL_TIMEx_PWMN_Start(TIM_HandleTypeDef * htim,uint32_t Channel)1122 HAL_StatusTypeDef HAL_TIMEx_PWMN_Start(TIM_HandleTypeDef *htim, uint32_t Channel)
1123 {
1124 uint32_t tmpsmcr;
1125
1126 /* Check the parameters */
1127 assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
1128
1129 /* Check the TIM complementary channel state */
1130 if (TIM_CHANNEL_N_STATE_GET(htim, Channel) != HAL_TIM_CHANNEL_STATE_READY)
1131 {
1132 return HAL_ERROR;
1133 }
1134
1135 /* Set the TIM complementary channel state */
1136 TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_BUSY);
1137
1138 /* Enable the complementary PWM output */
1139 TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE);
1140
1141 /* Enable the Main Output */
1142 __HAL_TIM_MOE_ENABLE(htim);
1143
1144 /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */
1145 if (IS_TIM_SLAVE_INSTANCE(htim->Instance))
1146 {
1147 tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS;
1148 if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr))
1149 {
1150 __HAL_TIM_ENABLE(htim);
1151 }
1152 }
1153 else
1154 {
1155 __HAL_TIM_ENABLE(htim);
1156 }
1157
1158 /* Return function status */
1159 return HAL_OK;
1160 }
1161
1162 /**
1163 * @brief Stops the PWM signal generation on the complementary output.
1164 * @param htim TIM handle
1165 * @param Channel TIM Channel to be disabled
1166 * This parameter can be one of the following values:
1167 * @arg TIM_CHANNEL_1: TIM Channel 1 selected
1168 * @arg TIM_CHANNEL_2: TIM Channel 2 selected
1169 * @arg TIM_CHANNEL_3: TIM Channel 3 selected
1170 * @retval HAL status
1171 */
HAL_TIMEx_PWMN_Stop(TIM_HandleTypeDef * htim,uint32_t Channel)1172 HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop(TIM_HandleTypeDef *htim, uint32_t Channel)
1173 {
1174 /* Check the parameters */
1175 assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
1176
1177 /* Disable the complementary PWM output */
1178 TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE);
1179
1180 /* Disable the Main Output */
1181 __HAL_TIM_MOE_DISABLE(htim);
1182
1183 /* Disable the Peripheral */
1184 __HAL_TIM_DISABLE(htim);
1185
1186 /* Set the TIM complementary channel state */
1187 TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY);
1188
1189 /* Return function status */
1190 return HAL_OK;
1191 }
1192
1193 /**
1194 * @brief Starts the PWM signal generation in interrupt mode on the
1195 * complementary output.
1196 * @param htim TIM handle
1197 * @param Channel TIM Channel to be disabled
1198 * This parameter can be one of the following values:
1199 * @arg TIM_CHANNEL_1: TIM Channel 1 selected
1200 * @arg TIM_CHANNEL_2: TIM Channel 2 selected
1201 * @arg TIM_CHANNEL_3: TIM Channel 3 selected
1202 * @retval HAL status
1203 */
HAL_TIMEx_PWMN_Start_IT(TIM_HandleTypeDef * htim,uint32_t Channel)1204 HAL_StatusTypeDef HAL_TIMEx_PWMN_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel)
1205 {
1206 HAL_StatusTypeDef status = HAL_OK;
1207 uint32_t tmpsmcr;
1208
1209 /* Check the parameters */
1210 assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
1211
1212 /* Check the TIM complementary channel state */
1213 if (TIM_CHANNEL_N_STATE_GET(htim, Channel) != HAL_TIM_CHANNEL_STATE_READY)
1214 {
1215 return HAL_ERROR;
1216 }
1217
1218 /* Set the TIM complementary channel state */
1219 TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_BUSY);
1220
1221 switch (Channel)
1222 {
1223 case TIM_CHANNEL_1:
1224 {
1225 /* Enable the TIM Capture/Compare 1 interrupt */
1226 __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC1);
1227 break;
1228 }
1229
1230 case TIM_CHANNEL_2:
1231 {
1232 /* Enable the TIM Capture/Compare 2 interrupt */
1233 __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC2);
1234 break;
1235 }
1236
1237 case TIM_CHANNEL_3:
1238 {
1239 /* Enable the TIM Capture/Compare 3 interrupt */
1240 __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC3);
1241 break;
1242 }
1243
1244 default:
1245 status = HAL_ERROR;
1246 break;
1247 }
1248
1249 if (status == HAL_OK)
1250 {
1251 /* Enable the TIM Break interrupt */
1252 __HAL_TIM_ENABLE_IT(htim, TIM_IT_BREAK);
1253
1254 /* Enable the complementary PWM output */
1255 TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE);
1256
1257 /* Enable the Main Output */
1258 __HAL_TIM_MOE_ENABLE(htim);
1259
1260 /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */
1261 if (IS_TIM_SLAVE_INSTANCE(htim->Instance))
1262 {
1263 tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS;
1264 if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr))
1265 {
1266 __HAL_TIM_ENABLE(htim);
1267 }
1268 }
1269 else
1270 {
1271 __HAL_TIM_ENABLE(htim);
1272 }
1273 }
1274
1275 /* Return function status */
1276 return status;
1277 }
1278
1279 /**
1280 * @brief Stops the PWM signal generation in interrupt mode on the
1281 * complementary output.
1282 * @param htim TIM handle
1283 * @param Channel TIM Channel to be disabled
1284 * This parameter can be one of the following values:
1285 * @arg TIM_CHANNEL_1: TIM Channel 1 selected
1286 * @arg TIM_CHANNEL_2: TIM Channel 2 selected
1287 * @arg TIM_CHANNEL_3: TIM Channel 3 selected
1288 * @retval HAL status
1289 */
HAL_TIMEx_PWMN_Stop_IT(TIM_HandleTypeDef * htim,uint32_t Channel)1290 HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel)
1291 {
1292 HAL_StatusTypeDef status = HAL_OK;
1293 uint32_t tmpccer;
1294
1295 /* Check the parameters */
1296 assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
1297
1298 switch (Channel)
1299 {
1300 case TIM_CHANNEL_1:
1301 {
1302 /* Disable the TIM Capture/Compare 1 interrupt */
1303 __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC1);
1304 break;
1305 }
1306
1307 case TIM_CHANNEL_2:
1308 {
1309 /* Disable the TIM Capture/Compare 2 interrupt */
1310 __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC2);
1311 break;
1312 }
1313
1314 case TIM_CHANNEL_3:
1315 {
1316 /* Disable the TIM Capture/Compare 3 interrupt */
1317 __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC3);
1318 break;
1319 }
1320
1321 default:
1322 status = HAL_ERROR;
1323 break;
1324 }
1325
1326 if (status == HAL_OK)
1327 {
1328 /* Disable the complementary PWM output */
1329 TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE);
1330
1331 /* Disable the TIM Break interrupt (only if no more channel is active) */
1332 tmpccer = htim->Instance->CCER;
1333 if ((tmpccer & (TIM_CCER_CC1NE | TIM_CCER_CC2NE | TIM_CCER_CC3NE)) == (uint32_t)RESET)
1334 {
1335 __HAL_TIM_DISABLE_IT(htim, TIM_IT_BREAK);
1336 }
1337
1338 /* Disable the Main Output */
1339 __HAL_TIM_MOE_DISABLE(htim);
1340
1341 /* Disable the Peripheral */
1342 __HAL_TIM_DISABLE(htim);
1343
1344 /* Set the TIM complementary channel state */
1345 TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY);
1346 }
1347
1348 /* Return function status */
1349 return status;
1350 }
1351
1352 /**
1353 * @brief Starts the TIM PWM signal generation in DMA mode on the
1354 * complementary output
1355 * @param htim TIM handle
1356 * @param Channel TIM Channel to be enabled
1357 * This parameter can be one of the following values:
1358 * @arg TIM_CHANNEL_1: TIM Channel 1 selected
1359 * @arg TIM_CHANNEL_2: TIM Channel 2 selected
1360 * @arg TIM_CHANNEL_3: TIM Channel 3 selected
1361 * @param pData The source Buffer address.
1362 * @param Length The length of data to be transferred from memory to TIM peripheral
1363 * @retval HAL status
1364 */
HAL_TIMEx_PWMN_Start_DMA(TIM_HandleTypeDef * htim,uint32_t Channel,const uint32_t * pData,uint16_t Length)1365 HAL_StatusTypeDef HAL_TIMEx_PWMN_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel, const uint32_t *pData,
1366 uint16_t Length)
1367 {
1368 HAL_StatusTypeDef status = HAL_OK;
1369 uint32_t tmpsmcr;
1370
1371 /* Check the parameters */
1372 assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
1373
1374 /* Set the TIM complementary channel state */
1375 if (TIM_CHANNEL_N_STATE_GET(htim, Channel) == HAL_TIM_CHANNEL_STATE_BUSY)
1376 {
1377 return HAL_BUSY;
1378 }
1379 else if (TIM_CHANNEL_N_STATE_GET(htim, Channel) == HAL_TIM_CHANNEL_STATE_READY)
1380 {
1381 if ((pData == NULL) || (Length == 0U))
1382 {
1383 return HAL_ERROR;
1384 }
1385 else
1386 {
1387 TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_BUSY);
1388 }
1389 }
1390 else
1391 {
1392 return HAL_ERROR;
1393 }
1394
1395 switch (Channel)
1396 {
1397 case TIM_CHANNEL_1:
1398 {
1399 /* Set the DMA compare callbacks */
1400 htim->hdma[TIM_DMA_ID_CC1]->XferCpltCallback = TIM_DMADelayPulseNCplt;
1401 htim->hdma[TIM_DMA_ID_CC1]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt;
1402
1403 /* Set the DMA error callback */
1404 htim->hdma[TIM_DMA_ID_CC1]->XferErrorCallback = TIM_DMAErrorCCxN ;
1405
1406 /* Enable the DMA channel */
1407 if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC1], (uint32_t)pData, (uint32_t)&htim->Instance->CCR1,
1408 Length) != HAL_OK)
1409 {
1410 /* Return error status */
1411 return HAL_ERROR;
1412 }
1413 /* Enable the TIM Capture/Compare 1 DMA request */
1414 __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC1);
1415 break;
1416 }
1417
1418 case TIM_CHANNEL_2:
1419 {
1420 /* Set the DMA compare callbacks */
1421 htim->hdma[TIM_DMA_ID_CC2]->XferCpltCallback = TIM_DMADelayPulseNCplt;
1422 htim->hdma[TIM_DMA_ID_CC2]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt;
1423
1424 /* Set the DMA error callback */
1425 htim->hdma[TIM_DMA_ID_CC2]->XferErrorCallback = TIM_DMAErrorCCxN ;
1426
1427 /* Enable the DMA channel */
1428 if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC2], (uint32_t)pData, (uint32_t)&htim->Instance->CCR2,
1429 Length) != HAL_OK)
1430 {
1431 /* Return error status */
1432 return HAL_ERROR;
1433 }
1434 /* Enable the TIM Capture/Compare 2 DMA request */
1435 __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC2);
1436 break;
1437 }
1438
1439 case TIM_CHANNEL_3:
1440 {
1441 /* Set the DMA compare callbacks */
1442 htim->hdma[TIM_DMA_ID_CC3]->XferCpltCallback = TIM_DMADelayPulseNCplt;
1443 htim->hdma[TIM_DMA_ID_CC3]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt;
1444
1445 /* Set the DMA error callback */
1446 htim->hdma[TIM_DMA_ID_CC3]->XferErrorCallback = TIM_DMAErrorCCxN ;
1447
1448 /* Enable the DMA channel */
1449 if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC3], (uint32_t)pData, (uint32_t)&htim->Instance->CCR3,
1450 Length) != HAL_OK)
1451 {
1452 /* Return error status */
1453 return HAL_ERROR;
1454 }
1455 /* Enable the TIM Capture/Compare 3 DMA request */
1456 __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC3);
1457 break;
1458 }
1459
1460 default:
1461 status = HAL_ERROR;
1462 break;
1463 }
1464
1465 if (status == HAL_OK)
1466 {
1467 /* Enable the complementary PWM output */
1468 TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE);
1469
1470 /* Enable the Main Output */
1471 __HAL_TIM_MOE_ENABLE(htim);
1472
1473 /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */
1474 if (IS_TIM_SLAVE_INSTANCE(htim->Instance))
1475 {
1476 tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS;
1477 if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr))
1478 {
1479 __HAL_TIM_ENABLE(htim);
1480 }
1481 }
1482 else
1483 {
1484 __HAL_TIM_ENABLE(htim);
1485 }
1486 }
1487
1488 /* Return function status */
1489 return status;
1490 }
1491
1492 /**
1493 * @brief Stops the TIM PWM signal generation in DMA mode on the complementary
1494 * output
1495 * @param htim TIM handle
1496 * @param Channel TIM Channel to be disabled
1497 * This parameter can be one of the following values:
1498 * @arg TIM_CHANNEL_1: TIM Channel 1 selected
1499 * @arg TIM_CHANNEL_2: TIM Channel 2 selected
1500 * @arg TIM_CHANNEL_3: TIM Channel 3 selected
1501 * @retval HAL status
1502 */
HAL_TIMEx_PWMN_Stop_DMA(TIM_HandleTypeDef * htim,uint32_t Channel)1503 HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel)
1504 {
1505 HAL_StatusTypeDef status = HAL_OK;
1506
1507 /* Check the parameters */
1508 assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
1509
1510 switch (Channel)
1511 {
1512 case TIM_CHANNEL_1:
1513 {
1514 /* Disable the TIM Capture/Compare 1 DMA request */
1515 __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC1);
1516 (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC1]);
1517 break;
1518 }
1519
1520 case TIM_CHANNEL_2:
1521 {
1522 /* Disable the TIM Capture/Compare 2 DMA request */
1523 __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC2);
1524 (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC2]);
1525 break;
1526 }
1527
1528 case TIM_CHANNEL_3:
1529 {
1530 /* Disable the TIM Capture/Compare 3 DMA request */
1531 __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC3);
1532 (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC3]);
1533 break;
1534 }
1535
1536 default:
1537 status = HAL_ERROR;
1538 break;
1539 }
1540
1541 if (status == HAL_OK)
1542 {
1543 /* Disable the complementary PWM output */
1544 TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE);
1545
1546 /* Disable the Main Output */
1547 __HAL_TIM_MOE_DISABLE(htim);
1548
1549 /* Disable the Peripheral */
1550 __HAL_TIM_DISABLE(htim);
1551
1552 /* Set the TIM complementary channel state */
1553 TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY);
1554 }
1555
1556 /* Return function status */
1557 return status;
1558 }
1559
1560 /**
1561 * @}
1562 */
1563
1564 /** @defgroup TIMEx_Exported_Functions_Group4 Extended Timer Complementary One Pulse functions
1565 * @brief Timer Complementary One Pulse functions
1566 *
1567 @verbatim
1568 ==============================================================================
1569 ##### Timer Complementary One Pulse functions #####
1570 ==============================================================================
1571 [..]
1572 This section provides functions allowing to:
1573 (+) Start the Complementary One Pulse generation.
1574 (+) Stop the Complementary One Pulse.
1575 (+) Start the Complementary One Pulse and enable interrupts.
1576 (+) Stop the Complementary One Pulse and disable interrupts.
1577
1578 @endverbatim
1579 * @{
1580 */
1581
1582 /**
1583 * @brief Starts the TIM One Pulse signal generation on the complementary
1584 * output.
1585 * @note OutputChannel must match the pulse output channel chosen when calling
1586 * @ref HAL_TIM_OnePulse_ConfigChannel().
1587 * @param htim TIM One Pulse handle
1588 * @param OutputChannel pulse output channel to enable
1589 * This parameter can be one of the following values:
1590 * @arg TIM_CHANNEL_1: TIM Channel 1 selected
1591 * @arg TIM_CHANNEL_2: TIM Channel 2 selected
1592 * @retval HAL status
1593 */
HAL_TIMEx_OnePulseN_Start(TIM_HandleTypeDef * htim,uint32_t OutputChannel)1594 HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Start(TIM_HandleTypeDef *htim, uint32_t OutputChannel)
1595 {
1596 uint32_t input_channel = (OutputChannel == TIM_CHANNEL_1) ? TIM_CHANNEL_2 : TIM_CHANNEL_1;
1597 HAL_TIM_ChannelStateTypeDef channel_1_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_1);
1598 HAL_TIM_ChannelStateTypeDef channel_2_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_2);
1599 HAL_TIM_ChannelStateTypeDef complementary_channel_1_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHANNEL_1);
1600 HAL_TIM_ChannelStateTypeDef complementary_channel_2_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHANNEL_2);
1601
1602 /* Check the parameters */
1603 assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, OutputChannel));
1604
1605 /* Check the TIM channels state */
1606 if ((channel_1_state != HAL_TIM_CHANNEL_STATE_READY)
1607 || (channel_2_state != HAL_TIM_CHANNEL_STATE_READY)
1608 || (complementary_channel_1_state != HAL_TIM_CHANNEL_STATE_READY)
1609 || (complementary_channel_2_state != HAL_TIM_CHANNEL_STATE_READY))
1610 {
1611 return HAL_ERROR;
1612 }
1613
1614 /* Set the TIM channels state */
1615 TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY);
1616 TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY);
1617 TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY);
1618 TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY);
1619
1620 /* Enable the complementary One Pulse output channel and the Input Capture channel */
1621 TIM_CCxNChannelCmd(htim->Instance, OutputChannel, TIM_CCxN_ENABLE);
1622 TIM_CCxChannelCmd(htim->Instance, input_channel, TIM_CCx_ENABLE);
1623
1624 /* Enable the Main Output */
1625 __HAL_TIM_MOE_ENABLE(htim);
1626
1627 /* Return function status */
1628 return HAL_OK;
1629 }
1630
1631 /**
1632 * @brief Stops the TIM One Pulse signal generation on the complementary
1633 * output.
1634 * @note OutputChannel must match the pulse output channel chosen when calling
1635 * @ref HAL_TIM_OnePulse_ConfigChannel().
1636 * @param htim TIM One Pulse handle
1637 * @param OutputChannel pulse output channel to disable
1638 * This parameter can be one of the following values:
1639 * @arg TIM_CHANNEL_1: TIM Channel 1 selected
1640 * @arg TIM_CHANNEL_2: TIM Channel 2 selected
1641 * @retval HAL status
1642 */
HAL_TIMEx_OnePulseN_Stop(TIM_HandleTypeDef * htim,uint32_t OutputChannel)1643 HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Stop(TIM_HandleTypeDef *htim, uint32_t OutputChannel)
1644 {
1645 uint32_t input_channel = (OutputChannel == TIM_CHANNEL_1) ? TIM_CHANNEL_2 : TIM_CHANNEL_1;
1646
1647 /* Check the parameters */
1648 assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, OutputChannel));
1649
1650 /* Disable the complementary One Pulse output channel and the Input Capture channel */
1651 TIM_CCxNChannelCmd(htim->Instance, OutputChannel, TIM_CCxN_DISABLE);
1652 TIM_CCxChannelCmd(htim->Instance, input_channel, TIM_CCx_DISABLE);
1653
1654 /* Disable the Main Output */
1655 __HAL_TIM_MOE_DISABLE(htim);
1656
1657 /* Disable the Peripheral */
1658 __HAL_TIM_DISABLE(htim);
1659
1660 /* Set the TIM channels state */
1661 TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY);
1662 TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY);
1663 TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY);
1664 TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY);
1665
1666 /* Return function status */
1667 return HAL_OK;
1668 }
1669
1670 /**
1671 * @brief Starts the TIM One Pulse signal generation in interrupt mode on the
1672 * complementary channel.
1673 * @note OutputChannel must match the pulse output channel chosen when calling
1674 * @ref HAL_TIM_OnePulse_ConfigChannel().
1675 * @param htim TIM One Pulse handle
1676 * @param OutputChannel pulse output channel to enable
1677 * This parameter can be one of the following values:
1678 * @arg TIM_CHANNEL_1: TIM Channel 1 selected
1679 * @arg TIM_CHANNEL_2: TIM Channel 2 selected
1680 * @retval HAL status
1681 */
HAL_TIMEx_OnePulseN_Start_IT(TIM_HandleTypeDef * htim,uint32_t OutputChannel)1682 HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Start_IT(TIM_HandleTypeDef *htim, uint32_t OutputChannel)
1683 {
1684 uint32_t input_channel = (OutputChannel == TIM_CHANNEL_1) ? TIM_CHANNEL_2 : TIM_CHANNEL_1;
1685 HAL_TIM_ChannelStateTypeDef channel_1_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_1);
1686 HAL_TIM_ChannelStateTypeDef channel_2_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_2);
1687 HAL_TIM_ChannelStateTypeDef complementary_channel_1_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHANNEL_1);
1688 HAL_TIM_ChannelStateTypeDef complementary_channel_2_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHANNEL_2);
1689
1690 /* Check the parameters */
1691 assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, OutputChannel));
1692
1693 /* Check the TIM channels state */
1694 if ((channel_1_state != HAL_TIM_CHANNEL_STATE_READY)
1695 || (channel_2_state != HAL_TIM_CHANNEL_STATE_READY)
1696 || (complementary_channel_1_state != HAL_TIM_CHANNEL_STATE_READY)
1697 || (complementary_channel_2_state != HAL_TIM_CHANNEL_STATE_READY))
1698 {
1699 return HAL_ERROR;
1700 }
1701
1702 /* Set the TIM channels state */
1703 TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY);
1704 TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY);
1705 TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY);
1706 TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY);
1707
1708 /* Enable the TIM Capture/Compare 1 interrupt */
1709 __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC1);
1710
1711 /* Enable the TIM Capture/Compare 2 interrupt */
1712 __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC2);
1713
1714 /* Enable the complementary One Pulse output channel and the Input Capture channel */
1715 TIM_CCxNChannelCmd(htim->Instance, OutputChannel, TIM_CCxN_ENABLE);
1716 TIM_CCxChannelCmd(htim->Instance, input_channel, TIM_CCx_ENABLE);
1717
1718 /* Enable the Main Output */
1719 __HAL_TIM_MOE_ENABLE(htim);
1720
1721 /* Return function status */
1722 return HAL_OK;
1723 }
1724
1725 /**
1726 * @brief Stops the TIM One Pulse signal generation in interrupt mode on the
1727 * complementary channel.
1728 * @note OutputChannel must match the pulse output channel chosen when calling
1729 * @ref HAL_TIM_OnePulse_ConfigChannel().
1730 * @param htim TIM One Pulse handle
1731 * @param OutputChannel pulse output channel to disable
1732 * This parameter can be one of the following values:
1733 * @arg TIM_CHANNEL_1: TIM Channel 1 selected
1734 * @arg TIM_CHANNEL_2: TIM Channel 2 selected
1735 * @retval HAL status
1736 */
HAL_TIMEx_OnePulseN_Stop_IT(TIM_HandleTypeDef * htim,uint32_t OutputChannel)1737 HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Stop_IT(TIM_HandleTypeDef *htim, uint32_t OutputChannel)
1738 {
1739 uint32_t input_channel = (OutputChannel == TIM_CHANNEL_1) ? TIM_CHANNEL_2 : TIM_CHANNEL_1;
1740
1741 /* Check the parameters */
1742 assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, OutputChannel));
1743
1744 /* Disable the TIM Capture/Compare 1 interrupt */
1745 __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC1);
1746
1747 /* Disable the TIM Capture/Compare 2 interrupt */
1748 __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC2);
1749
1750 /* Disable the complementary One Pulse output channel and the Input Capture channel */
1751 TIM_CCxNChannelCmd(htim->Instance, OutputChannel, TIM_CCxN_DISABLE);
1752 TIM_CCxChannelCmd(htim->Instance, input_channel, TIM_CCx_DISABLE);
1753
1754 /* Disable the Main Output */
1755 __HAL_TIM_MOE_DISABLE(htim);
1756
1757 /* Disable the Peripheral */
1758 __HAL_TIM_DISABLE(htim);
1759
1760 /* Set the TIM channels state */
1761 TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY);
1762 TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY);
1763 TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY);
1764 TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY);
1765
1766 /* Return function status */
1767 return HAL_OK;
1768 }
1769
1770 /**
1771 * @}
1772 */
1773
1774 /** @defgroup TIMEx_Exported_Functions_Group5 Extended Peripheral Control functions
1775 * @brief Peripheral Control functions
1776 *
1777 @verbatim
1778 ==============================================================================
1779 ##### Peripheral Control functions #####
1780 ==============================================================================
1781 [..]
1782 This section provides functions allowing to:
1783 (+) Configure the commutation event in case of use of the Hall sensor interface.
1784 (+) Configure Output channels for OC and PWM mode.
1785
1786 (+) Configure Complementary channels, break features and dead time.
1787 (+) Configure Master synchronization.
1788 (+) Configure timer remapping capabilities.
1789 (+) Select timer input source.
1790 (+) Enable or disable channel grouping.
1791
1792 @endverbatim
1793 * @{
1794 */
1795
1796 /**
1797 * @brief Configure the TIM commutation event sequence.
1798 * @note This function is mandatory to use the commutation event in order to
1799 * update the configuration at each commutation detection on the TRGI input of the Timer,
1800 * the typical use of this feature is with the use of another Timer(interface Timer)
1801 * configured in Hall sensor interface, this interface Timer will generate the
1802 * commutation at its TRGO output (connected to Timer used in this function) each time
1803 * the TI1 of the Interface Timer detect a commutation at its input TI1.
1804 * @param htim TIM handle
1805 * @param InputTrigger the Internal trigger corresponding to the Timer Interfacing with the Hall sensor
1806 * This parameter can be one of the following values:
1807 * @arg TIM_TS_ITR0: Internal trigger 0 selected
1808 * @arg TIM_TS_ITR1: Internal trigger 1 selected
1809 * @arg TIM_TS_ITR2: Internal trigger 2 selected
1810 * @arg TIM_TS_ITR3: Internal trigger 3 selected
1811 * @arg TIM_TS_ITR7: Internal trigger 7 selected (*)
1812 * @arg TIM_TS_NONE: No trigger is needed
1813 *
1814 * (*) Value not defined in all devices.
1815 *
1816 * @param CommutationSource the Commutation Event source
1817 * This parameter can be one of the following values:
1818 * @arg TIM_COMMUTATION_TRGI: Commutation source is the TRGI of the Interface Timer
1819 * @arg TIM_COMMUTATION_SOFTWARE: Commutation source is set by software using the COMG bit
1820 * @retval HAL status
1821 */
HAL_TIMEx_ConfigCommutEvent(TIM_HandleTypeDef * htim,uint32_t InputTrigger,uint32_t CommutationSource)1822 HAL_StatusTypeDef HAL_TIMEx_ConfigCommutEvent(TIM_HandleTypeDef *htim, uint32_t InputTrigger,
1823 uint32_t CommutationSource)
1824 {
1825 /* Check the parameters */
1826 assert_param(IS_TIM_COMMUTATION_EVENT_INSTANCE(htim->Instance));
1827 assert_param(IS_TIM_INTERNAL_TRIGGEREVENT_SELECTION(InputTrigger));
1828
1829 __HAL_LOCK(htim);
1830
1831 #if defined(USB_BASE)
1832 if ((InputTrigger == TIM_TS_ITR0) || (InputTrigger == TIM_TS_ITR1) ||
1833 (InputTrigger == TIM_TS_ITR2) || (InputTrigger == TIM_TS_ITR3) ||
1834 (InputTrigger == TIM_TS_ITR7))
1835 #else
1836 if ((InputTrigger == TIM_TS_ITR0) || (InputTrigger == TIM_TS_ITR1) ||
1837 (InputTrigger == TIM_TS_ITR2) || (InputTrigger == TIM_TS_ITR3))
1838 #endif /* USB_BASE */
1839 {
1840 /* Select the Input trigger */
1841 htim->Instance->SMCR &= ~TIM_SMCR_TS;
1842 htim->Instance->SMCR |= InputTrigger;
1843 }
1844
1845 /* Select the Capture Compare preload feature */
1846 htim->Instance->CR2 |= TIM_CR2_CCPC;
1847 /* Select the Commutation event source */
1848 htim->Instance->CR2 &= ~TIM_CR2_CCUS;
1849 htim->Instance->CR2 |= CommutationSource;
1850
1851 /* Disable Commutation Interrupt */
1852 __HAL_TIM_DISABLE_IT(htim, TIM_IT_COM);
1853
1854 /* Disable Commutation DMA request */
1855 __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_COM);
1856
1857 __HAL_UNLOCK(htim);
1858
1859 return HAL_OK;
1860 }
1861
1862 /**
1863 * @brief Configure the TIM commutation event sequence with interrupt.
1864 * @note This function is mandatory to use the commutation event in order to
1865 * update the configuration at each commutation detection on the TRGI input of the Timer,
1866 * the typical use of this feature is with the use of another Timer(interface Timer)
1867 * configured in Hall sensor interface, this interface Timer will generate the
1868 * commutation at its TRGO output (connected to Timer used in this function) each time
1869 * the TI1 of the Interface Timer detect a commutation at its input TI1.
1870 * @param htim TIM handle
1871 * @param InputTrigger the Internal trigger corresponding to the Timer Interfacing with the Hall sensor
1872 * This parameter can be one of the following values:
1873 * @arg TIM_TS_ITR0: Internal trigger 0 selected
1874 * @arg TIM_TS_ITR1: Internal trigger 1 selected
1875 * @arg TIM_TS_ITR2: Internal trigger 2 selected
1876 * @arg TIM_TS_ITR3: Internal trigger 3 selected
1877 * @arg TIM_TS_ITR7: Internal trigger 7 selected (*)
1878 * @arg TIM_TS_NONE: No trigger is needed
1879 *
1880 * (*) Value not defined in all devices.
1881 *
1882 * @param CommutationSource the Commutation Event source
1883 * This parameter can be one of the following values:
1884 * @arg TIM_COMMUTATION_TRGI: Commutation source is the TRGI of the Interface Timer
1885 * @arg TIM_COMMUTATION_SOFTWARE: Commutation source is set by software using the COMG bit
1886 * @retval HAL status
1887 */
HAL_TIMEx_ConfigCommutEvent_IT(TIM_HandleTypeDef * htim,uint32_t InputTrigger,uint32_t CommutationSource)1888 HAL_StatusTypeDef HAL_TIMEx_ConfigCommutEvent_IT(TIM_HandleTypeDef *htim, uint32_t InputTrigger,
1889 uint32_t CommutationSource)
1890 {
1891 /* Check the parameters */
1892 assert_param(IS_TIM_COMMUTATION_EVENT_INSTANCE(htim->Instance));
1893 assert_param(IS_TIM_INTERNAL_TRIGGEREVENT_SELECTION(InputTrigger));
1894
1895 __HAL_LOCK(htim);
1896
1897 #if defined(USB_BASE)
1898 if ((InputTrigger == TIM_TS_ITR0) || (InputTrigger == TIM_TS_ITR1) ||
1899 (InputTrigger == TIM_TS_ITR2) || (InputTrigger == TIM_TS_ITR3) ||
1900 (InputTrigger == TIM_TS_ITR7))
1901 #else
1902 if ((InputTrigger == TIM_TS_ITR0) || (InputTrigger == TIM_TS_ITR1) ||
1903 (InputTrigger == TIM_TS_ITR2) || (InputTrigger == TIM_TS_ITR3))
1904 #endif /* USB_BASE */
1905 {
1906 /* Select the Input trigger */
1907 htim->Instance->SMCR &= ~TIM_SMCR_TS;
1908 htim->Instance->SMCR |= InputTrigger;
1909 }
1910
1911 /* Select the Capture Compare preload feature */
1912 htim->Instance->CR2 |= TIM_CR2_CCPC;
1913 /* Select the Commutation event source */
1914 htim->Instance->CR2 &= ~TIM_CR2_CCUS;
1915 htim->Instance->CR2 |= CommutationSource;
1916
1917 /* Disable Commutation DMA request */
1918 __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_COM);
1919
1920 /* Enable the Commutation Interrupt */
1921 __HAL_TIM_ENABLE_IT(htim, TIM_IT_COM);
1922
1923 __HAL_UNLOCK(htim);
1924
1925 return HAL_OK;
1926 }
1927
1928 /**
1929 * @brief Configure the TIM commutation event sequence with DMA.
1930 * @note This function is mandatory to use the commutation event in order to
1931 * update the configuration at each commutation detection on the TRGI input of the Timer,
1932 * the typical use of this feature is with the use of another Timer(interface Timer)
1933 * configured in Hall sensor interface, this interface Timer will generate the
1934 * commutation at its TRGO output (connected to Timer used in this function) each time
1935 * the TI1 of the Interface Timer detect a commutation at its input TI1.
1936 * @note The user should configure the DMA in his own software, in This function only the COMDE bit is set
1937 * @param htim TIM handle
1938 * @param InputTrigger the Internal trigger corresponding to the Timer Interfacing with the Hall sensor
1939 * This parameter can be one of the following values:
1940 * @arg TIM_TS_ITR0: Internal trigger 0 selected
1941 * @arg TIM_TS_ITR1: Internal trigger 1 selected
1942 * @arg TIM_TS_ITR2: Internal trigger 2 selected
1943 * @arg TIM_TS_ITR3: Internal trigger 3 selected
1944 * @arg TIM_TS_ITR7: Internal trigger 7 selected (*)
1945 * @arg TIM_TS_NONE: No trigger is needed
1946 *
1947 * (*) Value not defined in all devices.
1948 *
1949 * @param CommutationSource the Commutation Event source
1950 * This parameter can be one of the following values:
1951 * @arg TIM_COMMUTATION_TRGI: Commutation source is the TRGI of the Interface Timer
1952 * @arg TIM_COMMUTATION_SOFTWARE: Commutation source is set by software using the COMG bit
1953 * @retval HAL status
1954 */
HAL_TIMEx_ConfigCommutEvent_DMA(TIM_HandleTypeDef * htim,uint32_t InputTrigger,uint32_t CommutationSource)1955 HAL_StatusTypeDef HAL_TIMEx_ConfigCommutEvent_DMA(TIM_HandleTypeDef *htim, uint32_t InputTrigger,
1956 uint32_t CommutationSource)
1957 {
1958 /* Check the parameters */
1959 assert_param(IS_TIM_COMMUTATION_EVENT_INSTANCE(htim->Instance));
1960 assert_param(IS_TIM_INTERNAL_TRIGGEREVENT_SELECTION(InputTrigger));
1961
1962 __HAL_LOCK(htim);
1963
1964 #if defined(USB_BASE)
1965 if ((InputTrigger == TIM_TS_ITR0) || (InputTrigger == TIM_TS_ITR1) ||
1966 (InputTrigger == TIM_TS_ITR2) || (InputTrigger == TIM_TS_ITR3) ||
1967 (InputTrigger == TIM_TS_ITR7))
1968 #else
1969 if ((InputTrigger == TIM_TS_ITR0) || (InputTrigger == TIM_TS_ITR1) ||
1970 (InputTrigger == TIM_TS_ITR2) || (InputTrigger == TIM_TS_ITR3))
1971 #endif /* USB_BASE */
1972 {
1973 /* Select the Input trigger */
1974 htim->Instance->SMCR &= ~TIM_SMCR_TS;
1975 htim->Instance->SMCR |= InputTrigger;
1976 }
1977
1978 /* Select the Capture Compare preload feature */
1979 htim->Instance->CR2 |= TIM_CR2_CCPC;
1980 /* Select the Commutation event source */
1981 htim->Instance->CR2 &= ~TIM_CR2_CCUS;
1982 htim->Instance->CR2 |= CommutationSource;
1983
1984 /* Enable the Commutation DMA Request */
1985 /* Set the DMA Commutation Callback */
1986 htim->hdma[TIM_DMA_ID_COMMUTATION]->XferCpltCallback = TIMEx_DMACommutationCplt;
1987 htim->hdma[TIM_DMA_ID_COMMUTATION]->XferHalfCpltCallback = TIMEx_DMACommutationHalfCplt;
1988 /* Set the DMA error callback */
1989 htim->hdma[TIM_DMA_ID_COMMUTATION]->XferErrorCallback = TIM_DMAError;
1990
1991 /* Disable Commutation Interrupt */
1992 __HAL_TIM_DISABLE_IT(htim, TIM_IT_COM);
1993
1994 /* Enable the Commutation DMA Request */
1995 __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_COM);
1996
1997 __HAL_UNLOCK(htim);
1998
1999 return HAL_OK;
2000 }
2001
2002 /**
2003 * @brief Configures the TIM in master mode.
2004 * @param htim TIM handle.
2005 * @param sMasterConfig pointer to a TIM_MasterConfigTypeDef structure that
2006 * contains the selected trigger output (TRGO) and the Master/Slave
2007 * mode.
2008 * @retval HAL status
2009 */
HAL_TIMEx_MasterConfigSynchronization(TIM_HandleTypeDef * htim,const TIM_MasterConfigTypeDef * sMasterConfig)2010 HAL_StatusTypeDef HAL_TIMEx_MasterConfigSynchronization(TIM_HandleTypeDef *htim,
2011 const TIM_MasterConfigTypeDef *sMasterConfig)
2012 {
2013 uint32_t tmpcr2;
2014 uint32_t tmpsmcr;
2015
2016 /* Check the parameters */
2017 assert_param(IS_TIM_MASTER_INSTANCE(htim->Instance));
2018 assert_param(IS_TIM_TRGO_SOURCE(sMasterConfig->MasterOutputTrigger));
2019 assert_param(IS_TIM_MSM_STATE(sMasterConfig->MasterSlaveMode));
2020
2021 /* Check input state */
2022 __HAL_LOCK(htim);
2023
2024 /* Change the handler state */
2025 htim->State = HAL_TIM_STATE_BUSY;
2026
2027 /* Get the TIMx CR2 register value */
2028 tmpcr2 = htim->Instance->CR2;
2029
2030 /* Get the TIMx SMCR register value */
2031 tmpsmcr = htim->Instance->SMCR;
2032
2033 /* If the timer supports ADC synchronization through TRGO2, set the master mode selection 2 */
2034 if (IS_TIM_TRGO2_INSTANCE(htim->Instance))
2035 {
2036 /* Check the parameters */
2037 assert_param(IS_TIM_TRGO2_SOURCE(sMasterConfig->MasterOutputTrigger2));
2038
2039 /* Clear the MMS2 bits */
2040 tmpcr2 &= ~TIM_CR2_MMS2;
2041 /* Select the TRGO2 source*/
2042 tmpcr2 |= sMasterConfig->MasterOutputTrigger2;
2043 }
2044
2045 /* Reset the MMS Bits */
2046 tmpcr2 &= ~TIM_CR2_MMS;
2047 /* Select the TRGO source */
2048 tmpcr2 |= sMasterConfig->MasterOutputTrigger;
2049
2050 /* Update TIMx CR2 */
2051 htim->Instance->CR2 = tmpcr2;
2052
2053 if (IS_TIM_SLAVE_INSTANCE(htim->Instance))
2054 {
2055 /* Reset the MSM Bit */
2056 tmpsmcr &= ~TIM_SMCR_MSM;
2057 /* Set master mode */
2058 tmpsmcr |= sMasterConfig->MasterSlaveMode;
2059
2060 /* Update TIMx SMCR */
2061 htim->Instance->SMCR = tmpsmcr;
2062 }
2063
2064 /* Change the htim state */
2065 htim->State = HAL_TIM_STATE_READY;
2066
2067 __HAL_UNLOCK(htim);
2068
2069 return HAL_OK;
2070 }
2071
2072 /**
2073 * @brief Configures the Break feature, dead time, Lock level, OSSI/OSSR State
2074 * and the AOE(automatic output enable).
2075 * @param htim TIM handle
2076 * @param sBreakDeadTimeConfig pointer to a TIM_ConfigBreakDeadConfigTypeDef structure that
2077 * contains the BDTR Register configuration information for the TIM peripheral.
2078 * @note Interrupts can be generated when an active level is detected on the
2079 * break input, the break 2 input or the system break input. Break
2080 * interrupt can be enabled by calling the @ref __HAL_TIM_ENABLE_IT macro.
2081 * @retval HAL status
2082 */
HAL_TIMEx_ConfigBreakDeadTime(TIM_HandleTypeDef * htim,const TIM_BreakDeadTimeConfigTypeDef * sBreakDeadTimeConfig)2083 HAL_StatusTypeDef HAL_TIMEx_ConfigBreakDeadTime(TIM_HandleTypeDef *htim,
2084 const TIM_BreakDeadTimeConfigTypeDef *sBreakDeadTimeConfig)
2085 {
2086 /* Keep this variable initialized to 0 as it is used to configure BDTR register */
2087 uint32_t tmpbdtr = 0U;
2088
2089 /* Check the parameters */
2090 assert_param(IS_TIM_BREAK_INSTANCE(htim->Instance));
2091 assert_param(IS_TIM_OSSR_STATE(sBreakDeadTimeConfig->OffStateRunMode));
2092 assert_param(IS_TIM_OSSI_STATE(sBreakDeadTimeConfig->OffStateIDLEMode));
2093 assert_param(IS_TIM_LOCK_LEVEL(sBreakDeadTimeConfig->LockLevel));
2094 assert_param(IS_TIM_DEADTIME(sBreakDeadTimeConfig->DeadTime));
2095 assert_param(IS_TIM_BREAK_STATE(sBreakDeadTimeConfig->BreakState));
2096 assert_param(IS_TIM_BREAK_POLARITY(sBreakDeadTimeConfig->BreakPolarity));
2097 assert_param(IS_TIM_BREAK_FILTER(sBreakDeadTimeConfig->BreakFilter));
2098 assert_param(IS_TIM_AUTOMATIC_OUTPUT_STATE(sBreakDeadTimeConfig->AutomaticOutput));
2099
2100 /* Check input state */
2101 __HAL_LOCK(htim);
2102
2103 /* Set the Lock level, the Break enable Bit and the Polarity, the OSSR State,
2104 the OSSI State, the dead time value and the Automatic Output Enable Bit */
2105
2106 /* Set the BDTR bits */
2107 MODIFY_REG(tmpbdtr, TIM_BDTR_DTG, sBreakDeadTimeConfig->DeadTime);
2108 MODIFY_REG(tmpbdtr, TIM_BDTR_LOCK, sBreakDeadTimeConfig->LockLevel);
2109 MODIFY_REG(tmpbdtr, TIM_BDTR_OSSI, sBreakDeadTimeConfig->OffStateIDLEMode);
2110 MODIFY_REG(tmpbdtr, TIM_BDTR_OSSR, sBreakDeadTimeConfig->OffStateRunMode);
2111 MODIFY_REG(tmpbdtr, TIM_BDTR_BKE, sBreakDeadTimeConfig->BreakState);
2112 MODIFY_REG(tmpbdtr, TIM_BDTR_BKP, sBreakDeadTimeConfig->BreakPolarity);
2113 MODIFY_REG(tmpbdtr, TIM_BDTR_AOE, sBreakDeadTimeConfig->AutomaticOutput);
2114 MODIFY_REG(tmpbdtr, TIM_BDTR_BKF, (sBreakDeadTimeConfig->BreakFilter << TIM_BDTR_BKF_Pos));
2115
2116 if (IS_TIM_ADVANCED_INSTANCE(htim->Instance))
2117 {
2118 /* Check the parameters */
2119 assert_param(IS_TIM_BREAK_AFMODE(sBreakDeadTimeConfig->BreakAFMode));
2120
2121 /* Set BREAK AF mode */
2122 MODIFY_REG(tmpbdtr, TIM_BDTR_BKBID, sBreakDeadTimeConfig->BreakAFMode);
2123 }
2124
2125 if (IS_TIM_BKIN2_INSTANCE(htim->Instance))
2126 {
2127 /* Check the parameters */
2128 assert_param(IS_TIM_BREAK2_STATE(sBreakDeadTimeConfig->Break2State));
2129 assert_param(IS_TIM_BREAK2_POLARITY(sBreakDeadTimeConfig->Break2Polarity));
2130 assert_param(IS_TIM_BREAK_FILTER(sBreakDeadTimeConfig->Break2Filter));
2131
2132 /* Set the BREAK2 input related BDTR bits */
2133 MODIFY_REG(tmpbdtr, TIM_BDTR_BK2F, (sBreakDeadTimeConfig->Break2Filter << TIM_BDTR_BK2F_Pos));
2134 MODIFY_REG(tmpbdtr, TIM_BDTR_BK2E, sBreakDeadTimeConfig->Break2State);
2135 MODIFY_REG(tmpbdtr, TIM_BDTR_BK2P, sBreakDeadTimeConfig->Break2Polarity);
2136
2137 if (IS_TIM_ADVANCED_INSTANCE(htim->Instance))
2138 {
2139 /* Check the parameters */
2140 assert_param(IS_TIM_BREAK2_AFMODE(sBreakDeadTimeConfig->Break2AFMode));
2141
2142 /* Set BREAK2 AF mode */
2143 MODIFY_REG(tmpbdtr, TIM_BDTR_BK2BID, sBreakDeadTimeConfig->Break2AFMode);
2144 }
2145 }
2146
2147 /* Set TIMx_BDTR */
2148 htim->Instance->BDTR = tmpbdtr;
2149
2150 __HAL_UNLOCK(htim);
2151
2152 return HAL_OK;
2153 }
2154
2155 /**
2156 * @brief Configures the break input source.
2157 * @param htim TIM handle.
2158 * @param BreakInput Break input to configure
2159 * This parameter can be one of the following values:
2160 * @arg TIM_BREAKINPUT_BRK: Timer break input
2161 * @arg TIM_BREAKINPUT_BRK2: Timer break 2 input
2162 * @param sBreakInputConfig Break input source configuration
2163 * @retval HAL status
2164 */
HAL_TIMEx_ConfigBreakInput(TIM_HandleTypeDef * htim,uint32_t BreakInput,const TIMEx_BreakInputConfigTypeDef * sBreakInputConfig)2165 HAL_StatusTypeDef HAL_TIMEx_ConfigBreakInput(TIM_HandleTypeDef *htim,
2166 uint32_t BreakInput,
2167 const TIMEx_BreakInputConfigTypeDef *sBreakInputConfig)
2168
2169 {
2170 HAL_StatusTypeDef status = HAL_OK;
2171 uint32_t tmporx;
2172 uint32_t bkin_enable_mask;
2173 uint32_t bkin_polarity_mask;
2174 uint32_t bkin_enable_bitpos;
2175 uint32_t bkin_polarity_bitpos;
2176
2177 /* Check the parameters */
2178 assert_param(IS_TIM_BREAK_INSTANCE(htim->Instance));
2179 assert_param(IS_TIM_BREAKINPUT(BreakInput));
2180 assert_param(IS_TIM_BREAKINPUTSOURCE(sBreakInputConfig->Source));
2181 assert_param(IS_TIM_BREAKINPUTSOURCE_STATE(sBreakInputConfig->Enable));
2182 assert_param(IS_TIM_BREAKINPUTSOURCE_POLARITY(sBreakInputConfig->Polarity));
2183
2184 /* Check input state */
2185 __HAL_LOCK(htim);
2186
2187 switch (sBreakInputConfig->Source)
2188 {
2189 case TIM_BREAKINPUTSOURCE_BKIN:
2190 {
2191 bkin_enable_mask = TIM_AF1_BKINE;
2192 bkin_enable_bitpos = TIM_AF1_BKINE_Pos;
2193 bkin_polarity_mask = TIM_AF1_BKINP;
2194 bkin_polarity_bitpos = TIM_AF1_BKINP_Pos;
2195 break;
2196 }
2197
2198 default:
2199 {
2200 bkin_enable_mask = 0U;
2201 bkin_polarity_mask = 0U;
2202 bkin_enable_bitpos = 0U;
2203 bkin_polarity_bitpos = 0U;
2204 break;
2205 }
2206 }
2207
2208 switch (BreakInput)
2209 {
2210 case TIM_BREAKINPUT_BRK:
2211 {
2212 /* Get the TIMx_AF1 register value */
2213 tmporx = htim->Instance->AF1;
2214
2215 /* Enable the break input */
2216 tmporx &= ~bkin_enable_mask;
2217 tmporx |= (sBreakInputConfig->Enable << bkin_enable_bitpos) & bkin_enable_mask;
2218
2219 /* Set the break input polarity */
2220 tmporx &= ~bkin_polarity_mask;
2221 tmporx |= (sBreakInputConfig->Polarity << bkin_polarity_bitpos) & bkin_polarity_mask;
2222
2223 /* Set TIMx_AF1 */
2224 htim->Instance->AF1 = tmporx;
2225 break;
2226 }
2227 case TIM_BREAKINPUT_BRK2:
2228 {
2229 /* Get the TIMx_AF2 register value */
2230 tmporx = htim->Instance->AF2;
2231
2232 /* Enable the break input */
2233 tmporx &= ~bkin_enable_mask;
2234 tmporx |= (sBreakInputConfig->Enable << bkin_enable_bitpos) & bkin_enable_mask;
2235
2236 /* Set the break input polarity */
2237 tmporx &= ~bkin_polarity_mask;
2238 tmporx |= (sBreakInputConfig->Polarity << bkin_polarity_bitpos) & bkin_polarity_mask;
2239
2240 /* Set TIMx_AF2 */
2241 htim->Instance->AF2 = tmporx;
2242 break;
2243 }
2244 default:
2245 status = HAL_ERROR;
2246 break;
2247 }
2248
2249 __HAL_UNLOCK(htim);
2250
2251 return status;
2252 }
2253
2254 /**
2255 * @brief Configures the TIMx Remapping input capabilities.
2256 * @param htim TIM handle.
2257 * @param Remap specifies the TIM remapping source.
2258 * For TIM1, the parameter can take one of the following values:
2259 * @arg TIM_TIM1_ETR_GPIO: TIM1 ETR is is connected to GPIO
2260 * @arg TIM_TIM1_ETR_ADC1_AWD1: TIM1 ETR is connected to ADC1 AWD1
2261 * @arg TIM_TIM1_ETR_ADC1_AWD2: TIM1 ETR is connected to ADC1 AWD2
2262 * @arg TIM_TIM1_ETR_ADC1_AWD3: TIM1 ETR is connected to ADC1 AWD3
2263 *
2264 * For TIM2, the parameter can take one of the following values: (*)
2265 * @arg TIM_TIM2_ETR_GPIO: TIM2_ETR is connected to GPIO
2266 * @arg TIM_TIM2_ETR_LSE: TIM2_ETR is connected to LSE
2267 * @arg TIM_TIM2_ETR_MCO: TIM2_ETR is connected to MCO
2268 * @arg TIM_TIM2_ETR_MCO2: TIM2_ETR is connected to MCO2
2269 *
2270 * For TIM3, the parameter can take one of the following values:
2271 * @arg TIM_TIM3_ETR_GPIO TIM3_ETR is connected to GPIO
2272 *
2273 * (*) Timer instance not available on all devices \n
2274 *
2275 * @retval HAL status
2276 */
HAL_TIMEx_RemapConfig(TIM_HandleTypeDef * htim,uint32_t Remap)2277 HAL_StatusTypeDef HAL_TIMEx_RemapConfig(TIM_HandleTypeDef *htim, uint32_t Remap)
2278 {
2279 /* Check parameters */
2280 assert_param(IS_TIM_REMAP_INSTANCE(htim->Instance));
2281 assert_param(IS_TIM_REMAP(Remap));
2282
2283 __HAL_LOCK(htim);
2284
2285 MODIFY_REG(htim->Instance->AF1, TIM_AF1_ETRSEL_Msk, Remap);
2286
2287 __HAL_UNLOCK(htim);
2288
2289 return HAL_OK;
2290 }
2291
2292 /**
2293 * @brief Select the timer input source
2294 * @param htim TIM handle.
2295 * @param Channel specifies the TIM Channel
2296 * This parameter can be one of the following values:
2297 * @arg TIM_CHANNEL_1: TI1 input channel
2298 * @arg TIM_CHANNEL_2: TI2 input channel
2299 * @param TISelection specifies the timer input source
2300 *
2301 * For TIM14, the parameter is one of the following values:
2302 * @arg TIM_TIM14_TI1_GPIO: TIM14 TI1 is connected to GPIO
2303 * @arg TIM_TIM14_TI1_RTC: TIM14 TI1 is connected to RTC clock
2304 * @arg TIM_TIM14_TI1_HSE_32: TIM14 TI1 is connected to HSE div 32
2305 * @arg TIM_TIM14_TI1_MCO: TIM14 TI1 is connected to MCO
2306 * @arg TIM_TIM14_TI1_MCO2: TIM14 TI1 is connected to MCO2
2307 *
2308 * For TIM16, the parameter can have the following values:
2309 * @arg TIM_TIM16_TI1_GPIO: TIM16 TI1 is connected to GPIO
2310 * @arg TIM_TIM16_TI1_LSI: TIM16 TI1 is connected to LSI
2311 * @arg TIM_TIM16_TI1_LSE: TIM16 TI1 is connected to LSE
2312 * @arg TIM_TIM16_TI1_MCO2: TIM16 TI1 is connected to MCO2
2313 *
2314 * For TIM17, the parameter can have the following values:
2315 * @arg TIM_TIM17_TI1_GPIO: TIM17 TI1 is connected to GPIO
2316 * @arg TIM_TIM17_TI1_HSE_32: TIM17 TI1 is connected to HSE div 32
2317 * @arg TIM_TIM17_TI1_MCO: TIM17 TI1 is connected to MCO
2318 * @arg TIM_TIM17_TI1_MCO2: TIM17 TI1 is connected to MCO2
2319 * @retval HAL status
2320 */
HAL_TIMEx_TISelection(TIM_HandleTypeDef * htim,uint32_t TISelection,uint32_t Channel)2321 HAL_StatusTypeDef HAL_TIMEx_TISelection(TIM_HandleTypeDef *htim, uint32_t TISelection, uint32_t Channel)
2322 {
2323 HAL_StatusTypeDef status = HAL_OK;
2324
2325 /* Check parameters */
2326 assert_param(IS_TIM_TISEL_INSTANCE(htim->Instance));
2327 assert_param(IS_TIM_TISEL(TISelection));
2328
2329 __HAL_LOCK(htim);
2330
2331 switch (Channel)
2332 {
2333 case TIM_CHANNEL_1:
2334 MODIFY_REG(htim->Instance->TISEL, TIM_TISEL_TI1SEL, TISelection);
2335 break;
2336 case TIM_CHANNEL_2:
2337 MODIFY_REG(htim->Instance->TISEL, TIM_TISEL_TI2SEL, TISelection);
2338 break;
2339 case TIM_CHANNEL_3:
2340 MODIFY_REG(htim->Instance->TISEL, TIM_TISEL_TI3SEL, TISelection);
2341 break;
2342 default:
2343 status = HAL_ERROR;
2344 break;
2345 }
2346
2347 __HAL_UNLOCK(htim);
2348
2349 return status;
2350 }
2351
2352 /**
2353 * @brief Group channel 5 and channel 1, 2 or 3
2354 * @param htim TIM handle.
2355 * @param Channels specifies the reference signal(s) the OC5REF is combined with.
2356 * This parameter can be any combination of the following values:
2357 * TIM_GROUPCH5_NONE: No effect of OC5REF on OC1REFC, OC2REFC and OC3REFC
2358 * TIM_GROUPCH5_OC1REFC: OC1REFC is the logical AND of OC1REFC and OC5REF
2359 * TIM_GROUPCH5_OC2REFC: OC2REFC is the logical AND of OC2REFC and OC5REF
2360 * TIM_GROUPCH5_OC3REFC: OC3REFC is the logical AND of OC3REFC and OC5REF
2361 * @retval HAL status
2362 */
HAL_TIMEx_GroupChannel5(TIM_HandleTypeDef * htim,uint32_t Channels)2363 HAL_StatusTypeDef HAL_TIMEx_GroupChannel5(TIM_HandleTypeDef *htim, uint32_t Channels)
2364 {
2365 /* Check parameters */
2366 assert_param(IS_TIM_COMBINED3PHASEPWM_INSTANCE(htim->Instance));
2367 assert_param(IS_TIM_GROUPCH5(Channels));
2368
2369 /* Process Locked */
2370 __HAL_LOCK(htim);
2371
2372 htim->State = HAL_TIM_STATE_BUSY;
2373
2374 /* Clear GC5Cx bit fields */
2375 htim->Instance->CCR5 &= ~(TIM_CCR5_GC5C3 | TIM_CCR5_GC5C2 | TIM_CCR5_GC5C1);
2376
2377 /* Set GC5Cx bit fields */
2378 htim->Instance->CCR5 |= Channels;
2379
2380 /* Change the htim state */
2381 htim->State = HAL_TIM_STATE_READY;
2382
2383 __HAL_UNLOCK(htim);
2384
2385 return HAL_OK;
2386 }
2387
2388 /**
2389 * @brief Disarm the designated break input (when it operates in bidirectional mode).
2390 * @param htim TIM handle.
2391 * @param BreakInput Break input to disarm
2392 * This parameter can be one of the following values:
2393 * @arg TIM_BREAKINPUT_BRK: Timer break input
2394 * @arg TIM_BREAKINPUT_BRK2: Timer break 2 input
2395 * @note The break input can be disarmed only when it is configured in
2396 * bidirectional mode and when when MOE is reset.
2397 * @note Purpose is to be able to have the input voltage back to high-state,
2398 * whatever the time constant on the output .
2399 * @retval HAL status
2400 */
HAL_TIMEx_DisarmBreakInput(TIM_HandleTypeDef * htim,uint32_t BreakInput)2401 HAL_StatusTypeDef HAL_TIMEx_DisarmBreakInput(TIM_HandleTypeDef *htim, uint32_t BreakInput)
2402 {
2403 HAL_StatusTypeDef status = HAL_OK;
2404 uint32_t tmpbdtr;
2405
2406 /* Check the parameters */
2407 assert_param(IS_TIM_ADVANCED_INSTANCE(htim->Instance));
2408 assert_param(IS_TIM_BREAKINPUT(BreakInput));
2409
2410 switch (BreakInput)
2411 {
2412 case TIM_BREAKINPUT_BRK:
2413 {
2414 /* Check initial conditions */
2415 tmpbdtr = READ_REG(htim->Instance->BDTR);
2416 if ((READ_BIT(tmpbdtr, TIM_BDTR_BKBID) == TIM_BDTR_BKBID) &&
2417 (READ_BIT(tmpbdtr, TIM_BDTR_MOE) == 0U))
2418 {
2419 /* Break input BRK is disarmed */
2420 SET_BIT(htim->Instance->BDTR, TIM_BDTR_BKDSRM);
2421 }
2422 break;
2423 }
2424
2425 case TIM_BREAKINPUT_BRK2:
2426 {
2427 /* Check initial conditions */
2428 tmpbdtr = READ_REG(htim->Instance->BDTR);
2429 if ((READ_BIT(tmpbdtr, TIM_BDTR_BK2BID) == TIM_BDTR_BK2BID) &&
2430 (READ_BIT(tmpbdtr, TIM_BDTR_MOE) == 0U))
2431 {
2432 /* Break input BRK is disarmed */
2433 SET_BIT(htim->Instance->BDTR, TIM_BDTR_BK2DSRM);
2434 }
2435 break;
2436 }
2437 default:
2438 status = HAL_ERROR;
2439 break;
2440 }
2441
2442 return status;
2443 }
2444
2445 /**
2446 * @brief Arm the designated break input (when it operates in bidirectional mode).
2447 * @param htim TIM handle.
2448 * @param BreakInput Break input to arm
2449 * This parameter can be one of the following values:
2450 * @arg TIM_BREAKINPUT_BRK: Timer break input
2451 * @arg TIM_BREAKINPUT_BRK2: Timer break 2 input
2452 * @note Arming is possible at anytime, even if fault is present.
2453 * @note Break input is automatically armed as soon as MOE bit is set.
2454 * @retval HAL status
2455 */
HAL_TIMEx_ReArmBreakInput(const TIM_HandleTypeDef * htim,uint32_t BreakInput)2456 HAL_StatusTypeDef HAL_TIMEx_ReArmBreakInput(const TIM_HandleTypeDef *htim, uint32_t BreakInput)
2457 {
2458 HAL_StatusTypeDef status = HAL_OK;
2459 uint32_t tickstart;
2460
2461 /* Check the parameters */
2462 assert_param(IS_TIM_ADVANCED_INSTANCE(htim->Instance));
2463 assert_param(IS_TIM_BREAKINPUT(BreakInput));
2464
2465 switch (BreakInput)
2466 {
2467 case TIM_BREAKINPUT_BRK:
2468 {
2469 /* Check initial conditions */
2470 if (READ_BIT(htim->Instance->BDTR, TIM_BDTR_BKBID) == TIM_BDTR_BKBID)
2471 {
2472 /* Break input BRK is re-armed automatically by hardware. Poll to check whether fault condition disappeared */
2473 /* Init tickstart for timeout management */
2474 tickstart = HAL_GetTick();
2475 while (READ_BIT(htim->Instance->BDTR, TIM_BDTR_BKDSRM) != 0UL)
2476 {
2477 if ((HAL_GetTick() - tickstart) > TIM_BREAKINPUT_REARM_TIMEOUT)
2478 {
2479 /* New check to avoid false timeout detection in case of preemption */
2480 if (READ_BIT(htim->Instance->BDTR, TIM_BDTR_BKDSRM) != 0UL)
2481 {
2482 return HAL_TIMEOUT;
2483 }
2484 }
2485 }
2486 }
2487 break;
2488 }
2489
2490 case TIM_BREAKINPUT_BRK2:
2491 {
2492 /* Check initial conditions */
2493 if (READ_BIT(htim->Instance->BDTR, TIM_BDTR_BK2BID) == TIM_BDTR_BK2BID)
2494 {
2495 /* Break input BRK2 is re-armed automatically by hardware. Poll to check whether fault condition disappeared */
2496 /* Init tickstart for timeout management */
2497 tickstart = HAL_GetTick();
2498 while (READ_BIT(htim->Instance->BDTR, TIM_BDTR_BK2DSRM) != 0UL)
2499 {
2500 if ((HAL_GetTick() - tickstart) > TIM_BREAKINPUT_REARM_TIMEOUT)
2501 {
2502 /* New check to avoid false timeout detection in case of preemption */
2503 if (READ_BIT(htim->Instance->BDTR, TIM_BDTR_BK2DSRM) != 0UL)
2504 {
2505 return HAL_TIMEOUT;
2506 }
2507 }
2508 }
2509 }
2510 break;
2511 }
2512 default:
2513 status = HAL_ERROR;
2514 break;
2515 }
2516
2517 return status;
2518 }
2519
2520 /**
2521 * @}
2522 */
2523
2524 /** @defgroup TIMEx_Exported_Functions_Group6 Extended Callbacks functions
2525 * @brief Extended Callbacks functions
2526 *
2527 @verbatim
2528 ==============================================================================
2529 ##### Extended Callbacks functions #####
2530 ==============================================================================
2531 [..]
2532 This section provides Extended TIM callback functions:
2533 (+) Timer Commutation callback
2534 (+) Timer Break callback
2535
2536 @endverbatim
2537 * @{
2538 */
2539
2540 /**
2541 * @brief Hall commutation changed callback in non-blocking mode
2542 * @param htim TIM handle
2543 * @retval None
2544 */
HAL_TIMEx_CommutCallback(TIM_HandleTypeDef * htim)2545 __weak void HAL_TIMEx_CommutCallback(TIM_HandleTypeDef *htim)
2546 {
2547 /* Prevent unused argument(s) compilation warning */
2548 UNUSED(htim);
2549
2550 /* NOTE : This function should not be modified, when the callback is needed,
2551 the HAL_TIMEx_CommutCallback could be implemented in the user file
2552 */
2553 }
2554 /**
2555 * @brief Hall commutation changed half complete callback in non-blocking mode
2556 * @param htim TIM handle
2557 * @retval None
2558 */
HAL_TIMEx_CommutHalfCpltCallback(TIM_HandleTypeDef * htim)2559 __weak void HAL_TIMEx_CommutHalfCpltCallback(TIM_HandleTypeDef *htim)
2560 {
2561 /* Prevent unused argument(s) compilation warning */
2562 UNUSED(htim);
2563
2564 /* NOTE : This function should not be modified, when the callback is needed,
2565 the HAL_TIMEx_CommutHalfCpltCallback could be implemented in the user file
2566 */
2567 }
2568
2569 /**
2570 * @brief Hall Break detection callback in non-blocking mode
2571 * @param htim TIM handle
2572 * @retval None
2573 */
HAL_TIMEx_BreakCallback(TIM_HandleTypeDef * htim)2574 __weak void HAL_TIMEx_BreakCallback(TIM_HandleTypeDef *htim)
2575 {
2576 /* Prevent unused argument(s) compilation warning */
2577 UNUSED(htim);
2578
2579 /* NOTE : This function should not be modified, when the callback is needed,
2580 the HAL_TIMEx_BreakCallback could be implemented in the user file
2581 */
2582 }
2583
2584 /**
2585 * @brief Hall Break2 detection callback in non blocking mode
2586 * @param htim: TIM handle
2587 * @retval None
2588 */
HAL_TIMEx_Break2Callback(TIM_HandleTypeDef * htim)2589 __weak void HAL_TIMEx_Break2Callback(TIM_HandleTypeDef *htim)
2590 {
2591 /* Prevent unused argument(s) compilation warning */
2592 UNUSED(htim);
2593
2594 /* NOTE : This function Should not be modified, when the callback is needed,
2595 the HAL_TIMEx_Break2Callback could be implemented in the user file
2596 */
2597 }
2598 /**
2599 * @}
2600 */
2601
2602 /** @defgroup TIMEx_Exported_Functions_Group7 Extended Peripheral State functions
2603 * @brief Extended Peripheral State functions
2604 *
2605 @verbatim
2606 ==============================================================================
2607 ##### Extended Peripheral State functions #####
2608 ==============================================================================
2609 [..]
2610 This subsection permits to get in run-time the status of the peripheral
2611 and the data flow.
2612
2613 @endverbatim
2614 * @{
2615 */
2616
2617 /**
2618 * @brief Return the TIM Hall Sensor interface handle state.
2619 * @param htim TIM Hall Sensor handle
2620 * @retval HAL state
2621 */
HAL_TIMEx_HallSensor_GetState(const TIM_HandleTypeDef * htim)2622 HAL_TIM_StateTypeDef HAL_TIMEx_HallSensor_GetState(const TIM_HandleTypeDef *htim)
2623 {
2624 return htim->State;
2625 }
2626
2627 /**
2628 * @brief Return actual state of the TIM complementary channel.
2629 * @param htim TIM handle
2630 * @param ChannelN TIM Complementary channel
2631 * This parameter can be one of the following values:
2632 * @arg TIM_CHANNEL_1: TIM Channel 1
2633 * @arg TIM_CHANNEL_2: TIM Channel 2
2634 * @arg TIM_CHANNEL_3: TIM Channel 3
2635 * @retval TIM Complementary channel state
2636 */
HAL_TIMEx_GetChannelNState(const TIM_HandleTypeDef * htim,uint32_t ChannelN)2637 HAL_TIM_ChannelStateTypeDef HAL_TIMEx_GetChannelNState(const TIM_HandleTypeDef *htim, uint32_t ChannelN)
2638 {
2639 HAL_TIM_ChannelStateTypeDef channel_state;
2640
2641 /* Check the parameters */
2642 assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, ChannelN));
2643
2644 channel_state = TIM_CHANNEL_N_STATE_GET(htim, ChannelN);
2645
2646 return channel_state;
2647 }
2648 /**
2649 * @}
2650 */
2651
2652 /**
2653 * @}
2654 */
2655
2656 /* Private functions ---------------------------------------------------------*/
2657 /** @defgroup TIMEx_Private_Functions TIM Extended Private Functions
2658 * @{
2659 */
2660
2661 /**
2662 * @brief TIM DMA Commutation callback.
2663 * @param hdma pointer to DMA handle.
2664 * @retval None
2665 */
TIMEx_DMACommutationCplt(DMA_HandleTypeDef * hdma)2666 void TIMEx_DMACommutationCplt(DMA_HandleTypeDef *hdma)
2667 {
2668 TIM_HandleTypeDef *htim = (TIM_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent;
2669
2670 /* Change the htim state */
2671 htim->State = HAL_TIM_STATE_READY;
2672
2673 #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
2674 htim->CommutationCallback(htim);
2675 #else
2676 HAL_TIMEx_CommutCallback(htim);
2677 #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
2678 }
2679
2680 /**
2681 * @brief TIM DMA Commutation half complete callback.
2682 * @param hdma pointer to DMA handle.
2683 * @retval None
2684 */
TIMEx_DMACommutationHalfCplt(DMA_HandleTypeDef * hdma)2685 void TIMEx_DMACommutationHalfCplt(DMA_HandleTypeDef *hdma)
2686 {
2687 TIM_HandleTypeDef *htim = (TIM_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent;
2688
2689 /* Change the htim state */
2690 htim->State = HAL_TIM_STATE_READY;
2691
2692 #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
2693 htim->CommutationHalfCpltCallback(htim);
2694 #else
2695 HAL_TIMEx_CommutHalfCpltCallback(htim);
2696 #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
2697 }
2698
2699
2700 /**
2701 * @brief TIM DMA Delay Pulse complete callback (complementary channel).
2702 * @param hdma pointer to DMA handle.
2703 * @retval None
2704 */
TIM_DMADelayPulseNCplt(DMA_HandleTypeDef * hdma)2705 static void TIM_DMADelayPulseNCplt(DMA_HandleTypeDef *hdma)
2706 {
2707 TIM_HandleTypeDef *htim = (TIM_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent;
2708
2709 if (hdma == htim->hdma[TIM_DMA_ID_CC1])
2710 {
2711 htim->Channel = HAL_TIM_ACTIVE_CHANNEL_1;
2712
2713 if (hdma->Init.Mode == DMA_NORMAL)
2714 {
2715 TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY);
2716 }
2717 }
2718 else if (hdma == htim->hdma[TIM_DMA_ID_CC2])
2719 {
2720 htim->Channel = HAL_TIM_ACTIVE_CHANNEL_2;
2721
2722 if (hdma->Init.Mode == DMA_NORMAL)
2723 {
2724 TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY);
2725 }
2726 }
2727 else if (hdma == htim->hdma[TIM_DMA_ID_CC3])
2728 {
2729 htim->Channel = HAL_TIM_ACTIVE_CHANNEL_3;
2730
2731 if (hdma->Init.Mode == DMA_NORMAL)
2732 {
2733 TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_3, HAL_TIM_CHANNEL_STATE_READY);
2734 }
2735 }
2736 else if (hdma == htim->hdma[TIM_DMA_ID_CC4])
2737 {
2738 htim->Channel = HAL_TIM_ACTIVE_CHANNEL_4;
2739
2740 if (hdma->Init.Mode == DMA_NORMAL)
2741 {
2742 TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_4, HAL_TIM_CHANNEL_STATE_READY);
2743 }
2744 }
2745 else
2746 {
2747 /* nothing to do */
2748 }
2749
2750 #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
2751 htim->PWM_PulseFinishedCallback(htim);
2752 #else
2753 HAL_TIM_PWM_PulseFinishedCallback(htim);
2754 #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
2755
2756 htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED;
2757 }
2758
2759 /**
2760 * @brief TIM DMA error callback (complementary channel)
2761 * @param hdma pointer to DMA handle.
2762 * @retval None
2763 */
TIM_DMAErrorCCxN(DMA_HandleTypeDef * hdma)2764 static void TIM_DMAErrorCCxN(DMA_HandleTypeDef *hdma)
2765 {
2766 TIM_HandleTypeDef *htim = (TIM_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent;
2767
2768 if (hdma == htim->hdma[TIM_DMA_ID_CC1])
2769 {
2770 htim->Channel = HAL_TIM_ACTIVE_CHANNEL_1;
2771 TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY);
2772 }
2773 else if (hdma == htim->hdma[TIM_DMA_ID_CC2])
2774 {
2775 htim->Channel = HAL_TIM_ACTIVE_CHANNEL_2;
2776 TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY);
2777 }
2778 else if (hdma == htim->hdma[TIM_DMA_ID_CC3])
2779 {
2780 htim->Channel = HAL_TIM_ACTIVE_CHANNEL_3;
2781 TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_3, HAL_TIM_CHANNEL_STATE_READY);
2782 }
2783 else
2784 {
2785 /* nothing to do */
2786 }
2787
2788 #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
2789 htim->ErrorCallback(htim);
2790 #else
2791 HAL_TIM_ErrorCallback(htim);
2792 #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
2793
2794 htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED;
2795 }
2796
2797 /**
2798 * @brief Enables or disables the TIM Capture Compare Channel xN.
2799 * @param TIMx to select the TIM peripheral
2800 * @param Channel specifies the TIM Channel
2801 * This parameter can be one of the following values:
2802 * @arg TIM_CHANNEL_1: TIM Channel 1
2803 * @arg TIM_CHANNEL_2: TIM Channel 2
2804 * @arg TIM_CHANNEL_3: TIM Channel 3
2805 * @param ChannelNState specifies the TIM Channel CCxNE bit new state.
2806 * This parameter can be: TIM_CCxN_ENABLE or TIM_CCxN_Disable.
2807 * @retval None
2808 */
TIM_CCxNChannelCmd(TIM_TypeDef * TIMx,uint32_t Channel,uint32_t ChannelNState)2809 static void TIM_CCxNChannelCmd(TIM_TypeDef *TIMx, uint32_t Channel, uint32_t ChannelNState)
2810 {
2811 uint32_t tmp;
2812
2813 tmp = TIM_CCER_CC1NE << (Channel & 0x1FU); /* 0x1FU = 31 bits max shift */
2814
2815 /* Reset the CCxNE Bit */
2816 TIMx->CCER &= ~tmp;
2817
2818 /* Set or reset the CCxNE Bit */
2819 TIMx->CCER |= (uint32_t)(ChannelNState << (Channel & 0x1FU)); /* 0x1FU = 31 bits max shift */
2820 }
2821 /**
2822 * @}
2823 */
2824
2825 #endif /* HAL_TIM_MODULE_ENABLED */
2826 /**
2827 * @}
2828 */
2829
2830 /**
2831 * @}
2832 */
2833
