1 /**
2 ******************************************************************************
3 * @file stm32c0xx_hal_pwr_ex.c
4 * @author MCD Application Team
5 * @brief Extended PWR HAL module driver.
6 * This file provides firmware functions to manage the following
7 * functionalities of the Power Controller (PWR) peripheral:
8 * + Extended Initialization and de-initialization functions
9 * + Extended Peripheral Control functions
10 *
11 ******************************************************************************
12 * @attention
13 *
14 * Copyright (c) 2022 STMicroelectronics.
15 * All rights reserved.
16 *
17 * This software is licensed under terms that can be found in the LICENSE file
18 * in the root directory of this software component.
19 * If no LICENSE file comes with this software, it is provided AS-IS.
20 *
21 ******************************************************************************
22 */
23
24 /* Includes ------------------------------------------------------------------*/
25 #include "stm32c0xx_hal.h"
26
27 /** @addtogroup STM32C0xx_HAL_Driver
28 * @{
29 */
30
31 /** @addtogroup PWREx
32 * @{
33 */
34
35 #ifdef HAL_PWR_MODULE_ENABLED
36
37 /* Private typedef -----------------------------------------------------------*/
38 /* Private define ------------------------------------------------------------*/
39 /** @defgroup PWR_Extended_Private_Defines PWR Extended Private Defines
40 * @{
41 */
42
43 /** @defgroup PWREx_Gpio_Pin_Number PWREx Gpio Pin Number
44 * @{
45 */
46 #define PWR_GPIO_PIN_NB 16u /*!< Number of gpio pin in bank */
47 /**
48 * @}
49 */
50
51 /**
52 * @}
53 */
54
55 /* Private macro -------------------------------------------------------------*/
56 /* Private variables ---------------------------------------------------------*/
57 /* Private function prototypes -----------------------------------------------*/
58 /* Exported functions --------------------------------------------------------*/
59 /** @addtogroup PWREx_Exported_Functions PWR Extended Exported Functions
60 * @{
61 */
62
63 /** @addtogroup PWREx_Exported_Functions_Group1 Extended Peripheral Control functions
64 * @brief Extended Peripheral Control functions
65 *
66 @verbatim
67 ===============================================================================
68 ##### Extended Peripheral Initialization and de-initialization functions #####
69 ===============================================================================
70 [..]
71
72 @endverbatim
73 * @{
74 */
75
76 /**
77 * @brief Enable Internal Wake-up Line.
78 * @retval None
79 */
HAL_PWREx_EnableInternalWakeUpLine(void)80 void HAL_PWREx_EnableInternalWakeUpLine(void)
81 {
82 SET_BIT(PWR->CR3, PWR_CR3_EIWUL);
83 }
84
85
86 /**
87 * @brief Disable Internal Wake-up Line.
88 * @retval None
89 */
HAL_PWREx_DisableInternalWakeUpLine(void)90 void HAL_PWREx_DisableInternalWakeUpLine(void)
91 {
92 CLEAR_BIT(PWR->CR3, PWR_CR3_EIWUL);
93 }
94
95
96 /**
97 * @brief Enable GPIO pull-up state in Standby and Shutdown modes.
98 * @note Set the relevant PUy bit of PWR_PUCRx register to configure the I/O in
99 * pull-up state in Standby and Shutdown modes.
100 * @note This state is effective in Standby and Shutdown modes only if APC bit
101 * is set through HAL_PWREx_EnablePullUpPullDownConfig() API.
102 * @note The configuration is lost when exiting the Shutdown mode due to the
103 * power-on reset, maintained when exiting the Standby mode.
104 * @note To avoid any conflict at Standby and Shutdown modes exits, the corresponding
105 * PDy bit of PWR_PDCRx register is cleared unless it is reserved.
106 * @param GPIO Specify the IO port. This parameter can be PWR_GPIO_A, ..., PWR_GPIO_F
107 * to select the GPIO peripheral.
108 * @param GPIONumber Specify the I/O pins numbers.
109 * This parameter can be one of the following values:
110 * PWR_GPIO_BIT_0, ..., PWR_GPIO_BIT_15 (except for ports where less
111 * I/O pins are available) or the logical OR of several of them to set
112 * several bits for a given port in a single API call.
113 * @retval HAL Status
114 */
HAL_PWREx_EnableGPIOPullUp(uint32_t GPIO,uint32_t GPIONumber)115 HAL_StatusTypeDef HAL_PWREx_EnableGPIOPullUp(uint32_t GPIO, uint32_t GPIONumber)
116 {
117 HAL_StatusTypeDef status = HAL_OK;
118
119 assert_param(IS_PWR_GPIO(GPIO));
120 assert_param(IS_PWR_GPIO_BIT_NUMBER(GPIONumber));
121
122 switch (GPIO)
123 {
124 case PWR_GPIO_A:
125 SET_BIT(PWR->PUCRA, GPIONumber);
126 CLEAR_BIT(PWR->PDCRA, GPIONumber);
127 break;
128
129 case PWR_GPIO_B:
130 SET_BIT(PWR->PUCRB, GPIONumber);
131 CLEAR_BIT(PWR->PDCRB, GPIONumber);
132 break;
133
134 case PWR_GPIO_C:
135 SET_BIT(PWR->PUCRC, GPIONumber);
136 CLEAR_BIT(PWR->PDCRC, GPIONumber);
137 break;
138 #if defined (STM32C031xx)
139 case PWR_GPIO_D:
140 SET_BIT(PWR->PUCRD, GPIONumber);
141 CLEAR_BIT(PWR->PDCRD, GPIONumber);
142 break;
143 #endif /* STM32C031xx */
144 case PWR_GPIO_F:
145 SET_BIT(PWR->PUCRF, GPIONumber);
146 CLEAR_BIT(PWR->PDCRF, GPIONumber);
147 break;
148
149 default:
150 status = HAL_ERROR;
151 break;
152 }
153
154 return status;
155 }
156
157
158 /**
159 * @brief Disable GPIO pull-up state in Standby mode and Shutdown modes.
160 * @note Reset the relevant PUy bit of PWR_PUCRx register used to configure the I/O
161 * in pull-up state in Standby and Shutdown modes.
162 * @param GPIO Specifies the IO port. This parameter can be PWR_GPIO_A, ..., PWR_GPIO_F
163 * to select the GPIO peripheral.
164 * @param GPIONumber Specify the I/O pins numbers.
165 * This parameter can be one of the following values:
166 * PWR_GPIO_BIT_0, ..., PWR_GPIO_BIT_15 (except for ports where less
167 * I/O pins are available) or the logical OR of several of them to reset
168 * several bits for a given port in a single API call.
169 * @retval HAL Status
170 */
HAL_PWREx_DisableGPIOPullUp(uint32_t GPIO,uint32_t GPIONumber)171 HAL_StatusTypeDef HAL_PWREx_DisableGPIOPullUp(uint32_t GPIO, uint32_t GPIONumber)
172 {
173 HAL_StatusTypeDef status = HAL_OK;
174
175 assert_param(IS_PWR_GPIO(GPIO));
176 assert_param(IS_PWR_GPIO_BIT_NUMBER(GPIONumber));
177
178 switch (GPIO)
179 {
180 case PWR_GPIO_A:
181 CLEAR_BIT(PWR->PUCRA, GPIONumber);
182 break;
183
184 case PWR_GPIO_B:
185 CLEAR_BIT(PWR->PUCRB, GPIONumber);
186 break;
187
188 case PWR_GPIO_C:
189 CLEAR_BIT(PWR->PUCRC, GPIONumber);
190 break;
191 #if defined (STM32C031xx)
192 case PWR_GPIO_D:
193 CLEAR_BIT(PWR->PUCRD, GPIONumber);
194 break;
195 #endif /* STM32C031xx */
196 case PWR_GPIO_F:
197 CLEAR_BIT(PWR->PUCRF, GPIONumber);
198 break;
199
200 default:
201 status = HAL_ERROR;
202 break;
203 }
204
205 return status;
206 }
207
208
209 /**
210 * @brief Enable GPIO pull-down state in Standby and Shutdown modes.
211 * @note Set the relevant PDy bit of PWR_PDCRx register to configure the I/O in
212 * pull-down state in Standby and Shutdown modes.
213 * @note This state is effective in Standby and Shutdown modes only if APC bit
214 * is set through HAL_PWREx_EnablePullUpPullDownConfig() API.
215 * @note The configuration is lost when exiting the Shutdown mode due to the
216 * power-on reset, maintained when exiting the Standby mode.
217 * @note To avoid any conflict at Standby and Shutdown modes exits, the corresponding
218 * PUy bit of PWR_PUCRx register is cleared unless it is reserved.
219 * @param GPIO Specify the IO port. This parameter can be PWR_GPIO_A..PWR_GPIO_F
220 * to select the GPIO peripheral.
221 * @param GPIONumber Specify the I/O pins numbers.
222 * This parameter can be one of the following values:
223 * PWR_GPIO_BIT_0, ..., PWR_GPIO_BIT_15 (except for ports where less
224 * I/O pins are available) or the logical OR of several of them to set
225 * several bits for a given port in a single API call.
226 * @retval HAL Status
227 */
HAL_PWREx_EnableGPIOPullDown(uint32_t GPIO,uint32_t GPIONumber)228 HAL_StatusTypeDef HAL_PWREx_EnableGPIOPullDown(uint32_t GPIO, uint32_t GPIONumber)
229 {
230 HAL_StatusTypeDef status = HAL_OK;
231
232 assert_param(IS_PWR_GPIO(GPIO));
233 assert_param(IS_PWR_GPIO_BIT_NUMBER(GPIONumber));
234
235 switch (GPIO)
236 {
237 case PWR_GPIO_A:
238 SET_BIT(PWR->PDCRA, GPIONumber);
239 CLEAR_BIT(PWR->PUCRA, GPIONumber);
240 break;
241
242 case PWR_GPIO_B:
243 SET_BIT(PWR->PDCRB, GPIONumber);
244 CLEAR_BIT(PWR->PUCRB, GPIONumber);
245 break;
246
247 case PWR_GPIO_C:
248 SET_BIT(PWR->PDCRC, GPIONumber);
249 CLEAR_BIT(PWR->PUCRC, GPIONumber);
250 break;
251 #if defined (STM32C031xx)
252 case PWR_GPIO_D:
253 SET_BIT(PWR->PDCRD, GPIONumber);
254 CLEAR_BIT(PWR->PUCRD, GPIONumber);
255 break;
256 #endif /* STM32C031xx */
257 case PWR_GPIO_F:
258 SET_BIT(PWR->PDCRF, GPIONumber);
259 CLEAR_BIT(PWR->PUCRF, GPIONumber);
260 break;
261
262 default:
263 status = HAL_ERROR;
264 break;
265 }
266
267 return status;
268 }
269
270
271 /**
272 * @brief Disable GPIO pull-down state in Standby and Shutdown modes.
273 * @note Reset the relevant PDy bit of PWR_PDCRx register used to configure the I/O
274 * in pull-down state in Standby and Shutdown modes.
275 * @param GPIO Specifies the IO port. This parameter can be PWR_GPIO_A..PWR_GPIO_F
276 * to select the GPIO peripheral.
277 * @param GPIONumber Specify the I/O pins numbers.
278 * This parameter can be one of the following values:
279 * PWR_GPIO_BIT_0, ..., PWR_GPIO_BIT_15 (except for ports where less
280 * I/O pins are available) or the logical OR of several of them to reset
281 * several bits for a given port in a single API call.
282 * @retval HAL Status
283 */
HAL_PWREx_DisableGPIOPullDown(uint32_t GPIO,uint32_t GPIONumber)284 HAL_StatusTypeDef HAL_PWREx_DisableGPIOPullDown(uint32_t GPIO, uint32_t GPIONumber)
285 {
286 HAL_StatusTypeDef status = HAL_OK;
287
288 assert_param(IS_PWR_GPIO(GPIO));
289 assert_param(IS_PWR_GPIO_BIT_NUMBER(GPIONumber));
290
291 switch (GPIO)
292 {
293 case PWR_GPIO_A:
294 CLEAR_BIT(PWR->PDCRA, GPIONumber);
295 break;
296
297 case PWR_GPIO_B:
298 CLEAR_BIT(PWR->PDCRB, GPIONumber);
299 break;
300
301 case PWR_GPIO_C:
302 CLEAR_BIT(PWR->PDCRC, GPIONumber);
303 break;
304 #if defined (STM32C031xx)
305 case PWR_GPIO_D:
306 CLEAR_BIT(PWR->PDCRD, GPIONumber);
307 break;
308 #endif /* STM32C031xx */
309 case PWR_GPIO_F:
310 CLEAR_BIT(PWR->PDCRF, GPIONumber);
311 break;
312
313 default:
314 status = HAL_ERROR;
315 break;
316 }
317
318 return status;
319 }
320
321
322 /**
323 * @brief Enable pull-up and pull-down configuration.
324 * @note When APC bit is set, the I/O pull-up and pull-down configurations defined in
325 * PWR_PUCRx and PWR_PDCRx registers are applied in Standby and Shutdown modes.
326 * @note Pull-up set by PUy bit of PWR_PUCRx register is not activated if the corresponding
327 * PDy bit of PWR_PDCRx register is also set (pull-down configuration priority is higher).
328 * HAL_PWREx_EnableGPIOPullUp() and HAL_PWREx_EnableGPIOPullDown() APIs ensure there
329 * is no conflict when setting PUy or PDy bit.
330 * @retval None
331 */
HAL_PWREx_EnablePullUpPullDownConfig(void)332 void HAL_PWREx_EnablePullUpPullDownConfig(void)
333 {
334 SET_BIT(PWR->CR3, PWR_CR3_APC);
335 }
336
337 /**
338 * @brief Disable pull-up and pull-down configuration.
339 * @note When APC bit is cleared, the I/O pull-up and pull-down configurations defined in
340 * PWR_PUCRx and PWR_PDCRx registers are not applied in Standby and Shutdown modes.
341 * @retval None
342 */
HAL_PWREx_DisablePullUpPullDownConfig(void)343 void HAL_PWREx_DisablePullUpPullDownConfig(void)
344 {
345 CLEAR_BIT(PWR->CR3, PWR_CR3_APC);
346 }
347
348
349 /**
350 * @brief Enable Flash Power Down.
351 * @note This API allows to enable flash power down capabilities in sleep and stop modes.
352 * @param PowerMode this can be a combination of following values:
353 * @arg @ref PWR_FLASHPD_SLEEP
354 * @arg @ref PWR_FLASHPD_STOP
355 * @retval None
356 */
HAL_PWREx_EnableFlashPowerDown(uint32_t PowerMode)357 void HAL_PWREx_EnableFlashPowerDown(uint32_t PowerMode)
358 {
359 assert_param(IS_PWR_FLASH_POWERDOWN(PowerMode));
360
361 PWR->CR1 |= PowerMode;
362 }
363
364
365 /**
366 * @brief Disable Flash Power Down.
367 * @note This API allows to disable flash power down capabilities in sleep and stop modes.
368 * @param PowerMode this can be a combination of following values:
369 * @arg @ref PWR_FLASHPD_SLEEP
370 * @arg @ref PWR_FLASHPD_STOP
371 * @retval None
372 */
HAL_PWREx_DisableFlashPowerDown(uint32_t PowerMode)373 void HAL_PWREx_DisableFlashPowerDown(uint32_t PowerMode)
374 {
375 assert_param(IS_PWR_FLASH_POWERDOWN(PowerMode));
376
377 PWR->CR1 &= ~PowerMode;
378 }
379
380
381 /**
382 * @brief Enter Shutdown mode.
383 * @note In Shutdown mode, the PLL, the HSI, the LSI and the HSE oscillators are switched
384 * off. The voltage regulator is disabled and Vcore domain is powered off.
385 * SRAM and registers contents are lost except for registers in the Backup domain.
386 * The BOR is not available.
387 * @note The I/Os can be configured either with a pull-up or pull-down or can
388 * be kept in analog state.
389 * HAL_PWREx_EnableGPIOPullUp() and HAL_PWREx_EnableGPIOPullDown()
390 * respectively enable Pull Up and PullDown state.
391 * HAL_PWREx_DisableGPIOPullUp() & HAL_PWREx_DisableGPIOPullDown()
392 * disable the same. These states are effective in Standby mode only if
393 * APC bit is set through HAL_PWREx_EnablePullUpPullDownConfig() API.
394 * @retval None
395
396 * @retval None
397 */
HAL_PWREx_EnterSHUTDOWNMode(void)398 void HAL_PWREx_EnterSHUTDOWNMode(void)
399 {
400 /* Set Shutdown mode */
401 MODIFY_REG(PWR->CR1, PWR_CR1_LPMS, PWR_LOWPOWERMODE_SHUTDOWN);
402
403 /* Set SLEEPDEEP bit of Cortex System Control Register */
404 SET_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPDEEP_Msk));
405
406 /* This option is used to ensure that store operations are completed */
407 #if defined ( __CC_ARM)
408 __force_stores();
409 #endif /* __CC_ARM */
410
411 /* Request Wait For Interrupt */
412 __WFI();
413 }
414
415 /**
416 * @}
417 */
418
419 /** @addtogroup PWREx_Exported_Functions_Group2 Extended PWR Backup register functions
420 * @brief Extended PWR Backup register functions
421 *
422 @verbatim
423 ===============================================================================
424 ##### Extended PWR Backup register functions #####
425 ===============================================================================
426 [..]
427 This subsection provides functions allowing to
428 (+) Write a data in a specified PWR Backup data register
429 (+) Read a data in a specified PWR Backup data register
430 @endverbatim
431 * @{
432 */
433
434
435 /**
436 * @brief Write a data in a specified PWR Backup data register.
437 * @param BackupRegister PWR Backup data Register number.
438 * This parameter can be PWR_BKP_DRx where x can be from 0 to PWR_BACKUP_NB
439 * @param Data Data to be written in the specified Backup data register.
440 * @retval None
441 */
HAL_PWREx_BKUPWrite(uint32_t BackupRegister,uint16_t Data)442 void HAL_PWREx_BKUPWrite(uint32_t BackupRegister, uint16_t Data)
443 {
444 uint32_t tmp;
445
446 /* Check the parameters */
447 assert_param(IS_PWR_BKP(BackupRegister));
448
449 tmp = (uint32_t) &(PWR->BKP0R);
450 tmp += (BackupRegister * 4U);
451
452 /* Write the specified register */
453 *(__IO uint32_t *)tmp = (uint16_t)Data;
454 }
455
456
457 /**
458 * @brief Reads data from the specified PWR Backup data Register.
459 * @param BackupRegister PWR Backup data Register number.
460 * This parameter can be PWR_BKP_DRx where x can be from 0 to PWR_BACKUP_NB
461 * @retval Read value
462 */
HAL_PWREx_BKUPRead(uint32_t BackupRegister)463 uint32_t HAL_PWREx_BKUPRead(uint32_t BackupRegister)
464 {
465 uint32_t tmp;
466
467 /* Check the parameters */
468 assert_param(IS_PWR_BKP(BackupRegister));
469
470 tmp = (uint32_t) &(PWR->BKP0R);
471 tmp += (BackupRegister * 4U);
472
473 /* Read the specified register */
474 return (*(__IO uint32_t *)tmp);
475 }
476
477 /**
478 * @}
479 */
480
481 /**
482 * @}
483 */
484
485 #endif /* HAL_PWR_MODULE_ENABLED */
486 /**
487 * @}
488 */
489
490 /**
491 * @}
492 */
493
