1 /**
2 ******************************************************************************
3 * @file stm32wbxx_ll_lptim.h
4 * @author MCD Application Team
5 * @brief Header file of LPTIM LL module.
6 ******************************************************************************
7 * @attention
8 *
9 * Copyright (c) 2019 STMicroelectronics.
10 * All rights reserved.
11 *
12 * This software is licensed under terms that can be found in the LICENSE file
13 * in the root directory of this software component.
14 * If no LICENSE file comes with this software, it is provided AS-IS.
15 *
16 ******************************************************************************
17 */
18
19 /* Define to prevent recursive inclusion -------------------------------------*/
20 #ifndef STM32WBxx_LL_LPTIM_H
21 #define STM32WBxx_LL_LPTIM_H
22
23 #ifdef __cplusplus
24 extern "C" {
25 #endif
26
27 /* Includes ------------------------------------------------------------------*/
28 #include "stm32wbxx.h"
29
30 /** @addtogroup STM32WBxx_LL_Driver
31 * @{
32 */
33
34 #if defined (LPTIM1) || defined (LPTIM2)
35
36 /** @defgroup LPTIM_LL LPTIM
37 * @{
38 */
39
40 /* Private types -------------------------------------------------------------*/
41 /* Private variables ---------------------------------------------------------*/
42
43 /* Private constants ---------------------------------------------------------*/
44
45 /* Private macros ------------------------------------------------------------*/
46 #if defined(USE_FULL_LL_DRIVER)
47 /** @defgroup LPTIM_LL_Private_Macros LPTIM Private Macros
48 * @{
49 */
50 /**
51 * @}
52 */
53 #endif /*USE_FULL_LL_DRIVER*/
54
55 /* Exported types ------------------------------------------------------------*/
56 #if defined(USE_FULL_LL_DRIVER)
57 /** @defgroup LPTIM_LL_ES_INIT LPTIM Exported Init structure
58 * @{
59 */
60
61 /**
62 * @brief LPTIM Init structure definition
63 */
64 typedef struct
65 {
66 uint32_t ClockSource; /*!< Specifies the source of the clock used by the LPTIM instance.
67 This parameter can be a value of @ref LPTIM_LL_EC_CLK_SOURCE.
68
69 This feature can be modified afterwards using unitary
70 function @ref LL_LPTIM_SetClockSource().*/
71
72 uint32_t Prescaler; /*!< Specifies the prescaler division ratio.
73 This parameter can be a value of @ref LPTIM_LL_EC_PRESCALER.
74
75 This feature can be modified afterwards using using unitary
76 function @ref LL_LPTIM_SetPrescaler().*/
77
78 uint32_t Waveform; /*!< Specifies the waveform shape.
79 This parameter can be a value of @ref LPTIM_LL_EC_OUTPUT_WAVEFORM.
80
81 This feature can be modified afterwards using unitary
82 function @ref LL_LPTIM_ConfigOutput().*/
83
84 uint32_t Polarity; /*!< Specifies waveform polarity.
85 This parameter can be a value of @ref LPTIM_LL_EC_OUTPUT_POLARITY.
86
87 This feature can be modified afterwards using unitary
88 function @ref LL_LPTIM_ConfigOutput().*/
89 } LL_LPTIM_InitTypeDef;
90
91 /**
92 * @}
93 */
94 #endif /* USE_FULL_LL_DRIVER */
95
96 /* Exported constants --------------------------------------------------------*/
97 /** @defgroup LPTIM_LL_Exported_Constants LPTIM Exported Constants
98 * @{
99 */
100
101 /** @defgroup LPTIM_LL_EC_GET_FLAG Get Flags Defines
102 * @brief Flags defines which can be used with LL_LPTIM_ReadReg function
103 * @{
104 */
105 #define LL_LPTIM_ISR_CMPM LPTIM_ISR_CMPM /*!< Compare match */
106 #define LL_LPTIM_ISR_CMPOK LPTIM_ISR_CMPOK /*!< Compare register update OK */
107 #define LL_LPTIM_ISR_ARRM LPTIM_ISR_ARRM /*!< Autoreload match */
108 #define LL_LPTIM_ISR_EXTTRIG LPTIM_ISR_EXTTRIG /*!< External trigger edge event */
109 #define LL_LPTIM_ISR_ARROK LPTIM_ISR_ARROK /*!< Autoreload register update OK */
110 #define LL_LPTIM_ISR_UP LPTIM_ISR_UP /*!< Counter direction change down to up */
111 #define LL_LPTIM_ISR_DOWN LPTIM_ISR_DOWN /*!< Counter direction change up to down */
112 /**
113 * @}
114 */
115
116 /** @defgroup LPTIM_LL_EC_IT IT Defines
117 * @brief IT defines which can be used with LL_LPTIM_ReadReg and LL_LPTIM_WriteReg functions
118 * @{
119 */
120 #define LL_LPTIM_IER_CMPMIE LPTIM_IER_CMPMIE /*!< Compare match */
121 #define LL_LPTIM_IER_CMPOKIE LPTIM_IER_CMPOKIE /*!< Compare register update OK */
122 #define LL_LPTIM_IER_ARRMIE LPTIM_IER_ARRMIE /*!< Autoreload match */
123 #define LL_LPTIM_IER_EXTTRIGIE LPTIM_IER_EXTTRIGIE /*!< External trigger edge event */
124 #define LL_LPTIM_IER_ARROKIE LPTIM_IER_ARROKIE /*!< Autoreload register update OK */
125 #define LL_LPTIM_IER_UPIE LPTIM_IER_UPIE /*!< Counter direction change down to up */
126 #define LL_LPTIM_IER_DOWNIE LPTIM_IER_DOWNIE /*!< Counter direction change up to down */
127 /**
128 * @}
129 */
130
131 /** @defgroup LPTIM_LL_EC_OPERATING_MODE Operating Mode
132 * @{
133 */
134 #define LL_LPTIM_OPERATING_MODE_CONTINUOUS LPTIM_CR_CNTSTRT /*!<LP Timer starts in continuous mode*/
135 #define LL_LPTIM_OPERATING_MODE_ONESHOT LPTIM_CR_SNGSTRT /*!<LP Tilmer starts in single mode*/
136 /**
137 * @}
138 */
139
140 /** @defgroup LPTIM_LL_EC_UPDATE_MODE Update Mode
141 * @{
142 */
143 #define LL_LPTIM_UPDATE_MODE_IMMEDIATE 0x00000000U /*!<Preload is disabled: registers are updated after each APB bus write access*/
144 #define LL_LPTIM_UPDATE_MODE_ENDOFPERIOD LPTIM_CFGR_PRELOAD /*!<preload is enabled: registers are updated at the end of the current LPTIM period*/
145 /**
146 * @}
147 */
148
149 /** @defgroup LPTIM_LL_EC_COUNTER_MODE Counter Mode
150 * @{
151 */
152 #define LL_LPTIM_COUNTER_MODE_INTERNAL 0x00000000U /*!<The counter is incremented following each internal clock pulse*/
153 #define LL_LPTIM_COUNTER_MODE_EXTERNAL LPTIM_CFGR_COUNTMODE /*!<The counter is incremented following each valid clock pulse on the LPTIM external Input1*/
154 /**
155 * @}
156 */
157
158 /** @defgroup LPTIM_LL_EC_OUTPUT_WAVEFORM Output Waveform Type
159 * @{
160 */
161 #define LL_LPTIM_OUTPUT_WAVEFORM_PWM 0x00000000U /*!<LPTIM generates either a PWM waveform or a One pulse waveform depending on chosen operating mode CONTINUOUS or SINGLE*/
162 #define LL_LPTIM_OUTPUT_WAVEFORM_SETONCE LPTIM_CFGR_WAVE /*!<LPTIM generates a Set Once waveform*/
163 /**
164 * @}
165 */
166
167 /** @defgroup LPTIM_LL_EC_OUTPUT_POLARITY Output Polarity
168 * @{
169 */
170 #define LL_LPTIM_OUTPUT_POLARITY_REGULAR 0x00000000U /*!<The LPTIM output reflects the compare results between LPTIMx_ARR and LPTIMx_CMP registers*/
171 #define LL_LPTIM_OUTPUT_POLARITY_INVERSE LPTIM_CFGR_WAVPOL /*!<The LPTIM output reflects the inverse of the compare results between LPTIMx_ARR and LPTIMx_CMP registers*/
172 /**
173 * @}
174 */
175
176 /** @defgroup LPTIM_LL_EC_PRESCALER Prescaler Value
177 * @{
178 */
179 #define LL_LPTIM_PRESCALER_DIV1 0x00000000U /*!<Prescaler division factor is set to 1*/
180 #define LL_LPTIM_PRESCALER_DIV2 LPTIM_CFGR_PRESC_0 /*!<Prescaler division factor is set to 2*/
181 #define LL_LPTIM_PRESCALER_DIV4 LPTIM_CFGR_PRESC_1 /*!<Prescaler division factor is set to 4*/
182 #define LL_LPTIM_PRESCALER_DIV8 (LPTIM_CFGR_PRESC_1 | LPTIM_CFGR_PRESC_0) /*!<Prescaler division factor is set to 8*/
183 #define LL_LPTIM_PRESCALER_DIV16 LPTIM_CFGR_PRESC_2 /*!<Prescaler division factor is set to 16*/
184 #define LL_LPTIM_PRESCALER_DIV32 (LPTIM_CFGR_PRESC_2 | LPTIM_CFGR_PRESC_0) /*!<Prescaler division factor is set to 32*/
185 #define LL_LPTIM_PRESCALER_DIV64 (LPTIM_CFGR_PRESC_2 | LPTIM_CFGR_PRESC_1) /*!<Prescaler division factor is set to 64*/
186 #define LL_LPTIM_PRESCALER_DIV128 LPTIM_CFGR_PRESC /*!<Prescaler division factor is set to 128*/
187 /**
188 * @}
189 */
190
191 /** @defgroup LPTIM_LL_EC_TRIG_SOURCE Trigger Source
192 * @{
193 */
194 #define LL_LPTIM_TRIG_SOURCE_GPIO 0x00000000U /*!<External input trigger is connected to TIMx_ETR input*/
195 #define LL_LPTIM_TRIG_SOURCE_RTCALARMA LPTIM_CFGR_TRIGSEL_0 /*!<External input trigger is connected to RTC Alarm A*/
196 #define LL_LPTIM_TRIG_SOURCE_RTCALARMB LPTIM_CFGR_TRIGSEL_1 /*!<External input trigger is connected to RTC Alarm B*/
197 #if defined(RTC_TAMPER1_SUPPORT)
198 #define LL_LPTIM_TRIG_SOURCE_RTCTAMP1 (LPTIM_CFGR_TRIGSEL_1 | LPTIM_CFGR_TRIGSEL_0) /*!<External input trigger is connected to RTC Tamper 1*/
199 #endif /* RTC_TAMPER1_SUPPORT */
200 #define LL_LPTIM_TRIG_SOURCE_RTCTAMP2 LPTIM_CFGR_TRIGSEL_2 /*!<External input trigger is connected to RTC Tamper 2*/
201 #if defined(RTC_TAMPER3_SUPPORT)
202 #define LL_LPTIM_TRIG_SOURCE_RTCTAMP3 (LPTIM_CFGR_TRIGSEL_2 | LPTIM_CFGR_TRIGSEL_0) /*!<External input trigger is connected to RTC Tamper 3*/
203 #endif /* RTC_TAMPER3_SUPPORT */
204 #if defined(COMP1)
205 #define LL_LPTIM_TRIG_SOURCE_COMP1 (LPTIM_CFGR_TRIGSEL_2 | LPTIM_CFGR_TRIGSEL_1) /*!<External input trigger is connected to COMP1 output*/
206 #endif /* COMP1 */
207 #if defined(COMP2)
208 #define LL_LPTIM_TRIG_SOURCE_COMP2 LPTIM_CFGR_TRIGSEL /*!<External input trigger is connected to COMP2 output*/
209 #endif /* COMP2 */
210 /**
211 * @}
212 */
213
214 /** @defgroup LPTIM_LL_EC_TRIG_FILTER Trigger Filter
215 * @{
216 */
217 #define LL_LPTIM_TRIG_FILTER_NONE 0x00000000U /*!<Any trigger active level change is considered as a valid trigger*/
218 #define LL_LPTIM_TRIG_FILTER_2 LPTIM_CFGR_TRGFLT_0 /*!<Trigger active level change must be stable for at least 2 clock periods before it is considered as valid trigger*/
219 #define LL_LPTIM_TRIG_FILTER_4 LPTIM_CFGR_TRGFLT_1 /*!<Trigger active level change must be stable for at least 4 clock periods before it is considered as valid trigger*/
220 #define LL_LPTIM_TRIG_FILTER_8 LPTIM_CFGR_TRGFLT /*!<Trigger active level change must be stable for at least 8 clock periods before it is considered as valid trigger*/
221 /**
222 * @}
223 */
224
225 /** @defgroup LPTIM_LL_EC_TRIG_POLARITY Trigger Polarity
226 * @{
227 */
228 #define LL_LPTIM_TRIG_POLARITY_RISING LPTIM_CFGR_TRIGEN_0 /*!<LPTIM counter starts when a rising edge is detected*/
229 #define LL_LPTIM_TRIG_POLARITY_FALLING LPTIM_CFGR_TRIGEN_1 /*!<LPTIM counter starts when a falling edge is detected*/
230 #define LL_LPTIM_TRIG_POLARITY_RISING_FALLING LPTIM_CFGR_TRIGEN /*!<LPTIM counter starts when a rising or a falling edge is detected*/
231 /**
232 * @}
233 */
234
235 /** @defgroup LPTIM_LL_EC_CLK_SOURCE Clock Source
236 * @{
237 */
238 #define LL_LPTIM_CLK_SOURCE_INTERNAL 0x00000000U /*!<LPTIM is clocked by internal clock source (APB clock or any of the embedded oscillators)*/
239 #define LL_LPTIM_CLK_SOURCE_EXTERNAL LPTIM_CFGR_CKSEL /*!<LPTIM is clocked by an external clock source through the LPTIM external Input1*/
240 /**
241 * @}
242 */
243
244 /** @defgroup LPTIM_LL_EC_CLK_FILTER Clock Filter
245 * @{
246 */
247 #define LL_LPTIM_CLK_FILTER_NONE 0x00000000U /*!<Any external clock signal level change is considered as a valid transition*/
248 #define LL_LPTIM_CLK_FILTER_2 LPTIM_CFGR_CKFLT_0 /*!<External clock signal level change must be stable for at least 2 clock periods before it is considered as valid transition*/
249 #define LL_LPTIM_CLK_FILTER_4 LPTIM_CFGR_CKFLT_1 /*!<External clock signal level change must be stable for at least 4 clock periods before it is considered as valid transition*/
250 #define LL_LPTIM_CLK_FILTER_8 LPTIM_CFGR_CKFLT /*!<External clock signal level change must be stable for at least 8 clock periods before it is considered as valid transition*/
251 /**
252 * @}
253 */
254
255 /** @defgroup LPTIM_LL_EC_CLK_POLARITY Clock Polarity
256 * @{
257 */
258 #define LL_LPTIM_CLK_POLARITY_RISING 0x00000000U /*!< The rising edge is the active edge used for counting*/
259 #define LL_LPTIM_CLK_POLARITY_FALLING LPTIM_CFGR_CKPOL_0 /*!< The falling edge is the active edge used for counting*/
260 #define LL_LPTIM_CLK_POLARITY_RISING_FALLING LPTIM_CFGR_CKPOL_1 /*!< Both edges are active edges*/
261 /**
262 * @}
263 */
264
265 /** @defgroup LPTIM_LL_EC_ENCODER_MODE Encoder Mode
266 * @{
267 */
268 #define LL_LPTIM_ENCODER_MODE_RISING 0x00000000U /*!< The rising edge is the active edge used for counting*/
269 #define LL_LPTIM_ENCODER_MODE_FALLING LPTIM_CFGR_CKPOL_0 /*!< The falling edge is the active edge used for counting*/
270 #define LL_LPTIM_ENCODER_MODE_RISING_FALLING LPTIM_CFGR_CKPOL_1 /*!< Both edges are active edges*/
271 /**
272 * @}
273 */
274 #if defined(LPTIM_OR_OR)
275
276 /** @defgroup LPTIM_EC_INPUT1_SRC Input1 Source
277 * @{
278 */
279 #define LL_LPTIM_INPUT1_SRC_GPIO 0x00000000U /*!< For LPTIM1 and LPTIM2 */
280 #if defined(COMP1)
281 #define LL_LPTIM_INPUT1_SRC_COMP1 LPTIM_OR_OR_0 /*!< For LPTIM1 and LPTIM2 */
282 #endif /* COMP1 */
283 #if defined(COMP2)
284 #define LL_LPTIM_INPUT1_SRC_COMP2 LPTIM_OR_OR_1 /*!< For LPTIM2 */
285 #define LL_LPTIM_INPUT1_SRC_COMP1_COMP2 LPTIM_OR_OR /*!< For LPTIM2 */
286 #endif /* COMP2 */
287 /**
288 * @}
289 */
290 #endif /* LPTIM_OR_OR */
291 #if defined(LPTIM_OR_OR)
292
293 /** @defgroup LPTIM_EC_INPUT2_SRC Input2 Source
294 * @{
295 */
296 #define LL_LPTIM_INPUT2_SRC_GPIO 0x00000000U /*!< For LPTIM1 */
297 #if defined(COMP2)
298 #define LL_LPTIM_INPUT2_SRC_COMP2 LPTIM_OR_OR_1 /*!< For LPTIM1 */
299 #endif /* COMP2 */
300 /**
301 * @}
302 */
303 #endif /* LPTIM_OR_OR */
304
305 /**
306 * @}
307 */
308
309 /* Exported macro ------------------------------------------------------------*/
310 /** @defgroup LPTIM_LL_Exported_Macros LPTIM Exported Macros
311 * @{
312 */
313
314 /** @defgroup LPTIM_LL_EM_WRITE_READ Common Write and read registers Macros
315 * @{
316 */
317
318 /**
319 * @brief Write a value in LPTIM register
320 * @param __INSTANCE__ LPTIM Instance
321 * @param __REG__ Register to be written
322 * @param __VALUE__ Value to be written in the register
323 * @retval None
324 */
325 #define LL_LPTIM_WriteReg(__INSTANCE__, __REG__, __VALUE__) WRITE_REG((__INSTANCE__)->__REG__, (__VALUE__))
326
327 /**
328 * @brief Read a value in LPTIM register
329 * @param __INSTANCE__ LPTIM Instance
330 * @param __REG__ Register to be read
331 * @retval Register value
332 */
333 #define LL_LPTIM_ReadReg(__INSTANCE__, __REG__) READ_REG((__INSTANCE__)->__REG__)
334 /**
335 * @}
336 */
337
338 /**
339 * @}
340 */
341
342 /* Exported functions --------------------------------------------------------*/
343 /** @defgroup LPTIM_LL_Exported_Functions LPTIM Exported Functions
344 * @{
345 */
346
347 /** Legacy definitions for compatibility purpose
348 @cond 0
349 */
350 #define LL_LPTIM_ClearFLAG_CMPM LL_LPTIM_ClearFlag_CMPM
351 #define LL_LPTIM_ClearFLAG_CC1 LL_LPTIM_ClearFlag_CC1
352 #define LL_LPTIM_ClearFLAG_CC2 LL_LPTIM_ClearFlag_CC2
353 #define LL_LPTIM_ClearFLAG_CC1O LL_LPTIM_ClearFlag_CC1O
354 #define LL_LPTIM_ClearFLAG_CC2O LL_LPTIM_ClearFlag_CC2O
355 #define LL_LPTIM_ClearFLAG_ARRM LL_LPTIM_ClearFlag_ARRM
356 /**
357 @endcond
358 */
359
360 #if defined(USE_FULL_LL_DRIVER)
361 /** @defgroup LPTIM_LL_EF_Init Initialisation and deinitialisation functions
362 * @{
363 */
364
365 ErrorStatus LL_LPTIM_DeInit(LPTIM_TypeDef *LPTIMx);
366 void LL_LPTIM_StructInit(LL_LPTIM_InitTypeDef *LPTIM_InitStruct);
367 ErrorStatus LL_LPTIM_Init(LPTIM_TypeDef *LPTIMx, const LL_LPTIM_InitTypeDef *LPTIM_InitStruct);
368 void LL_LPTIM_Disable(LPTIM_TypeDef *LPTIMx);
369 /**
370 * @}
371 */
372 #endif /* USE_FULL_LL_DRIVER */
373
374 /** @defgroup LPTIM_LL_EF_LPTIM_Configuration LPTIM Configuration
375 * @{
376 */
377
378 /**
379 * @brief Enable the LPTIM instance
380 * @note After setting the ENABLE bit, a delay of two counter clock is needed
381 * before the LPTIM instance is actually enabled.
382 * @rmtoll CR ENABLE LL_LPTIM_Enable
383 * @param LPTIMx Low-Power Timer instance
384 * @retval None
385 */
LL_LPTIM_Enable(LPTIM_TypeDef * LPTIMx)386 __STATIC_INLINE void LL_LPTIM_Enable(LPTIM_TypeDef *LPTIMx)
387 {
388 SET_BIT(LPTIMx->CR, LPTIM_CR_ENABLE);
389 }
390
391 /**
392 * @brief Indicates whether the LPTIM instance is enabled.
393 * @rmtoll CR ENABLE LL_LPTIM_IsEnabled
394 * @param LPTIMx Low-Power Timer instance
395 * @retval State of bit (1 or 0).
396 */
LL_LPTIM_IsEnabled(const LPTIM_TypeDef * LPTIMx)397 __STATIC_INLINE uint32_t LL_LPTIM_IsEnabled(const LPTIM_TypeDef *LPTIMx)
398 {
399 return (((READ_BIT(LPTIMx->CR, LPTIM_CR_ENABLE) == LPTIM_CR_ENABLE) ? 1UL : 0UL));
400 }
401
402 /**
403 * @brief Starts the LPTIM counter in the desired mode.
404 * @note LPTIM instance must be enabled before starting the counter.
405 * @note It is possible to change on the fly from One Shot mode to
406 * Continuous mode.
407 * @rmtoll CR CNTSTRT LL_LPTIM_StartCounter\n
408 * CR SNGSTRT LL_LPTIM_StartCounter
409 * @param LPTIMx Low-Power Timer instance
410 * @param OperatingMode This parameter can be one of the following values:
411 * @arg @ref LL_LPTIM_OPERATING_MODE_CONTINUOUS
412 * @arg @ref LL_LPTIM_OPERATING_MODE_ONESHOT
413 * @retval None
414 */
LL_LPTIM_StartCounter(LPTIM_TypeDef * LPTIMx,uint32_t OperatingMode)415 __STATIC_INLINE void LL_LPTIM_StartCounter(LPTIM_TypeDef *LPTIMx, uint32_t OperatingMode)
416 {
417 MODIFY_REG(LPTIMx->CR, LPTIM_CR_CNTSTRT | LPTIM_CR_SNGSTRT, OperatingMode);
418 }
419
420 /**
421 * @brief Enable reset after read.
422 * @note After calling this function any read access to LPTIM_CNT
423 * register will asynchronously reset the LPTIM_CNT register content.
424 * @rmtoll CR RSTARE LL_LPTIM_EnableResetAfterRead
425 * @param LPTIMx Low-Power Timer instance
426 * @retval None
427 */
LL_LPTIM_EnableResetAfterRead(LPTIM_TypeDef * LPTIMx)428 __STATIC_INLINE void LL_LPTIM_EnableResetAfterRead(LPTIM_TypeDef *LPTIMx)
429 {
430 SET_BIT(LPTIMx->CR, LPTIM_CR_RSTARE);
431 }
432
433 /**
434 * @brief Disable reset after read.
435 * @rmtoll CR RSTARE LL_LPTIM_DisableResetAfterRead
436 * @param LPTIMx Low-Power Timer instance
437 * @retval None
438 */
LL_LPTIM_DisableResetAfterRead(LPTIM_TypeDef * LPTIMx)439 __STATIC_INLINE void LL_LPTIM_DisableResetAfterRead(LPTIM_TypeDef *LPTIMx)
440 {
441 CLEAR_BIT(LPTIMx->CR, LPTIM_CR_RSTARE);
442 }
443
444 /**
445 * @brief Indicate whether the reset after read feature is enabled.
446 * @rmtoll CR RSTARE LL_LPTIM_IsEnabledResetAfterRead
447 * @param LPTIMx Low-Power Timer instance
448 * @retval State of bit (1 or 0).
449 */
LL_LPTIM_IsEnabledResetAfterRead(const LPTIM_TypeDef * LPTIMx)450 __STATIC_INLINE uint32_t LL_LPTIM_IsEnabledResetAfterRead(const LPTIM_TypeDef *LPTIMx)
451 {
452 return (((READ_BIT(LPTIMx->CR, LPTIM_CR_RSTARE) == LPTIM_CR_RSTARE) ? 1UL : 0UL));
453 }
454
455 /**
456 * @brief Reset of the LPTIM_CNT counter register (synchronous).
457 * @note Due to the synchronous nature of this reset, it only takes
458 * place after a synchronization delay of 3 LPTIM core clock cycles
459 * (LPTIM core clock may be different from APB clock).
460 * @note COUNTRST is automatically cleared by hardware
461 * @rmtoll CR COUNTRST LL_LPTIM_ResetCounter\n
462 * @param LPTIMx Low-Power Timer instance
463 * @retval None
464 */
LL_LPTIM_ResetCounter(LPTIM_TypeDef * LPTIMx)465 __STATIC_INLINE void LL_LPTIM_ResetCounter(LPTIM_TypeDef *LPTIMx)
466 {
467 SET_BIT(LPTIMx->CR, LPTIM_CR_COUNTRST);
468 }
469
470 /**
471 * @brief Set the LPTIM registers update mode (enable/disable register preload)
472 * @note This function must be called when the LPTIM instance is disabled.
473 * @rmtoll CFGR PRELOAD LL_LPTIM_SetUpdateMode
474 * @param LPTIMx Low-Power Timer instance
475 * @param UpdateMode This parameter can be one of the following values:
476 * @arg @ref LL_LPTIM_UPDATE_MODE_IMMEDIATE
477 * @arg @ref LL_LPTIM_UPDATE_MODE_ENDOFPERIOD
478 * @retval None
479 */
LL_LPTIM_SetUpdateMode(LPTIM_TypeDef * LPTIMx,uint32_t UpdateMode)480 __STATIC_INLINE void LL_LPTIM_SetUpdateMode(LPTIM_TypeDef *LPTIMx, uint32_t UpdateMode)
481 {
482 MODIFY_REG(LPTIMx->CFGR, LPTIM_CFGR_PRELOAD, UpdateMode);
483 }
484
485 /**
486 * @brief Get the LPTIM registers update mode
487 * @rmtoll CFGR PRELOAD LL_LPTIM_GetUpdateMode
488 * @param LPTIMx Low-Power Timer instance
489 * @retval Returned value can be one of the following values:
490 * @arg @ref LL_LPTIM_UPDATE_MODE_IMMEDIATE
491 * @arg @ref LL_LPTIM_UPDATE_MODE_ENDOFPERIOD
492 */
LL_LPTIM_GetUpdateMode(const LPTIM_TypeDef * LPTIMx)493 __STATIC_INLINE uint32_t LL_LPTIM_GetUpdateMode(const LPTIM_TypeDef *LPTIMx)
494 {
495 return (uint32_t)(READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_PRELOAD));
496 }
497
498 /**
499 * @brief Set the auto reload value
500 * @note The LPTIMx_ARR register content must only be modified when the LPTIM is enabled
501 * @note After a write to the LPTIMx_ARR register a new write operation to the
502 * same register can only be performed when the previous write operation
503 * is completed. Any successive write before the ARROK flag is set, will
504 * lead to unpredictable results.
505 * @note autoreload value be strictly greater than the compare value.
506 * @rmtoll ARR ARR LL_LPTIM_SetAutoReload
507 * @param LPTIMx Low-Power Timer instance
508 * @param AutoReload Value between Min_Data=0x0001 and Max_Data=0xFFFF
509 * @retval None
510 */
LL_LPTIM_SetAutoReload(LPTIM_TypeDef * LPTIMx,uint32_t AutoReload)511 __STATIC_INLINE void LL_LPTIM_SetAutoReload(LPTIM_TypeDef *LPTIMx, uint32_t AutoReload)
512 {
513 MODIFY_REG(LPTIMx->ARR, LPTIM_ARR_ARR, AutoReload);
514 }
515
516 /**
517 * @brief Get actual auto reload value
518 * @rmtoll ARR ARR LL_LPTIM_GetAutoReload
519 * @param LPTIMx Low-Power Timer instance
520 * @retval AutoReload Value between Min_Data=0x0001 and Max_Data=0xFFFF
521 */
LL_LPTIM_GetAutoReload(const LPTIM_TypeDef * LPTIMx)522 __STATIC_INLINE uint32_t LL_LPTIM_GetAutoReload(const LPTIM_TypeDef *LPTIMx)
523 {
524 return (uint32_t)(READ_BIT(LPTIMx->ARR, LPTIM_ARR_ARR));
525 }
526
527 /**
528 * @brief Set the compare value
529 * @note After a write to the LPTIMx_CMP register a new write operation to the
530 * same register can only be performed when the previous write operation
531 * is completed. Any successive write before the CMPOK flag is set, will
532 * lead to unpredictable results.
533 * @rmtoll CMP CMP LL_LPTIM_SetCompare
534 * @param LPTIMx Low-Power Timer instance
535 * @param CompareValue Value between Min_Data=0x00 and Max_Data=0xFFFF
536 * @retval None
537 */
LL_LPTIM_SetCompare(LPTIM_TypeDef * LPTIMx,uint32_t CompareValue)538 __STATIC_INLINE void LL_LPTIM_SetCompare(LPTIM_TypeDef *LPTIMx, uint32_t CompareValue)
539 {
540 MODIFY_REG(LPTIMx->CMP, LPTIM_CMP_CMP, CompareValue);
541 }
542
543 /**
544 * @brief Get actual compare value
545 * @rmtoll CMP CMP LL_LPTIM_GetCompare
546 * @param LPTIMx Low-Power Timer instance
547 * @retval CompareValue Value between Min_Data=0x00 and Max_Data=0xFFFF
548 */
LL_LPTIM_GetCompare(const LPTIM_TypeDef * LPTIMx)549 __STATIC_INLINE uint32_t LL_LPTIM_GetCompare(const LPTIM_TypeDef *LPTIMx)
550 {
551 return (uint32_t)(READ_BIT(LPTIMx->CMP, LPTIM_CMP_CMP));
552 }
553
554 /**
555 * @brief Get actual counter value
556 * @note When the LPTIM instance is running with an asynchronous clock, reading
557 * the LPTIMx_CNT register may return unreliable values. So in this case
558 * it is necessary to perform two consecutive read accesses and verify
559 * that the two returned values are identical.
560 * @rmtoll CNT CNT LL_LPTIM_GetCounter
561 * @param LPTIMx Low-Power Timer instance
562 * @retval Counter value
563 */
LL_LPTIM_GetCounter(const LPTIM_TypeDef * LPTIMx)564 __STATIC_INLINE uint32_t LL_LPTIM_GetCounter(const LPTIM_TypeDef *LPTIMx)
565 {
566 return (uint32_t)(READ_BIT(LPTIMx->CNT, LPTIM_CNT_CNT));
567 }
568
569 /**
570 * @brief Set the counter mode (selection of the LPTIM counter clock source).
571 * @note The counter mode can be set only when the LPTIM instance is disabled.
572 * @rmtoll CFGR COUNTMODE LL_LPTIM_SetCounterMode
573 * @param LPTIMx Low-Power Timer instance
574 * @param CounterMode This parameter can be one of the following values:
575 * @arg @ref LL_LPTIM_COUNTER_MODE_INTERNAL
576 * @arg @ref LL_LPTIM_COUNTER_MODE_EXTERNAL
577 * @retval None
578 */
LL_LPTIM_SetCounterMode(LPTIM_TypeDef * LPTIMx,uint32_t CounterMode)579 __STATIC_INLINE void LL_LPTIM_SetCounterMode(LPTIM_TypeDef *LPTIMx, uint32_t CounterMode)
580 {
581 MODIFY_REG(LPTIMx->CFGR, LPTIM_CFGR_COUNTMODE, CounterMode);
582 }
583
584 /**
585 * @brief Get the counter mode
586 * @rmtoll CFGR COUNTMODE LL_LPTIM_GetCounterMode
587 * @param LPTIMx Low-Power Timer instance
588 * @retval Returned value can be one of the following values:
589 * @arg @ref LL_LPTIM_COUNTER_MODE_INTERNAL
590 * @arg @ref LL_LPTIM_COUNTER_MODE_EXTERNAL
591 */
LL_LPTIM_GetCounterMode(const LPTIM_TypeDef * LPTIMx)592 __STATIC_INLINE uint32_t LL_LPTIM_GetCounterMode(const LPTIM_TypeDef *LPTIMx)
593 {
594 return (uint32_t)(READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_COUNTMODE));
595 }
596
597 /**
598 * @brief Configure the LPTIM instance output (LPTIMx_OUT)
599 * @note This function must be called when the LPTIM instance is disabled.
600 * @note Regarding the LPTIM output polarity the change takes effect
601 * immediately, so the output default value will change immediately after
602 * the polarity is re-configured, even before the timer is enabled.
603 * @rmtoll CFGR WAVE LL_LPTIM_ConfigOutput\n
604 * CFGR WAVPOL LL_LPTIM_ConfigOutput
605 * @param LPTIMx Low-Power Timer instance
606 * @param Waveform This parameter can be one of the following values:
607 * @arg @ref LL_LPTIM_OUTPUT_WAVEFORM_PWM
608 * @arg @ref LL_LPTIM_OUTPUT_WAVEFORM_SETONCE
609 * @param Polarity This parameter can be one of the following values:
610 * @arg @ref LL_LPTIM_OUTPUT_POLARITY_REGULAR
611 * @arg @ref LL_LPTIM_OUTPUT_POLARITY_INVERSE
612 * @retval None
613 */
LL_LPTIM_ConfigOutput(LPTIM_TypeDef * LPTIMx,uint32_t Waveform,uint32_t Polarity)614 __STATIC_INLINE void LL_LPTIM_ConfigOutput(LPTIM_TypeDef *LPTIMx, uint32_t Waveform, uint32_t Polarity)
615 {
616 MODIFY_REG(LPTIMx->CFGR, LPTIM_CFGR_WAVE | LPTIM_CFGR_WAVPOL, Waveform | Polarity);
617 }
618
619 /**
620 * @brief Set waveform shape
621 * @rmtoll CFGR WAVE LL_LPTIM_SetWaveform
622 * @param LPTIMx Low-Power Timer instance
623 * @param Waveform This parameter can be one of the following values:
624 * @arg @ref LL_LPTIM_OUTPUT_WAVEFORM_PWM
625 * @arg @ref LL_LPTIM_OUTPUT_WAVEFORM_SETONCE
626 * @retval None
627 */
LL_LPTIM_SetWaveform(LPTIM_TypeDef * LPTIMx,uint32_t Waveform)628 __STATIC_INLINE void LL_LPTIM_SetWaveform(LPTIM_TypeDef *LPTIMx, uint32_t Waveform)
629 {
630 MODIFY_REG(LPTIMx->CFGR, LPTIM_CFGR_WAVE, Waveform);
631 }
632
633 /**
634 * @brief Get actual waveform shape
635 * @rmtoll CFGR WAVE LL_LPTIM_GetWaveform
636 * @param LPTIMx Low-Power Timer instance
637 * @retval Returned value can be one of the following values:
638 * @arg @ref LL_LPTIM_OUTPUT_WAVEFORM_PWM
639 * @arg @ref LL_LPTIM_OUTPUT_WAVEFORM_SETONCE
640 */
LL_LPTIM_GetWaveform(const LPTIM_TypeDef * LPTIMx)641 __STATIC_INLINE uint32_t LL_LPTIM_GetWaveform(const LPTIM_TypeDef *LPTIMx)
642 {
643 return (uint32_t)(READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_WAVE));
644 }
645
646 /**
647 * @brief Set output polarity
648 * @rmtoll CFGR WAVPOL LL_LPTIM_SetPolarity
649 * @param LPTIMx Low-Power Timer instance
650 * @param Polarity This parameter can be one of the following values:
651 * @arg @ref LL_LPTIM_OUTPUT_POLARITY_REGULAR
652 * @arg @ref LL_LPTIM_OUTPUT_POLARITY_INVERSE
653 * @retval None
654 */
LL_LPTIM_SetPolarity(LPTIM_TypeDef * LPTIMx,uint32_t Polarity)655 __STATIC_INLINE void LL_LPTIM_SetPolarity(LPTIM_TypeDef *LPTIMx, uint32_t Polarity)
656 {
657 MODIFY_REG(LPTIMx->CFGR, LPTIM_CFGR_WAVPOL, Polarity);
658 }
659
660 /**
661 * @brief Get actual output polarity
662 * @rmtoll CFGR WAVPOL LL_LPTIM_GetPolarity
663 * @param LPTIMx Low-Power Timer instance
664 * @retval Returned value can be one of the following values:
665 * @arg @ref LL_LPTIM_OUTPUT_POLARITY_REGULAR
666 * @arg @ref LL_LPTIM_OUTPUT_POLARITY_INVERSE
667 */
LL_LPTIM_GetPolarity(const LPTIM_TypeDef * LPTIMx)668 __STATIC_INLINE uint32_t LL_LPTIM_GetPolarity(const LPTIM_TypeDef *LPTIMx)
669 {
670 return (uint32_t)(READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_WAVPOL));
671 }
672
673 /**
674 * @brief Set actual prescaler division ratio.
675 * @note This function must be called when the LPTIM instance is disabled.
676 * @note When the LPTIM is configured to be clocked by an internal clock source
677 * and the LPTIM counter is configured to be updated by active edges
678 * detected on the LPTIM external Input1, the internal clock provided to
679 * the LPTIM must be not be prescaled.
680 * @rmtoll CFGR PRESC LL_LPTIM_SetPrescaler
681 * @param LPTIMx Low-Power Timer instance
682 * @param Prescaler This parameter can be one of the following values:
683 * @arg @ref LL_LPTIM_PRESCALER_DIV1
684 * @arg @ref LL_LPTIM_PRESCALER_DIV2
685 * @arg @ref LL_LPTIM_PRESCALER_DIV4
686 * @arg @ref LL_LPTIM_PRESCALER_DIV8
687 * @arg @ref LL_LPTIM_PRESCALER_DIV16
688 * @arg @ref LL_LPTIM_PRESCALER_DIV32
689 * @arg @ref LL_LPTIM_PRESCALER_DIV64
690 * @arg @ref LL_LPTIM_PRESCALER_DIV128
691 * @retval None
692 */
LL_LPTIM_SetPrescaler(LPTIM_TypeDef * LPTIMx,uint32_t Prescaler)693 __STATIC_INLINE void LL_LPTIM_SetPrescaler(LPTIM_TypeDef *LPTIMx, uint32_t Prescaler)
694 {
695 MODIFY_REG(LPTIMx->CFGR, LPTIM_CFGR_PRESC, Prescaler);
696 }
697
698 /**
699 * @brief Get actual prescaler division ratio.
700 * @rmtoll CFGR PRESC LL_LPTIM_GetPrescaler
701 * @param LPTIMx Low-Power Timer instance
702 * @retval Returned value can be one of the following values:
703 * @arg @ref LL_LPTIM_PRESCALER_DIV1
704 * @arg @ref LL_LPTIM_PRESCALER_DIV2
705 * @arg @ref LL_LPTIM_PRESCALER_DIV4
706 * @arg @ref LL_LPTIM_PRESCALER_DIV8
707 * @arg @ref LL_LPTIM_PRESCALER_DIV16
708 * @arg @ref LL_LPTIM_PRESCALER_DIV32
709 * @arg @ref LL_LPTIM_PRESCALER_DIV64
710 * @arg @ref LL_LPTIM_PRESCALER_DIV128
711 */
LL_LPTIM_GetPrescaler(const LPTIM_TypeDef * LPTIMx)712 __STATIC_INLINE uint32_t LL_LPTIM_GetPrescaler(const LPTIM_TypeDef *LPTIMx)
713 {
714 return (uint32_t)(READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_PRESC));
715 }
716 #if defined(LPTIM_OR_OR)
717
718 /**
719 * @brief Set LPTIM input 1 source (default GPIO).
720 * @rmtoll OR OR LL_LPTIM_SetInput1Src
721 * @param LPTIMx Low-Power Timer instance
722 * @param Src This parameter can be one of the following values:
723 * @arg @ref LL_LPTIM_INPUT1_SRC_GPIO
724 * @arg @ref LL_LPTIM_INPUT1_SRC_COMP1
725 * @arg @ref LL_LPTIM_INPUT1_SRC_COMP2 (*)
726 * @arg @ref LL_LPTIM_INPUT1_SRC_COMP1_COMP2 (*)
727 * (*) Value not defined for all devices
728 * @retval None
729 */
LL_LPTIM_SetInput1Src(LPTIM_TypeDef * LPTIMx,uint32_t Src)730 __STATIC_INLINE void LL_LPTIM_SetInput1Src(LPTIM_TypeDef *LPTIMx, uint32_t Src)
731 {
732 MODIFY_REG(LPTIMx->OR, LPTIM_OR_OR, Src);
733 }
734 #endif /* LPTIM_OR_OR */
735 #if defined(LPTIM_OR_OR)
736
737 /**
738 * @brief Set LPTIM input 2 source (default GPIO).
739 * @rmtoll OR OR LL_LPTIM_SetInput2Src
740 * @param LPTIMx Low-Power Timer instance
741 * @param Src This parameter can be one of the following values:
742 * @arg @ref LL_LPTIM_INPUT2_SRC_GPIO
743 * @arg @ref LL_LPTIM_INPUT2_SRC_COMP2
744 * @retval None
745 */
LL_LPTIM_SetInput2Src(LPTIM_TypeDef * LPTIMx,uint32_t Src)746 __STATIC_INLINE void LL_LPTIM_SetInput2Src(LPTIM_TypeDef *LPTIMx, uint32_t Src)
747 {
748 MODIFY_REG(LPTIMx->OR, LPTIM_OR_OR, Src);
749 }
750 #endif /* LPTIM_OR_OR */
751
752 /**
753 * @}
754 */
755
756 /** @defgroup LPTIM_LL_EF_Trigger_Configuration Trigger Configuration
757 * @{
758 */
759
760 /**
761 * @brief Enable the timeout function
762 * @note This function must be called when the LPTIM instance is disabled.
763 * @note The first trigger event will start the timer, any successive trigger
764 * event will reset the counter and the timer will restart.
765 * @note The timeout value corresponds to the compare value; if no trigger
766 * occurs within the expected time frame, the MCU is waked-up by the
767 * compare match event.
768 * @rmtoll CFGR TIMOUT LL_LPTIM_EnableTimeout
769 * @param LPTIMx Low-Power Timer instance
770 * @retval None
771 */
LL_LPTIM_EnableTimeout(LPTIM_TypeDef * LPTIMx)772 __STATIC_INLINE void LL_LPTIM_EnableTimeout(LPTIM_TypeDef *LPTIMx)
773 {
774 SET_BIT(LPTIMx->CFGR, LPTIM_CFGR_TIMOUT);
775 }
776
777 /**
778 * @brief Disable the timeout function
779 * @note This function must be called when the LPTIM instance is disabled.
780 * @note A trigger event arriving when the timer is already started will be
781 * ignored.
782 * @rmtoll CFGR TIMOUT LL_LPTIM_DisableTimeout
783 * @param LPTIMx Low-Power Timer instance
784 * @retval None
785 */
LL_LPTIM_DisableTimeout(LPTIM_TypeDef * LPTIMx)786 __STATIC_INLINE void LL_LPTIM_DisableTimeout(LPTIM_TypeDef *LPTIMx)
787 {
788 CLEAR_BIT(LPTIMx->CFGR, LPTIM_CFGR_TIMOUT);
789 }
790
791 /**
792 * @brief Indicate whether the timeout function is enabled.
793 * @rmtoll CFGR TIMOUT LL_LPTIM_IsEnabledTimeout
794 * @param LPTIMx Low-Power Timer instance
795 * @retval State of bit (1 or 0).
796 */
LL_LPTIM_IsEnabledTimeout(const LPTIM_TypeDef * LPTIMx)797 __STATIC_INLINE uint32_t LL_LPTIM_IsEnabledTimeout(const LPTIM_TypeDef *LPTIMx)
798 {
799 return (((READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_TIMOUT) == LPTIM_CFGR_TIMOUT) ? 1UL : 0UL));
800 }
801
802 /**
803 * @brief Start the LPTIM counter
804 * @note This function must be called when the LPTIM instance is disabled.
805 * @rmtoll CFGR TRIGEN LL_LPTIM_TrigSw
806 * @param LPTIMx Low-Power Timer instance
807 * @retval None
808 */
LL_LPTIM_TrigSw(LPTIM_TypeDef * LPTIMx)809 __STATIC_INLINE void LL_LPTIM_TrigSw(LPTIM_TypeDef *LPTIMx)
810 {
811 CLEAR_BIT(LPTIMx->CFGR, LPTIM_CFGR_TRIGEN);
812 }
813
814 /**
815 * @brief Configure the external trigger used as a trigger event for the LPTIM.
816 * @note This function must be called when the LPTIM instance is disabled.
817 * @note An internal clock source must be present when a digital filter is
818 * required for the trigger.
819 * @rmtoll CFGR TRIGSEL LL_LPTIM_ConfigTrigger\n
820 * CFGR TRGFLT LL_LPTIM_ConfigTrigger\n
821 * CFGR TRIGEN LL_LPTIM_ConfigTrigger
822 * @param LPTIMx Low-Power Timer instance
823 * @param Source This parameter can be one of the following values:
824 * @arg @ref LL_LPTIM_TRIG_SOURCE_GPIO
825 * @arg @ref LL_LPTIM_TRIG_SOURCE_RTCALARMA
826 * @arg @ref LL_LPTIM_TRIG_SOURCE_RTCALARMB
827 * @arg @ref LL_LPTIM_TRIG_SOURCE_RTCTAMP1 (*)
828 * @arg @ref LL_LPTIM_TRIG_SOURCE_RTCTAMP2
829 * @arg @ref LL_LPTIM_TRIG_SOURCE_RTCTAMP3 (*)
830 * @arg @ref LL_LPTIM_TRIG_SOURCE_COMP1 (*)
831 * @arg @ref LL_LPTIM_TRIG_SOURCE_COMP2 (*)
832 *
833 * (*) Value not defined in all devices. \n
834 *
835 * @param Filter This parameter can be one of the following values:
836 * @arg @ref LL_LPTIM_TRIG_FILTER_NONE
837 * @arg @ref LL_LPTIM_TRIG_FILTER_2
838 * @arg @ref LL_LPTIM_TRIG_FILTER_4
839 * @arg @ref LL_LPTIM_TRIG_FILTER_8
840 * @param Polarity This parameter can be one of the following values:
841 * @arg @ref LL_LPTIM_TRIG_POLARITY_RISING
842 * @arg @ref LL_LPTIM_TRIG_POLARITY_FALLING
843 * @arg @ref LL_LPTIM_TRIG_POLARITY_RISING_FALLING
844 * @retval None
845 */
LL_LPTIM_ConfigTrigger(LPTIM_TypeDef * LPTIMx,uint32_t Source,uint32_t Filter,uint32_t Polarity)846 __STATIC_INLINE void LL_LPTIM_ConfigTrigger(LPTIM_TypeDef *LPTIMx, uint32_t Source, uint32_t Filter, uint32_t Polarity)
847 {
848 MODIFY_REG(LPTIMx->CFGR, LPTIM_CFGR_TRIGSEL | LPTIM_CFGR_TRGFLT | LPTIM_CFGR_TRIGEN, Source | Filter | Polarity);
849 }
850
851 /**
852 * @brief Get actual external trigger source.
853 * @rmtoll CFGR TRIGSEL LL_LPTIM_GetTriggerSource
854 * @param LPTIMx Low-Power Timer instance
855 * @retval Returned value can be one of the following values:
856 * @arg @ref LL_LPTIM_TRIG_SOURCE_GPIO
857 * @arg @ref LL_LPTIM_TRIG_SOURCE_RTCALARMA
858 * @arg @ref LL_LPTIM_TRIG_SOURCE_RTCALARMB
859 * @arg @ref LL_LPTIM_TRIG_SOURCE_RTCTAMP1 (*)
860 * @arg @ref LL_LPTIM_TRIG_SOURCE_RTCTAMP2
861 * @arg @ref LL_LPTIM_TRIG_SOURCE_RTCTAMP3 (*)
862 * @arg @ref LL_LPTIM_TRIG_SOURCE_COMP1 (*)
863 * @arg @ref LL_LPTIM_TRIG_SOURCE_COMP2 (*)
864 *
865 * (*) Value not defined in all devices. \n
866 *
867 */
LL_LPTIM_GetTriggerSource(const LPTIM_TypeDef * LPTIMx)868 __STATIC_INLINE uint32_t LL_LPTIM_GetTriggerSource(const LPTIM_TypeDef *LPTIMx)
869 {
870 return (uint32_t)(READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_TRIGSEL));
871 }
872
873 /**
874 * @brief Get actual external trigger filter.
875 * @rmtoll CFGR TRGFLT LL_LPTIM_GetTriggerFilter
876 * @param LPTIMx Low-Power Timer instance
877 * @retval Returned value can be one of the following values:
878 * @arg @ref LL_LPTIM_TRIG_FILTER_NONE
879 * @arg @ref LL_LPTIM_TRIG_FILTER_2
880 * @arg @ref LL_LPTIM_TRIG_FILTER_4
881 * @arg @ref LL_LPTIM_TRIG_FILTER_8
882 */
LL_LPTIM_GetTriggerFilter(const LPTIM_TypeDef * LPTIMx)883 __STATIC_INLINE uint32_t LL_LPTIM_GetTriggerFilter(const LPTIM_TypeDef *LPTIMx)
884 {
885 return (uint32_t)(READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_TRGFLT));
886 }
887
888 /**
889 * @brief Get actual external trigger polarity.
890 * @rmtoll CFGR TRIGEN LL_LPTIM_GetTriggerPolarity
891 * @param LPTIMx Low-Power Timer instance
892 * @retval Returned value can be one of the following values:
893 * @arg @ref LL_LPTIM_TRIG_POLARITY_RISING
894 * @arg @ref LL_LPTIM_TRIG_POLARITY_FALLING
895 * @arg @ref LL_LPTIM_TRIG_POLARITY_RISING_FALLING
896 */
LL_LPTIM_GetTriggerPolarity(const LPTIM_TypeDef * LPTIMx)897 __STATIC_INLINE uint32_t LL_LPTIM_GetTriggerPolarity(const LPTIM_TypeDef *LPTIMx)
898 {
899 return (uint32_t)(READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_TRIGEN));
900 }
901
902 /**
903 * @}
904 */
905
906 /** @defgroup LPTIM_LL_EF_Clock_Configuration Clock Configuration
907 * @{
908 */
909
910 /**
911 * @brief Set the source of the clock used by the LPTIM instance.
912 * @note This function must be called when the LPTIM instance is disabled.
913 * @rmtoll CFGR CKSEL LL_LPTIM_SetClockSource
914 * @param LPTIMx Low-Power Timer instance
915 * @param ClockSource This parameter can be one of the following values:
916 * @arg @ref LL_LPTIM_CLK_SOURCE_INTERNAL
917 * @arg @ref LL_LPTIM_CLK_SOURCE_EXTERNAL
918 * @retval None
919 */
LL_LPTIM_SetClockSource(LPTIM_TypeDef * LPTIMx,uint32_t ClockSource)920 __STATIC_INLINE void LL_LPTIM_SetClockSource(LPTIM_TypeDef *LPTIMx, uint32_t ClockSource)
921 {
922 MODIFY_REG(LPTIMx->CFGR, LPTIM_CFGR_CKSEL, ClockSource);
923 }
924
925 /**
926 * @brief Get actual LPTIM instance clock source.
927 * @rmtoll CFGR CKSEL LL_LPTIM_GetClockSource
928 * @param LPTIMx Low-Power Timer instance
929 * @retval Returned value can be one of the following values:
930 * @arg @ref LL_LPTIM_CLK_SOURCE_INTERNAL
931 * @arg @ref LL_LPTIM_CLK_SOURCE_EXTERNAL
932 */
LL_LPTIM_GetClockSource(const LPTIM_TypeDef * LPTIMx)933 __STATIC_INLINE uint32_t LL_LPTIM_GetClockSource(const LPTIM_TypeDef *LPTIMx)
934 {
935 return (uint32_t)(READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_CKSEL));
936 }
937
938 /**
939 * @brief Configure the active edge or edges used by the counter when
940 the LPTIM is clocked by an external clock source.
941 * @note This function must be called when the LPTIM instance is disabled.
942 * @note When both external clock signal edges are considered active ones,
943 * the LPTIM must also be clocked by an internal clock source with a
944 * frequency equal to at least four times the external clock frequency.
945 * @note An internal clock source must be present when a digital filter is
946 * required for external clock.
947 * @rmtoll CFGR CKFLT LL_LPTIM_ConfigClock\n
948 * CFGR CKPOL LL_LPTIM_ConfigClock
949 * @param LPTIMx Low-Power Timer instance
950 * @param ClockFilter This parameter can be one of the following values:
951 * @arg @ref LL_LPTIM_CLK_FILTER_NONE
952 * @arg @ref LL_LPTIM_CLK_FILTER_2
953 * @arg @ref LL_LPTIM_CLK_FILTER_4
954 * @arg @ref LL_LPTIM_CLK_FILTER_8
955 * @param ClockPolarity This parameter can be one of the following values:
956 * @arg @ref LL_LPTIM_CLK_POLARITY_RISING
957 * @arg @ref LL_LPTIM_CLK_POLARITY_FALLING
958 * @arg @ref LL_LPTIM_CLK_POLARITY_RISING_FALLING
959 * @retval None
960 */
LL_LPTIM_ConfigClock(LPTIM_TypeDef * LPTIMx,uint32_t ClockFilter,uint32_t ClockPolarity)961 __STATIC_INLINE void LL_LPTIM_ConfigClock(LPTIM_TypeDef *LPTIMx, uint32_t ClockFilter, uint32_t ClockPolarity)
962 {
963 MODIFY_REG(LPTIMx->CFGR, LPTIM_CFGR_CKFLT | LPTIM_CFGR_CKPOL, ClockFilter | ClockPolarity);
964 }
965
966 /**
967 * @brief Get actual clock polarity
968 * @rmtoll CFGR CKPOL LL_LPTIM_GetClockPolarity
969 * @param LPTIMx Low-Power Timer instance
970 * @retval Returned value can be one of the following values:
971 * @arg @ref LL_LPTIM_CLK_POLARITY_RISING
972 * @arg @ref LL_LPTIM_CLK_POLARITY_FALLING
973 * @arg @ref LL_LPTIM_CLK_POLARITY_RISING_FALLING
974 */
LL_LPTIM_GetClockPolarity(const LPTIM_TypeDef * LPTIMx)975 __STATIC_INLINE uint32_t LL_LPTIM_GetClockPolarity(const LPTIM_TypeDef *LPTIMx)
976 {
977 return (uint32_t)(READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_CKPOL));
978 }
979
980 /**
981 * @brief Get actual clock digital filter
982 * @rmtoll CFGR CKFLT LL_LPTIM_GetClockFilter
983 * @param LPTIMx Low-Power Timer instance
984 * @retval Returned value can be one of the following values:
985 * @arg @ref LL_LPTIM_CLK_FILTER_NONE
986 * @arg @ref LL_LPTIM_CLK_FILTER_2
987 * @arg @ref LL_LPTIM_CLK_FILTER_4
988 * @arg @ref LL_LPTIM_CLK_FILTER_8
989 */
LL_LPTIM_GetClockFilter(const LPTIM_TypeDef * LPTIMx)990 __STATIC_INLINE uint32_t LL_LPTIM_GetClockFilter(const LPTIM_TypeDef *LPTIMx)
991 {
992 return (uint32_t)(READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_CKFLT));
993 }
994
995 /**
996 * @}
997 */
998
999 /** @defgroup LPTIM_LL_EF_Encoder_Mode Encoder Mode
1000 * @{
1001 */
1002
1003 /**
1004 * @brief Configure the encoder mode.
1005 * @note This function must be called when the LPTIM instance is disabled.
1006 * @rmtoll CFGR CKPOL LL_LPTIM_SetEncoderMode
1007 * @param LPTIMx Low-Power Timer instance
1008 * @param EncoderMode This parameter can be one of the following values:
1009 * @arg @ref LL_LPTIM_ENCODER_MODE_RISING
1010 * @arg @ref LL_LPTIM_ENCODER_MODE_FALLING
1011 * @arg @ref LL_LPTIM_ENCODER_MODE_RISING_FALLING
1012 * @retval None
1013 */
LL_LPTIM_SetEncoderMode(LPTIM_TypeDef * LPTIMx,uint32_t EncoderMode)1014 __STATIC_INLINE void LL_LPTIM_SetEncoderMode(LPTIM_TypeDef *LPTIMx, uint32_t EncoderMode)
1015 {
1016 MODIFY_REG(LPTIMx->CFGR, LPTIM_CFGR_CKPOL, EncoderMode);
1017 }
1018
1019 /**
1020 * @brief Get actual encoder mode.
1021 * @rmtoll CFGR CKPOL LL_LPTIM_GetEncoderMode
1022 * @param LPTIMx Low-Power Timer instance
1023 * @retval Returned value can be one of the following values:
1024 * @arg @ref LL_LPTIM_ENCODER_MODE_RISING
1025 * @arg @ref LL_LPTIM_ENCODER_MODE_FALLING
1026 * @arg @ref LL_LPTIM_ENCODER_MODE_RISING_FALLING
1027 */
LL_LPTIM_GetEncoderMode(const LPTIM_TypeDef * LPTIMx)1028 __STATIC_INLINE uint32_t LL_LPTIM_GetEncoderMode(const LPTIM_TypeDef *LPTIMx)
1029 {
1030 return (uint32_t)(READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_CKPOL));
1031 }
1032
1033 /**
1034 * @brief Enable the encoder mode
1035 * @note This function must be called when the LPTIM instance is disabled.
1036 * @note In this mode the LPTIM instance must be clocked by an internal clock
1037 * source. Also, the prescaler division ratio must be equal to 1.
1038 * @note LPTIM instance must be configured in continuous mode prior enabling
1039 * the encoder mode.
1040 * @rmtoll CFGR ENC LL_LPTIM_EnableEncoderMode
1041 * @param LPTIMx Low-Power Timer instance
1042 * @retval None
1043 */
LL_LPTIM_EnableEncoderMode(LPTIM_TypeDef * LPTIMx)1044 __STATIC_INLINE void LL_LPTIM_EnableEncoderMode(LPTIM_TypeDef *LPTIMx)
1045 {
1046 SET_BIT(LPTIMx->CFGR, LPTIM_CFGR_ENC);
1047 }
1048
1049 /**
1050 * @brief Disable the encoder mode
1051 * @note This function must be called when the LPTIM instance is disabled.
1052 * @rmtoll CFGR ENC LL_LPTIM_DisableEncoderMode
1053 * @param LPTIMx Low-Power Timer instance
1054 * @retval None
1055 */
LL_LPTIM_DisableEncoderMode(LPTIM_TypeDef * LPTIMx)1056 __STATIC_INLINE void LL_LPTIM_DisableEncoderMode(LPTIM_TypeDef *LPTIMx)
1057 {
1058 CLEAR_BIT(LPTIMx->CFGR, LPTIM_CFGR_ENC);
1059 }
1060
1061 /**
1062 * @brief Indicates whether the LPTIM operates in encoder mode.
1063 * @rmtoll CFGR ENC LL_LPTIM_IsEnabledEncoderMode
1064 * @param LPTIMx Low-Power Timer instance
1065 * @retval State of bit (1 or 0).
1066 */
LL_LPTIM_IsEnabledEncoderMode(const LPTIM_TypeDef * LPTIMx)1067 __STATIC_INLINE uint32_t LL_LPTIM_IsEnabledEncoderMode(const LPTIM_TypeDef *LPTIMx)
1068 {
1069 return (((READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_ENC) == LPTIM_CFGR_ENC) ? 1UL : 0UL));
1070 }
1071
1072 /**
1073 * @}
1074 */
1075
1076 /** @defgroup LPTIM_LL_EF_FLAG_Management FLAG Management
1077 * @{
1078 */
1079
1080
1081 /**
1082 * @brief Clear the compare match flag (CMPMCF)
1083 * @rmtoll ICR CMPMCF LL_LPTIM_ClearFlag_CMPM
1084 * @param LPTIMx Low-Power Timer instance
1085 * @retval None
1086 */
LL_LPTIM_ClearFlag_CMPM(LPTIM_TypeDef * LPTIMx)1087 __STATIC_INLINE void LL_LPTIM_ClearFlag_CMPM(LPTIM_TypeDef *LPTIMx)
1088 {
1089 SET_BIT(LPTIMx->ICR, LPTIM_ICR_CMPMCF);
1090 }
1091
1092 /**
1093 * @brief Inform application whether a compare match interrupt has occurred.
1094 * @rmtoll ISR CMPM LL_LPTIM_IsActiveFlag_CMPM
1095 * @param LPTIMx Low-Power Timer instance
1096 * @retval State of bit (1 or 0).
1097 */
LL_LPTIM_IsActiveFlag_CMPM(const LPTIM_TypeDef * LPTIMx)1098 __STATIC_INLINE uint32_t LL_LPTIM_IsActiveFlag_CMPM(const LPTIM_TypeDef *LPTIMx)
1099 {
1100 return (((READ_BIT(LPTIMx->ISR, LPTIM_ISR_CMPM) == LPTIM_ISR_CMPM) ? 1UL : 0UL));
1101 }
1102
1103 /**
1104 * @brief Clear the autoreload match flag (ARRMCF)
1105 * @rmtoll ICR ARRMCF LL_LPTIM_ClearFlag_ARRM
1106 * @param LPTIMx Low-Power Timer instance
1107 * @retval None
1108 */
LL_LPTIM_ClearFlag_ARRM(LPTIM_TypeDef * LPTIMx)1109 __STATIC_INLINE void LL_LPTIM_ClearFlag_ARRM(LPTIM_TypeDef *LPTIMx)
1110 {
1111 SET_BIT(LPTIMx->ICR, LPTIM_ICR_ARRMCF);
1112 }
1113
1114 /**
1115 * @brief Inform application whether a autoreload match interrupt has occurred.
1116 * @rmtoll ISR ARRM LL_LPTIM_IsActiveFlag_ARRM
1117 * @param LPTIMx Low-Power Timer instance
1118 * @retval State of bit (1 or 0).
1119 */
LL_LPTIM_IsActiveFlag_ARRM(const LPTIM_TypeDef * LPTIMx)1120 __STATIC_INLINE uint32_t LL_LPTIM_IsActiveFlag_ARRM(const LPTIM_TypeDef *LPTIMx)
1121 {
1122 return (((READ_BIT(LPTIMx->ISR, LPTIM_ISR_ARRM) == LPTIM_ISR_ARRM) ? 1UL : 0UL));
1123 }
1124
1125 /**
1126 * @brief Clear the external trigger valid edge flag(EXTTRIGCF).
1127 * @rmtoll ICR EXTTRIGCF LL_LPTIM_ClearFlag_EXTTRIG
1128 * @param LPTIMx Low-Power Timer instance
1129 * @retval None
1130 */
LL_LPTIM_ClearFlag_EXTTRIG(LPTIM_TypeDef * LPTIMx)1131 __STATIC_INLINE void LL_LPTIM_ClearFlag_EXTTRIG(LPTIM_TypeDef *LPTIMx)
1132 {
1133 SET_BIT(LPTIMx->ICR, LPTIM_ICR_EXTTRIGCF);
1134 }
1135
1136 /**
1137 * @brief Inform application whether a valid edge on the selected external trigger input has occurred.
1138 * @rmtoll ISR EXTTRIG LL_LPTIM_IsActiveFlag_EXTTRIG
1139 * @param LPTIMx Low-Power Timer instance
1140 * @retval State of bit (1 or 0).
1141 */
LL_LPTIM_IsActiveFlag_EXTTRIG(const LPTIM_TypeDef * LPTIMx)1142 __STATIC_INLINE uint32_t LL_LPTIM_IsActiveFlag_EXTTRIG(const LPTIM_TypeDef *LPTIMx)
1143 {
1144 return (((READ_BIT(LPTIMx->ISR, LPTIM_ISR_EXTTRIG) == LPTIM_ISR_EXTTRIG) ? 1UL : 0UL));
1145 }
1146
1147 /**
1148 * @brief Clear the compare register update interrupt flag (CMPOKCF).
1149 * @rmtoll ICR CMPOKCF LL_LPTIM_ClearFlag_CMPOK
1150 * @param LPTIMx Low-Power Timer instance
1151 * @retval None
1152 */
LL_LPTIM_ClearFlag_CMPOK(LPTIM_TypeDef * LPTIMx)1153 __STATIC_INLINE void LL_LPTIM_ClearFlag_CMPOK(LPTIM_TypeDef *LPTIMx)
1154 {
1155 SET_BIT(LPTIMx->ICR, LPTIM_ICR_CMPOKCF);
1156 }
1157
1158 /**
1159 * @brief Informs application whether the APB bus write operation to the LPTIMx_CMP register has been successfully
1160 completed. If so, a new one can be initiated.
1161 * @rmtoll ISR CMPOK LL_LPTIM_IsActiveFlag_CMPOK
1162 * @param LPTIMx Low-Power Timer instance
1163 * @retval State of bit (1 or 0).
1164 */
LL_LPTIM_IsActiveFlag_CMPOK(const LPTIM_TypeDef * LPTIMx)1165 __STATIC_INLINE uint32_t LL_LPTIM_IsActiveFlag_CMPOK(const LPTIM_TypeDef *LPTIMx)
1166 {
1167 return (((READ_BIT(LPTIMx->ISR, LPTIM_ISR_CMPOK) == LPTIM_ISR_CMPOK) ? 1UL : 0UL));
1168 }
1169
1170 /**
1171 * @brief Clear the autoreload register update interrupt flag (ARROKCF).
1172 * @rmtoll ICR ARROKCF LL_LPTIM_ClearFlag_ARROK
1173 * @param LPTIMx Low-Power Timer instance
1174 * @retval None
1175 */
LL_LPTIM_ClearFlag_ARROK(LPTIM_TypeDef * LPTIMx)1176 __STATIC_INLINE void LL_LPTIM_ClearFlag_ARROK(LPTIM_TypeDef *LPTIMx)
1177 {
1178 SET_BIT(LPTIMx->ICR, LPTIM_ICR_ARROKCF);
1179 }
1180
1181 /**
1182 * @brief Informs application whether the APB bus write operation to the LPTIMx_ARR register has been successfully
1183 completed. If so, a new one can be initiated.
1184 * @rmtoll ISR ARROK LL_LPTIM_IsActiveFlag_ARROK
1185 * @param LPTIMx Low-Power Timer instance
1186 * @retval State of bit (1 or 0).
1187 */
LL_LPTIM_IsActiveFlag_ARROK(const LPTIM_TypeDef * LPTIMx)1188 __STATIC_INLINE uint32_t LL_LPTIM_IsActiveFlag_ARROK(const LPTIM_TypeDef *LPTIMx)
1189 {
1190 return (((READ_BIT(LPTIMx->ISR, LPTIM_ISR_ARROK) == LPTIM_ISR_ARROK) ? 1UL : 0UL));
1191 }
1192
1193 /**
1194 * @brief Clear the counter direction change to up interrupt flag (UPCF).
1195 * @rmtoll ICR UPCF LL_LPTIM_ClearFlag_UP
1196 * @param LPTIMx Low-Power Timer instance
1197 * @retval None
1198 */
LL_LPTIM_ClearFlag_UP(LPTIM_TypeDef * LPTIMx)1199 __STATIC_INLINE void LL_LPTIM_ClearFlag_UP(LPTIM_TypeDef *LPTIMx)
1200 {
1201 SET_BIT(LPTIMx->ICR, LPTIM_ICR_UPCF);
1202 }
1203
1204 /**
1205 * @brief Informs the application whether the counter direction has changed from down to up (when the LPTIM instance
1206 operates in encoder mode).
1207 * @rmtoll ISR UP LL_LPTIM_IsActiveFlag_UP
1208 * @param LPTIMx Low-Power Timer instance
1209 * @retval State of bit (1 or 0).
1210 */
LL_LPTIM_IsActiveFlag_UP(const LPTIM_TypeDef * LPTIMx)1211 __STATIC_INLINE uint32_t LL_LPTIM_IsActiveFlag_UP(const LPTIM_TypeDef *LPTIMx)
1212 {
1213 return (((READ_BIT(LPTIMx->ISR, LPTIM_ISR_UP) == LPTIM_ISR_UP) ? 1UL : 0UL));
1214 }
1215
1216 /**
1217 * @brief Clear the counter direction change to down interrupt flag (DOWNCF).
1218 * @rmtoll ICR DOWNCF LL_LPTIM_ClearFlag_DOWN
1219 * @param LPTIMx Low-Power Timer instance
1220 * @retval None
1221 */
LL_LPTIM_ClearFlag_DOWN(LPTIM_TypeDef * LPTIMx)1222 __STATIC_INLINE void LL_LPTIM_ClearFlag_DOWN(LPTIM_TypeDef *LPTIMx)
1223 {
1224 SET_BIT(LPTIMx->ICR, LPTIM_ICR_DOWNCF);
1225 }
1226
1227 /**
1228 * @brief Informs the application whether the counter direction has changed from up to down (when the LPTIM instance
1229 operates in encoder mode).
1230 * @rmtoll ISR DOWN LL_LPTIM_IsActiveFlag_DOWN
1231 * @param LPTIMx Low-Power Timer instance
1232 * @retval State of bit (1 or 0).
1233 */
LL_LPTIM_IsActiveFlag_DOWN(const LPTIM_TypeDef * LPTIMx)1234 __STATIC_INLINE uint32_t LL_LPTIM_IsActiveFlag_DOWN(const LPTIM_TypeDef *LPTIMx)
1235 {
1236 return (((READ_BIT(LPTIMx->ISR, LPTIM_ISR_DOWN) == LPTIM_ISR_DOWN) ? 1UL : 0UL));
1237 }
1238
1239 /**
1240 * @}
1241 */
1242
1243 /** @defgroup LPTIM_LL_EF_IT_Management Interrupt Management
1244 * @{
1245 */
1246
1247 /**
1248 * @brief Enable compare match interrupt (CMPMIE).
1249 * @rmtoll IER CMPMIE LL_LPTIM_EnableIT_CMPM
1250 * @param LPTIMx Low-Power Timer instance
1251 * @retval None
1252 */
LL_LPTIM_EnableIT_CMPM(LPTIM_TypeDef * LPTIMx)1253 __STATIC_INLINE void LL_LPTIM_EnableIT_CMPM(LPTIM_TypeDef *LPTIMx)
1254 {
1255 SET_BIT(LPTIMx->IER, LPTIM_IER_CMPMIE);
1256 }
1257
1258 /**
1259 * @brief Disable compare match interrupt (CMPMIE).
1260 * @rmtoll IER CMPMIE LL_LPTIM_DisableIT_CMPM
1261 * @param LPTIMx Low-Power Timer instance
1262 * @retval None
1263 */
LL_LPTIM_DisableIT_CMPM(LPTIM_TypeDef * LPTIMx)1264 __STATIC_INLINE void LL_LPTIM_DisableIT_CMPM(LPTIM_TypeDef *LPTIMx)
1265 {
1266 CLEAR_BIT(LPTIMx->IER, LPTIM_IER_CMPMIE);
1267 }
1268
1269 /**
1270 * @brief Indicates whether the compare match interrupt (CMPMIE) is enabled.
1271 * @rmtoll IER CMPMIE LL_LPTIM_IsEnabledIT_CMPM
1272 * @param LPTIMx Low-Power Timer instance
1273 * @retval State of bit (1 or 0).
1274 */
LL_LPTIM_IsEnabledIT_CMPM(const LPTIM_TypeDef * LPTIMx)1275 __STATIC_INLINE uint32_t LL_LPTIM_IsEnabledIT_CMPM(const LPTIM_TypeDef *LPTIMx)
1276 {
1277 return (((READ_BIT(LPTIMx->IER, LPTIM_IER_CMPMIE) == LPTIM_IER_CMPMIE) ? 1UL : 0UL));
1278 }
1279
1280 /**
1281 * @brief Enable autoreload match interrupt (ARRMIE).
1282 * @rmtoll IER ARRMIE LL_LPTIM_EnableIT_ARRM
1283 * @param LPTIMx Low-Power Timer instance
1284 * @retval None
1285 */
LL_LPTIM_EnableIT_ARRM(LPTIM_TypeDef * LPTIMx)1286 __STATIC_INLINE void LL_LPTIM_EnableIT_ARRM(LPTIM_TypeDef *LPTIMx)
1287 {
1288 SET_BIT(LPTIMx->IER, LPTIM_IER_ARRMIE);
1289 }
1290
1291 /**
1292 * @brief Disable autoreload match interrupt (ARRMIE).
1293 * @rmtoll IER ARRMIE LL_LPTIM_DisableIT_ARRM
1294 * @param LPTIMx Low-Power Timer instance
1295 * @retval None
1296 */
LL_LPTIM_DisableIT_ARRM(LPTIM_TypeDef * LPTIMx)1297 __STATIC_INLINE void LL_LPTIM_DisableIT_ARRM(LPTIM_TypeDef *LPTIMx)
1298 {
1299 CLEAR_BIT(LPTIMx->IER, LPTIM_IER_ARRMIE);
1300 }
1301
1302 /**
1303 * @brief Indicates whether the autoreload match interrupt (ARRMIE) is enabled.
1304 * @rmtoll IER ARRMIE LL_LPTIM_IsEnabledIT_ARRM
1305 * @param LPTIMx Low-Power Timer instance
1306 * @retval State of bit (1 or 0).
1307 */
LL_LPTIM_IsEnabledIT_ARRM(const LPTIM_TypeDef * LPTIMx)1308 __STATIC_INLINE uint32_t LL_LPTIM_IsEnabledIT_ARRM(const LPTIM_TypeDef *LPTIMx)
1309 {
1310 return (((READ_BIT(LPTIMx->IER, LPTIM_IER_ARRMIE) == LPTIM_IER_ARRMIE) ? 1UL : 0UL));
1311 }
1312
1313 /**
1314 * @brief Enable external trigger valid edge interrupt (EXTTRIGIE).
1315 * @rmtoll IER EXTTRIGIE LL_LPTIM_EnableIT_EXTTRIG
1316 * @param LPTIMx Low-Power Timer instance
1317 * @retval None
1318 */
LL_LPTIM_EnableIT_EXTTRIG(LPTIM_TypeDef * LPTIMx)1319 __STATIC_INLINE void LL_LPTIM_EnableIT_EXTTRIG(LPTIM_TypeDef *LPTIMx)
1320 {
1321 SET_BIT(LPTIMx->IER, LPTIM_IER_EXTTRIGIE);
1322 }
1323
1324 /**
1325 * @brief Disable external trigger valid edge interrupt (EXTTRIGIE).
1326 * @rmtoll IER EXTTRIGIE LL_LPTIM_DisableIT_EXTTRIG
1327 * @param LPTIMx Low-Power Timer instance
1328 * @retval None
1329 */
LL_LPTIM_DisableIT_EXTTRIG(LPTIM_TypeDef * LPTIMx)1330 __STATIC_INLINE void LL_LPTIM_DisableIT_EXTTRIG(LPTIM_TypeDef *LPTIMx)
1331 {
1332 CLEAR_BIT(LPTIMx->IER, LPTIM_IER_EXTTRIGIE);
1333 }
1334
1335 /**
1336 * @brief Indicates external trigger valid edge interrupt (EXTTRIGIE) is enabled.
1337 * @rmtoll IER EXTTRIGIE LL_LPTIM_IsEnabledIT_EXTTRIG
1338 * @param LPTIMx Low-Power Timer instance
1339 * @retval State of bit (1 or 0).
1340 */
LL_LPTIM_IsEnabledIT_EXTTRIG(const LPTIM_TypeDef * LPTIMx)1341 __STATIC_INLINE uint32_t LL_LPTIM_IsEnabledIT_EXTTRIG(const LPTIM_TypeDef *LPTIMx)
1342 {
1343 return (((READ_BIT(LPTIMx->IER, LPTIM_IER_EXTTRIGIE) == LPTIM_IER_EXTTRIGIE) ? 1UL : 0UL));
1344 }
1345
1346 /**
1347 * @brief Enable compare register write completed interrupt (CMPOKIE).
1348 * @rmtoll IER CMPOKIE LL_LPTIM_EnableIT_CMPOK
1349 * @param LPTIMx Low-Power Timer instance
1350 * @retval None
1351 */
LL_LPTIM_EnableIT_CMPOK(LPTIM_TypeDef * LPTIMx)1352 __STATIC_INLINE void LL_LPTIM_EnableIT_CMPOK(LPTIM_TypeDef *LPTIMx)
1353 {
1354 SET_BIT(LPTIMx->IER, LPTIM_IER_CMPOKIE);
1355 }
1356
1357 /**
1358 * @brief Disable compare register write completed interrupt (CMPOKIE).
1359 * @rmtoll IER CMPOKIE LL_LPTIM_DisableIT_CMPOK
1360 * @param LPTIMx Low-Power Timer instance
1361 * @retval None
1362 */
LL_LPTIM_DisableIT_CMPOK(LPTIM_TypeDef * LPTIMx)1363 __STATIC_INLINE void LL_LPTIM_DisableIT_CMPOK(LPTIM_TypeDef *LPTIMx)
1364 {
1365 CLEAR_BIT(LPTIMx->IER, LPTIM_IER_CMPOKIE);
1366 }
1367
1368 /**
1369 * @brief Indicates whether the compare register write completed interrupt (CMPOKIE) is enabled.
1370 * @rmtoll IER CMPOKIE LL_LPTIM_IsEnabledIT_CMPOK
1371 * @param LPTIMx Low-Power Timer instance
1372 * @retval State of bit (1 or 0).
1373 */
LL_LPTIM_IsEnabledIT_CMPOK(const LPTIM_TypeDef * LPTIMx)1374 __STATIC_INLINE uint32_t LL_LPTIM_IsEnabledIT_CMPOK(const LPTIM_TypeDef *LPTIMx)
1375 {
1376 return (((READ_BIT(LPTIMx->IER, LPTIM_IER_CMPOKIE) == LPTIM_IER_CMPOKIE) ? 1UL : 0UL));
1377 }
1378
1379 /**
1380 * @brief Enable autoreload register write completed interrupt (ARROKIE).
1381 * @rmtoll IER ARROKIE LL_LPTIM_EnableIT_ARROK
1382 * @param LPTIMx Low-Power Timer instance
1383 * @retval None
1384 */
LL_LPTIM_EnableIT_ARROK(LPTIM_TypeDef * LPTIMx)1385 __STATIC_INLINE void LL_LPTIM_EnableIT_ARROK(LPTIM_TypeDef *LPTIMx)
1386 {
1387 SET_BIT(LPTIMx->IER, LPTIM_IER_ARROKIE);
1388 }
1389
1390 /**
1391 * @brief Disable autoreload register write completed interrupt (ARROKIE).
1392 * @rmtoll IER ARROKIE LL_LPTIM_DisableIT_ARROK
1393 * @param LPTIMx Low-Power Timer instance
1394 * @retval None
1395 */
LL_LPTIM_DisableIT_ARROK(LPTIM_TypeDef * LPTIMx)1396 __STATIC_INLINE void LL_LPTIM_DisableIT_ARROK(LPTIM_TypeDef *LPTIMx)
1397 {
1398 CLEAR_BIT(LPTIMx->IER, LPTIM_IER_ARROKIE);
1399 }
1400
1401 /**
1402 * @brief Indicates whether the autoreload register write completed interrupt (ARROKIE) is enabled.
1403 * @rmtoll IER ARROKIE LL_LPTIM_IsEnabledIT_ARROK
1404 * @param LPTIMx Low-Power Timer instance
1405 * @retval State of bit(1 or 0).
1406 */
LL_LPTIM_IsEnabledIT_ARROK(const LPTIM_TypeDef * LPTIMx)1407 __STATIC_INLINE uint32_t LL_LPTIM_IsEnabledIT_ARROK(const LPTIM_TypeDef *LPTIMx)
1408 {
1409 return (((READ_BIT(LPTIMx->IER, LPTIM_IER_ARROKIE) == LPTIM_IER_ARROKIE) ? 1UL : 0UL));
1410 }
1411
1412 /**
1413 * @brief Enable direction change to up interrupt (UPIE).
1414 * @rmtoll IER UPIE LL_LPTIM_EnableIT_UP
1415 * @param LPTIMx Low-Power Timer instance
1416 * @retval None
1417 */
LL_LPTIM_EnableIT_UP(LPTIM_TypeDef * LPTIMx)1418 __STATIC_INLINE void LL_LPTIM_EnableIT_UP(LPTIM_TypeDef *LPTIMx)
1419 {
1420 SET_BIT(LPTIMx->IER, LPTIM_IER_UPIE);
1421 }
1422
1423 /**
1424 * @brief Disable direction change to up interrupt (UPIE).
1425 * @rmtoll IER UPIE LL_LPTIM_DisableIT_UP
1426 * @param LPTIMx Low-Power Timer instance
1427 * @retval None
1428 */
LL_LPTIM_DisableIT_UP(LPTIM_TypeDef * LPTIMx)1429 __STATIC_INLINE void LL_LPTIM_DisableIT_UP(LPTIM_TypeDef *LPTIMx)
1430 {
1431 CLEAR_BIT(LPTIMx->IER, LPTIM_IER_UPIE);
1432 }
1433
1434 /**
1435 * @brief Indicates whether the direction change to up interrupt (UPIE) is enabled.
1436 * @rmtoll IER UPIE LL_LPTIM_IsEnabledIT_UP
1437 * @param LPTIMx Low-Power Timer instance
1438 * @retval State of bit(1 or 0).
1439 */
LL_LPTIM_IsEnabledIT_UP(const LPTIM_TypeDef * LPTIMx)1440 __STATIC_INLINE uint32_t LL_LPTIM_IsEnabledIT_UP(const LPTIM_TypeDef *LPTIMx)
1441 {
1442 return (((READ_BIT(LPTIMx->IER, LPTIM_IER_UPIE) == LPTIM_IER_UPIE) ? 1UL : 0UL));
1443 }
1444
1445 /**
1446 * @brief Enable direction change to down interrupt (DOWNIE).
1447 * @rmtoll IER DOWNIE LL_LPTIM_EnableIT_DOWN
1448 * @param LPTIMx Low-Power Timer instance
1449 * @retval None
1450 */
LL_LPTIM_EnableIT_DOWN(LPTIM_TypeDef * LPTIMx)1451 __STATIC_INLINE void LL_LPTIM_EnableIT_DOWN(LPTIM_TypeDef *LPTIMx)
1452 {
1453 SET_BIT(LPTIMx->IER, LPTIM_IER_DOWNIE);
1454 }
1455
1456 /**
1457 * @brief Disable direction change to down interrupt (DOWNIE).
1458 * @rmtoll IER DOWNIE LL_LPTIM_DisableIT_DOWN
1459 * @param LPTIMx Low-Power Timer instance
1460 * @retval None
1461 */
LL_LPTIM_DisableIT_DOWN(LPTIM_TypeDef * LPTIMx)1462 __STATIC_INLINE void LL_LPTIM_DisableIT_DOWN(LPTIM_TypeDef *LPTIMx)
1463 {
1464 CLEAR_BIT(LPTIMx->IER, LPTIM_IER_DOWNIE);
1465 }
1466
1467 /**
1468 * @brief Indicates whether the direction change to down interrupt (DOWNIE) is enabled.
1469 * @rmtoll IER DOWNIE LL_LPTIM_IsEnabledIT_DOWN
1470 * @param LPTIMx Low-Power Timer instance
1471 * @retval State of bit(1 or 0).
1472 */
LL_LPTIM_IsEnabledIT_DOWN(const LPTIM_TypeDef * LPTIMx)1473 __STATIC_INLINE uint32_t LL_LPTIM_IsEnabledIT_DOWN(const LPTIM_TypeDef *LPTIMx)
1474 {
1475 return ((READ_BIT(LPTIMx->IER, LPTIM_IER_DOWNIE) == LPTIM_IER_DOWNIE) ? 1UL : 0UL);
1476 }
1477
1478 /**
1479 * @}
1480 */
1481
1482 /**
1483 * @}
1484 */
1485
1486 /**
1487 * @}
1488 */
1489
1490 #endif /* LPTIM1 || LPTIM2 */
1491
1492 /**
1493 * @}
1494 */
1495
1496 #ifdef __cplusplus
1497 }
1498 #endif
1499
1500 #endif /* STM32WBxx_LL_LPTIM_H */
1501
