1 /** 2 ****************************************************************************** 3 * @file stm32mp1xx_hal_uart_ex.h 4 * @author MCD Application Team 5 * @brief Header file of UART HAL Extended module. 6 ****************************************************************************** 7 * @attention 8 * 9 * Copyright (c) 2019 STMicroelectronics. 10 * All rights reserved. 11 * 12 * This software is licensed under terms that can be found in the LICENSE file 13 * in the root directory of this software component. 14 * If no LICENSE file comes with this software, it is provided AS-IS. 15 * 16 ****************************************************************************** 17 */ 18 19 /* Define to prevent recursive inclusion -------------------------------------*/ 20 #ifndef STM32MP1xx_HAL_UART_EX_H 21 #define STM32MP1xx_HAL_UART_EX_H 22 23 #ifdef __cplusplus 24 extern "C" { 25 #endif 26 27 /* Includes ------------------------------------------------------------------*/ 28 #include "stm32mp1xx_hal_def.h" 29 30 /** @addtogroup STM32MP1xx_HAL_Driver 31 * @{ 32 */ 33 34 /** @addtogroup UARTEx 35 * @{ 36 */ 37 38 /* Exported types ------------------------------------------------------------*/ 39 /** @defgroup UARTEx_Exported_Types UARTEx Exported Types 40 * @{ 41 */ 42 43 /** 44 * @brief UART wake up from stop mode parameters 45 */ 46 typedef struct 47 { 48 uint32_t WakeUpEvent; /*!< Specifies which event will activate the Wakeup from Stop mode flag (WUF). 49 This parameter can be a value of @ref UART_WakeUp_from_Stop_Selection. 50 If set to UART_WAKEUP_ON_ADDRESS, the two other fields below must 51 be filled up. */ 52 53 uint16_t AddressLength; /*!< Specifies whether the address is 4 or 7-bit long. 54 This parameter can be a value of @ref UARTEx_WakeUp_Address_Length. */ 55 56 uint8_t Address; /*!< UART/USART node address (7-bit long max). */ 57 } UART_WakeUpTypeDef; 58 59 /** 60 * @} 61 */ 62 63 /* Exported constants --------------------------------------------------------*/ 64 /** @defgroup UARTEx_Exported_Constants UARTEx Exported Constants 65 * @{ 66 */ 67 68 /** @defgroup UARTEx_Word_Length UARTEx Word Length 69 * @{ 70 */ 71 #define UART_WORDLENGTH_7B USART_CR1_M1 /*!< 7-bit long UART frame */ 72 #define UART_WORDLENGTH_8B 0x00000000U /*!< 8-bit long UART frame */ 73 #define UART_WORDLENGTH_9B USART_CR1_M0 /*!< 9-bit long UART frame */ 74 /** 75 * @} 76 */ 77 78 /** @defgroup UARTEx_WakeUp_Address_Length UARTEx WakeUp Address Length 79 * @{ 80 */ 81 #define UART_ADDRESS_DETECT_4B 0x00000000U /*!< 4-bit long wake-up address */ 82 #define UART_ADDRESS_DETECT_7B USART_CR2_ADDM7 /*!< 7-bit long wake-up address */ 83 /** 84 * @} 85 */ 86 87 /** @defgroup UARTEx_FIFO_mode UARTEx FIFO mode 88 * @brief UART FIFO mode 89 * @{ 90 */ 91 #define UART_FIFOMODE_DISABLE 0x00000000U /*!< FIFO mode disable */ 92 #define UART_FIFOMODE_ENABLE USART_CR1_FIFOEN /*!< FIFO mode enable */ 93 /** 94 * @} 95 */ 96 97 /** @defgroup UARTEx_TXFIFO_threshold_level UARTEx TXFIFO threshold level 98 * @brief UART TXFIFO threshold level 99 * @{ 100 */ 101 #define UART_TXFIFO_THRESHOLD_1_8 0x00000000U /*!< TXFIFO reaches 1/8 of its depth */ 102 #define UART_TXFIFO_THRESHOLD_1_4 USART_CR3_TXFTCFG_0 /*!< TXFIFO reaches 1/4 of its depth */ 103 #define UART_TXFIFO_THRESHOLD_1_2 USART_CR3_TXFTCFG_1 /*!< TXFIFO reaches 1/2 of its depth */ 104 #define UART_TXFIFO_THRESHOLD_3_4 (USART_CR3_TXFTCFG_0|USART_CR3_TXFTCFG_1) /*!< TXFIFO reaches 3/4 of its depth */ 105 #define UART_TXFIFO_THRESHOLD_7_8 USART_CR3_TXFTCFG_2 /*!< TXFIFO reaches 7/8 of its depth */ 106 #define UART_TXFIFO_THRESHOLD_8_8 (USART_CR3_TXFTCFG_2|USART_CR3_TXFTCFG_0) /*!< TXFIFO becomes empty */ 107 /** 108 * @} 109 */ 110 111 /** @defgroup UARTEx_RXFIFO_threshold_level UARTEx RXFIFO threshold level 112 * @brief UART RXFIFO threshold level 113 * @{ 114 */ 115 #define UART_RXFIFO_THRESHOLD_1_8 0x00000000U /*!< RXFIFO FIFO reaches 1/8 of its depth */ 116 #define UART_RXFIFO_THRESHOLD_1_4 USART_CR3_RXFTCFG_0 /*!< RXFIFO FIFO reaches 1/4 of its depth */ 117 #define UART_RXFIFO_THRESHOLD_1_2 USART_CR3_RXFTCFG_1 /*!< RXFIFO FIFO reaches 1/2 of its depth */ 118 #define UART_RXFIFO_THRESHOLD_3_4 (USART_CR3_RXFTCFG_0|USART_CR3_RXFTCFG_1) /*!< RXFIFO FIFO reaches 3/4 of its depth */ 119 #define UART_RXFIFO_THRESHOLD_7_8 USART_CR3_RXFTCFG_2 /*!< RXFIFO FIFO reaches 7/8 of its depth */ 120 #define UART_RXFIFO_THRESHOLD_8_8 (USART_CR3_RXFTCFG_2|USART_CR3_RXFTCFG_0) /*!< RXFIFO FIFO becomes full */ 121 /** 122 * @} 123 */ 124 125 /** 126 * @} 127 */ 128 129 /* Exported macros -----------------------------------------------------------*/ 130 /* Exported functions --------------------------------------------------------*/ 131 /** @addtogroup UARTEx_Exported_Functions 132 * @{ 133 */ 134 135 /** @addtogroup UARTEx_Exported_Functions_Group1 136 * @{ 137 */ 138 139 /* Initialization and de-initialization functions ****************************/ 140 HAL_StatusTypeDef HAL_RS485Ex_Init(UART_HandleTypeDef *huart, uint32_t Polarity, uint32_t AssertionTime, 141 uint32_t DeassertionTime); 142 143 /** 144 * @} 145 */ 146 147 /** @addtogroup UARTEx_Exported_Functions_Group2 148 * @{ 149 */ 150 151 void HAL_UARTEx_WakeupCallback(UART_HandleTypeDef *huart); 152 153 void HAL_UARTEx_RxFifoFullCallback(UART_HandleTypeDef *huart); 154 void HAL_UARTEx_TxFifoEmptyCallback(UART_HandleTypeDef *huart); 155 156 /** 157 * @} 158 */ 159 160 /** @addtogroup UARTEx_Exported_Functions_Group3 161 * @{ 162 */ 163 164 /* Peripheral Control functions **********************************************/ 165 HAL_StatusTypeDef HAL_UARTEx_StopModeWakeUpSourceConfig(UART_HandleTypeDef *huart, UART_WakeUpTypeDef WakeUpSelection); 166 HAL_StatusTypeDef HAL_UARTEx_EnableStopMode(UART_HandleTypeDef *huart); 167 HAL_StatusTypeDef HAL_UARTEx_DisableStopMode(UART_HandleTypeDef *huart); 168 169 HAL_StatusTypeDef HAL_MultiProcessorEx_AddressLength_Set(UART_HandleTypeDef *huart, uint32_t AddressLength); 170 171 HAL_StatusTypeDef HAL_UARTEx_EnableFifoMode(UART_HandleTypeDef *huart); 172 HAL_StatusTypeDef HAL_UARTEx_DisableFifoMode(UART_HandleTypeDef *huart); 173 HAL_StatusTypeDef HAL_UARTEx_SetTxFifoThreshold(UART_HandleTypeDef *huart, uint32_t Threshold); 174 HAL_StatusTypeDef HAL_UARTEx_SetRxFifoThreshold(UART_HandleTypeDef *huart, uint32_t Threshold); 175 176 /** 177 * @} 178 */ 179 180 /** 181 * @} 182 */ 183 184 /* Private macros ------------------------------------------------------------*/ 185 /** @defgroup UARTEx_Private_Macros UARTEx Private Macros 186 * @{ 187 */ 188 189 /** @brief Report the UART clock source. 190 * @param __HANDLE__ specifies the UART Handle. 191 * @param __CLOCKSOURCE__ output variable. 192 * @retval UART clocking source, written in __CLOCKSOURCE__. 193 */ 194 #define UART_GETCLOCKSOURCE(__HANDLE__,__CLOCKSOURCE__) \ 195 do { \ 196 if((__HANDLE__)->Instance == USART1) \ 197 { \ 198 switch(__HAL_RCC_GET_USART1_SOURCE()) \ 199 { \ 200 case RCC_USART1CLKSOURCE_PCLK5: \ 201 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK5; \ 202 break; \ 203 case RCC_USART1CLKSOURCE_PLL3: \ 204 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PLL3Q; \ 205 break; \ 206 case RCC_USART1CLKSOURCE_HSI: \ 207 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \ 208 break; \ 209 case RCC_USART1CLKSOURCE_CSI: \ 210 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_CSI; \ 211 break; \ 212 case RCC_USART1CLKSOURCE_PLL4: \ 213 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PLL4Q; \ 214 break; \ 215 case RCC_USART1CLKSOURCE_HSE: \ 216 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSE; \ 217 break; \ 218 default: \ 219 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ 220 break; \ 221 } \ 222 } \ 223 else if((__HANDLE__)->Instance == USART2) \ 224 { \ 225 switch(__HAL_RCC_GET_UART24_SOURCE()) \ 226 { \ 227 case RCC_UART24CLKSOURCE_PCLK1: \ 228 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \ 229 break; \ 230 case RCC_UART24CLKSOURCE_PLL4: \ 231 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PLL4Q; \ 232 break; \ 233 case RCC_UART24CLKSOURCE_HSI: \ 234 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \ 235 break; \ 236 case RCC_UART24CLKSOURCE_CSI: \ 237 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_CSI; \ 238 break; \ 239 case RCC_UART24CLKSOURCE_HSE: \ 240 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSE; \ 241 break; \ 242 default: \ 243 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ 244 break; \ 245 } \ 246 } \ 247 else if((__HANDLE__)->Instance == USART3) \ 248 { \ 249 switch(__HAL_RCC_GET_UART35_SOURCE()) \ 250 { \ 251 case RCC_UART35CLKSOURCE_PCLK1: \ 252 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \ 253 break; \ 254 case RCC_UART35CLKSOURCE_PLL4: \ 255 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PLL4Q; \ 256 break; \ 257 case RCC_UART35CLKSOURCE_HSI: \ 258 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \ 259 break; \ 260 case RCC_UART35CLKSOURCE_CSI: \ 261 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_CSI; \ 262 break; \ 263 case RCC_UART35CLKSOURCE_HSE: \ 264 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSE; \ 265 break; \ 266 default: \ 267 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ 268 break; \ 269 } \ 270 } \ 271 else if((__HANDLE__)->Instance == UART4) \ 272 { \ 273 switch(__HAL_RCC_GET_UART24_SOURCE()) \ 274 { \ 275 case RCC_UART24CLKSOURCE_PCLK1: \ 276 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \ 277 break; \ 278 case RCC_UART24CLKSOURCE_PLL4: \ 279 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PLL4Q; \ 280 break; \ 281 case RCC_UART24CLKSOURCE_HSI: \ 282 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \ 283 break; \ 284 case RCC_UART24CLKSOURCE_CSI: \ 285 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_CSI; \ 286 break; \ 287 case RCC_UART24CLKSOURCE_HSE: \ 288 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSE; \ 289 break; \ 290 default: \ 291 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ 292 break; \ 293 } \ 294 } \ 295 else if ((__HANDLE__)->Instance == UART5) \ 296 { \ 297 switch(__HAL_RCC_GET_UART35_SOURCE()) \ 298 { \ 299 case RCC_UART35CLKSOURCE_PCLK1: \ 300 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \ 301 break; \ 302 case RCC_UART35CLKSOURCE_PLL4: \ 303 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PLL4Q; \ 304 break; \ 305 case RCC_UART35CLKSOURCE_HSI: \ 306 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \ 307 break; \ 308 case RCC_UART35CLKSOURCE_CSI: \ 309 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_CSI; \ 310 break; \ 311 case RCC_UART35CLKSOURCE_HSE: \ 312 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSE; \ 313 break; \ 314 default: \ 315 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ 316 break; \ 317 } \ 318 } \ 319 else if((__HANDLE__)->Instance == USART6) \ 320 { \ 321 switch(__HAL_RCC_GET_USART6_SOURCE()) \ 322 { \ 323 case RCC_USART6CLKSOURCE_PCLK2: \ 324 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK2; \ 325 break; \ 326 case RCC_USART6CLKSOURCE_PLL4: \ 327 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PLL4Q; \ 328 break; \ 329 case RCC_USART6CLKSOURCE_HSI: \ 330 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \ 331 break; \ 332 case RCC_USART6CLKSOURCE_CSI: \ 333 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_CSI; \ 334 break; \ 335 case RCC_USART6CLKSOURCE_HSE: \ 336 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSE; \ 337 break; \ 338 default: \ 339 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ 340 break; \ 341 } \ 342 } \ 343 else if((__HANDLE__)->Instance == UART7) \ 344 { \ 345 switch(__HAL_RCC_GET_UART78_SOURCE()) \ 346 { \ 347 case RCC_UART78CLKSOURCE_PCLK1: \ 348 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \ 349 break; \ 350 case RCC_UART78CLKSOURCE_PLL4: \ 351 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PLL4Q; \ 352 break; \ 353 case RCC_UART78CLKSOURCE_HSI: \ 354 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \ 355 break; \ 356 case RCC_UART78CLKSOURCE_CSI: \ 357 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_CSI; \ 358 break; \ 359 case RCC_UART78CLKSOURCE_HSE: \ 360 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSE; \ 361 break; \ 362 default: \ 363 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ 364 break; \ 365 } \ 366 } \ 367 else if((__HANDLE__)->Instance == UART8) \ 368 { \ 369 switch(__HAL_RCC_GET_UART78_SOURCE()) \ 370 { \ 371 case RCC_UART78CLKSOURCE_PCLK1: \ 372 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \ 373 break; \ 374 case RCC_UART78CLKSOURCE_PLL4: \ 375 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PLL4Q; \ 376 break; \ 377 case RCC_UART78CLKSOURCE_HSI: \ 378 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \ 379 break; \ 380 case RCC_UART78CLKSOURCE_CSI: \ 381 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_CSI; \ 382 break; \ 383 case RCC_UART78CLKSOURCE_HSE: \ 384 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSE; \ 385 break; \ 386 default: \ 387 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ 388 break; \ 389 } \ 390 } \ 391 else \ 392 { \ 393 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ 394 } \ 395 } while(0U) 396 397 /** @brief Report the UART mask to apply to retrieve the received data 398 * according to the word length and to the parity bits activation. 399 * @note If PCE = 1, the parity bit is not included in the data extracted 400 * by the reception API(). 401 * This masking operation is not carried out in the case of 402 * DMA transfers. 403 * @param __HANDLE__ specifies the UART Handle. 404 * @retval None, the mask to apply to UART RDR register is stored in (__HANDLE__)->Mask field. 405 */ 406 #define UART_MASK_COMPUTATION(__HANDLE__) \ 407 do { \ 408 if ((__HANDLE__)->Init.WordLength == UART_WORDLENGTH_9B) \ 409 { \ 410 if ((__HANDLE__)->Init.Parity == UART_PARITY_NONE) \ 411 { \ 412 (__HANDLE__)->Mask = 0x01FFU ; \ 413 } \ 414 else \ 415 { \ 416 (__HANDLE__)->Mask = 0x00FFU ; \ 417 } \ 418 } \ 419 else if ((__HANDLE__)->Init.WordLength == UART_WORDLENGTH_8B) \ 420 { \ 421 if ((__HANDLE__)->Init.Parity == UART_PARITY_NONE) \ 422 { \ 423 (__HANDLE__)->Mask = 0x00FFU ; \ 424 } \ 425 else \ 426 { \ 427 (__HANDLE__)->Mask = 0x007FU ; \ 428 } \ 429 } \ 430 else if ((__HANDLE__)->Init.WordLength == UART_WORDLENGTH_7B) \ 431 { \ 432 if ((__HANDLE__)->Init.Parity == UART_PARITY_NONE) \ 433 { \ 434 (__HANDLE__)->Mask = 0x007FU ; \ 435 } \ 436 else \ 437 { \ 438 (__HANDLE__)->Mask = 0x003FU ; \ 439 } \ 440 } \ 441 else \ 442 { \ 443 (__HANDLE__)->Mask = 0x0000U; \ 444 } \ 445 } while(0U) 446 447 /** 448 * @brief Ensure that UART frame length is valid. 449 * @param __LENGTH__ UART frame length. 450 * @retval SET (__LENGTH__ is valid) or RESET (__LENGTH__ is invalid) 451 */ 452 #define IS_UART_WORD_LENGTH(__LENGTH__) (((__LENGTH__) == UART_WORDLENGTH_7B) || \ 453 ((__LENGTH__) == UART_WORDLENGTH_8B) || \ 454 ((__LENGTH__) == UART_WORDLENGTH_9B)) 455 456 /** 457 * @brief Ensure that UART wake-up address length is valid. 458 * @param __ADDRESS__ UART wake-up address length. 459 * @retval SET (__ADDRESS__ is valid) or RESET (__ADDRESS__ is invalid) 460 */ 461 #define IS_UART_ADDRESSLENGTH_DETECT(__ADDRESS__) (((__ADDRESS__) == UART_ADDRESS_DETECT_4B) || \ 462 ((__ADDRESS__) == UART_ADDRESS_DETECT_7B)) 463 464 /** 465 * @brief Ensure that UART TXFIFO threshold level is valid. 466 * @param __THRESHOLD__ UART TXFIFO threshold level. 467 * @retval SET (__THRESHOLD__ is valid) or RESET (__THRESHOLD__ is invalid) 468 */ 469 #define IS_UART_TXFIFO_THRESHOLD(__THRESHOLD__) (((__THRESHOLD__) == UART_TXFIFO_THRESHOLD_1_8) || \ 470 ((__THRESHOLD__) == UART_TXFIFO_THRESHOLD_1_4) || \ 471 ((__THRESHOLD__) == UART_TXFIFO_THRESHOLD_1_2) || \ 472 ((__THRESHOLD__) == UART_TXFIFO_THRESHOLD_3_4) || \ 473 ((__THRESHOLD__) == UART_TXFIFO_THRESHOLD_7_8) || \ 474 ((__THRESHOLD__) == UART_TXFIFO_THRESHOLD_8_8)) 475 476 /** 477 * @brief Ensure that UART RXFIFO threshold level is valid. 478 * @param __THRESHOLD__ UART RXFIFO threshold level. 479 * @retval SET (__THRESHOLD__ is valid) or RESET (__THRESHOLD__ is invalid) 480 */ 481 #define IS_UART_RXFIFO_THRESHOLD(__THRESHOLD__) (((__THRESHOLD__) == UART_RXFIFO_THRESHOLD_1_8) || \ 482 ((__THRESHOLD__) == UART_RXFIFO_THRESHOLD_1_4) || \ 483 ((__THRESHOLD__) == UART_RXFIFO_THRESHOLD_1_2) || \ 484 ((__THRESHOLD__) == UART_RXFIFO_THRESHOLD_3_4) || \ 485 ((__THRESHOLD__) == UART_RXFIFO_THRESHOLD_7_8) || \ 486 ((__THRESHOLD__) == UART_RXFIFO_THRESHOLD_8_8)) 487 488 /** 489 * @} 490 */ 491 492 /* Private functions ---------------------------------------------------------*/ 493 494 /** 495 * @} 496 */ 497 498 /** 499 * @} 500 */ 501 502 #ifdef __cplusplus 503 } 504 #endif 505 506 #endif /* STM32MP1xx_HAL_UART_EX_H */ 507
