1 /**
2 ******************************************************************************
3 * @file stm32l4xx_hal_flash_ramfunc.c
4 * @author MCD Application Team
5 * @brief FLASH RAMFUNC driver.
6 * This file provides a Flash firmware functions which should be
7 * executed from internal SRAM
8 * + FLASH HalfPage Programming
9 * + FLASH Power Down in Run mode
10 *
11 * @verbatim
12 ==============================================================================
13 ##### Flash RAM functions #####
14 ==============================================================================
15
16 *** ARM Compiler ***
17 --------------------
18 [..] RAM functions are defined using the toolchain options.
19 Functions that are executed in RAM should reside in a separate
20 source module. Using the 'Options for File' dialog you can simply change
21 the 'Code / Const' area of a module to a memory space in physical RAM.
22 Available memory areas are declared in the 'Target' tab of the
23 Options for Target' dialog.
24
25 *** ICCARM Compiler ***
26 -----------------------
27 [..] RAM functions are defined using a specific toolchain keyword "__ramfunc".
28
29 *** GNU Compiler ***
30 --------------------
31 [..] RAM functions are defined using a specific toolchain attribute
32 "__attribute__((section(".RamFunc")))".
33
34 @endverbatim
35 ******************************************************************************
36 * @attention
37 *
38 * Copyright (c) 2017 STMicroelectronics.
39 * All rights reserved.
40 *
41 * This software is licensed under terms that can be found in the LICENSE file in
42 * the root directory of this software component.
43 * If no LICENSE file comes with this software, it is provided AS-IS.
44 ******************************************************************************
45 */
46
47 /* Includes ------------------------------------------------------------------*/
48 #include "stm32l4xx_hal.h"
49
50 /** @addtogroup STM32L4xx_HAL_Driver
51 * @{
52 */
53
54 /** @defgroup FLASH_RAMFUNC FLASH_RAMFUNC
55 * @brief FLASH functions executed from RAM
56 * @{
57 */
58
59 #ifdef HAL_FLASH_MODULE_ENABLED
60
61 /* Private typedef -----------------------------------------------------------*/
62 /* Private define ------------------------------------------------------------*/
63 /* Private macro -------------------------------------------------------------*/
64 /* Private variables ---------------------------------------------------------*/
65 /* Private function prototypes -----------------------------------------------*/
66 /* Exported functions -------------------------------------------------------*/
67
68 /** @defgroup FLASH_RAMFUNC_Exported_Functions FLASH in RAM function Exported Functions
69 * @{
70 */
71
72 /** @defgroup FLASH_RAMFUNC_Exported_Functions_Group1 Peripheral features functions
73 * @brief Data transfers functions
74 *
75 @verbatim
76 ===============================================================================
77 ##### ramfunc functions #####
78 ===============================================================================
79 [..]
80 This subsection provides a set of functions that should be executed from RAM.
81
82 @endverbatim
83 * @{
84 */
85
86 /**
87 * @brief Enable the Power down in Run Mode
88 * @note This function should be called and executed from SRAM memory
89 * @retval HAL status
90 */
HAL_FLASHEx_EnableRunPowerDown(void)91 __RAM_FUNC HAL_StatusTypeDef HAL_FLASHEx_EnableRunPowerDown(void)
92 {
93 /* Enable the Power Down in Run mode*/
94 __HAL_FLASH_POWER_DOWN_ENABLE();
95
96 return HAL_OK;
97
98 }
99
100 /**
101 * @brief Disable the Power down in Run Mode
102 * @note This function should be called and executed from SRAM memory
103 * @retval HAL status
104 */
HAL_FLASHEx_DisableRunPowerDown(void)105 __RAM_FUNC HAL_StatusTypeDef HAL_FLASHEx_DisableRunPowerDown(void)
106 {
107 /* Disable the Power Down in Run mode*/
108 __HAL_FLASH_POWER_DOWN_DISABLE();
109
110 return HAL_OK;
111 }
112
113 #if defined (STM32L4P5xx) || defined (STM32L4Q5xx) || defined (STM32L4R5xx) || defined (STM32L4R7xx) || defined (STM32L4R9xx) || defined (STM32L4S5xx) || defined (STM32L4S7xx) || defined (STM32L4S9xx)
114 /**
115 * @brief Program the FLASH DBANK User Option Byte.
116 *
117 * @note To configure the user option bytes, the option lock bit OPTLOCK must
118 * be cleared with the call of the HAL_FLASH_OB_Unlock() function.
119 * @note To modify the DBANK option byte, no PCROP region should be defined.
120 * To deactivate PCROP, user should perform RDP changing
121 *
122 * @param DBankConfig The FLASH DBANK User Option Byte value.
123 * This parameter can be one of the following values:
124 * @arg OB_DBANK_128_BITS: Single-bank with 128-bits data
125 * @arg OB_DBANK_64_BITS: Dual-bank with 64-bits data
126 *
127 * @retval HAL status
128 */
HAL_FLASHEx_OB_DBankConfig(uint32_t DBankConfig)129 __RAM_FUNC HAL_StatusTypeDef HAL_FLASHEx_OB_DBankConfig(uint32_t DBankConfig)
130 {
131 uint32_t count, reg;
132 HAL_StatusTypeDef status = HAL_ERROR;
133
134 /* Process Locked */
135 __HAL_LOCK(&pFlash);
136
137 /* Check if the PCROP is disabled */
138 reg = FLASH->PCROP1SR;
139 if (reg > FLASH->PCROP1ER)
140 {
141 reg = FLASH->PCROP2SR;
142 if (reg > FLASH->PCROP2ER)
143 {
144 /* Disable Flash prefetch */
145 __HAL_FLASH_PREFETCH_BUFFER_DISABLE();
146
147 if (READ_BIT(FLASH->ACR, FLASH_ACR_ICEN) != 0U)
148 {
149 /* Disable Flash instruction cache */
150 __HAL_FLASH_INSTRUCTION_CACHE_DISABLE();
151
152 /* Flush Flash instruction cache */
153 __HAL_FLASH_INSTRUCTION_CACHE_RESET();
154 }
155
156 if (READ_BIT(FLASH->ACR, FLASH_ACR_DCEN) != 0U)
157 {
158 /* Disable Flash data cache */
159 __HAL_FLASH_DATA_CACHE_DISABLE();
160
161 /* Flush Flash data cache */
162 __HAL_FLASH_DATA_CACHE_RESET();
163 }
164
165 /* Disable WRP zone 1 of 1st bank if needed */
166 reg = FLASH->WRP1AR;
167 if (((reg & FLASH_WRP1AR_WRP1A_STRT) >> FLASH_WRP1AR_WRP1A_STRT_Pos) <=
168 ((reg & FLASH_WRP1AR_WRP1A_END) >> FLASH_WRP1AR_WRP1A_END_Pos))
169 {
170 MODIFY_REG(FLASH->WRP1AR, (FLASH_WRP1AR_WRP1A_STRT | FLASH_WRP1AR_WRP1A_END), FLASH_WRP1AR_WRP1A_STRT);
171 }
172
173 /* Disable WRP zone 2 of 1st bank if needed */
174 reg = FLASH->WRP1BR;
175 if (((reg & FLASH_WRP1BR_WRP1B_STRT) >> FLASH_WRP1BR_WRP1B_STRT_Pos) <=
176 ((reg & FLASH_WRP1BR_WRP1B_END) >> FLASH_WRP1BR_WRP1B_END_Pos))
177 {
178 MODIFY_REG(FLASH->WRP1BR, (FLASH_WRP1BR_WRP1B_STRT | FLASH_WRP1BR_WRP1B_END), FLASH_WRP1BR_WRP1B_STRT);
179 }
180
181 /* Disable WRP zone 1 of 2nd bank if needed */
182 reg = FLASH->WRP2AR;
183 if (((reg & FLASH_WRP2AR_WRP2A_STRT) >> FLASH_WRP2AR_WRP2A_STRT_Pos) <=
184 ((reg & FLASH_WRP2AR_WRP2A_END) >> FLASH_WRP2AR_WRP2A_END_Pos))
185 {
186 MODIFY_REG(FLASH->WRP2AR, (FLASH_WRP2AR_WRP2A_STRT | FLASH_WRP2AR_WRP2A_END), FLASH_WRP2AR_WRP2A_STRT);
187 }
188
189 /* Disable WRP zone 2 of 2nd bank if needed */
190 reg = FLASH->WRP2BR;
191 if (((reg & FLASH_WRP2BR_WRP2B_STRT) >> FLASH_WRP2BR_WRP2B_STRT_Pos) <=
192 ((reg & FLASH_WRP2BR_WRP2B_END) >> FLASH_WRP2BR_WRP2B_END_Pos))
193 {
194 MODIFY_REG(FLASH->WRP2BR, (FLASH_WRP2BR_WRP2B_STRT | FLASH_WRP2BR_WRP2B_END), FLASH_WRP2BR_WRP2B_STRT);
195 }
196
197 /* Modify the DBANK user option byte */
198 MODIFY_REG(FLASH->OPTR, FLASH_OPTR_DBANK, DBankConfig);
199
200 /* Set OPTSTRT Bit */
201 SET_BIT(FLASH->CR, FLASH_CR_OPTSTRT);
202
203 /* Wait for last operation to be completed */
204 /* 8 is the number of required instruction cycles for the below loop statement (timeout expressed in ms) */
205 count = FLASH_TIMEOUT_VALUE * (SystemCoreClock / 8U / 1000U);
206 do
207 {
208 if (count == 0U)
209 {
210 break;
211 }
212 count--;
213 } while (__HAL_FLASH_GET_FLAG(FLASH_FLAG_BSY) != RESET);
214
215 /* If the option byte program operation is completed, disable the OPTSTRT Bit */
216 CLEAR_BIT(FLASH->CR, FLASH_CR_OPTSTRT);
217
218 /* Set the bit to force the option byte reloading */
219 SET_BIT(FLASH->CR, FLASH_CR_OBL_LAUNCH);
220 }
221 }
222
223 /* Process Unlocked */
224 __HAL_UNLOCK(&pFlash);
225
226 return status;
227 }
228 #endif
229
230 /**
231 * @}
232 */
233
234 /**
235 * @}
236 */
237 #endif /* HAL_FLASH_MODULE_ENABLED */
238
239
240
241 /**
242 * @}
243 */
244
245 /**
246 * @}
247 */
248
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252