1 /**
2 ******************************************************************************
3 * @file stm32l4xx_ll_rng.h
4 * @author MCD Application Team
5 * @brief Header file of RNG LL module.
6 ******************************************************************************
7 * @attention
8 *
9 * Copyright (c) 2017 STMicroelectronics.
10 * All rights reserved.
11 *
12 * This software is licensed under terms that can be found in the LICENSE file
13 * in the root directory of this software component.
14 * If no LICENSE file comes with this software, it is provided AS-IS.
15 *
16 ******************************************************************************
17 */
18
19 /* Define to prevent recursive inclusion -------------------------------------*/
20 #ifndef STM32L4xx_LL_RNG_H
21 #define STM32L4xx_LL_RNG_H
22
23 #ifdef __cplusplus
24 extern "C" {
25 #endif
26
27 /* Includes ------------------------------------------------------------------*/
28 #include "stm32l4xx.h"
29
30 /** @addtogroup STM32L4xx_LL_Driver
31 * @{
32 */
33
34 #if defined (RNG)
35
36 /** @defgroup RNG_LL RNG
37 * @{
38 */
39
40 /* Private types -------------------------------------------------------------*/
41 /* Private variables ---------------------------------------------------------*/
42 /* Private constants ---------------------------------------------------------*/
43 /* Private macros ------------------------------------------------------------*/
44
45 /* Exported types ------------------------------------------------------------*/
46 #if defined(RNG_CR_CED)
47 #if defined(USE_FULL_LL_DRIVER)
48 /** @defgroup RNG_LL_ES_Init_Struct RNG Exported Init structures
49 * @{
50 */
51
52
53 /**
54 * @brief LL RNG Init Structure Definition
55 */
56 typedef struct
57 {
58 uint32_t ClockErrorDetection; /*!< Clock error detection.
59 This parameter can be one value of @ref RNG_LL_CED.
60
61 This parameter can be modified using unitary functions @ref LL_RNG_EnableClkErrorDetect(). */
62 } LL_RNG_InitTypeDef;
63
64 /**
65 * @}
66 */
67 #endif /* USE_FULL_LL_DRIVER */
68 #endif
69 /* Exported constants --------------------------------------------------------*/
70 /** @defgroup RNG_LL_Exported_Constants RNG Exported Constants
71 * @{
72 */
73
74 #if defined(RNG_CR_CED)
75 /** @defgroup RNG_LL_CED Clock Error Detection
76 * @{
77 */
78 #define LL_RNG_CED_ENABLE 0x00000000U /*!< Clock error detection enabled */
79 #define LL_RNG_CED_DISABLE RNG_CR_CED /*!< Clock error detection disabled */
80 /**
81 * @}
82 */
83 #endif
84
85 #if defined(RNG_CR_CONDRST)
86 /** @defgroup RNG_LL_Clock_Divider_Factor Value used to configure an internal
87 * programmable divider acting on the incoming RNG clock
88 * @{
89 */
90 #define LL_RNG_CLKDIV_BY_1 (0x00000000UL) /*!< No clock division */
91 #define LL_RNG_CLKDIV_BY_2 (RNG_CR_CLKDIV_0)
92 /*!< 2 RNG clock cycles per internal RNG clock */
93 #define LL_RNG_CLKDIV_BY_4 (RNG_CR_CLKDIV_1)
94 /*!< 4 RNG clock cycles per internal RNG clock */
95 #define LL_RNG_CLKDIV_BY_8 (RNG_CR_CLKDIV_1 | RNG_CR_CLKDIV_0)
96 /*!< 8 RNG clock cycles per internal RNG clock */
97 #define LL_RNG_CLKDIV_BY_16 (RNG_CR_CLKDIV_2)
98 /*!< 16 RNG clock cycles per internal RNG clock */
99 #define LL_RNG_CLKDIV_BY_32 (RNG_CR_CLKDIV_2 | RNG_CR_CLKDIV_0)
100 /*!< 32 RNG clock cycles per internal RNG clock */
101 #define LL_RNG_CLKDIV_BY_64 (RNG_CR_CLKDIV_2 | RNG_CR_CLKDIV_1)
102 /*!< 64 RNG clock cycles per internal RNG clock */
103 #define LL_RNG_CLKDIV_BY_128 (RNG_CR_CLKDIV_2 | RNG_CR_CLKDIV_1 | RNG_CR_CLKDIV_0)
104 /*!< 128 RNG clock cycles per internal RNG clock */
105 #define LL_RNG_CLKDIV_BY_256 (RNG_CR_CLKDIV_3)
106 /*!< 256 RNG clock cycles per internal RNG clock */
107 #define LL_RNG_CLKDIV_BY_512 (RNG_CR_CLKDIV_3 | RNG_CR_CLKDIV_0)
108 /*!< 512 RNG clock cycles per internal RNG clock */
109 #define LL_RNG_CLKDIV_BY_1024 (RNG_CR_CLKDIV_3 | RNG_CR_CLKDIV_1)
110 /*!< 1024 RNG clock cycles per internal RNG clock */
111 #define LL_RNG_CLKDIV_BY_2048 (RNG_CR_CLKDIV_3 | RNG_CR_CLKDIV_1 | RNG_CR_CLKDIV_0)
112 /*!< 2048 RNG clock cycles per internal RNG clock */
113 #define LL_RNG_CLKDIV_BY_4096 (RNG_CR_CLKDIV_3 | RNG_CR_CLKDIV_2)
114 /*!< 4096 RNG clock cycles per internal RNG clock */
115 #define LL_RNG_CLKDIV_BY_8192 (RNG_CR_CLKDIV_3 | RNG_CR_CLKDIV_2 | RNG_CR_CLKDIV_0)
116 /*!< 8192 RNG clock cycles per internal RNG clock */
117 #define LL_RNG_CLKDIV_BY_16384 (RNG_CR_CLKDIV_3 | RNG_CR_CLKDIV_2 | RNG_CR_CLKDIV_1)
118 /*!< 16384 RNG clock cycles per internal RNG clock */
119 #define LL_RNG_CLKDIV_BY_32768 (RNG_CR_CLKDIV_3 | RNG_CR_CLKDIV_2 | RNG_CR_CLKDIV_1 | RNG_CR_CLKDIV_0)
120 /*!< 32768 RNG clock cycles per internal RNG clock */
121 /**
122 * @}
123 */
124
125 /** @defgroup RNG_LL_NIST_Compliance NIST Compliance configuration
126 * @{
127 */
128 #define LL_RNG_NIST_COMPLIANT (0x00000000UL) /*!< NIST compliant configuration*/
129 #define LL_RNG_NOTNIST_COMPLIANT (RNG_CR_NISTC) /*!< Non NIST compliant configuration */
130
131 /**
132 * @}
133 */
134 #endif/*RNG_CR_CONDRST*/
135 /** @defgroup RNG_LL_EC_GET_FLAG Get Flags Defines
136 * @brief Flags defines which can be used with LL_RNG_ReadReg function
137 * @{
138 */
139 #define LL_RNG_SR_DRDY RNG_SR_DRDY /*!< Register contains valid random data */
140 #define LL_RNG_SR_CECS RNG_SR_CECS /*!< Clock error current status */
141 #define LL_RNG_SR_SECS RNG_SR_SECS /*!< Seed error current status */
142 #define LL_RNG_SR_CEIS RNG_SR_CEIS /*!< Clock error interrupt status */
143 #define LL_RNG_SR_SEIS RNG_SR_SEIS /*!< Seed error interrupt status */
144 /**
145 * @}
146 */
147
148 /** @defgroup RNG_LL_EC_IT IT Defines
149 * @brief IT defines which can be used with LL_RNG_ReadReg and LL_RNG_WriteReg macros
150 * @{
151 */
152 #define LL_RNG_CR_IE RNG_CR_IE /*!< RNG Interrupt enable */
153 /**
154 * @}
155 */
156
157 /**
158 * @}
159 */
160
161 /* Exported macro ------------------------------------------------------------*/
162 /** @defgroup RNG_LL_Exported_Macros RNG Exported Macros
163 * @{
164 */
165
166 /** @defgroup RNG_LL_EM_WRITE_READ Common Write and read registers Macros
167 * @{
168 */
169
170 /**
171 * @brief Write a value in RNG register
172 * @param __INSTANCE__ RNG Instance
173 * @param __REG__ Register to be written
174 * @param __VALUE__ Value to be written in the register
175 * @retval None
176 */
177 #define LL_RNG_WriteReg(__INSTANCE__, __REG__, __VALUE__) WRITE_REG(__INSTANCE__->__REG__, (__VALUE__))
178
179 /**
180 * @brief Read a value in RNG register
181 * @param __INSTANCE__ RNG Instance
182 * @param __REG__ Register to be read
183 * @retval Register value
184 */
185 #define LL_RNG_ReadReg(__INSTANCE__, __REG__) READ_REG(__INSTANCE__->__REG__)
186 /**
187 * @}
188 */
189
190 /**
191 * @}
192 */
193
194
195 /* Exported functions --------------------------------------------------------*/
196 /** @defgroup RNG_LL_Exported_Functions RNG Exported Functions
197 * @{
198 */
199 /** @defgroup RNG_LL_EF_Configuration RNG Configuration functions
200 * @{
201 */
202
203 /**
204 * @brief Enable Random Number Generation
205 * @rmtoll CR RNGEN LL_RNG_Enable
206 * @param RNGx RNG Instance
207 * @retval None
208 */
LL_RNG_Enable(RNG_TypeDef * RNGx)209 __STATIC_INLINE void LL_RNG_Enable(RNG_TypeDef *RNGx)
210 {
211 SET_BIT(RNGx->CR, RNG_CR_RNGEN);
212 }
213
214 /**
215 * @brief Disable Random Number Generation
216 * @rmtoll CR RNGEN LL_RNG_Disable
217 * @param RNGx RNG Instance
218 * @retval None
219 */
LL_RNG_Disable(RNG_TypeDef * RNGx)220 __STATIC_INLINE void LL_RNG_Disable(RNG_TypeDef *RNGx)
221 {
222 CLEAR_BIT(RNGx->CR, RNG_CR_RNGEN);
223 }
224
225 /**
226 * @brief Check if Random Number Generator is enabled
227 * @rmtoll CR RNGEN LL_RNG_IsEnabled
228 * @param RNGx RNG Instance
229 * @retval State of bit (1 or 0).
230 */
LL_RNG_IsEnabled(RNG_TypeDef * RNGx)231 __STATIC_INLINE uint32_t LL_RNG_IsEnabled(RNG_TypeDef *RNGx)
232 {
233 return ((READ_BIT(RNGx->CR, RNG_CR_RNGEN) == (RNG_CR_RNGEN)) ? 1UL : 0UL);
234 }
235
236 #if defined(RNG_CR_CED)
237 /**
238 * @brief Enable Clock Error Detection
239 * @rmtoll CR CED LL_RNG_EnableClkErrorDetect
240 * @param RNGx RNG Instance
241 * @retval None
242 */
LL_RNG_EnableClkErrorDetect(RNG_TypeDef * RNGx)243 __STATIC_INLINE void LL_RNG_EnableClkErrorDetect(RNG_TypeDef *RNGx)
244 {
245 CLEAR_BIT(RNGx->CR, RNG_CR_CED);
246 }
247
248 /**
249 * @brief Disable RNG Clock Error Detection
250 * @rmtoll CR CED LL_RNG_DisableClkErrorDetect
251 * @param RNGx RNG Instance
252 * @retval None
253 */
LL_RNG_DisableClkErrorDetect(RNG_TypeDef * RNGx)254 __STATIC_INLINE void LL_RNG_DisableClkErrorDetect(RNG_TypeDef *RNGx)
255 {
256 SET_BIT(RNGx->CR, RNG_CR_CED);
257 }
258
259 /**
260 * @brief Check if RNG Clock Error Detection is enabled
261 * @rmtoll CR CED LL_RNG_IsEnabledClkErrorDetect
262 * @param RNGx RNG Instance
263 * @retval State of bit (1 or 0).
264 */
LL_RNG_IsEnabledClkErrorDetect(RNG_TypeDef * RNGx)265 __STATIC_INLINE uint32_t LL_RNG_IsEnabledClkErrorDetect(RNG_TypeDef *RNGx)
266 {
267 return ((READ_BIT(RNGx->CR, RNG_CR_CED) != (RNG_CR_CED)) ? 1UL : 0UL);
268 }
269
270 #if defined(RNG_CR_CONDRST)
271 /**
272 * @brief Set RNG Conditioning Soft Reset bit
273 * @rmtoll CR CONDRST LL_RNG_SetConditioningResetBit
274 * @param RNGx RNG Instance
275 * @retval None
276 */
LL_RNG_SetConditioningResetBit(RNG_TypeDef * RNGx)277 __STATIC_INLINE void LL_RNG_SetConditioningResetBit(RNG_TypeDef *RNGx)
278 {
279 SET_BIT(RNGx->CR, RNG_CR_CONDRST);
280 }
281
282 /**
283 * @brief Reset RNG Conditioning Soft Reset bit
284 * @rmtoll CR CONDRST LL_RNG_ResetConditioningResetBit
285 * @param RNGx RNG Instance
286 * @retval None
287 */
LL_RNG_ResetConditioningResetBit(RNG_TypeDef * RNGx)288 __STATIC_INLINE void LL_RNG_ResetConditioningResetBit(RNG_TypeDef *RNGx)
289 {
290 CLEAR_BIT(RNGx->CR, RNG_CR_CONDRST);
291 }
292
293 /**
294 * @brief Check if RNG Conditioning Soft Reset bit is set
295 * @rmtoll CR CONDRST LL_RNG_IsResetConditioningBitSet
296 * @param RNGx RNG Instance
297 * @retval State of bit (1 or 0).
298 */
LL_RNG_IsResetConditioningBitSet(RNG_TypeDef * RNGx)299 __STATIC_INLINE uint32_t LL_RNG_IsResetConditioningBitSet(RNG_TypeDef *RNGx)
300 {
301 return ((READ_BIT(RNGx->CR, RNG_CR_CONDRST) == (RNG_CR_CONDRST)) ? 1UL : 0UL);
302 }
303
304 /**
305 * @brief Enable RNG Config Lock
306 * @rmtoll CR CONFIGLOCK LL_RNG_ConfigLock
307 * @param RNGx RNG Instance
308 * @retval None
309 */
LL_RNG_ConfigLock(RNG_TypeDef * RNGx)310 __STATIC_INLINE void LL_RNG_ConfigLock(RNG_TypeDef *RNGx)
311 {
312 SET_BIT(RNGx->CR, RNG_CR_CONFIGLOCK);
313 }
314
315 /**
316 * @brief Check if RNG Config Lock is enabled
317 * @rmtoll CR CONFIGLOCK LL_RNG_IsConfigLocked
318 * @param RNGx RNG Instance
319 * @retval State of bit (1 or 0).
320 */
LL_RNG_IsConfigLocked(RNG_TypeDef * RNGx)321 __STATIC_INLINE uint32_t LL_RNG_IsConfigLocked(RNG_TypeDef *RNGx)
322 {
323 return ((READ_BIT(RNGx->CR, RNG_CR_CONFIGLOCK) == (RNG_CR_CONFIGLOCK)) ? 1UL : 0UL);
324 }
325
326 /**
327 * @brief Enable NIST Compliance
328 * @rmtoll CR NISTC LL_RNG_EnableNistCompliance
329 * @param RNGx RNG Instance
330 * @retval None
331 */
LL_RNG_EnableNistCompliance(RNG_TypeDef * RNGx)332 __STATIC_INLINE void LL_RNG_EnableNistCompliance(RNG_TypeDef *RNGx)
333 {
334 CLEAR_BIT(RNGx->CR, RNG_CR_NISTC);
335 }
336
337 /**
338 * @brief Disable NIST Compliance
339 * @rmtoll CR NISTC LL_RNG_DisableNistCompliance
340 * @param RNGx RNG Instance
341 * @retval None
342 */
LL_RNG_DisableNistCompliance(RNG_TypeDef * RNGx)343 __STATIC_INLINE void LL_RNG_DisableNistCompliance(RNG_TypeDef *RNGx)
344 {
345 SET_BIT(RNGx->CR, RNG_CR_NISTC);
346 }
347
348 /**
349 * @brief Check if NIST Compliance is enabled
350 * @rmtoll CR NISTC LL_RNG_IsNistComplianceEnabled
351 * @param RNGx RNG Instance
352 * @retval State of bit (1 or 0).
353 */
LL_RNG_IsNistComplianceEnabled(RNG_TypeDef * RNGx)354 __STATIC_INLINE uint32_t LL_RNG_IsNistComplianceEnabled(RNG_TypeDef *RNGx)
355 {
356 return ((READ_BIT(RNGx->CR, RNG_CR_NISTC) != (RNG_CR_NISTC)) ? 1UL : 0UL);
357 }
358
359 /**
360 * @brief Set RNG Config1 Configuration field value
361 * @rmtoll CR RNG_CONFIG1 LL_RNG_SetConfig1
362 * @param RNGx RNG Instance
363 * @param Config1 Value between 0 and 0x3F
364 * @retval None
365 */
LL_RNG_SetConfig1(RNG_TypeDef * RNGx,uint32_t Config1)366 __STATIC_INLINE void LL_RNG_SetConfig1(RNG_TypeDef *RNGx, uint32_t Config1)
367 {
368 MODIFY_REG(RNGx->CR, RNG_CR_RNG_CONFIG1, Config1 << RNG_CR_RNG_CONFIG1_Pos);
369 }
370
371 /**
372 * @brief Get RNG Config1 Configuration field value
373 * @rmtoll CR RNG_CONFIG1 LL_RNG_GetConfig1
374 * @param RNGx RNG Instance
375 * @retval Returned Value expressed on 6 bits : Value between 0 and 0x3F
376 */
LL_RNG_GetConfig1(RNG_TypeDef * RNGx)377 __STATIC_INLINE uint32_t LL_RNG_GetConfig1(RNG_TypeDef *RNGx)
378 {
379 return (uint32_t)(READ_BIT(RNGx->CR, RNG_CR_RNG_CONFIG1) >> RNG_CR_RNG_CONFIG1_Pos);
380 }
381
382 /**
383 * @brief Set RNG Config2 Configuration field value
384 * @rmtoll CR RNG_CONFIG2 LL_RNG_SetConfig2
385 * @param RNGx RNG Instance
386 * @param Config2 Value between 0 and 0x7
387 * @retval None
388 */
LL_RNG_SetConfig2(RNG_TypeDef * RNGx,uint32_t Config2)389 __STATIC_INLINE void LL_RNG_SetConfig2(RNG_TypeDef *RNGx, uint32_t Config2)
390 {
391 MODIFY_REG(RNGx->CR, RNG_CR_RNG_CONFIG2, Config2 << RNG_CR_RNG_CONFIG2_Pos);
392 }
393
394 /**
395 * @brief Get RNG Config2 Configuration field value
396 * @rmtoll CR RNG_CONFIG2 LL_RNG_GetConfig2
397 * @param RNGx RNG Instance
398 * @retval Returned Value expressed on 3 bits : Value between 0 and 0x7
399 */
LL_RNG_GetConfig2(RNG_TypeDef * RNGx)400 __STATIC_INLINE uint32_t LL_RNG_GetConfig2(RNG_TypeDef *RNGx)
401 {
402 return (uint32_t)(READ_BIT(RNGx->CR, RNG_CR_RNG_CONFIG2) >> RNG_CR_RNG_CONFIG2_Pos);
403 }
404
405 /**
406 * @brief Set RNG Config3 Configuration field value
407 * @rmtoll CR RNG_CONFIG3 LL_RNG_SetConfig3
408 * @param RNGx RNG Instance
409 * @param Config3 Value between 0 and 0xF
410 * @retval None
411 */
LL_RNG_SetConfig3(RNG_TypeDef * RNGx,uint32_t Config3)412 __STATIC_INLINE void LL_RNG_SetConfig3(RNG_TypeDef *RNGx, uint32_t Config3)
413 {
414 MODIFY_REG(RNGx->CR, RNG_CR_RNG_CONFIG3, Config3 << RNG_CR_RNG_CONFIG3_Pos);
415 }
416
417 /**
418 * @brief Get RNG Config3 Configuration field value
419 * @rmtoll CR RNG_CONFIG3 LL_RNG_GetConfig3
420 * @param RNGx RNG Instance
421 * @retval Returned Value expressed on 4 bits : Value between 0 and 0xF
422 */
LL_RNG_GetConfig3(RNG_TypeDef * RNGx)423 __STATIC_INLINE uint32_t LL_RNG_GetConfig3(RNG_TypeDef *RNGx)
424 {
425 return (uint32_t)(READ_BIT(RNGx->CR, RNG_CR_RNG_CONFIG3) >> RNG_CR_RNG_CONFIG3_Pos);
426 }
427
428 /**
429 * @brief Set RNG Clock divider factor
430 * @rmtoll CR CLKDIV LL_RNG_SetClockDivider
431 * @param RNGx RNG Instance
432 * @param Divider can be one of the following values:
433 * @arg @ref LL_RNG_CLKDIV_BY_1
434 * @arg @ref LL_RNG_CLKDIV_BY_2
435 * @arg @ref LL_RNG_CLKDIV_BY_4
436 * @arg @ref LL_RNG_CLKDIV_BY_8
437 * @arg @ref LL_RNG_CLKDIV_BY_16
438 * @arg @ref LL_RNG_CLKDIV_BY_32
439 * @arg @ref LL_RNG_CLKDIV_BY_64
440 * @arg @ref LL_RNG_CLKDIV_BY_128
441 * @arg @ref LL_RNG_CLKDIV_BY_256
442 * @arg @ref LL_RNG_CLKDIV_BY_512
443 * @arg @ref LL_RNG_CLKDIV_BY_1024
444 * @arg @ref LL_RNG_CLKDIV_BY_2048
445 * @arg @ref LL_RNG_CLKDIV_BY_4096
446 * @arg @ref LL_RNG_CLKDIV_BY_8192
447 * @arg @ref LL_RNG_CLKDIV_BY_16384
448 * @arg @ref LL_RNG_CLKDIV_BY_32768
449 * @retval None
450 */
LL_RNG_SetClockDivider(RNG_TypeDef * RNGx,uint32_t Divider)451 __STATIC_INLINE void LL_RNG_SetClockDivider(RNG_TypeDef *RNGx, uint32_t Divider)
452 {
453 MODIFY_REG(RNGx->CR, RNG_CR_CLKDIV, Divider << RNG_CR_CLKDIV_Pos);
454 }
455
456 /**
457 * @brief Get RNG Clock divider factor
458 * @rmtoll CR CLKDIV LL_RNG_GetClockDivider
459 * @param RNGx RNG Instance
460 * @retval Returned value can be one of the following values:
461 * @arg @ref LL_RNG_CLKDIV_BY_1
462 * @arg @ref LL_RNG_CLKDIV_BY_2
463 * @arg @ref LL_RNG_CLKDIV_BY_4
464 * @arg @ref LL_RNG_CLKDIV_BY_8
465 * @arg @ref LL_RNG_CLKDIV_BY_16
466 * @arg @ref LL_RNG_CLKDIV_BY_32
467 * @arg @ref LL_RNG_CLKDIV_BY_64
468 * @arg @ref LL_RNG_CLKDIV_BY_128
469 * @arg @ref LL_RNG_CLKDIV_BY_256
470 * @arg @ref LL_RNG_CLKDIV_BY_512
471 * @arg @ref LL_RNG_CLKDIV_BY_1024
472 * @arg @ref LL_RNG_CLKDIV_BY_2048
473 * @arg @ref LL_RNG_CLKDIV_BY_4096
474 * @arg @ref LL_RNG_CLKDIV_BY_8192
475 * @arg @ref LL_RNG_CLKDIV_BY_16384
476 * @arg @ref LL_RNG_CLKDIV_BY_32768
477 */
LL_RNG_GetClockDivider(RNG_TypeDef * RNGx)478 __STATIC_INLINE uint32_t LL_RNG_GetClockDivider(RNG_TypeDef *RNGx)
479 {
480 return (uint32_t)READ_BIT(RNGx->CR, RNG_CR_CLKDIV);
481 }
482 #endif /*RNG_CR_CONDRST*/
483 #endif
484 /**
485 * @}
486 */
487
488 /** @defgroup RNG_LL_EF_FLAG_Management FLAG Management
489 * @{
490 */
491
492 /**
493 * @brief Indicate if the RNG Data ready Flag is set or not
494 * @rmtoll SR DRDY LL_RNG_IsActiveFlag_DRDY
495 * @param RNGx RNG Instance
496 * @retval State of bit (1 or 0).
497 */
LL_RNG_IsActiveFlag_DRDY(RNG_TypeDef * RNGx)498 __STATIC_INLINE uint32_t LL_RNG_IsActiveFlag_DRDY(RNG_TypeDef *RNGx)
499 {
500 return ((READ_BIT(RNGx->SR, RNG_SR_DRDY) == (RNG_SR_DRDY)) ? 1UL : 0UL);
501 }
502
503 /**
504 * @brief Indicate if the Clock Error Current Status Flag is set or not
505 * @rmtoll SR CECS LL_RNG_IsActiveFlag_CECS
506 * @param RNGx RNG Instance
507 * @retval State of bit (1 or 0).
508 */
LL_RNG_IsActiveFlag_CECS(RNG_TypeDef * RNGx)509 __STATIC_INLINE uint32_t LL_RNG_IsActiveFlag_CECS(RNG_TypeDef *RNGx)
510 {
511 return ((READ_BIT(RNGx->SR, RNG_SR_CECS) == (RNG_SR_CECS)) ? 1UL : 0UL);
512 }
513
514 /**
515 * @brief Indicate if the Seed Error Current Status Flag is set or not
516 * @rmtoll SR SECS LL_RNG_IsActiveFlag_SECS
517 * @param RNGx RNG Instance
518 * @retval State of bit (1 or 0).
519 */
LL_RNG_IsActiveFlag_SECS(RNG_TypeDef * RNGx)520 __STATIC_INLINE uint32_t LL_RNG_IsActiveFlag_SECS(RNG_TypeDef *RNGx)
521 {
522 return ((READ_BIT(RNGx->SR, RNG_SR_SECS) == (RNG_SR_SECS)) ? 1UL : 0UL);
523 }
524
525 /**
526 * @brief Indicate if the Clock Error Interrupt Status Flag is set or not
527 * @rmtoll SR CEIS LL_RNG_IsActiveFlag_CEIS
528 * @param RNGx RNG Instance
529 * @retval State of bit (1 or 0).
530 */
LL_RNG_IsActiveFlag_CEIS(RNG_TypeDef * RNGx)531 __STATIC_INLINE uint32_t LL_RNG_IsActiveFlag_CEIS(RNG_TypeDef *RNGx)
532 {
533 return ((READ_BIT(RNGx->SR, RNG_SR_CEIS) == (RNG_SR_CEIS)) ? 1UL : 0UL);
534 }
535
536 /**
537 * @brief Indicate if the Seed Error Interrupt Status Flag is set or not
538 * @rmtoll SR SEIS LL_RNG_IsActiveFlag_SEIS
539 * @param RNGx RNG Instance
540 * @retval State of bit (1 or 0).
541 */
LL_RNG_IsActiveFlag_SEIS(RNG_TypeDef * RNGx)542 __STATIC_INLINE uint32_t LL_RNG_IsActiveFlag_SEIS(RNG_TypeDef *RNGx)
543 {
544 return ((READ_BIT(RNGx->SR, RNG_SR_SEIS) == (RNG_SR_SEIS)) ? 1UL : 0UL);
545 }
546
547 /**
548 * @brief Clear Clock Error interrupt Status (CEIS) Flag
549 * @rmtoll SR CEIS LL_RNG_ClearFlag_CEIS
550 * @param RNGx RNG Instance
551 * @retval None
552 */
LL_RNG_ClearFlag_CEIS(RNG_TypeDef * RNGx)553 __STATIC_INLINE void LL_RNG_ClearFlag_CEIS(RNG_TypeDef *RNGx)
554 {
555 WRITE_REG(RNGx->SR, ~RNG_SR_CEIS);
556 }
557
558 /**
559 * @brief Clear Seed Error interrupt Status (SEIS) Flag
560 * @rmtoll SR SEIS LL_RNG_ClearFlag_SEIS
561 * @param RNGx RNG Instance
562 * @retval None
563 */
LL_RNG_ClearFlag_SEIS(RNG_TypeDef * RNGx)564 __STATIC_INLINE void LL_RNG_ClearFlag_SEIS(RNG_TypeDef *RNGx)
565 {
566 WRITE_REG(RNGx->SR, ~RNG_SR_SEIS);
567 }
568
569 /**
570 * @}
571 */
572
573 /** @defgroup RNG_LL_EF_IT_Management IT Management
574 * @{
575 */
576
577 /**
578 * @brief Enable Random Number Generator Interrupt
579 * (applies for either Seed error, Clock Error or Data ready interrupts)
580 * @rmtoll CR IE LL_RNG_EnableIT
581 * @param RNGx RNG Instance
582 * @retval None
583 */
LL_RNG_EnableIT(RNG_TypeDef * RNGx)584 __STATIC_INLINE void LL_RNG_EnableIT(RNG_TypeDef *RNGx)
585 {
586 SET_BIT(RNGx->CR, RNG_CR_IE);
587 }
588
589 /**
590 * @brief Disable Random Number Generator Interrupt
591 * (applies for either Seed error, Clock Error or Data ready interrupts)
592 * @rmtoll CR IE LL_RNG_DisableIT
593 * @param RNGx RNG Instance
594 * @retval None
595 */
LL_RNG_DisableIT(RNG_TypeDef * RNGx)596 __STATIC_INLINE void LL_RNG_DisableIT(RNG_TypeDef *RNGx)
597 {
598 CLEAR_BIT(RNGx->CR, RNG_CR_IE);
599 }
600
601 /**
602 * @brief Check if Random Number Generator Interrupt is enabled
603 * (applies for either Seed error, Clock Error or Data ready interrupts)
604 * @rmtoll CR IE LL_RNG_IsEnabledIT
605 * @param RNGx RNG Instance
606 * @retval State of bit (1 or 0).
607 */
LL_RNG_IsEnabledIT(RNG_TypeDef * RNGx)608 __STATIC_INLINE uint32_t LL_RNG_IsEnabledIT(RNG_TypeDef *RNGx)
609 {
610 return ((READ_BIT(RNGx->CR, RNG_CR_IE) == (RNG_CR_IE)) ? 1UL : 0UL);
611 }
612
613 /**
614 * @}
615 */
616
617 /** @defgroup RNG_LL_EF_Data_Management Data Management
618 * @{
619 */
620
621 /**
622 * @brief Return32-bit Random Number value
623 * @rmtoll DR RNDATA LL_RNG_ReadRandData32
624 * @param RNGx RNG Instance
625 * @retval Generated 32-bit random value
626 */
LL_RNG_ReadRandData32(RNG_TypeDef * RNGx)627 __STATIC_INLINE uint32_t LL_RNG_ReadRandData32(RNG_TypeDef *RNGx)
628 {
629 return (uint32_t)(READ_REG(RNGx->DR));
630 }
631
632 /**
633 * @}
634 */
635 #if defined(RNG_VER_3_2) || defined (RNG_VER_3_1)
636 /** @defgroup RNG_LL_EF_Health_Test_Control Health Test Control
637 * @{
638 */
639
640 /**
641 * @brief Set RNG Health Test Control
642 * @rmtoll HTCR HTCFG LL_RNG_SetHealthconfiguration
643 * @param RNGx RNG Instance
644 * @param HTCFG can be values of 32 bits
645 * @retval None
646 */
LL_RNG_SetHealthconfiguration(RNG_TypeDef * RNGx,uint32_t HTCFG)647 __STATIC_INLINE void LL_RNG_SetHealthconfiguration(RNG_TypeDef *RNGx, uint32_t HTCFG)
648 {
649 WRITE_REG(RNGx->HTCR, HTCFG);
650 }
651
652 /**
653 * @brief Get RNG Health Test Control
654 * @rmtoll HTCR HTCFG LL_RNG_GetHealthconfiguration
655 * @param RNGx RNG Instance
656 * @retval Return 32-bit RNG Health Test configuration
657 */
LL_RNG_GetHealthconfiguration(RNG_TypeDef * RNGx)658 __STATIC_INLINE uint32_t LL_RNG_GetHealthconfiguration(RNG_TypeDef *RNGx)
659 {
660 return (uint32_t)READ_REG(RNGx->HTCR);
661 }
662
663 /**
664 * @}
665 */
666 #endif /* RNG_VER_3_2 || RNG_VER_3_1 */
667
668 #if defined(USE_FULL_LL_DRIVER)
669 /** @defgroup RNG_LL_EF_Init Initialization and de-initialization functions
670 * @{
671 */
672 #if defined(RNG_CR_CED)
673 ErrorStatus LL_RNG_Init(RNG_TypeDef *RNGx, LL_RNG_InitTypeDef *RNG_InitStruct);
674 void LL_RNG_StructInit(LL_RNG_InitTypeDef *RNG_InitStruct);
675 #endif
676 ErrorStatus LL_RNG_DeInit(RNG_TypeDef *RNGx);
677
678 /**
679 * @}
680 */
681 #endif /* USE_FULL_LL_DRIVER */
682
683 /**
684 * @}
685 */
686
687 /**
688 * @}
689 */
690
691 #endif /* RNG */
692
693 /**
694 * @}
695 */
696
697 #ifdef __cplusplus
698 }
699 #endif
700
701 #endif /* STM32L4xx_LL_RNG_H */
702
