1 /** 2 ****************************************************************************** 3 * @file stm32l4xx_hal_swpmi.h 4 * @author MCD Application Team 5 * @brief Header file of SWPMI HAL module. 6 ****************************************************************************** 7 * @attention 8 * 9 * Copyright (c) 2017 STMicroelectronics. 10 * All rights reserved. 11 * 12 * This software is licensed under terms that can be found in the LICENSE file 13 * in the root directory of this software component. 14 * If no LICENSE file comes with this software, it is provided AS-IS. 15 * 16 ****************************************************************************** 17 */ 18 19 /* Define to prevent recursive inclusion -------------------------------------*/ 20 #ifndef STM32L4xx_HAL_SWPMI_H 21 #define STM32L4xx_HAL_SWPMI_H 22 23 #ifdef __cplusplus 24 extern "C" { 25 #endif 26 27 /* Includes ------------------------------------------------------------------*/ 28 #include "stm32l4xx_hal_def.h" 29 30 /** @addtogroup STM32L4xx_HAL_Driver 31 * @{ 32 */ 33 34 #if defined(SWPMI1) 35 36 /** @addtogroup SWPMI 37 * @{ 38 */ 39 40 /* Exported types ------------------------------------------------------------*/ 41 /** @defgroup SWPMI_Exported_Types SWPMI Exported Types 42 * @{ 43 */ 44 45 /** 46 * @brief SWPMI Init Structure definition 47 */ 48 typedef struct 49 { 50 uint32_t VoltageClass; /*!< Specifies the SWP Voltage Class. 51 This parameter can be a value of @ref SWPMI_Voltage_Class */ 52 53 uint32_t BitRate; /*!< Specifies the SWPMI Bitrate. 54 This parameter must be a number between 0 and 63U. 55 The Bitrate is computed using the following formula: 56 SWPMI_freq = SWPMI_clk / (((BitRate) + 1) * 4) 57 */ 58 59 uint32_t TxBufferingMode; /*!< Specifies the transmission buffering mode. 60 This parameter can be a value of @ref SWPMI_Tx_Buffering_Mode */ 61 62 uint32_t RxBufferingMode; /*!< Specifies the reception buffering mode. 63 This parameter can be a value of @ref SWPMI_Rx_Buffering_Mode */ 64 65 } SWPMI_InitTypeDef; 66 67 68 /** 69 * @brief HAL SWPMI State structures definition 70 */ 71 typedef enum 72 { 73 HAL_SWPMI_STATE_RESET = 0x00, /*!< Peripheral Reset state */ 74 HAL_SWPMI_STATE_READY = 0x01, /*!< Peripheral Initialized and ready for use */ 75 HAL_SWPMI_STATE_BUSY = 0x02, /*!< an internal process is ongoing */ 76 HAL_SWPMI_STATE_BUSY_TX = 0x12, /*!< Data Transmission process is ongoing */ 77 HAL_SWPMI_STATE_BUSY_RX = 0x22, /*!< Data Reception process is ongoing */ 78 HAL_SWPMI_STATE_BUSY_TX_RX = 0x32, /*!< Data Transmission and Reception process is ongoing */ 79 HAL_SWPMI_STATE_TIMEOUT = 0x03, /*!< Timeout state */ 80 HAL_SWPMI_STATE_ERROR = 0x04 /*!< Error */ 81 } HAL_SWPMI_StateTypeDef; 82 83 /** 84 * @brief SWPMI handle Structure definition 85 */ 86 #if (USE_HAL_SWPMI_REGISTER_CALLBACKS == 1) 87 typedef struct __SWPMI_HandleTypeDef 88 #else 89 typedef struct 90 #endif /* USE_HAL_SWPMI_REGISTER_CALLBACKS */ 91 { 92 SWPMI_TypeDef *Instance; /*!< SWPMI registers base address */ 93 94 SWPMI_InitTypeDef Init; /*!< SWPMI communication parameters */ 95 96 uint32_t *pTxBuffPtr; /*!< Pointer to SWPMI Tx transfer Buffer */ 97 98 uint32_t TxXferSize; /*!< SWPMI Tx Transfer size */ 99 100 uint32_t TxXferCount; /*!< SWPMI Tx Transfer Counter */ 101 102 uint32_t *pRxBuffPtr; /*!< Pointer to SWPMI Rx transfer Buffer */ 103 104 uint32_t RxXferSize; /*!< SWPMI Rx Transfer size */ 105 106 uint32_t RxXferCount; /*!< SWPMI Rx Transfer Counter */ 107 108 DMA_HandleTypeDef *hdmatx; /*!< SWPMI Tx DMA Handle parameters */ 109 110 DMA_HandleTypeDef *hdmarx; /*!< SWPMI Rx DMA Handle parameters */ 111 112 HAL_LockTypeDef Lock; /*!< SWPMI object */ 113 114 __IO HAL_SWPMI_StateTypeDef State; /*!< SWPMI communication state */ 115 116 __IO uint32_t ErrorCode; /*!< SWPMI Error code */ 117 118 #if (USE_HAL_SWPMI_REGISTER_CALLBACKS == 1) 119 void (*RxCpltCallback)(struct __SWPMI_HandleTypeDef *hswpmi); /*!< SWPMI receive complete callback */ 120 void (*RxHalfCpltCallback)(struct __SWPMI_HandleTypeDef *hswpmi); /*!< SWPMI receive half complete callback */ 121 void (*TxCpltCallback)(struct __SWPMI_HandleTypeDef *hswpmi); /*!< SWPMI transmit complete callback */ 122 void (*TxHalfCpltCallback)(struct __SWPMI_HandleTypeDef *hswpmi); /*!< SWPMI transmit half complete callback */ 123 void (*ErrorCallback)(struct __SWPMI_HandleTypeDef *hswpmi); /*!< SWPMI error callback */ 124 void (*MspInitCallback)(struct __SWPMI_HandleTypeDef *hswpmi); /*!< SWPMI MSP init callback */ 125 void (*MspDeInitCallback)(struct __SWPMI_HandleTypeDef *hswpmi); /*!< SWPMI MSP de-init callback */ 126 #endif 127 128 } SWPMI_HandleTypeDef; 129 130 #if (USE_HAL_SWPMI_REGISTER_CALLBACKS == 1) 131 /** 132 * @brief SWPMI callback ID enumeration definition 133 */ 134 typedef enum 135 { 136 HAL_SWPMI_RX_COMPLETE_CB_ID = 0x00U, /*!< SWPMI receive complete callback ID */ 137 HAL_SWPMI_RX_HALFCOMPLETE_CB_ID = 0x01U, /*!< SWPMI receive half complete callback ID */ 138 HAL_SWPMI_TX_COMPLETE_CB_ID = 0x02U, /*!< SWPMI transmit complete callback ID */ 139 HAL_SWPMI_TX_HALFCOMPLETE_CB_ID = 0x03U, /*!< SWPMI transmit half complete callback ID */ 140 HAL_SWPMI_ERROR_CB_ID = 0x04U, /*!< SWPMI error callback ID */ 141 HAL_SWPMI_MSPINIT_CB_ID = 0x05U, /*!< SWPMI MSP init callback ID */ 142 HAL_SWPMI_MSPDEINIT_CB_ID = 0x06U /*!< SWPMI MSP de-init callback ID */ 143 } HAL_SWPMI_CallbackIDTypeDef; 144 145 /** 146 * @brief SWPMI callback pointer definition 147 */ 148 typedef void (*pSWPMI_CallbackTypeDef)(SWPMI_HandleTypeDef *hswpmi); 149 #endif 150 151 /** 152 * @} 153 */ 154 155 /* Exported constants --------------------------------------------------------*/ 156 /** @defgroup SWPMI_Exported_Constants SWPMI Exported Constants 157 * @{ 158 */ 159 160 /** 161 * @defgroup SWPMI_Error_Code SWPMI Error Code Bitmap 162 * @{ 163 */ 164 #define HAL_SWPMI_ERROR_NONE ((uint32_t)0x00000000) /*!< No error */ 165 #define HAL_SWPMI_ERROR_CRC ((uint32_t)0x00000004) /*!< frame error */ 166 #define HAL_SWPMI_ERROR_OVR ((uint32_t)0x00000008) /*!< Overrun error */ 167 #define HAL_SWPMI_ERROR_UDR ((uint32_t)0x0000000C) /*!< Underrun error */ 168 #define HAL_SWPMI_ERROR_DMA ((uint32_t)0x00000010) /*!< DMA transfer error */ 169 #define HAL_SWPMI_ERROR_TIMEOUT ((uint32_t)0x00000020) /*!< Transfer timeout */ 170 #define HAL_SWPMI_ERROR_TXBEF_TIMEOUT ((uint32_t)0x00000040) /*!< End Tx buffer timeout */ 171 #if (USE_HAL_SWPMI_REGISTER_CALLBACKS == 1) 172 #define HAL_SWPMI_ERROR_INVALID_CALLBACK ((uint32_t)0x00000100) /*!< Invalid callback error */ 173 #endif 174 /** 175 * @} 176 */ 177 178 /** @defgroup SWPMI_Voltage_Class SWPMI Voltage Class 179 * @{ 180 */ 181 #define SWPMI_VOLTAGE_CLASS_C ((uint32_t)0x00000000) 182 #define SWPMI_VOLTAGE_CLASS_B SWPMI_OR_CLASS 183 /** 184 * @} 185 */ 186 187 /** @defgroup SWPMI_Tx_Buffering_Mode SWPMI Tx Buffering Mode 188 * @{ 189 */ 190 #define SWPMI_TX_NO_SOFTWAREBUFFER ((uint32_t)0x00000000) 191 #define SWPMI_TX_SINGLE_SOFTWAREBUFFER ((uint32_t)0x00000000) 192 #define SWPMI_TX_MULTI_SOFTWAREBUFFER SWPMI_CR_TXMODE 193 /** 194 * @} 195 */ 196 197 /** @defgroup SWPMI_Rx_Buffering_Mode SWPMI Rx Buffering Mode 198 * @{ 199 */ 200 #define SWPMI_RX_NO_SOFTWAREBUFFER ((uint32_t)0x00000000) 201 #define SWPMI_RX_SINGLE_SOFTWAREBUFFER ((uint32_t)0x00000000) 202 #define SWPMI_RX_MULTI_SOFTWAREBUFFER SWPMI_CR_RXMODE 203 /** 204 * @} 205 */ 206 207 /** @defgroup SWPMI_Flags SWPMI Status Flags 208 * Elements values convention: 0xXXXXXXXX 209 * - 0xXXXXXXXX : Flag mask in the ISR register 210 * @{ 211 */ 212 #define SWPMI_FLAG_RXBFF SWPMI_ISR_RXBFF 213 #define SWPMI_FLAG_TXBEF SWPMI_ISR_TXBEF 214 #define SWPMI_FLAG_RXBERF SWPMI_ISR_RXBERF 215 #define SWPMI_FLAG_RXOVRF SWPMI_ISR_RXOVRF 216 #define SWPMI_FLAG_TXUNRF SWPMI_ISR_TXUNRF 217 #define SWPMI_FLAG_RXNE SWPMI_ISR_RXNE 218 #define SWPMI_FLAG_TXE SWPMI_ISR_TXE 219 #define SWPMI_FLAG_TCF SWPMI_ISR_TCF 220 #define SWPMI_FLAG_SRF SWPMI_ISR_SRF 221 #define SWPMI_FLAG_SUSP SWPMI_ISR_SUSP 222 #define SWPMI_FLAG_DEACTF SWPMI_ISR_DEACTF 223 /** 224 * @} 225 */ 226 227 /** @defgroup SWPMI_Interrupt_definition SWPMI Interrupts Definition 228 * Elements values convention: 0xXXXX 229 * - 0xXXXX : Flag mask in the IER register 230 * @{ 231 */ 232 #define SWPMI_IT_SRIE SWPMI_IER_SRIE 233 #define SWPMI_IT_TCIE SWPMI_IER_TCIE 234 #define SWPMI_IT_TIE SWPMI_IER_TIE 235 #define SWPMI_IT_RIE SWPMI_IER_RIE 236 #define SWPMI_IT_TXUNRIE SWPMI_IER_TXUNRIE 237 #define SWPMI_IT_RXOVRIE SWPMI_IER_RXOVRIE 238 #define SWPMI_IT_RXBERIE SWPMI_IER_RXBERIE 239 #define SWPMI_IT_TXBEIE SWPMI_IER_TXBEIE 240 #define SWPMI_IT_RXBFIE SWPMI_IER_RXBFIE 241 /** 242 * @} 243 */ 244 245 /** 246 * @} 247 */ 248 249 /* Exported macros -----------------------------------------------------------*/ 250 /** @defgroup SWPMI_Exported_Macros SWPMI Exported Macros 251 * @{ 252 */ 253 254 /** @brief Reset SWPMI handle state. 255 * @param __HANDLE__ specifies the SWPMI Handle. 256 * @retval None 257 */ 258 #if (USE_HAL_SWPMI_REGISTER_CALLBACKS == 1) 259 #define __HAL_SWPMI_RESET_HANDLE_STATE(__HANDLE__) do{ \ 260 (__HANDLE__)->State = HAL_SWPMI_STATE_RESET; \ 261 (__HANDLE__)->MspInitCallback = NULL; \ 262 (__HANDLE__)->MspDeInitCallback = NULL; \ 263 } while(0) 264 #else 265 #define __HAL_SWPMI_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_SWPMI_STATE_RESET) 266 #endif 267 268 /** 269 * @brief Enable the SWPMI peripheral. 270 * @param __HANDLE__ SWPMI handle 271 * @retval None 272 */ 273 #define __HAL_SWPMI_ENABLE(__HANDLE__) SET_BIT((__HANDLE__)->Instance->CR, SWPMI_CR_SWPACT) 274 275 /** 276 * @brief Disable the SWPMI peripheral. 277 * @param __HANDLE__ SWPMI handle 278 * @retval None 279 */ 280 #define __HAL_SWPMI_DISABLE(__HANDLE__) CLEAR_BIT((__HANDLE__)->Instance->CR, SWPMI_CR_SWPACT) 281 282 /** @brief Check whether the specified SWPMI flag is set or not. 283 * @param __HANDLE__ specifies the SWPMI Handle. 284 * @param __FLAG__ specifies the flag to check. 285 * This parameter can be one of the following values: 286 * @arg SWPMI_FLAG_RXBFF Receive buffer full flag. 287 * @arg SWPMI_FLAG_TXBEF Transmit buffer empty flag. 288 * @arg SWPMI_FLAG_RXBERF Receive CRC error flag. 289 * @arg SWPMI_FLAG_RXOVRF Receive overrun error flag. 290 * @arg SWPMI_FLAG_TXUNRF Transmit underrun error flag. 291 * @arg SWPMI_FLAG_RXNE Receive data register not empty. 292 * @arg SWPMI_FLAG_TXE Transmit data register empty. 293 * @arg SWPMI_FLAG_TCF Transfer complete flag. 294 * @arg SWPMI_FLAG_SRF Slave resume flag. 295 * @arg SWPMI_FLAG_SUSP SUSPEND flag. 296 * @arg SWPMI_FLAG_DEACTF DEACTIVATED flag. 297 * @retval The new state of __FLAG__ (TRUE or FALSE). 298 */ 299 #define __HAL_SWPMI_GET_FLAG(__HANDLE__, __FLAG__) (READ_BIT((__HANDLE__)->Instance->ISR, (__FLAG__)) == (__FLAG__)) 300 301 /** @brief Clear the specified SWPMI ISR flag. 302 * @param __HANDLE__ specifies the SWPMI Handle. 303 * @param __FLAG__ specifies the flag to clear. 304 * This parameter can be one of the following values: 305 * @arg SWPMI_FLAG_RXBFF Receive buffer full flag. 306 * @arg SWPMI_FLAG_TXBEF Transmit buffer empty flag. 307 * @arg SWPMI_FLAG_RXBERF Receive CRC error flag. 308 * @arg SWPMI_FLAG_RXOVRF Receive overrun error flag. 309 * @arg SWPMI_FLAG_TXUNRF Transmit underrun error flag. 310 * @arg SWPMI_FLAG_TCF Transfer complete flag. 311 * @arg SWPMI_FLAG_SRF Slave resume flag. 312 * @retval None 313 */ 314 #define __HAL_SWPMI_CLEAR_FLAG(__HANDLE__, __FLAG__) WRITE_REG((__HANDLE__)->Instance->ICR, (__FLAG__)) 315 316 /** @brief Enable the specified SWPMI interrupt. 317 * @param __HANDLE__ specifies the SWPMI Handle. 318 * @param __INTERRUPT__ specifies the SWPMI interrupt source to enable. 319 * This parameter can be one of the following values: 320 * @arg SWPMI_IT_SRIE Slave resume interrupt. 321 * @arg SWPMI_IT_TCIE Transmit complete interrupt. 322 * @arg SWPMI_IT_TIE Transmit interrupt. 323 * @arg SWPMI_IT_RIE Receive interrupt. 324 * @arg SWPMI_IT_TXUNRIE Transmit underrun error interrupt. 325 * @arg SWPMI_IT_RXOVRIE Receive overrun error interrupt. 326 * @arg SWPMI_IT_RXBEIE Receive CRC error interrupt. 327 * @arg SWPMI_IT_TXBEIE Transmit buffer empty interrupt. 328 * @arg SWPMI_IT_RXBFIE Receive buffer full interrupt. 329 * @retval None 330 */ 331 #define __HAL_SWPMI_ENABLE_IT(__HANDLE__, __INTERRUPT__) SET_BIT((__HANDLE__)->Instance->IER, (__INTERRUPT__)) 332 333 /** @brief Disable the specified SWPMI interrupt. 334 * @param __HANDLE__ specifies the SWPMI Handle. 335 * @param __INTERRUPT__ specifies the SWPMI interrupt source to disable. 336 * This parameter can be one of the following values: 337 * @arg SWPMI_IT_SRIE Slave resume interrupt. 338 * @arg SWPMI_IT_TCIE Transmit complete interrupt. 339 * @arg SWPMI_IT_TIE Transmit interrupt. 340 * @arg SWPMI_IT_RIE Receive interrupt. 341 * @arg SWPMI_IT_TXUNRIE Transmit underrun error interrupt. 342 * @arg SWPMI_IT_RXOVRIE Receive overrun error interrupt. 343 * @arg SWPMI_IT_RXBEIE Receive CRC error interrupt. 344 * @arg SWPMI_IT_TXBEIE Transmit buffer empty interrupt. 345 * @arg SWPMI_IT_RXBFIE Receive buffer full interrupt. 346 * @retval None 347 */ 348 #define __HAL_SWPMI_DISABLE_IT(__HANDLE__, __INTERRUPT__) CLEAR_BIT((__HANDLE__)->Instance->IER, (__INTERRUPT__)) 349 350 /** @brief Check whether the specified SWPMI interrupt has occurred or not. 351 * @param __HANDLE__ specifies the SWPMI Handle. 352 * @param __IT__ specifies the SWPMI interrupt to check. 353 * This parameter can be one of the following values: 354 * @arg SWPMI_IT_SRIE Slave resume interrupt. 355 * @arg SWPMI_IT_TCIE Transmit complete interrupt. 356 * @arg SWPMI_IT_TIE Transmit interrupt. 357 * @arg SWPMI_IT_RIE Receive interrupt. 358 * @arg SWPMI_IT_TXUNRIE Transmit underrun error interrupt. 359 * @arg SWPMI_IT_RXOVRIE Receive overrun error interrupt. 360 * @arg SWPMI_IT_RXBERIE Receive CRC error interrupt. 361 * @arg SWPMI_IT_TXBEIE Transmit buffer empty interrupt. 362 * @arg SWPMI_IT_RXBFIE Receive buffer full interrupt. 363 * @retval The new state of __IT__ (TRUE or FALSE). 364 */ 365 #define __HAL_SWPMI_GET_IT(__HANDLE__, __IT__) (READ_BIT((__HANDLE__)->Instance->ISR,(__IT__)) == (__IT__)) 366 367 /** @brief Check whether the specified SWPMI interrupt source is enabled or not. 368 * @param __HANDLE__ specifies the SWPMI Handle. 369 * @param __IT__ specifies the SWPMI interrupt source to check. 370 * This parameter can be one of the following values: 371 * @arg SWPMI_IT_SRIE Slave resume interrupt. 372 * @arg SWPMI_IT_TCIE Transmit complete interrupt. 373 * @arg SWPMI_IT_TIE Transmit interrupt. 374 * @arg SWPMI_IT_RIE Receive interrupt. 375 * @arg SWPMI_IT_TXUNRIE Transmit underrun error interrupt. 376 * @arg SWPMI_IT_RXOVRIE Receive overrun error interrupt. 377 * @arg SWPMI_IT_RXBERIE Receive CRC error interrupt. 378 * @arg SWPMI_IT_TXBEIE Transmit buffer empty interrupt. 379 * @arg SWPMI_IT_RXBFIE Receive buffer full interrupt. 380 * @retval The new state of __IT__ (TRUE or FALSE). 381 */ 382 #define __HAL_SWPMI_GET_IT_SOURCE(__HANDLE__, __IT__) ((READ_BIT((__HANDLE__)->Instance->IER, (__IT__)) == (__IT__)) ? SET : RESET) 383 384 /** 385 * @} 386 */ 387 388 /* Exported functions --------------------------------------------------------*/ 389 /** @defgroup SWPMI_Exported_Functions SWPMI Exported Functions 390 * @{ 391 */ 392 /* Initialization/de-initialization functions ********************************/ 393 HAL_StatusTypeDef HAL_SWPMI_Init(SWPMI_HandleTypeDef *hswpmi); 394 HAL_StatusTypeDef HAL_SWPMI_DeInit(SWPMI_HandleTypeDef *hswpmi); 395 void HAL_SWPMI_MspInit(SWPMI_HandleTypeDef *hswpmi); 396 void HAL_SWPMI_MspDeInit(SWPMI_HandleTypeDef *hswpmi); 397 398 #if (USE_HAL_SWPMI_REGISTER_CALLBACKS == 1) 399 /* SWPMI callbacks register/unregister functions ********************************/ 400 HAL_StatusTypeDef HAL_SWPMI_RegisterCallback(SWPMI_HandleTypeDef *hswpmi, 401 HAL_SWPMI_CallbackIDTypeDef CallbackID, 402 pSWPMI_CallbackTypeDef pCallback); 403 HAL_StatusTypeDef HAL_SWPMI_UnRegisterCallback(SWPMI_HandleTypeDef *hswpmi, 404 HAL_SWPMI_CallbackIDTypeDef CallbackID); 405 #endif 406 407 /* IO operation functions *****************************************************/ 408 HAL_StatusTypeDef HAL_SWPMI_Transmit(SWPMI_HandleTypeDef *hswpmi, uint32_t *pData, uint16_t Size, uint32_t Timeout); 409 HAL_StatusTypeDef HAL_SWPMI_Receive(SWPMI_HandleTypeDef *hswpmi, uint32_t *pData, uint16_t Size, uint32_t Timeout); 410 HAL_StatusTypeDef HAL_SWPMI_Transmit_IT(SWPMI_HandleTypeDef *hswpmi, uint32_t *pData, uint16_t Size); 411 HAL_StatusTypeDef HAL_SWPMI_Receive_IT(SWPMI_HandleTypeDef *hswpmi, uint32_t *pData, uint16_t Size); 412 HAL_StatusTypeDef HAL_SWPMI_Transmit_DMA(SWPMI_HandleTypeDef *hswpmi, uint32_t *pData, uint16_t Size); 413 HAL_StatusTypeDef HAL_SWPMI_Receive_DMA(SWPMI_HandleTypeDef *hswpmi, uint32_t *pData, uint16_t Size); 414 HAL_StatusTypeDef HAL_SWPMI_DMAStop(SWPMI_HandleTypeDef *hswpmi); 415 HAL_StatusTypeDef HAL_SWPMI_EnableLoopback(SWPMI_HandleTypeDef *hswpmi); 416 HAL_StatusTypeDef HAL_SWPMI_DisableLoopback(SWPMI_HandleTypeDef *hswpmi); 417 void HAL_SWPMI_IRQHandler(SWPMI_HandleTypeDef *hswpmi); 418 void HAL_SWPMI_TxCpltCallback(SWPMI_HandleTypeDef *hswpmi); 419 void HAL_SWPMI_TxHalfCpltCallback(SWPMI_HandleTypeDef *hswpmi); 420 void HAL_SWPMI_RxCpltCallback(SWPMI_HandleTypeDef *hswpmi); 421 void HAL_SWPMI_RxHalfCpltCallback(SWPMI_HandleTypeDef *hswpmi); 422 void HAL_SWPMI_ErrorCallback(SWPMI_HandleTypeDef *hswpmi); 423 424 /* Peripheral Control and State functions ************************************/ 425 HAL_SWPMI_StateTypeDef HAL_SWPMI_GetState(SWPMI_HandleTypeDef *hswpmi); 426 uint32_t HAL_SWPMI_GetError(SWPMI_HandleTypeDef *hswpmi); 427 428 /** 429 * @} 430 */ 431 432 /* Private types -------------------------------------------------------------*/ 433 /** @defgroup SWPMI_Private_Types SWPMI Private Types 434 * @{ 435 */ 436 437 /** 438 * @} 439 */ 440 441 /* Private variables ---------------------------------------------------------*/ 442 /** @defgroup SWPMI_Private_Variables SWPMI Private Variables 443 * @{ 444 */ 445 446 /** 447 * @} 448 */ 449 450 /* Private constants ---------------------------------------------------------*/ 451 /** @defgroup SWPMI_Private_Constants SWPMI Private Constants 452 * @{ 453 */ 454 455 /** 456 * @} 457 */ 458 459 /* Private macros ------------------------------------------------------------*/ 460 /** @defgroup SWPMI_Private_Macros SWPMI Private Macros 461 * @{ 462 */ 463 464 465 #define IS_SWPMI_VOLTAGE_CLASS(__CLASS__) (((__CLASS__) == SWPMI_VOLTAGE_CLASS_C) || \ 466 ((__CLASS__) == SWPMI_VOLTAGE_CLASS_B)) 467 468 #define IS_SWPMI_BITRATE_VALUE(__VALUE__) (((__VALUE__) <= 63U)) 469 470 471 #define IS_SWPMI_TX_BUFFERING_MODE(__MODE__) (((__MODE__) == SWPMI_TX_NO_SOFTWAREBUFFER) || \ 472 ((__MODE__) == SWPMI_TX_MULTI_SOFTWAREBUFFER)) 473 474 475 #define IS_SWPMI_RX_BUFFERING_MODE(__MODE__) (((__MODE__) == SWPMI_RX_NO_SOFTWAREBUFFER) || \ 476 ((__MODE__) == SWPMI_RX_MULTI_SOFTWAREBUFFER)) 477 478 /** 479 * @} 480 */ 481 482 /** 483 * @} 484 */ 485 486 #endif /* SWPMI1 */ 487 488 /** 489 * @} 490 */ 491 492 #ifdef __cplusplus 493 } 494 #endif 495 496 #endif /* STM32L4xx_HAL_SWPMI_H */ 497
