1 /**
2 ******************************************************************************
3 * @file stm32l0xx_hal_pwr.c
4 * @author MCD Application Team
5 * @brief PWR HAL module driver.
6 *
7 * This file provides firmware functions to manage the following
8 * functionalities of the Power Controller (PWR) peripheral:
9 * + Initialization/de-initialization functions
10 * + Peripheral Control functions
11 *
12 ******************************************************************************
13 * @attention
14 *
15 * Copyright (c) 2016 STMicroelectronics.
16 * All rights reserved.
17 *
18 * This software is licensed under terms that can be found in the LICENSE file
19 * in the root directory of this software component.
20 * If no LICENSE file comes with this software, it is provided AS-IS.
21 *
22 ******************************************************************************
23 */
24
25 /* Includes ------------------------------------------------------------------*/
26 #include "stm32l0xx_hal.h"
27
28 #ifdef HAL_PWR_MODULE_ENABLED
29 /** @addtogroup STM32L0xx_HAL_Driver
30 * @{
31 */
32
33 /** @addtogroup PWR
34 * @{
35 */
36
37 /** @addtogroup PWR_Private
38 * @{
39 */
40
41 #if defined(PWR_PVD_SUPPORT)
42 /** @defgroup PWR_PVD_Mode_Mask PWR PVD Mode Mask
43 * @{
44 */
45 #define PVD_MODE_IT (0x00010000U)
46 #define PVD_MODE_EVT (0x00020000U)
47 #define PVD_RISING_EDGE (0x00000001U)
48 #define PVD_FALLING_EDGE (0x00000002U)
49 /**
50 * @}
51 */
52 #endif
53
54 /**
55 * @}
56 */
57
58
59 /** @addtogroup PWR_Exported_Functions
60 * @{
61 */
62
63 /** @addtogroup PWR_Exported_Functions_Group1
64 * @brief Initialization and de-initialization functions
65 *
66 @verbatim
67 ===============================================================================
68 ##### Initialization and de-initialization functions #####
69 ===============================================================================
70
71 @endverbatim
72 * @{
73 */
74
75 /**
76 * @brief Deinitializes the HAL PWR peripheral registers to their default reset values.
77 * @retval None
78 */
HAL_PWR_DeInit(void)79 void HAL_PWR_DeInit(void)
80 {
81 __HAL_RCC_PWR_FORCE_RESET();
82 __HAL_RCC_PWR_RELEASE_RESET();
83 }
84
85 /**
86 * @}
87 */
88
89 /** @addtogroup PWR_Exported_Functions_Group2
90 * @brief Low Power modes configuration functions
91 *
92 @verbatim
93
94 ===============================================================================
95 ##### Peripheral Control functions #####
96 ===============================================================================
97
98 *** Backup domain ***
99 =========================
100 [..]
101 After reset, the backup domain (RTC registers, RTC backup data
102 registers) is protected against possible unwanted
103 write accesses.
104 To enable access to the RTC Domain and RTC registers, proceed as follows:
105 (+) Enable the Power Controller (PWR) APB1 interface clock using the
106 __HAL_RCC_PWR_CLK_ENABLE() macro.
107 (+) Enable access to RTC domain using the HAL_PWR_EnableBkUpAccess() function.
108
109 *** PVD configuration ***
110 =========================
111 [..]
112 (+) The PVD is used to monitor the VDD power supply by comparing it to a
113 threshold selected by the PVD Level (PLS[2:0] bits in the PWR_CR).
114 (+) The PVD can use an external input analog voltage (PVD_IN) which is compared
115 internally to VREFINT. The PVD_IN (PB7) has to be configured in Analog mode
116 when PWR_PVDLevel_7 is selected (PLS[2:0] = 111).
117
118 (+) A PVDO flag is available to indicate if VDD/VDDA is higher or lower
119 than the PVD threshold. This event is internally connected to the EXTI
120 line16 and can generate an interrupt if enabled. This is done through
121 __HAL_PWR_PVD_EXTI_ENABLE_IT() macro.
122 (+) The PVD is stopped in Standby mode.
123 (+) The PVD feature is not supported on L0 Value line.
124
125 *** WakeUp pin configuration ***
126 ================================
127 [..]
128 (+) WakeUp pin is used to wake up the system from Standby mode. This pin is
129 forced in input pull-down configuration and is active on rising edges.
130 (+) There are two WakeUp pins:
131 WakeUp Pin 1 on PA.00.
132 WakeUp Pin 2 on PC.13.
133 WakeUp Pin 3 on PE.06 .
134
135
136 [..]
137 *** Main and Backup Regulators configuration ***
138 ================================================
139
140 (+) The main internal regulator can be configured to have a tradeoff between
141 performance and power consumption when the device does not operate at
142 the maximum frequency. This is done through __HAL_PWR_VOLTAGESCALING_CONFIG()
143 macro which configures the two VOS bits in PWR_CR register:
144 (++) PWR_REGULATOR_VOLTAGE_SCALE1 (VOS bits = 01), the regulator voltage output Scale 1 mode selected and
145 the System frequency can go up to 32 MHz.
146 (++) PWR_REGULATOR_VOLTAGE_SCALE2 (VOS bits = 10), the regulator voltage output Scale 2 mode selected and
147 the System frequency can go up to 16 MHz.
148 (++) PWR_REGULATOR_VOLTAGE_SCALE3 (VOS bits = 11), the regulator voltage output Scale 3 mode selected and
149 the System frequency can go up to 4.2 MHz.
150
151 Refer to the datasheets for more details.
152
153 *** Low Power modes configuration ***
154 =====================================
155 [..]
156 The device features 5 low-power modes:
157 (+) Low power run mode: regulator in low power mode, limited clock frequency,
158 limited number of peripherals running.
159 (+) Sleep mode: Cortex-M0+ core stopped, peripherals kept running.
160 (+) Low power sleep mode: Cortex-M0+ core stopped, limited clock frequency,
161 limited number of peripherals running, regulator in low power mode.
162 (+) Stop mode: All clocks are stopped, regulator running, regulator in low power mode.
163 (+) Standby mode: VCORE domain powered off
164
165 *** Low power run mode ***
166 =========================
167 [..]
168 To further reduce the consumption when the system is in Run mode, the regulator can be
169 configured in low power mode. In this mode, the system frequency should not exceed
170 MSI frequency range1.
171 In Low power run mode, all I/O pins keep the same state as in Run mode.
172
173 (+) Entry:
174 (++) VCORE in range2
175 (++) Decrease the system frequency not to exceed the frequency of MSI frequency range1.
176 (++) The regulator is forced in low power mode using the HAL_PWREx_EnableLowPowerRunMode()
177 function.
178 (+) Exit:
179 (++) The regulator is forced in Main regulator mode using the HAL_PWREx_DisableLowPowerRunMode()
180 function.
181 (++) Increase the system frequency if needed.
182
183 *** Sleep mode ***
184 ==================
185 [..]
186 (+) Entry:
187 The Sleep mode is entered by using the HAL_PWR_EnterSLEEPMode(PWR_MAINREGULATOR_ON, PWR_SLEEPENTRY_WFx)
188 functions with
189 (++) PWR_SLEEPENTRY_WFI: enter SLEEP mode with WFI instruction
190 (++) PWR_SLEEPENTRY_WFE: enter SLEEP mode with WFE instruction
191
192 (+) Exit:
193 (++) Any peripheral interrupt acknowledged by the nested vectored interrupt
194 controller (NVIC) can wake up the device from Sleep mode. If the WFE instruction was used to enter sleep mode,
195 the MCU exits Sleep mode as soon as an event occurs.
196
197 *** Low power sleep mode ***
198 ============================
199 [..]
200 (+) Entry:
201 The Low power sleep mode is entered by using the HAL_PWR_EnterSLEEPMode(PWR_LOWPOWERREGULATOR_ON, PWR_SLEEPENTRY_WFx)
202 functions with
203 (++) PWR_SLEEPENTRY_WFI: enter SLEEP mode with WFI instruction
204 (++) PWR_SLEEPENTRY_WFE: enter SLEEP mode with WFE instruction
205 (+) The Flash memory can be switched off by using the control bits (SLEEP_PD in the FLASH_ACR register.
206 This reduces power consumption but increases the wake-up time.
207
208 (+) Exit:
209 (++) If the WFI instruction was used to enter Low power sleep mode, any peripheral interrupt
210 acknowledged by the nested vectored interrupt controller (NVIC) can wake up the device
211 from Low power sleep mode. If the WFE instruction was used to enter Low power sleep mode,
212 the MCU exits Sleep mode as soon as an event occurs.
213
214 *** Stop mode ***
215 =================
216 [..]
217 The Stop mode is based on the Cortex-M0+ deepsleep mode combined with peripheral
218 clock gating. The voltage regulator can be configured either in normal or low-power mode.
219 In Stop mode, all clocks in the VCORE domain are stopped, the PLL, the MSI, the HSI and
220 the HSE RC oscillators are disabled. Internal SRAM and register contents are preserved.
221 To get the lowest consumption in Stop mode, the internal Flash memory also enters low
222 power mode. When the Flash memory is in power-down mode, an additional startup delay is
223 incurred when waking up from Stop mode.
224 To minimize the consumption In Stop mode, VREFINT, the BOR, PVD, and temperature
225 sensor can be switched off before entering Stop mode. They can be switched on again by
226 software after exiting Stop mode using the ULP bit in the PWR_CR register.
227 In Stop mode, all I/O pins keep the same state as in Run mode.
228
229 (+) Entry:
230 The Stop mode is entered using the HAL_PWR_EnterSTOPMode
231 function with:
232 (++) Main regulator ON.
233 (++) Low Power regulator ON.
234 (++) PWR_SLEEPENTRY_WFI: enter SLEEP mode with WFI instruction
235 (++) PWR_SLEEPENTRY_WFE: enter SLEEP mode with WFE instruction
236 (+) Exit:
237 (++) By issuing an interrupt or a wakeup event, the MSI or HSI16 RC
238 oscillator is selected as system clock depending the bit STOPWUCK in the RCC_CFGR
239 register
240
241 *** Standby mode ***
242 ====================
243 [..]
244 The Standby mode allows to achieve the lowest power consumption. It is based on the
245 Cortex-M0+ deepsleep mode, with the voltage regulator disabled. The VCORE domain is
246 consequently powered off. The PLL, the MSI, the HSI oscillator and the HSE oscillator are
247 also switched off. SRAM and register contents are lost except for the RTC registers, RTC
248 backup registers and Standby circuitry.
249
250 To minimize the consumption In Standby mode, VREFINT, the BOR, PVD, and temperature
251 sensor can be switched off before entering the Standby mode. They can be switched
252 on again by software after exiting the Standby mode.
253 function.
254
255 (+) Entry:
256 (++) The Standby mode is entered using the HAL_PWR_EnterSTANDBYMode() function.
257 (+) Exit:
258 (++) WKUP pin rising edge, RTC alarm (Alarm A and Alarm B), RTC wakeup,
259 tamper event, time-stamp event, external reset in NRST pin, IWDG reset.
260
261 *** Auto-wakeup (AWU) from low-power mode ***
262 =============================================
263 [..]
264 The MCU can be woken up from low-power mode by an RTC Alarm event, an RTC
265 Wakeup event, a tamper event, a time-stamp event, or a comparator event,
266 without depending on an external interrupt (Auto-wakeup mode).
267
268 (+) RTC auto-wakeup (AWU) from the Stop mode
269 (++) To wake up from the Stop mode with an RTC alarm event, it is necessary to:
270 (+++) Configure the EXTI Line 17 to be sensitive to rising edges (Interrupt
271 or Event modes) using the EXTI_Init() function.
272 (+++) Enable the RTC Alarm Interrupt using the RTC_ITConfig() function
273 (+++) Configure the RTC to generate the RTC alarm using the RTC_SetAlarm()
274 and RTC_AlarmCmd() functions.
275 (++) To wake up from the Stop mode with an RTC Tamper or time stamp event, it
276 is necessary to:
277 (+++) Configure the EXTI Line 19 to be sensitive to rising edges (Interrupt
278 or Event modes) using the EXTI_Init() function.
279 (+++) Enable the RTC Tamper or time stamp Interrupt using the RTC_ITConfig()
280 function.
281 (+++) Configure the RTC to detect the tamper or time stamp event using the
282 RTC_TimeStampConfig(), RTC_TamperTriggerConfig() and RTC_TamperCmd()
283 functions.
284 (++) To wake up from the Stop mode with an RTC WakeUp event, it is necessary to:
285 (+++) Configure the EXTI Line 20 to be sensitive to rising edges (Interrupt
286 or Event modes) using the EXTI_Init() function.
287 (+++) Enable the RTC WakeUp Interrupt using the RTC_ITConfig() function.
288 (+++) Configure the RTC to generate the RTC WakeUp event using the RTC_WakeUpClockConfig(),
289 RTC_SetWakeUpCounter() and RTC_WakeUpCmd() functions.
290
291 (+) RTC auto-wakeup (AWU) from the Standby mode
292 (++) To wake up from the Standby mode with an RTC alarm event, it is necessary to:
293 (+++) Enable the RTC Alarm Interrupt using the RTC_ITConfig() function.
294 (+++) Configure the RTC to generate the RTC alarm using the RTC_SetAlarm()
295 and RTC_AlarmCmd() functions.
296 (++) To wake up from the Standby mode with an RTC Tamper or time stamp event, it
297 is necessary to:
298 (+++) Enable the RTC Tamper or time stamp Interrupt using the RTC_ITConfig()
299 function.
300 (+++) Configure the RTC to detect the tamper or time stamp event using the
301 RTC_TimeStampConfig(), RTC_TamperTriggerConfig() and RTC_TamperCmd()
302 functions.
303 (++) To wake up from the Standby mode with an RTC WakeUp event, it is necessary to:
304 (+++) Enable the RTC WakeUp Interrupt using the RTC_ITConfig() function
305 (+++) Configure the RTC to generate the RTC WakeUp event using the RTC_WakeUpClockConfig(),
306 RTC_SetWakeUpCounter() and RTC_WakeUpCmd() functions.
307
308 (+) Comparator auto-wakeup (AWU) from the Stop mode
309 (++) To wake up from the Stop mode with an comparator 1 or comparator 2 wakeup
310 event, it is necessary to:
311 (+++) Configure the EXTI Line 21 for comparator 1 or EXTI Line 22 for comparator 2
312 to be sensitive to to the selected edges (falling, rising or falling
313 and rising) (Interrupt or Event modes) using the EXTI_Init() function.
314 (+++) Configure the comparator to generate the event.
315 @endverbatim
316 * @{
317 */
318
319 /**
320 * @brief Enables access to the backup domain (RTC registers, RTC
321 * backup data registers ).
322 * @note If the HSE divided by 2, 4, 8 or 16 is used as the RTC clock, the
323 * Backup Domain Access should be kept enabled.
324 * @retval None
325 */
HAL_PWR_EnableBkUpAccess(void)326 void HAL_PWR_EnableBkUpAccess(void)
327 {
328 /* Enable access to RTC and backup registers */
329 SET_BIT(PWR->CR, PWR_CR_DBP);
330 }
331
332 /**
333 * @brief Disables access to the backup domain
334 * @note Applies to RTC registers, RTC backup data registers.
335 * @note If the HSE divided by 2, 4, 8 or 16 is used as the RTC clock, the
336 * Backup Domain Access should be kept enabled.
337 * @retval None
338 */
HAL_PWR_DisableBkUpAccess(void)339 void HAL_PWR_DisableBkUpAccess(void)
340 {
341 /* Disable access to RTC and backup registers */
342 CLEAR_BIT(PWR->CR, PWR_CR_DBP);
343 }
344
345 #if defined(PWR_PVD_SUPPORT)
346 /**
347 * @brief Configures the voltage threshold detected by the Power Voltage Detector(PVD).
348 * @param sConfigPVD pointer to an PWR_PVDTypeDef structure that contains the configuration
349 * information for the PVD.
350 * @note Refer to the electrical characteristics of your device datasheet for
351 * more details about the voltage threshold corresponding to each
352 * detection level.
353 * @retval None
354 */
HAL_PWR_ConfigPVD(PWR_PVDTypeDef * sConfigPVD)355 void HAL_PWR_ConfigPVD(PWR_PVDTypeDef *sConfigPVD)
356 {
357 /* Check the parameters */
358 assert_param(IS_PWR_PVD_LEVEL(sConfigPVD->PVDLevel));
359 assert_param(IS_PWR_PVD_MODE(sConfigPVD->Mode));
360
361 /* Set PLS[7:5] bits according to PVDLevel value */
362 MODIFY_REG(PWR->CR, PWR_CR_PLS, sConfigPVD->PVDLevel);
363
364 /* Clear any previous config. Keep it clear if no event or IT mode is selected */
365 __HAL_PWR_PVD_EXTI_DISABLE_EVENT();
366 __HAL_PWR_PVD_EXTI_DISABLE_IT();
367 __HAL_PWR_PVD_EXTI_DISABLE_FALLING_EDGE();
368 __HAL_PWR_PVD_EXTI_DISABLE_RISING_EDGE();
369
370 /* Configure interrupt mode */
371 if((sConfigPVD->Mode & PVD_MODE_IT) == PVD_MODE_IT)
372 {
373 __HAL_PWR_PVD_EXTI_ENABLE_IT();
374 }
375
376 /* Configure event mode */
377 if((sConfigPVD->Mode & PVD_MODE_EVT) == PVD_MODE_EVT)
378 {
379 __HAL_PWR_PVD_EXTI_ENABLE_EVENT();
380 }
381
382 /* Configure the edge */
383 if((sConfigPVD->Mode & PVD_RISING_EDGE) == PVD_RISING_EDGE)
384 {
385 __HAL_PWR_PVD_EXTI_ENABLE_RISING_EDGE();
386 }
387
388 if((sConfigPVD->Mode & PVD_FALLING_EDGE) == PVD_FALLING_EDGE)
389 {
390 __HAL_PWR_PVD_EXTI_ENABLE_FALLING_EDGE();
391 }
392 }
393
394 /**
395 * @brief Enables the Power Voltage Detector(PVD).
396 * @retval None
397 */
HAL_PWR_EnablePVD(void)398 void HAL_PWR_EnablePVD(void)
399 {
400 /* Enable the power voltage detector */
401 SET_BIT(PWR->CR, PWR_CR_PVDE);
402 }
403
404 /**
405 * @brief Disables the Power Voltage Detector(PVD).
406 * @retval None
407 */
HAL_PWR_DisablePVD(void)408 void HAL_PWR_DisablePVD(void)
409 {
410 /* Disable the power voltage detector */
411 CLEAR_BIT(PWR->CR, PWR_CR_PVDE);
412 }
413 #endif /* PWR_PVD_SUPPORT */
414
415 /**
416 * @brief Enables the WakeUp PINx functionality.
417 * @param WakeUpPinx: Specifies the Power Wake-Up pin to enable.
418 * This parameter can be one of the following values:
419 * @arg PWR_WAKEUP_PIN1
420 * @arg PWR_WAKEUP_PIN2
421 * @arg PWR_WAKEUP_PIN3 for stm32l07xxx and stm32l08xxx devices only.
422 * @retval None
423 */
HAL_PWR_EnableWakeUpPin(uint32_t WakeUpPinx)424 void HAL_PWR_EnableWakeUpPin(uint32_t WakeUpPinx)
425 {
426 /* Check the parameter */
427 assert_param(IS_PWR_WAKEUP_PIN(WakeUpPinx));
428 /* Enable the EWUPx pin */
429 SET_BIT(PWR->CSR, WakeUpPinx);
430 }
431
432 /**
433 * @brief Disables the WakeUp PINx functionality.
434 * @param WakeUpPinx: Specifies the Power Wake-Up pin to disable.
435 * This parameter can be one of the following values:
436 * @arg PWR_WAKEUP_PIN1
437 * @arg PWR_WAKEUP_PIN2
438 * @arg PWR_WAKEUP_PIN3 for stm32l07xxx and stm32l08xxx devices only.
439 * @retval None
440 */
HAL_PWR_DisableWakeUpPin(uint32_t WakeUpPinx)441 void HAL_PWR_DisableWakeUpPin(uint32_t WakeUpPinx)
442 {
443 /* Check the parameter */
444 assert_param(IS_PWR_WAKEUP_PIN(WakeUpPinx));
445 /* Disable the EWUPx pin */
446 CLEAR_BIT(PWR->CSR, WakeUpPinx);
447 }
448
449 /**
450 * @brief Enters Sleep mode.
451 * @note In Sleep mode, all I/O pins keep the same state as in Run mode.
452 * @param Regulator: Specifies the regulator state in SLEEP mode.
453 * This parameter can be one of the following values:
454 * @arg PWR_MAINREGULATOR_ON: SLEEP mode with regulator ON
455 * @arg PWR_LOWPOWERREGULATOR_ON: SLEEP mode with low power regulator ON
456 * @param SLEEPEntry: Specifies if SLEEP mode is entered with WFI or WFE instruction.
457 * When WFI entry is used, tick interrupt have to be disabled if not desired as
458 * the interrupt wake up source.
459 * This parameter can be one of the following values:
460 * @arg PWR_SLEEPENTRY_WFI: enter SLEEP mode with WFI instruction
461 * @arg PWR_SLEEPENTRY_WFE: enter SLEEP mode with WFE instruction
462 * @retval None
463 */
HAL_PWR_EnterSLEEPMode(uint32_t Regulator,uint8_t SLEEPEntry)464 void HAL_PWR_EnterSLEEPMode(uint32_t Regulator, uint8_t SLEEPEntry)
465 {
466 uint32_t tmpreg = 0U;
467 uint32_t ulpbit, vrefinbit;
468
469 /* Check the parameters */
470 assert_param(IS_PWR_REGULATOR(Regulator));
471 assert_param(IS_PWR_SLEEP_ENTRY(SLEEPEntry));
472
473 /* It is forbidden to configure both EN_VREFINT=1 and ULP=1 if the device is
474 in Stop mode or in Sleep/Low-power sleep mode */
475 ulpbit = READ_BIT(PWR->CR, PWR_CR_ULP);
476 vrefinbit = READ_BIT(SYSCFG->CFGR3, SYSCFG_CFGR3_EN_VREFINT);
477 if((ulpbit != 0) && (vrefinbit != 0))
478 {
479 CLEAR_BIT(PWR->CR, PWR_CR_ULP);
480 }
481
482 /* Select the regulator state in Sleep mode ---------------------------------*/
483 tmpreg = PWR->CR;
484
485 /* Clear PDDS and LPDS bits */
486 CLEAR_BIT(tmpreg, (PWR_CR_PDDS | PWR_CR_LPSDSR));
487
488 /* Set LPSDSR bit according to PWR_Regulator value */
489 SET_BIT(tmpreg, Regulator);
490
491 /* Store the new value */
492 PWR->CR = tmpreg;
493
494 /* Clear SLEEPDEEP bit of Cortex System Control Register */
495 CLEAR_BIT(SCB->SCR, SCB_SCR_SLEEPDEEP_Msk);
496
497 /* Select SLEEP mode entry -------------------------------------------------*/
498 if(SLEEPEntry == PWR_SLEEPENTRY_WFI)
499 {
500 /* Request Wait For Interrupt */
501 __WFI();
502 }
503 else
504 {
505 /* Request Wait For Event */
506 __SEV();
507 __WFE();
508 __WFE();
509 }
510
511 if((ulpbit != 0) && (vrefinbit != 0))
512 {
513 SET_BIT(PWR->CR, PWR_CR_ULP);
514 }
515
516 /* Additional NOP to ensure all pending instructions are flushed before entering low power mode */
517 __NOP();
518
519 }
520
521 /**
522 * @brief Enters Stop mode.
523 * @note In Stop mode, all I/O pins keep the same state as in Run mode.
524 * @note When exiting Stop mode by issuing an interrupt or a wakeup event,
525 * MSI or HSI16 RCoscillator is selected as system clock depending
526 * the bit STOPWUCK in the RCC_CFGR register.
527 * @note When the voltage regulator operates in low power mode, an additional
528 * startup delay is incurred when waking up from Stop mode.
529 * By keeping the internal regulator ON during Stop mode, the consumption
530 * is higher although the startup time is reduced.
531 * @note Before entering in this function, it is important to ensure that the WUF
532 * wakeup flag is cleared. To perform this action, it is possible to call the
533 * following macro : __HAL_PWR_CLEAR_FLAG(PWR_FLAG_WU)
534 *
535 * @param Regulator: Specifies the regulator state in Stop mode.
536 * This parameter can be one of the following values:
537 * @arg PWR_MAINREGULATOR_ON: Stop mode with regulator ON
538 * @arg PWR_LOWPOWERREGULATOR_ON: Stop mode with low power regulator ON
539 * @param STOPEntry: Specifies if Stop mode in entered with WFI or WFE instruction.
540 * This parameter can be one of the following values:
541 * @arg PWR_STOPENTRY_WFI: Enter Stop mode with WFI instruction
542 * @arg PWR_STOPENTRY_WFE: Enter Stop mode with WFE instruction
543 * @retval None
544 */
HAL_PWR_EnterSTOPMode(uint32_t Regulator,uint8_t STOPEntry)545 void HAL_PWR_EnterSTOPMode(uint32_t Regulator, uint8_t STOPEntry)
546 {
547 uint32_t tmpreg = 0U;
548 uint32_t ulpbit, vrefinbit;
549
550 /* Check the parameters */
551 assert_param(IS_PWR_REGULATOR(Regulator));
552 assert_param(IS_PWR_STOP_ENTRY(STOPEntry));
553
554 /* It is forbidden to configure both EN_VREFINT=1 and ULP=1 if the device is
555 in Stop mode or in Sleep/Low-power sleep mode */
556 ulpbit = READ_BIT(PWR->CR, PWR_CR_ULP);
557 vrefinbit = READ_BIT(SYSCFG->CFGR3, SYSCFG_CFGR3_EN_VREFINT);
558 if((ulpbit != 0) && (vrefinbit != 0))
559 {
560 CLEAR_BIT(PWR->CR, PWR_CR_ULP);
561 }
562
563 /* Select the regulator state in Stop mode ---------------------------------*/
564 tmpreg = PWR->CR;
565
566 /* Clear PDDS and LPDS bits */
567 CLEAR_BIT(tmpreg, (PWR_CR_PDDS | PWR_CR_LPSDSR));
568
569 /* Set LPSDSR bit according to PWR_Regulator value */
570 SET_BIT(tmpreg, Regulator);
571
572 /* Store the new value */
573 PWR->CR = tmpreg;
574
575 /* Set SLEEPDEEP bit of Cortex System Control Register */
576 SET_BIT(SCB->SCR, SCB_SCR_SLEEPDEEP_Msk);
577
578 /* Select Stop mode entry --------------------------------------------------*/
579 if(STOPEntry == PWR_STOPENTRY_WFI)
580 {
581 /* Request Wait For Interrupt */
582 __WFI();
583 }
584 else
585 {
586 /* Request Wait For Event */
587 __SEV();
588 __WFE();
589 __WFE();
590 }
591
592 /* Reset SLEEPDEEP bit of Cortex System Control Register */
593 CLEAR_BIT(SCB->SCR, SCB_SCR_SLEEPDEEP_Msk);
594
595 if((ulpbit != 0) && (vrefinbit != 0))
596 {
597 SET_BIT(PWR->CR, PWR_CR_ULP);
598 }
599 }
600
601 /**
602 * @brief Enters Standby mode.
603 * @note In Standby mode, all I/O pins are high impedance except for:
604 * - Reset pad (still available)
605 * - RTC_AF1 pin (PC13) if configured for tamper, time-stamp, RTC
606 * Alarm out, or RTC clock calibration out.
607 * - RTC_AF2 pin (PC13) if configured for tamper.
608 * - WKUP pin 1 (PA00) if enabled.
609 * - WKUP pin 2 (PC13) if enabled.
610 * - WKUP pin 3 (PE06) if enabled, for stm32l07xxx and stm32l08xxx devices only.
611 * - WKUP pin 3 (PA02) if enabled, for stm32l031xx devices only.
612 * @retval None
613 */
HAL_PWR_EnterSTANDBYMode(void)614 void HAL_PWR_EnterSTANDBYMode(void)
615 {
616 /* Select Standby mode */
617 SET_BIT(PWR->CR, PWR_CR_PDDS);
618
619 /* Set SLEEPDEEP bit of Cortex System Control Register */
620 SET_BIT(SCB->SCR, SCB_SCR_SLEEPDEEP_Msk);
621
622 /* This option is used to ensure that store operations are completed */
623 #if defined ( __CC_ARM)
624 __force_stores();
625 #endif
626 /* Request Wait For Interrupt */
627 __WFI();
628 }
629
630 /**
631 * @brief Indicates Sleep-On-Exit when returning from Handler mode to Thread mode.
632 * @note Set SLEEPONEXIT bit of SCR register. When this bit is set, the processor
633 * re-enters SLEEP mode when an interruption handling is over.
634 * Setting this bit is useful when the processor is expected to run only on
635 * interruptions handling.
636 * @retval None
637 */
HAL_PWR_EnableSleepOnExit(void)638 void HAL_PWR_EnableSleepOnExit(void)
639 {
640 /* Set SLEEPONEXIT bit of Cortex System Control Register */
641 SET_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPONEXIT_Msk));
642 }
643
644
645 /**
646 * @brief Disables Sleep-On-Exit feature when returning from Handler mode to Thread mode.
647 * @note Clears SLEEPONEXIT bit of SCR register. When this bit is set, the processor
648 * re-enters SLEEP mode when an interruption handling is over.
649 * @retval None
650 */
HAL_PWR_DisableSleepOnExit(void)651 void HAL_PWR_DisableSleepOnExit(void)
652 {
653 /* Clear SLEEPONEXIT bit of Cortex System Control Register */
654 CLEAR_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPONEXIT_Msk));
655 }
656
657
658 /**
659 * @brief Enables CORTEX M0+ SEVONPEND bit.
660 * @note Sets SEVONPEND bit of SCR register. When this bit is set, this causes
661 * WFE to wake up when an interrupt moves from inactive to pended.
662 * @retval None
663 */
HAL_PWR_EnableSEVOnPend(void)664 void HAL_PWR_EnableSEVOnPend(void)
665 {
666 /* Set SEVONPEND bit of Cortex System Control Register */
667 SET_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SEVONPEND_Msk));
668 }
669
670
671 /**
672 * @brief Disables CORTEX M0+ SEVONPEND bit.
673 * @note Clears SEVONPEND bit of SCR register. When this bit is set, this causes
674 * WFE to wake up when an interrupt moves from inactive to pended.
675 * @retval None
676 */
HAL_PWR_DisableSEVOnPend(void)677 void HAL_PWR_DisableSEVOnPend(void)
678 {
679 /* Clear SEVONPEND bit of Cortex System Control Register */
680 CLEAR_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SEVONPEND_Msk));
681 }
682
683 #if defined(PWR_PVD_SUPPORT)
684 /**
685 * @brief This function handles the PWR PVD interrupt request.
686 * @note This API should be called under the PVD_IRQHandler().
687 * @retval None
688 */
HAL_PWR_PVD_IRQHandler(void)689 void HAL_PWR_PVD_IRQHandler(void)
690 {
691 /* Check PWR exti flag */
692 if(__HAL_PWR_PVD_EXTI_GET_FLAG() != RESET)
693 {
694 /* PWR PVD interrupt user callback */
695 HAL_PWR_PVDCallback();
696
697 /* Clear PWR Exti pending bit */
698 __HAL_PWR_PVD_EXTI_CLEAR_FLAG();
699 }
700 }
701
702 /**
703 * @brief PWR PVD interrupt callback
704 * @retval None
705 */
HAL_PWR_PVDCallback(void)706 __weak void HAL_PWR_PVDCallback(void)
707 {
708 /* NOTE : This function Should not be modified, when the callback is needed,
709 the HAL_PWR_PVDCallback could be implemented in the user file
710 */
711 }
712 #endif /* PWR_PVD_SUPPORT */
713
714 /**
715 * @}
716 */
717
718 /**
719 * @}
720 */
721
722 #endif /* HAL_PWR_MODULE_ENABLED */
723 /**
724 * @}
725 */
726
727 /**
728 * @}
729 */
730
