1 /**
2   ******************************************************************************
3   * @file    stm32h7xx_hal_iwdg.c
4   * @author  MCD Application Team
5   * @brief   IWDG HAL module driver.
6   *          This file provides firmware functions to manage the following
7   *          functionalities of the Independent Watchdog (IWDG) peripheral:
8   *           + Initialization and Start functions
9   *           + IO operation functions
10   *
11   ******************************************************************************
12   * @attention
13   *
14   * Copyright (c) 2017 STMicroelectronics.
15   * All rights reserved.
16   *
17   * This software is licensed under terms that can be found in the LICENSE file
18   * in the root directory of this software component.
19   * If no LICENSE file comes with this software, it is provided AS-IS.
20   *
21   ******************************************************************************
22   @verbatim
23   ==============================================================================
24                     ##### IWDG Generic features #####
25   ==============================================================================
26   [..]
27     (+) The IWDG can be started by either software or hardware (configurable
28         through option byte).
29 
30     (+) The IWDG is clocked by the Low-Speed Internal clock (LSI) and thus stays
31         active even if the main clock fails.
32 
33     (+) Once the IWDG is started, the LSI is forced ON and both cannot be
34         disabled. The counter starts counting down from the reset value (0xFFF).
35         When it reaches the end of count value (0x000) a reset signal is
36         generated (IWDG reset).
37 
38     (+) Whenever the key value 0x0000 AAAA is written in the IWDG_KR register,
39         the IWDG_RLR value is reloaded into the counter and the watchdog reset
40         is prevented.
41 
42     (+) The IWDG is implemented in the VDD voltage domain that is still functional
43         in STOP and STANDBY mode (IWDG reset can wake up the CPU from STANDBY).
44         IWDGRST flag in RCC_CSR register can be used to inform when an IWDG
45         reset occurs.
46 
47     (+) Debug mode: When the microcontroller enters debug mode (core halted),
48         the IWDG counter either continues to work normally or stops, depending
49         on DBG_IWDG_STOP configuration bit in DBG module, accessible through
50         __HAL_DBGMCU_FREEZE_IWDG1() or __HAL_DBGMCU_FREEZE2_IWDG2() and
51         __HAL_DBGMCU_UnFreeze_IWDG1 or __HAL_DBGMCU_UnFreeze2_IWDG2() macros.
52 
53     [..] Min-max timeout value @32KHz (LSI): ~125us / ~32.7s
54          The IWDG timeout may vary due to LSI clock frequency dispersion.
55          STM32H7xx devices provide the capability to measure the LSI clock
56          frequency (LSI clock is internally connected to TIM16 CH1 input capture).
57          The measured value can be used to have an IWDG timeout with an
58          acceptable accuracy.
59 
60     [..] Default timeout value (necessary for IWDG_SR status register update):
61          Constant LSI_VALUE is defined based on the nominal LSI clock frequency.
62          This frequency being subject to variations as mentioned above, the
63          default timeout value (defined through constant HAL_IWDG_DEFAULT_TIMEOUT
64          below) may become too short or too long.
65          In such cases, this default timeout value can be tuned by redefining
66          the constant LSI_VALUE at user-application level (based, for instance,
67          on the measured LSI clock frequency as explained above).
68 
69                      ##### How to use this driver #####
70   ==============================================================================
71   [..]
72     (#) Use IWDG using HAL_IWDG_Init() function to :
73       (++) Enable instance by writing Start keyword in IWDG_KEY register. LSI
74            clock is forced ON and IWDG counter starts counting down.
75       (++) Enable write access to configuration registers:
76           IWDG_PR, IWDG_RLR and IWDG_WINR.
77       (++) Configure the IWDG prescaler and counter reload value. This reload
78            value will be loaded in the IWDG counter each time the watchdog is
79            reloaded, then the IWDG will start counting down from this value.
80       (++) Depending on window parameter:
81         (+++) If Window Init parameter is same as Window register value,
82              nothing more is done but reload counter value in order to exit
83              function with exact time base.
84         (+++) Else modify Window register. This will automatically reload
85              watchdog counter.
86       (++) Wait for status flags to be reset.
87 
88     (#) Then the application program must refresh the IWDG counter at regular
89         intervals during normal operation to prevent an MCU reset, using
90         HAL_IWDG_Refresh() function.
91 
92      *** IWDG HAL driver macros list ***
93      ====================================
94      [..]
95        Below the list of most used macros in IWDG HAL driver:
96       (+) __HAL_IWDG_START: Enable the IWDG peripheral
97       (+) __HAL_IWDG_RELOAD_COUNTER: Reloads IWDG counter with value defined in
98           the reload register
99 
100   @endverbatim
101   */
102 
103 /* Includes ------------------------------------------------------------------*/
104 #include "stm32h7xx_hal.h"
105 
106 /** @addtogroup STM32H7xx_HAL_Driver
107   * @{
108   */
109 
110 #ifdef HAL_IWDG_MODULE_ENABLED
111 /** @addtogroup IWDG
112   * @brief IWDG HAL module driver.
113   * @{
114   */
115 
116 /* Private typedef -----------------------------------------------------------*/
117 /* Private define ------------------------------------------------------------*/
118 /** @defgroup IWDG_Private_Defines IWDG Private Defines
119   * @{
120   */
121 /* Status register needs up to 5 LSI clock periods divided by the clock
122    prescaler to be updated. The number of LSI clock periods is upper-rounded to
123    6 for the timeout value calculation.
124    The timeout value is calculated using the highest prescaler (256) and
125    the LSI_VALUE constant. The value of this constant can be changed by the user
126    to take into account possible LSI clock period variations.
127    The timeout value is multiplied by 1000 to be converted in milliseconds.
128    LSI startup time is also considered here by adding LSI_STARTUP_TIME
129    converted in milliseconds. */
130 #define HAL_IWDG_DEFAULT_TIMEOUT        (((6UL * 256UL * 1000UL) / LSI_VALUE) + ((LSI_STARTUP_TIME / 1000UL) + 1UL))
131 #define IWDG_KERNEL_UPDATE_FLAGS        (IWDG_SR_WVU | IWDG_SR_RVU | IWDG_SR_PVU)
132 /**
133   * @}
134   */
135 
136 /* Private macro -------------------------------------------------------------*/
137 /* Private variables ---------------------------------------------------------*/
138 /* Private function prototypes -----------------------------------------------*/
139 /* Exported functions --------------------------------------------------------*/
140 
141 /** @addtogroup IWDG_Exported_Functions
142   * @{
143   */
144 
145 /** @addtogroup IWDG_Exported_Functions_Group1
146   *  @brief    Initialization and Start functions.
147   *
148 @verbatim
149  ===============================================================================
150           ##### Initialization and Start functions #####
151  ===============================================================================
152  [..]  This section provides functions allowing to:
153       (+) Initialize the IWDG according to the specified parameters in the
154           IWDG_InitTypeDef of associated handle.
155       (+) Manage Window option.
156       (+) Once initialization is performed in HAL_IWDG_Init function, Watchdog
157           is reloaded in order to exit function with correct time base.
158 
159 @endverbatim
160   * @{
161   */
162 
163 /**
164   * @brief  Initialize the IWDG according to the specified parameters in the
165   *         IWDG_InitTypeDef and start watchdog. Before exiting function,
166   *         watchdog is refreshed in order to have correct time base.
167   * @param  hiwdg  pointer to a IWDG_HandleTypeDef structure that contains
168   *                the configuration information for the specified IWDG module.
169   * @retval HAL status
170   */
HAL_IWDG_Init(IWDG_HandleTypeDef * hiwdg)171 HAL_StatusTypeDef HAL_IWDG_Init(IWDG_HandleTypeDef *hiwdg)
172 {
173   uint32_t tickstart;
174 
175   /* Check the IWDG handle allocation */
176   if (hiwdg == NULL)
177   {
178     return HAL_ERROR;
179   }
180 
181   /* Check the parameters */
182   assert_param(IS_IWDG_ALL_INSTANCE(hiwdg->Instance));
183   assert_param(IS_IWDG_PRESCALER(hiwdg->Init.Prescaler));
184   assert_param(IS_IWDG_RELOAD(hiwdg->Init.Reload));
185   assert_param(IS_IWDG_WINDOW(hiwdg->Init.Window));
186 
187   /* Enable IWDG. LSI is turned on automatically */
188   __HAL_IWDG_START(hiwdg);
189 
190   /* Enable write access to IWDG_PR, IWDG_RLR and IWDG_WINR registers by writing
191   0x5555 in KR */
192   IWDG_ENABLE_WRITE_ACCESS(hiwdg);
193 
194   /* Write to IWDG registers the Prescaler & Reload values to work with */
195   hiwdg->Instance->PR = hiwdg->Init.Prescaler;
196   hiwdg->Instance->RLR = hiwdg->Init.Reload;
197 
198   /* Check pending flag, if previous update not done, return timeout */
199   tickstart = HAL_GetTick();
200 
201   /* Wait for register to be updated */
202   while ((hiwdg->Instance->SR & IWDG_KERNEL_UPDATE_FLAGS) != 0x00u)
203   {
204     if ((HAL_GetTick() - tickstart) > HAL_IWDG_DEFAULT_TIMEOUT)
205     {
206       if ((hiwdg->Instance->SR & IWDG_KERNEL_UPDATE_FLAGS) != 0x00u)
207       {
208         return HAL_TIMEOUT;
209       }
210     }
211   }
212 
213   /* If window parameter is different than current value, modify window
214   register */
215   if (hiwdg->Instance->WINR != hiwdg->Init.Window)
216   {
217     /* Write to IWDG WINR the IWDG_Window value to compare with. In any case,
218     even if window feature is disabled, Watchdog will be reloaded by writing
219     windows register */
220     hiwdg->Instance->WINR = hiwdg->Init.Window;
221   }
222   else
223   {
224     /* Reload IWDG counter with value defined in the reload register */
225     __HAL_IWDG_RELOAD_COUNTER(hiwdg);
226   }
227 
228   /* Return function status */
229   return HAL_OK;
230 }
231 
232 
233 /**
234   * @}
235   */
236 
237 
238 /** @addtogroup IWDG_Exported_Functions_Group2
239   *  @brief   IO operation functions
240   *
241 @verbatim
242  ===============================================================================
243                       ##### IO operation functions #####
244  ===============================================================================
245  [..]  This section provides functions allowing to:
246       (+) Refresh the IWDG.
247 
248 @endverbatim
249   * @{
250   */
251 
252 /**
253   * @brief  Refresh the IWDG.
254   * @param  hiwdg  pointer to a IWDG_HandleTypeDef structure that contains
255   *                the configuration information for the specified IWDG module.
256   * @retval HAL status
257   */
HAL_IWDG_Refresh(IWDG_HandleTypeDef * hiwdg)258 HAL_StatusTypeDef HAL_IWDG_Refresh(IWDG_HandleTypeDef *hiwdg)
259 {
260   /* Reload IWDG counter with value defined in the reload register */
261   __HAL_IWDG_RELOAD_COUNTER(hiwdg);
262 
263   /* Return function status */
264   return HAL_OK;
265 }
266 
267 
268 /**
269   * @}
270   */
271 
272 /**
273   * @}
274   */
275 
276 #endif /* HAL_IWDG_MODULE_ENABLED */
277 /**
278   * @}
279   */
280 
281 /**
282   * @}
283   */
284