1 /** 2 ****************************************************************************** 3 * @file stm32h5xx_hal_uart_ex.h 4 * @author MCD Application Team 5 * @brief Header file of UART HAL Extended module. 6 ****************************************************************************** 7 * @attention 8 * 9 * Copyright (c) 2022 STMicroelectronics. 10 * All rights reserved. 11 * 12 * This software is licensed under terms that can be found in the LICENSE file 13 * in the root directory of this software component. 14 * If no LICENSE file comes with this software, it is provided AS-IS. 15 * 16 ****************************************************************************** 17 */ 18 19 /* Define to prevent recursive inclusion -------------------------------------*/ 20 #ifndef STM32H5xx_HAL_UART_EX_H 21 #define STM32H5xx_HAL_UART_EX_H 22 23 #ifdef __cplusplus 24 extern "C" { 25 #endif 26 27 /* Includes ------------------------------------------------------------------*/ 28 #include "stm32h5xx_hal_def.h" 29 30 /** @addtogroup STM32H5xx_HAL_Driver 31 * @{ 32 */ 33 34 /** @addtogroup UARTEx 35 * @{ 36 */ 37 38 /* Exported types ------------------------------------------------------------*/ 39 /** @defgroup UARTEx_Exported_Types UARTEx Exported Types 40 * @{ 41 */ 42 43 /** 44 * @brief UART wake up from stop mode parameters 45 */ 46 typedef struct 47 { 48 uint32_t WakeUpEvent; /*!< Specifies which event will activate the Wakeup from Stop mode flag (WUF). 49 This parameter can be a value of @ref UART_WakeUp_from_Stop_Selection. 50 If set to UART_WAKEUP_ON_ADDRESS, the two other fields below must 51 be filled up. */ 52 53 uint16_t AddressLength; /*!< Specifies whether the address is 4 or 7-bit long. 54 This parameter can be a value of @ref UARTEx_WakeUp_Address_Length. */ 55 56 uint8_t Address; /*!< UART/USART node address (7-bit long max). */ 57 } UART_WakeUpTypeDef; 58 59 /** 60 * @} 61 */ 62 63 /* Exported constants --------------------------------------------------------*/ 64 /** @defgroup UARTEx_Exported_Constants UARTEx Exported Constants 65 * @{ 66 */ 67 68 /** @defgroup UARTEx_Word_Length UARTEx Word Length 69 * @{ 70 */ 71 #define UART_WORDLENGTH_7B USART_CR1_M1 /*!< 7-bit long UART frame */ 72 #define UART_WORDLENGTH_8B 0x00000000U /*!< 8-bit long UART frame */ 73 #define UART_WORDLENGTH_9B USART_CR1_M0 /*!< 9-bit long UART frame */ 74 /** 75 * @} 76 */ 77 78 /** @defgroup UARTEx_WakeUp_Address_Length UARTEx WakeUp Address Length 79 * @{ 80 */ 81 #define UART_ADDRESS_DETECT_4B 0x00000000U /*!< 4-bit long wake-up address */ 82 #define UART_ADDRESS_DETECT_7B USART_CR2_ADDM7 /*!< 7-bit long wake-up address */ 83 /** 84 * @} 85 */ 86 87 /** @defgroup UARTEx_FIFO_mode UARTEx FIFO mode 88 * @brief UART FIFO mode 89 * @{ 90 */ 91 #define UART_FIFOMODE_DISABLE 0x00000000U /*!< FIFO mode disable */ 92 #define UART_FIFOMODE_ENABLE USART_CR1_FIFOEN /*!< FIFO mode enable */ 93 /** 94 * @} 95 */ 96 97 /** @defgroup UARTEx_TXFIFO_threshold_level UARTEx TXFIFO threshold level 98 * @brief UART TXFIFO threshold level 99 * @{ 100 */ 101 #define UART_TXFIFO_THRESHOLD_1_8 0x00000000U /*!< TX FIFO reaches 1/8 of its depth */ 102 #define UART_TXFIFO_THRESHOLD_1_4 USART_CR3_TXFTCFG_0 /*!< TX FIFO reaches 1/4 of its depth */ 103 #define UART_TXFIFO_THRESHOLD_1_2 USART_CR3_TXFTCFG_1 /*!< TX FIFO reaches 1/2 of its depth */ 104 #define UART_TXFIFO_THRESHOLD_3_4 (USART_CR3_TXFTCFG_0|USART_CR3_TXFTCFG_1) /*!< TX FIFO reaches 3/4 of its depth */ 105 #define UART_TXFIFO_THRESHOLD_7_8 USART_CR3_TXFTCFG_2 /*!< TX FIFO reaches 7/8 of its depth */ 106 #define UART_TXFIFO_THRESHOLD_8_8 (USART_CR3_TXFTCFG_2|USART_CR3_TXFTCFG_0) /*!< TX FIFO becomes empty */ 107 /** 108 * @} 109 */ 110 111 /** @defgroup UARTEx_RXFIFO_threshold_level UARTEx RXFIFO threshold level 112 * @brief UART RXFIFO threshold level 113 * @{ 114 */ 115 #define UART_RXFIFO_THRESHOLD_1_8 0x00000000U /*!< RX FIFO reaches 1/8 of its depth */ 116 #define UART_RXFIFO_THRESHOLD_1_4 USART_CR3_RXFTCFG_0 /*!< RX FIFO reaches 1/4 of its depth */ 117 #define UART_RXFIFO_THRESHOLD_1_2 USART_CR3_RXFTCFG_1 /*!< RX FIFO reaches 1/2 of its depth */ 118 #define UART_RXFIFO_THRESHOLD_3_4 (USART_CR3_RXFTCFG_0|USART_CR3_RXFTCFG_1) /*!< RX FIFO reaches 3/4 of its depth */ 119 #define UART_RXFIFO_THRESHOLD_7_8 USART_CR3_RXFTCFG_2 /*!< RX FIFO reaches 7/8 of its depth */ 120 #define UART_RXFIFO_THRESHOLD_8_8 (USART_CR3_RXFTCFG_2|USART_CR3_RXFTCFG_0) /*!< RX FIFO becomes full */ 121 /** 122 * @} 123 */ 124 125 /** 126 * @} 127 */ 128 129 /* Exported macros -----------------------------------------------------------*/ 130 /* Exported functions --------------------------------------------------------*/ 131 /** @addtogroup UARTEx_Exported_Functions 132 * @{ 133 */ 134 135 /** @addtogroup UARTEx_Exported_Functions_Group1 136 * @{ 137 */ 138 139 /* Initialization and de-initialization functions ****************************/ 140 HAL_StatusTypeDef HAL_RS485Ex_Init(UART_HandleTypeDef *huart, uint32_t Polarity, uint32_t AssertionTime, 141 uint32_t DeassertionTime); 142 143 /** 144 * @} 145 */ 146 147 /** @addtogroup UARTEx_Exported_Functions_Group2 148 * @{ 149 */ 150 151 void HAL_UARTEx_WakeupCallback(UART_HandleTypeDef *huart); 152 153 void HAL_UARTEx_RxFifoFullCallback(UART_HandleTypeDef *huart); 154 void HAL_UARTEx_TxFifoEmptyCallback(UART_HandleTypeDef *huart); 155 156 /** 157 * @} 158 */ 159 160 /** @addtogroup UARTEx_Exported_Functions_Group3 161 * @{ 162 */ 163 164 /* Peripheral Control functions **********************************************/ 165 HAL_StatusTypeDef HAL_UARTEx_StopModeWakeUpSourceConfig(UART_HandleTypeDef *huart, UART_WakeUpTypeDef WakeUpSelection); 166 HAL_StatusTypeDef HAL_UARTEx_EnableStopMode(UART_HandleTypeDef *huart); 167 HAL_StatusTypeDef HAL_UARTEx_DisableStopMode(UART_HandleTypeDef *huart); 168 169 HAL_StatusTypeDef HAL_MultiProcessorEx_AddressLength_Set(UART_HandleTypeDef *huart, uint32_t AddressLength); 170 171 HAL_StatusTypeDef HAL_UARTEx_EnableFifoMode(UART_HandleTypeDef *huart); 172 HAL_StatusTypeDef HAL_UARTEx_DisableFifoMode(UART_HandleTypeDef *huart); 173 HAL_StatusTypeDef HAL_UARTEx_SetTxFifoThreshold(UART_HandleTypeDef *huart, uint32_t Threshold); 174 HAL_StatusTypeDef HAL_UARTEx_SetRxFifoThreshold(UART_HandleTypeDef *huart, uint32_t Threshold); 175 176 HAL_StatusTypeDef HAL_UARTEx_ReceiveToIdle(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size, uint16_t *RxLen, 177 uint32_t Timeout); 178 HAL_StatusTypeDef HAL_UARTEx_ReceiveToIdle_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size); 179 #ifdef HAL_DMA_MODULE_ENABLED 180 HAL_StatusTypeDef HAL_UARTEx_ReceiveToIdle_DMA(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size); 181 #endif /* HAL_DMA_MODULE_ENABLED */ 182 HAL_UART_RxEventTypeTypeDef HAL_UARTEx_GetRxEventType(UART_HandleTypeDef *huart); 183 184 185 /** 186 * @} 187 */ 188 189 /** 190 * @} 191 */ 192 193 /* Private macros ------------------------------------------------------------*/ 194 /** @defgroup UARTEx_Private_Macros UARTEx Private Macros 195 * @{ 196 */ 197 198 /** @brief Report the UART clock source. 199 * @param __HANDLE__ specifies the UART Handle. 200 * @param __CLOCKSOURCE__ output variable. 201 * @retval UART clocking source, written in __CLOCKSOURCE__. 202 */ 203 #if (defined(STM32H573xx) || defined(STM32H563xx) || defined(STM32H562xx)) 204 #define UART_GETCLOCKSOURCE(__HANDLE__,__CLOCKSOURCE__) \ 205 do { \ 206 if((__HANDLE__)->Instance == USART1) \ 207 { \ 208 (__CLOCKSOURCE__) = (uint32_t)RCC_PERIPHCLK_USART1; \ 209 } \ 210 else if((__HANDLE__)->Instance == USART2) \ 211 { \ 212 (__CLOCKSOURCE__) = (uint32_t)RCC_PERIPHCLK_USART2; \ 213 } \ 214 else if((__HANDLE__)->Instance == USART3) \ 215 { \ 216 (__CLOCKSOURCE__) = (uint32_t)RCC_PERIPHCLK_USART3; \ 217 } \ 218 else if((__HANDLE__)->Instance == UART4) \ 219 { \ 220 (__CLOCKSOURCE__) = (uint32_t)RCC_PERIPHCLK_UART4; \ 221 } \ 222 else if((__HANDLE__)->Instance == UART5) \ 223 { \ 224 (__CLOCKSOURCE__) = (uint32_t)RCC_PERIPHCLK_UART5; \ 225 } \ 226 else if((__HANDLE__)->Instance == USART6) \ 227 { \ 228 (__CLOCKSOURCE__) = (uint32_t)RCC_PERIPHCLK_USART6; \ 229 } \ 230 else if((__HANDLE__)->Instance == UART7) \ 231 { \ 232 (__CLOCKSOURCE__) = (uint32_t)RCC_PERIPHCLK_UART7; \ 233 } \ 234 else if((__HANDLE__)->Instance == UART8) \ 235 { \ 236 (__CLOCKSOURCE__) = (uint32_t)RCC_PERIPHCLK_UART8; \ 237 } \ 238 else if((__HANDLE__)->Instance == UART9) \ 239 { \ 240 (__CLOCKSOURCE__) = (uint32_t)RCC_PERIPHCLK_UART9; \ 241 } \ 242 else if((__HANDLE__)->Instance == USART10) \ 243 { \ 244 (__CLOCKSOURCE__) = (uint32_t)RCC_PERIPHCLK_USART10; \ 245 } \ 246 else if((__HANDLE__)->Instance == USART11) \ 247 { \ 248 (__CLOCKSOURCE__) = (uint32_t)RCC_PERIPHCLK_USART11; \ 249 } \ 250 else if((__HANDLE__)->Instance == UART12) \ 251 { \ 252 (__CLOCKSOURCE__) = (uint32_t)RCC_PERIPHCLK_UART12; \ 253 } \ 254 else if((__HANDLE__)->Instance == LPUART1) \ 255 { \ 256 (__CLOCKSOURCE__) = (uint32_t)RCC_PERIPHCLK_LPUART1; \ 257 } \ 258 else \ 259 { \ 260 (__CLOCKSOURCE__) = 0U; \ 261 } \ 262 } while(0U) 263 #else 264 #define UART_GETCLOCKSOURCE(__HANDLE__,__CLOCKSOURCE__) \ 265 do { \ 266 if((__HANDLE__)->Instance == USART1) \ 267 { \ 268 (__CLOCKSOURCE__) = (uint32_t)RCC_PERIPHCLK_USART1; \ 269 } \ 270 else if((__HANDLE__)->Instance == USART2) \ 271 { \ 272 (__CLOCKSOURCE__) = (uint32_t)RCC_PERIPHCLK_USART2; \ 273 } \ 274 else if((__HANDLE__)->Instance == USART3) \ 275 { \ 276 (__CLOCKSOURCE__) = (uint32_t)RCC_PERIPHCLK_USART3; \ 277 } \ 278 else if((__HANDLE__)->Instance == LPUART1) \ 279 { \ 280 (__CLOCKSOURCE__) = (uint32_t)RCC_PERIPHCLK_LPUART1; \ 281 } \ 282 else \ 283 { \ 284 (__CLOCKSOURCE__) = 0U; \ 285 } \ 286 } while(0U) 287 #endif /* (defined(STM32H573xx) || defined(STM32H563xx) || defined(STM32H562xx) */ 288 289 290 /** @brief Report the UART mask to apply to retrieve the received data 291 * according to the word length and to the parity bits activation. 292 * @note If PCE = 1, the parity bit is not included in the data extracted 293 * by the reception API(). 294 * This masking operation is not carried out in the case of 295 * DMA transfers. 296 * @param __HANDLE__ specifies the UART Handle. 297 * @retval None, the mask to apply to UART RDR register is stored in (__HANDLE__)->Mask field. 298 */ 299 #define UART_MASK_COMPUTATION(__HANDLE__) \ 300 do { \ 301 if ((__HANDLE__)->Init.WordLength == UART_WORDLENGTH_9B) \ 302 { \ 303 if ((__HANDLE__)->Init.Parity == UART_PARITY_NONE) \ 304 { \ 305 (__HANDLE__)->Mask = 0x01FFU ; \ 306 } \ 307 else \ 308 { \ 309 (__HANDLE__)->Mask = 0x00FFU ; \ 310 } \ 311 } \ 312 else if ((__HANDLE__)->Init.WordLength == UART_WORDLENGTH_8B) \ 313 { \ 314 if ((__HANDLE__)->Init.Parity == UART_PARITY_NONE) \ 315 { \ 316 (__HANDLE__)->Mask = 0x00FFU ; \ 317 } \ 318 else \ 319 { \ 320 (__HANDLE__)->Mask = 0x007FU ; \ 321 } \ 322 } \ 323 else if ((__HANDLE__)->Init.WordLength == UART_WORDLENGTH_7B) \ 324 { \ 325 if ((__HANDLE__)->Init.Parity == UART_PARITY_NONE) \ 326 { \ 327 (__HANDLE__)->Mask = 0x007FU ; \ 328 } \ 329 else \ 330 { \ 331 (__HANDLE__)->Mask = 0x003FU ; \ 332 } \ 333 } \ 334 else \ 335 { \ 336 (__HANDLE__)->Mask = 0x0000U; \ 337 } \ 338 } while(0U) 339 340 /** 341 * @brief Ensure that UART frame length is valid. 342 * @param __LENGTH__ UART frame length. 343 * @retval SET (__LENGTH__ is valid) or RESET (__LENGTH__ is invalid) 344 */ 345 #define IS_UART_WORD_LENGTH(__LENGTH__) (((__LENGTH__) == UART_WORDLENGTH_7B) || \ 346 ((__LENGTH__) == UART_WORDLENGTH_8B) || \ 347 ((__LENGTH__) == UART_WORDLENGTH_9B)) 348 349 /** 350 * @brief Ensure that UART wake-up address length is valid. 351 * @param __ADDRESS__ UART wake-up address length. 352 * @retval SET (__ADDRESS__ is valid) or RESET (__ADDRESS__ is invalid) 353 */ 354 #define IS_UART_ADDRESSLENGTH_DETECT(__ADDRESS__) (((__ADDRESS__) == UART_ADDRESS_DETECT_4B) || \ 355 ((__ADDRESS__) == UART_ADDRESS_DETECT_7B)) 356 357 /** 358 * @brief Ensure that UART TXFIFO threshold level is valid. 359 * @param __THRESHOLD__ UART TXFIFO threshold level. 360 * @retval SET (__THRESHOLD__ is valid) or RESET (__THRESHOLD__ is invalid) 361 */ 362 #define IS_UART_TXFIFO_THRESHOLD(__THRESHOLD__) (((__THRESHOLD__) == UART_TXFIFO_THRESHOLD_1_8) || \ 363 ((__THRESHOLD__) == UART_TXFIFO_THRESHOLD_1_4) || \ 364 ((__THRESHOLD__) == UART_TXFIFO_THRESHOLD_1_2) || \ 365 ((__THRESHOLD__) == UART_TXFIFO_THRESHOLD_3_4) || \ 366 ((__THRESHOLD__) == UART_TXFIFO_THRESHOLD_7_8) || \ 367 ((__THRESHOLD__) == UART_TXFIFO_THRESHOLD_8_8)) 368 369 /** 370 * @brief Ensure that UART RXFIFO threshold level is valid. 371 * @param __THRESHOLD__ UART RXFIFO threshold level. 372 * @retval SET (__THRESHOLD__ is valid) or RESET (__THRESHOLD__ is invalid) 373 */ 374 #define IS_UART_RXFIFO_THRESHOLD(__THRESHOLD__) (((__THRESHOLD__) == UART_RXFIFO_THRESHOLD_1_8) || \ 375 ((__THRESHOLD__) == UART_RXFIFO_THRESHOLD_1_4) || \ 376 ((__THRESHOLD__) == UART_RXFIFO_THRESHOLD_1_2) || \ 377 ((__THRESHOLD__) == UART_RXFIFO_THRESHOLD_3_4) || \ 378 ((__THRESHOLD__) == UART_RXFIFO_THRESHOLD_7_8) || \ 379 ((__THRESHOLD__) == UART_RXFIFO_THRESHOLD_8_8)) 380 381 /** 382 * @} 383 */ 384 385 /* Private functions ---------------------------------------------------------*/ 386 387 /** 388 * @} 389 */ 390 391 /** 392 * @} 393 */ 394 395 #ifdef __cplusplus 396 } 397 #endif 398 399 #endif /* STM32H5xx_HAL_UART_EX_H */ 400 401
