1 /** 2 ****************************************************************************** 3 * @file stm32g0xx_hal_uart.h 4 * @author MCD Application Team 5 * @brief Header file of UART HAL module. 6 ****************************************************************************** 7 * @attention 8 * 9 * Copyright (c) 2018 STMicroelectronics. 10 * All rights reserved. 11 * 12 * This software is licensed under terms that can be found in the LICENSE file 13 * in the root directory of this software component. 14 * If no LICENSE file comes with this software, it is provided AS-IS. 15 * 16 ****************************************************************************** 17 */ 18 19 /* Define to prevent recursive inclusion -------------------------------------*/ 20 #ifndef STM32G0xx_HAL_UART_H 21 #define STM32G0xx_HAL_UART_H 22 23 #ifdef __cplusplus 24 extern "C" { 25 #endif 26 27 /* Includes ------------------------------------------------------------------*/ 28 #include "stm32g0xx_hal_def.h" 29 30 /** @addtogroup STM32G0xx_HAL_Driver 31 * @{ 32 */ 33 34 /** @addtogroup UART 35 * @{ 36 */ 37 38 /* Exported types ------------------------------------------------------------*/ 39 /** @defgroup UART_Exported_Types UART Exported Types 40 * @{ 41 */ 42 43 /** 44 * @brief UART Init Structure definition 45 */ 46 typedef struct 47 { 48 uint32_t BaudRate; /*!< This member configures the UART communication baud rate. 49 The baud rate register is computed using the following formula: 50 LPUART: 51 ======= 52 Baud Rate Register = ((256 * lpuart_ker_ckpres) / ((huart->Init.BaudRate))) 53 where lpuart_ker_ck_pres is the UART input clock divided by a prescaler 54 UART: 55 ===== 56 - If oversampling is 16 or in LIN mode, 57 Baud Rate Register = ((uart_ker_ckpres) / ((huart->Init.BaudRate))) 58 - If oversampling is 8, 59 Baud Rate Register[15:4] = ((2 * uart_ker_ckpres) / 60 ((huart->Init.BaudRate)))[15:4] 61 Baud Rate Register[3] = 0 62 Baud Rate Register[2:0] = (((2 * uart_ker_ckpres) / 63 ((huart->Init.BaudRate)))[3:0]) >> 1 64 where uart_ker_ck_pres is the UART input clock divided by a prescaler */ 65 66 uint32_t WordLength; /*!< Specifies the number of data bits transmitted or received in a frame. 67 This parameter can be a value of @ref UARTEx_Word_Length. */ 68 69 uint32_t StopBits; /*!< Specifies the number of stop bits transmitted. 70 This parameter can be a value of @ref UART_Stop_Bits. */ 71 72 uint32_t Parity; /*!< Specifies the parity mode. 73 This parameter can be a value of @ref UART_Parity 74 @note When parity is enabled, the computed parity is inserted 75 at the MSB position of the transmitted data (9th bit when 76 the word length is set to 9 data bits; 8th bit when the 77 word length is set to 8 data bits). */ 78 79 uint32_t Mode; /*!< Specifies whether the Receive or Transmit mode is enabled or disabled. 80 This parameter can be a value of @ref UART_Mode. */ 81 82 uint32_t HwFlowCtl; /*!< Specifies whether the hardware flow control mode is enabled 83 or disabled. 84 This parameter can be a value of @ref UART_Hardware_Flow_Control. */ 85 86 uint32_t OverSampling; /*!< Specifies whether the Over sampling 8 is enabled or disabled, 87 to achieve higher speed (up to f_PCLK/8). 88 This parameter can be a value of @ref UART_Over_Sampling. */ 89 90 uint32_t OneBitSampling; /*!< Specifies whether a single sample or three samples' majority vote is selected. 91 Selecting the single sample method increases the receiver tolerance to clock 92 deviations. This parameter can be a value of @ref UART_OneBit_Sampling. */ 93 94 uint32_t ClockPrescaler; /*!< Specifies the prescaler value used to divide the UART clock source. 95 This parameter can be a value of @ref UART_ClockPrescaler. */ 96 97 } UART_InitTypeDef; 98 99 /** 100 * @brief UART Advanced Features initialization structure definition 101 */ 102 typedef struct 103 { 104 uint32_t AdvFeatureInit; /*!< Specifies which advanced UART features is initialized. Several 105 Advanced Features may be initialized at the same time . 106 This parameter can be a value of 107 @ref UART_Advanced_Features_Initialization_Type. */ 108 109 uint32_t TxPinLevelInvert; /*!< Specifies whether the TX pin active level is inverted. 110 This parameter can be a value of @ref UART_Tx_Inv. */ 111 112 uint32_t RxPinLevelInvert; /*!< Specifies whether the RX pin active level is inverted. 113 This parameter can be a value of @ref UART_Rx_Inv. */ 114 115 uint32_t DataInvert; /*!< Specifies whether data are inverted (positive/direct logic 116 vs negative/inverted logic). 117 This parameter can be a value of @ref UART_Data_Inv. */ 118 119 uint32_t Swap; /*!< Specifies whether TX and RX pins are swapped. 120 This parameter can be a value of @ref UART_Rx_Tx_Swap. */ 121 122 uint32_t OverrunDisable; /*!< Specifies whether the reception overrun detection is disabled. 123 This parameter can be a value of @ref UART_Overrun_Disable. */ 124 125 uint32_t DMADisableonRxError; /*!< Specifies whether the DMA is disabled in case of reception error. 126 This parameter can be a value of @ref UART_DMA_Disable_on_Rx_Error. */ 127 128 uint32_t AutoBaudRateEnable; /*!< Specifies whether auto Baud rate detection is enabled. 129 This parameter can be a value of @ref UART_AutoBaudRate_Enable. */ 130 131 uint32_t AutoBaudRateMode; /*!< If auto Baud rate detection is enabled, specifies how the rate 132 detection is carried out. 133 This parameter can be a value of @ref UART_AutoBaud_Rate_Mode. */ 134 135 uint32_t MSBFirst; /*!< Specifies whether MSB is sent first on UART line. 136 This parameter can be a value of @ref UART_MSB_First. */ 137 } UART_AdvFeatureInitTypeDef; 138 139 /** 140 * @brief HAL UART State definition 141 * @note HAL UART State value is a combination of 2 different substates: 142 * gState and RxState (see @ref UART_State_Definition). 143 * - gState contains UART state information related to global Handle management 144 * and also information related to Tx operations. 145 * gState value coding follow below described bitmap : 146 * b7-b6 Error information 147 * 00 : No Error 148 * 01 : (Not Used) 149 * 10 : Timeout 150 * 11 : Error 151 * b5 Peripheral initialization status 152 * 0 : Reset (Peripheral not initialized) 153 * 1 : Init done (Peripheral initialized. HAL UART Init function already called) 154 * b4-b3 (not used) 155 * xx : Should be set to 00 156 * b2 Intrinsic process state 157 * 0 : Ready 158 * 1 : Busy (Peripheral busy with some configuration or internal operations) 159 * b1 (not used) 160 * x : Should be set to 0 161 * b0 Tx state 162 * 0 : Ready (no Tx operation ongoing) 163 * 1 : Busy (Tx operation ongoing) 164 * - RxState contains information related to Rx operations. 165 * RxState value coding follow below described bitmap : 166 * b7-b6 (not used) 167 * xx : Should be set to 00 168 * b5 Peripheral initialization status 169 * 0 : Reset (Peripheral not initialized) 170 * 1 : Init done (Peripheral initialized) 171 * b4-b2 (not used) 172 * xxx : Should be set to 000 173 * b1 Rx state 174 * 0 : Ready (no Rx operation ongoing) 175 * 1 : Busy (Rx operation ongoing) 176 * b0 (not used) 177 * x : Should be set to 0. 178 */ 179 typedef uint32_t HAL_UART_StateTypeDef; 180 181 /** 182 * @brief UART clock sources definition 183 */ 184 typedef enum 185 { 186 UART_CLOCKSOURCE_PCLK1 = 0x00U, /*!< PCLK1 clock source */ 187 UART_CLOCKSOURCE_HSI = 0x02U, /*!< HSI clock source */ 188 UART_CLOCKSOURCE_SYSCLK = 0x04U, /*!< SYSCLK clock source */ 189 UART_CLOCKSOURCE_LSE = 0x08U, /*!< LSE clock source */ 190 UART_CLOCKSOURCE_UNDEFINED = 0x10U /*!< Undefined clock source */ 191 } UART_ClockSourceTypeDef; 192 193 /** 194 * @brief HAL UART Reception type definition 195 * @note HAL UART Reception type value aims to identify which type of Reception is ongoing. 196 * This parameter can be a value of @ref UART_Reception_Type_Values : 197 * HAL_UART_RECEPTION_STANDARD = 0x00U, 198 * HAL_UART_RECEPTION_TOIDLE = 0x01U, 199 * HAL_UART_RECEPTION_TORTO = 0x02U, 200 * HAL_UART_RECEPTION_TOCHARMATCH = 0x03U, 201 */ 202 typedef uint32_t HAL_UART_RxTypeTypeDef; 203 204 /** 205 * @brief HAL UART Rx Event type definition 206 * @note HAL UART Rx Event type value aims to identify which type of Event has occurred 207 * leading to call of the RxEvent callback. 208 * This parameter can be a value of @ref UART_RxEvent_Type_Values : 209 * HAL_UART_RXEVENT_TC = 0x00U, 210 * HAL_UART_RXEVENT_HT = 0x01U, 211 * HAL_UART_RXEVENT_IDLE = 0x02U, 212 */ 213 typedef uint32_t HAL_UART_RxEventTypeTypeDef; 214 215 /** 216 * @brief UART handle Structure definition 217 */ 218 typedef struct __UART_HandleTypeDef 219 { 220 USART_TypeDef *Instance; /*!< UART registers base address */ 221 222 UART_InitTypeDef Init; /*!< UART communication parameters */ 223 224 UART_AdvFeatureInitTypeDef AdvancedInit; /*!< UART Advanced Features initialization parameters */ 225 226 const uint8_t *pTxBuffPtr; /*!< Pointer to UART Tx transfer Buffer */ 227 228 uint16_t TxXferSize; /*!< UART Tx Transfer size */ 229 230 __IO uint16_t TxXferCount; /*!< UART Tx Transfer Counter */ 231 232 uint8_t *pRxBuffPtr; /*!< Pointer to UART Rx transfer Buffer */ 233 234 uint16_t RxXferSize; /*!< UART Rx Transfer size */ 235 236 __IO uint16_t RxXferCount; /*!< UART Rx Transfer Counter */ 237 238 uint16_t Mask; /*!< UART Rx RDR register mask */ 239 240 uint32_t FifoMode; /*!< Specifies if the FIFO mode is being used. 241 This parameter can be a value of @ref UARTEx_FIFO_mode. */ 242 243 uint16_t NbRxDataToProcess; /*!< Number of data to process during RX ISR execution */ 244 245 uint16_t NbTxDataToProcess; /*!< Number of data to process during TX ISR execution */ 246 247 __IO HAL_UART_RxTypeTypeDef ReceptionType; /*!< Type of ongoing reception */ 248 249 __IO HAL_UART_RxEventTypeTypeDef RxEventType; /*!< Type of Rx Event */ 250 251 void (*RxISR)(struct __UART_HandleTypeDef *huart); /*!< Function pointer on Rx IRQ handler */ 252 253 void (*TxISR)(struct __UART_HandleTypeDef *huart); /*!< Function pointer on Tx IRQ handler */ 254 255 DMA_HandleTypeDef *hdmatx; /*!< UART Tx DMA Handle parameters */ 256 257 DMA_HandleTypeDef *hdmarx; /*!< UART Rx DMA Handle parameters */ 258 259 HAL_LockTypeDef Lock; /*!< Locking object */ 260 261 __IO HAL_UART_StateTypeDef gState; /*!< UART state information related to global Handle management 262 and also related to Tx operations. This parameter 263 can be a value of @ref HAL_UART_StateTypeDef */ 264 265 __IO HAL_UART_StateTypeDef RxState; /*!< UART state information related to Rx operations. This 266 parameter can be a value of @ref HAL_UART_StateTypeDef */ 267 268 __IO uint32_t ErrorCode; /*!< UART Error code */ 269 270 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) 271 void (* TxHalfCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Tx Half Complete Callback */ 272 void (* TxCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Tx Complete Callback */ 273 void (* RxHalfCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Rx Half Complete Callback */ 274 void (* RxCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Rx Complete Callback */ 275 void (* ErrorCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Error Callback */ 276 void (* AbortCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Abort Complete Callback */ 277 void (* AbortTransmitCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Abort Transmit Complete Callback */ 278 void (* AbortReceiveCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Abort Receive Complete Callback */ 279 void (* WakeupCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Wakeup Callback */ 280 void (* RxFifoFullCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Rx Fifo Full Callback */ 281 void (* TxFifoEmptyCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Tx Fifo Empty Callback */ 282 void (* RxEventCallback)(struct __UART_HandleTypeDef *huart, uint16_t Pos); /*!< UART Reception Event Callback */ 283 284 void (* MspInitCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Msp Init callback */ 285 void (* MspDeInitCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Msp DeInit callback */ 286 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ 287 288 } UART_HandleTypeDef; 289 290 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) 291 /** 292 * @brief HAL UART Callback ID enumeration definition 293 */ 294 typedef enum 295 { 296 HAL_UART_TX_HALFCOMPLETE_CB_ID = 0x00U, /*!< UART Tx Half Complete Callback ID */ 297 HAL_UART_TX_COMPLETE_CB_ID = 0x01U, /*!< UART Tx Complete Callback ID */ 298 HAL_UART_RX_HALFCOMPLETE_CB_ID = 0x02U, /*!< UART Rx Half Complete Callback ID */ 299 HAL_UART_RX_COMPLETE_CB_ID = 0x03U, /*!< UART Rx Complete Callback ID */ 300 HAL_UART_ERROR_CB_ID = 0x04U, /*!< UART Error Callback ID */ 301 HAL_UART_ABORT_COMPLETE_CB_ID = 0x05U, /*!< UART Abort Complete Callback ID */ 302 HAL_UART_ABORT_TRANSMIT_COMPLETE_CB_ID = 0x06U, /*!< UART Abort Transmit Complete Callback ID */ 303 HAL_UART_ABORT_RECEIVE_COMPLETE_CB_ID = 0x07U, /*!< UART Abort Receive Complete Callback ID */ 304 HAL_UART_WAKEUP_CB_ID = 0x08U, /*!< UART Wakeup Callback ID */ 305 HAL_UART_RX_FIFO_FULL_CB_ID = 0x09U, /*!< UART Rx Fifo Full Callback ID */ 306 HAL_UART_TX_FIFO_EMPTY_CB_ID = 0x0AU, /*!< UART Tx Fifo Empty Callback ID */ 307 308 HAL_UART_MSPINIT_CB_ID = 0x0BU, /*!< UART MspInit callback ID */ 309 HAL_UART_MSPDEINIT_CB_ID = 0x0CU /*!< UART MspDeInit callback ID */ 310 311 } HAL_UART_CallbackIDTypeDef; 312 313 /** 314 * @brief HAL UART Callback pointer definition 315 */ 316 typedef void (*pUART_CallbackTypeDef)(UART_HandleTypeDef *huart); /*!< pointer to an UART callback function */ 317 typedef void (*pUART_RxEventCallbackTypeDef) 318 (struct __UART_HandleTypeDef *huart, uint16_t Pos); /*!< pointer to a UART Rx Event specific callback function */ 319 320 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ 321 322 /** 323 * @} 324 */ 325 326 /* Exported constants --------------------------------------------------------*/ 327 /** @defgroup UART_Exported_Constants UART Exported Constants 328 * @{ 329 */ 330 331 /** @defgroup UART_State_Definition UART State Code Definition 332 * @{ 333 */ 334 #define HAL_UART_STATE_RESET 0x00000000U /*!< Peripheral is not initialized 335 Value is allowed for gState and RxState */ 336 #define HAL_UART_STATE_READY 0x00000020U /*!< Peripheral Initialized and ready for use 337 Value is allowed for gState and RxState */ 338 #define HAL_UART_STATE_BUSY 0x00000024U /*!< an internal process is ongoing 339 Value is allowed for gState only */ 340 #define HAL_UART_STATE_BUSY_TX 0x00000021U /*!< Data Transmission process is ongoing 341 Value is allowed for gState only */ 342 #define HAL_UART_STATE_BUSY_RX 0x00000022U /*!< Data Reception process is ongoing 343 Value is allowed for RxState only */ 344 #define HAL_UART_STATE_BUSY_TX_RX 0x00000023U /*!< Data Transmission and Reception process is ongoing 345 Not to be used for neither gState nor RxState.Value is result 346 of combination (Or) between gState and RxState values */ 347 #define HAL_UART_STATE_TIMEOUT 0x000000A0U /*!< Timeout state 348 Value is allowed for gState only */ 349 #define HAL_UART_STATE_ERROR 0x000000E0U /*!< Error 350 Value is allowed for gState only */ 351 /** 352 * @} 353 */ 354 355 /** @defgroup UART_Error_Definition UART Error Definition 356 * @{ 357 */ 358 #define HAL_UART_ERROR_NONE (0x00000000U) /*!< No error */ 359 #define HAL_UART_ERROR_PE (0x00000001U) /*!< Parity error */ 360 #define HAL_UART_ERROR_NE (0x00000002U) /*!< Noise error */ 361 #define HAL_UART_ERROR_FE (0x00000004U) /*!< Frame error */ 362 #define HAL_UART_ERROR_ORE (0x00000008U) /*!< Overrun error */ 363 #define HAL_UART_ERROR_DMA (0x00000010U) /*!< DMA transfer error */ 364 #define HAL_UART_ERROR_RTO (0x00000020U) /*!< Receiver Timeout error */ 365 366 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) 367 #define HAL_UART_ERROR_INVALID_CALLBACK (0x00000040U) /*!< Invalid Callback error */ 368 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ 369 /** 370 * @} 371 */ 372 373 /** @defgroup UART_Stop_Bits UART Number of Stop Bits 374 * @{ 375 */ 376 #define UART_STOPBITS_0_5 USART_CR2_STOP_0 /*!< UART frame with 0.5 stop bit */ 377 #define UART_STOPBITS_1 0x00000000U /*!< UART frame with 1 stop bit */ 378 #define UART_STOPBITS_1_5 (USART_CR2_STOP_0 | USART_CR2_STOP_1) /*!< UART frame with 1.5 stop bits */ 379 #define UART_STOPBITS_2 USART_CR2_STOP_1 /*!< UART frame with 2 stop bits */ 380 /** 381 * @} 382 */ 383 384 /** @defgroup UART_Parity UART Parity 385 * @{ 386 */ 387 #define UART_PARITY_NONE 0x00000000U /*!< No parity */ 388 #define UART_PARITY_EVEN USART_CR1_PCE /*!< Even parity */ 389 #define UART_PARITY_ODD (USART_CR1_PCE | USART_CR1_PS) /*!< Odd parity */ 390 /** 391 * @} 392 */ 393 394 /** @defgroup UART_Hardware_Flow_Control UART Hardware Flow Control 395 * @{ 396 */ 397 #define UART_HWCONTROL_NONE 0x00000000U /*!< No hardware control */ 398 #define UART_HWCONTROL_RTS USART_CR3_RTSE /*!< Request To Send */ 399 #define UART_HWCONTROL_CTS USART_CR3_CTSE /*!< Clear To Send */ 400 #define UART_HWCONTROL_RTS_CTS (USART_CR3_RTSE | USART_CR3_CTSE) /*!< Request and Clear To Send */ 401 /** 402 * @} 403 */ 404 405 /** @defgroup UART_Mode UART Transfer Mode 406 * @{ 407 */ 408 #define UART_MODE_RX USART_CR1_RE /*!< RX mode */ 409 #define UART_MODE_TX USART_CR1_TE /*!< TX mode */ 410 #define UART_MODE_TX_RX (USART_CR1_TE |USART_CR1_RE) /*!< RX and TX mode */ 411 /** 412 * @} 413 */ 414 415 /** @defgroup UART_State UART State 416 * @{ 417 */ 418 #define UART_STATE_DISABLE 0x00000000U /*!< UART disabled */ 419 #define UART_STATE_ENABLE USART_CR1_UE /*!< UART enabled */ 420 /** 421 * @} 422 */ 423 424 /** @defgroup UART_Over_Sampling UART Over Sampling 425 * @{ 426 */ 427 #define UART_OVERSAMPLING_16 0x00000000U /*!< Oversampling by 16 */ 428 #define UART_OVERSAMPLING_8 USART_CR1_OVER8 /*!< Oversampling by 8 */ 429 /** 430 * @} 431 */ 432 433 /** @defgroup UART_OneBit_Sampling UART One Bit Sampling Method 434 * @{ 435 */ 436 #define UART_ONE_BIT_SAMPLE_DISABLE 0x00000000U /*!< One-bit sampling disable */ 437 #define UART_ONE_BIT_SAMPLE_ENABLE USART_CR3_ONEBIT /*!< One-bit sampling enable */ 438 /** 439 * @} 440 */ 441 442 /** @defgroup UART_ClockPrescaler UART Clock Prescaler 443 * @{ 444 */ 445 #define UART_PRESCALER_DIV1 0x00000000U /*!< fclk_pres = fclk */ 446 #define UART_PRESCALER_DIV2 0x00000001U /*!< fclk_pres = fclk/2 */ 447 #define UART_PRESCALER_DIV4 0x00000002U /*!< fclk_pres = fclk/4 */ 448 #define UART_PRESCALER_DIV6 0x00000003U /*!< fclk_pres = fclk/6 */ 449 #define UART_PRESCALER_DIV8 0x00000004U /*!< fclk_pres = fclk/8 */ 450 #define UART_PRESCALER_DIV10 0x00000005U /*!< fclk_pres = fclk/10 */ 451 #define UART_PRESCALER_DIV12 0x00000006U /*!< fclk_pres = fclk/12 */ 452 #define UART_PRESCALER_DIV16 0x00000007U /*!< fclk_pres = fclk/16 */ 453 #define UART_PRESCALER_DIV32 0x00000008U /*!< fclk_pres = fclk/32 */ 454 #define UART_PRESCALER_DIV64 0x00000009U /*!< fclk_pres = fclk/64 */ 455 #define UART_PRESCALER_DIV128 0x0000000AU /*!< fclk_pres = fclk/128 */ 456 #define UART_PRESCALER_DIV256 0x0000000BU /*!< fclk_pres = fclk/256 */ 457 /** 458 * @} 459 */ 460 461 /** @defgroup UART_AutoBaud_Rate_Mode UART Advanced Feature AutoBaud Rate Mode 462 * @{ 463 */ 464 #define UART_ADVFEATURE_AUTOBAUDRATE_ONSTARTBIT 0x00000000U /*!< Auto Baud rate detection 465 on start bit */ 466 #define UART_ADVFEATURE_AUTOBAUDRATE_ONFALLINGEDGE USART_CR2_ABRMODE_0 /*!< Auto Baud rate detection 467 on falling edge */ 468 #define UART_ADVFEATURE_AUTOBAUDRATE_ON0X7FFRAME USART_CR2_ABRMODE_1 /*!< Auto Baud rate detection 469 on 0x7F frame detection */ 470 #define UART_ADVFEATURE_AUTOBAUDRATE_ON0X55FRAME USART_CR2_ABRMODE /*!< Auto Baud rate detection 471 on 0x55 frame detection */ 472 /** 473 * @} 474 */ 475 476 /** @defgroup UART_Receiver_Timeout UART Receiver Timeout 477 * @{ 478 */ 479 #define UART_RECEIVER_TIMEOUT_DISABLE 0x00000000U /*!< UART Receiver Timeout disable */ 480 #define UART_RECEIVER_TIMEOUT_ENABLE USART_CR2_RTOEN /*!< UART Receiver Timeout enable */ 481 /** 482 * @} 483 */ 484 485 /** @defgroup UART_LIN UART Local Interconnection Network mode 486 * @{ 487 */ 488 #define UART_LIN_DISABLE 0x00000000U /*!< Local Interconnect Network disable */ 489 #define UART_LIN_ENABLE USART_CR2_LINEN /*!< Local Interconnect Network enable */ 490 /** 491 * @} 492 */ 493 494 /** @defgroup UART_LIN_Break_Detection UART LIN Break Detection 495 * @{ 496 */ 497 #define UART_LINBREAKDETECTLENGTH_10B 0x00000000U /*!< LIN 10-bit break detection length */ 498 #define UART_LINBREAKDETECTLENGTH_11B USART_CR2_LBDL /*!< LIN 11-bit break detection length */ 499 /** 500 * @} 501 */ 502 503 /** @defgroup UART_DMA_Tx UART DMA Tx 504 * @{ 505 */ 506 #define UART_DMA_TX_DISABLE 0x00000000U /*!< UART DMA TX disabled */ 507 #define UART_DMA_TX_ENABLE USART_CR3_DMAT /*!< UART DMA TX enabled */ 508 /** 509 * @} 510 */ 511 512 /** @defgroup UART_DMA_Rx UART DMA Rx 513 * @{ 514 */ 515 #define UART_DMA_RX_DISABLE 0x00000000U /*!< UART DMA RX disabled */ 516 #define UART_DMA_RX_ENABLE USART_CR3_DMAR /*!< UART DMA RX enabled */ 517 /** 518 * @} 519 */ 520 521 /** @defgroup UART_Half_Duplex_Selection UART Half Duplex Selection 522 * @{ 523 */ 524 #define UART_HALF_DUPLEX_DISABLE 0x00000000U /*!< UART half-duplex disabled */ 525 #define UART_HALF_DUPLEX_ENABLE USART_CR3_HDSEL /*!< UART half-duplex enabled */ 526 /** 527 * @} 528 */ 529 530 /** @defgroup UART_WakeUp_Methods UART WakeUp Methods 531 * @{ 532 */ 533 #define UART_WAKEUPMETHOD_IDLELINE 0x00000000U /*!< UART wake-up on idle line */ 534 #define UART_WAKEUPMETHOD_ADDRESSMARK USART_CR1_WAKE /*!< UART wake-up on address mark */ 535 /** 536 * @} 537 */ 538 539 /** @defgroup UART_Request_Parameters UART Request Parameters 540 * @{ 541 */ 542 #define UART_AUTOBAUD_REQUEST USART_RQR_ABRRQ /*!< Auto-Baud Rate Request */ 543 #define UART_SENDBREAK_REQUEST USART_RQR_SBKRQ /*!< Send Break Request */ 544 #define UART_MUTE_MODE_REQUEST USART_RQR_MMRQ /*!< Mute Mode Request */ 545 #define UART_RXDATA_FLUSH_REQUEST USART_RQR_RXFRQ /*!< Receive Data flush Request */ 546 #define UART_TXDATA_FLUSH_REQUEST USART_RQR_TXFRQ /*!< Transmit data flush Request */ 547 /** 548 * @} 549 */ 550 551 /** @defgroup UART_Advanced_Features_Initialization_Type UART Advanced Feature Initialization Type 552 * @{ 553 */ 554 #define UART_ADVFEATURE_NO_INIT 0x00000000U /*!< No advanced feature initialization */ 555 #define UART_ADVFEATURE_TXINVERT_INIT 0x00000001U /*!< TX pin active level inversion */ 556 #define UART_ADVFEATURE_RXINVERT_INIT 0x00000002U /*!< RX pin active level inversion */ 557 #define UART_ADVFEATURE_DATAINVERT_INIT 0x00000004U /*!< Binary data inversion */ 558 #define UART_ADVFEATURE_SWAP_INIT 0x00000008U /*!< TX/RX pins swap */ 559 #define UART_ADVFEATURE_RXOVERRUNDISABLE_INIT 0x00000010U /*!< RX overrun disable */ 560 #define UART_ADVFEATURE_DMADISABLEONERROR_INIT 0x00000020U /*!< DMA disable on Reception Error */ 561 #define UART_ADVFEATURE_AUTOBAUDRATE_INIT 0x00000040U /*!< Auto Baud rate detection initialization */ 562 #define UART_ADVFEATURE_MSBFIRST_INIT 0x00000080U /*!< Most significant bit sent/received first */ 563 /** 564 * @} 565 */ 566 567 /** @defgroup UART_Tx_Inv UART Advanced Feature TX Pin Active Level Inversion 568 * @{ 569 */ 570 #define UART_ADVFEATURE_TXINV_DISABLE 0x00000000U /*!< TX pin active level inversion disable */ 571 #define UART_ADVFEATURE_TXINV_ENABLE USART_CR2_TXINV /*!< TX pin active level inversion enable */ 572 /** 573 * @} 574 */ 575 576 /** @defgroup UART_Rx_Inv UART Advanced Feature RX Pin Active Level Inversion 577 * @{ 578 */ 579 #define UART_ADVFEATURE_RXINV_DISABLE 0x00000000U /*!< RX pin active level inversion disable */ 580 #define UART_ADVFEATURE_RXINV_ENABLE USART_CR2_RXINV /*!< RX pin active level inversion enable */ 581 /** 582 * @} 583 */ 584 585 /** @defgroup UART_Data_Inv UART Advanced Feature Binary Data Inversion 586 * @{ 587 */ 588 #define UART_ADVFEATURE_DATAINV_DISABLE 0x00000000U /*!< Binary data inversion disable */ 589 #define UART_ADVFEATURE_DATAINV_ENABLE USART_CR2_DATAINV /*!< Binary data inversion enable */ 590 /** 591 * @} 592 */ 593 594 /** @defgroup UART_Rx_Tx_Swap UART Advanced Feature RX TX Pins Swap 595 * @{ 596 */ 597 #define UART_ADVFEATURE_SWAP_DISABLE 0x00000000U /*!< TX/RX pins swap disable */ 598 #define UART_ADVFEATURE_SWAP_ENABLE USART_CR2_SWAP /*!< TX/RX pins swap enable */ 599 /** 600 * @} 601 */ 602 603 /** @defgroup UART_Overrun_Disable UART Advanced Feature Overrun Disable 604 * @{ 605 */ 606 #define UART_ADVFEATURE_OVERRUN_ENABLE 0x00000000U /*!< RX overrun enable */ 607 #define UART_ADVFEATURE_OVERRUN_DISABLE USART_CR3_OVRDIS /*!< RX overrun disable */ 608 /** 609 * @} 610 */ 611 612 /** @defgroup UART_AutoBaudRate_Enable UART Advanced Feature Auto BaudRate Enable 613 * @{ 614 */ 615 #define UART_ADVFEATURE_AUTOBAUDRATE_DISABLE 0x00000000U /*!< RX Auto Baud rate detection enable */ 616 #define UART_ADVFEATURE_AUTOBAUDRATE_ENABLE USART_CR2_ABREN /*!< RX Auto Baud rate detection disable */ 617 /** 618 * @} 619 */ 620 621 /** @defgroup UART_DMA_Disable_on_Rx_Error UART Advanced Feature DMA Disable On Rx Error 622 * @{ 623 */ 624 #define UART_ADVFEATURE_DMA_ENABLEONRXERROR 0x00000000U /*!< DMA enable on Reception Error */ 625 #define UART_ADVFEATURE_DMA_DISABLEONRXERROR USART_CR3_DDRE /*!< DMA disable on Reception Error */ 626 /** 627 * @} 628 */ 629 630 /** @defgroup UART_MSB_First UART Advanced Feature MSB First 631 * @{ 632 */ 633 #define UART_ADVFEATURE_MSBFIRST_DISABLE 0x00000000U /*!< Most significant bit sent/received 634 first disable */ 635 #define UART_ADVFEATURE_MSBFIRST_ENABLE USART_CR2_MSBFIRST /*!< Most significant bit sent/received 636 first enable */ 637 /** 638 * @} 639 */ 640 641 /** @defgroup UART_Stop_Mode_Enable UART Advanced Feature Stop Mode Enable 642 * @{ 643 */ 644 #define UART_ADVFEATURE_STOPMODE_DISABLE 0x00000000U /*!< UART stop mode disable */ 645 #define UART_ADVFEATURE_STOPMODE_ENABLE USART_CR1_UESM /*!< UART stop mode enable */ 646 /** 647 * @} 648 */ 649 650 /** @defgroup UART_Mute_Mode UART Advanced Feature Mute Mode Enable 651 * @{ 652 */ 653 #define UART_ADVFEATURE_MUTEMODE_DISABLE 0x00000000U /*!< UART mute mode disable */ 654 #define UART_ADVFEATURE_MUTEMODE_ENABLE USART_CR1_MME /*!< UART mute mode enable */ 655 /** 656 * @} 657 */ 658 659 /** @defgroup UART_CR2_ADDRESS_LSB_POS UART Address-matching LSB Position In CR2 Register 660 * @{ 661 */ 662 #define UART_CR2_ADDRESS_LSB_POS 24U /*!< UART address-matching LSB position in CR2 register */ 663 /** 664 * @} 665 */ 666 667 /** @defgroup UART_WakeUp_from_Stop_Selection UART WakeUp From Stop Selection 668 * @{ 669 */ 670 #define UART_WAKEUP_ON_ADDRESS 0x00000000U /*!< UART wake-up on address */ 671 #define UART_WAKEUP_ON_STARTBIT USART_CR3_WUS_1 /*!< UART wake-up on start bit */ 672 #define UART_WAKEUP_ON_READDATA_NONEMPTY USART_CR3_WUS /*!< UART wake-up on receive data register 673 not empty or RXFIFO is not empty */ 674 /** 675 * @} 676 */ 677 678 /** @defgroup UART_DriverEnable_Polarity UART DriverEnable Polarity 679 * @{ 680 */ 681 #define UART_DE_POLARITY_HIGH 0x00000000U /*!< Driver enable signal is active high */ 682 #define UART_DE_POLARITY_LOW USART_CR3_DEP /*!< Driver enable signal is active low */ 683 /** 684 * @} 685 */ 686 687 /** @defgroup UART_CR1_DEAT_ADDRESS_LSB_POS UART Driver Enable Assertion Time LSB Position In CR1 Register 688 * @{ 689 */ 690 #define UART_CR1_DEAT_ADDRESS_LSB_POS 21U /*!< UART Driver Enable assertion time LSB 691 position in CR1 register */ 692 /** 693 * @} 694 */ 695 696 /** @defgroup UART_CR1_DEDT_ADDRESS_LSB_POS UART Driver Enable DeAssertion Time LSB Position In CR1 Register 697 * @{ 698 */ 699 #define UART_CR1_DEDT_ADDRESS_LSB_POS 16U /*!< UART Driver Enable de-assertion time LSB 700 position in CR1 register */ 701 /** 702 * @} 703 */ 704 705 /** @defgroup UART_Interruption_Mask UART Interruptions Flag Mask 706 * @{ 707 */ 708 #define UART_IT_MASK 0x001FU /*!< UART interruptions flags mask */ 709 /** 710 * @} 711 */ 712 713 /** @defgroup UART_TimeOut_Value UART polling-based communications time-out value 714 * @{ 715 */ 716 #define HAL_UART_TIMEOUT_VALUE 0x1FFFFFFU /*!< UART polling-based communications time-out value */ 717 /** 718 * @} 719 */ 720 721 /** @defgroup UART_Flags UART Status Flags 722 * Elements values convention: 0xXXXX 723 * - 0xXXXX : Flag mask in the ISR register 724 * @{ 725 */ 726 #define UART_FLAG_TXFT USART_ISR_TXFT /*!< UART TXFIFO threshold flag */ 727 #define UART_FLAG_RXFT USART_ISR_RXFT /*!< UART RXFIFO threshold flag */ 728 #define UART_FLAG_RXFF USART_ISR_RXFF /*!< UART RXFIFO Full flag */ 729 #define UART_FLAG_TXFE USART_ISR_TXFE /*!< UART TXFIFO Empty flag */ 730 #define UART_FLAG_REACK USART_ISR_REACK /*!< UART receive enable acknowledge flag */ 731 #define UART_FLAG_TEACK USART_ISR_TEACK /*!< UART transmit enable acknowledge flag */ 732 #define UART_FLAG_WUF USART_ISR_WUF /*!< UART wake-up from stop mode flag */ 733 #define UART_FLAG_RWU USART_ISR_RWU /*!< UART receiver wake-up from mute mode flag */ 734 #define UART_FLAG_SBKF USART_ISR_SBKF /*!< UART send break flag */ 735 #define UART_FLAG_CMF USART_ISR_CMF /*!< UART character match flag */ 736 #define UART_FLAG_BUSY USART_ISR_BUSY /*!< UART busy flag */ 737 #define UART_FLAG_ABRF USART_ISR_ABRF /*!< UART auto Baud rate flag */ 738 #define UART_FLAG_ABRE USART_ISR_ABRE /*!< UART auto Baud rate error */ 739 #define UART_FLAG_RTOF USART_ISR_RTOF /*!< UART receiver timeout flag */ 740 #define UART_FLAG_CTS USART_ISR_CTS /*!< UART clear to send flag */ 741 #define UART_FLAG_CTSIF USART_ISR_CTSIF /*!< UART clear to send interrupt flag */ 742 #define UART_FLAG_LBDF USART_ISR_LBDF /*!< UART LIN break detection flag */ 743 #define UART_FLAG_TXE USART_ISR_TXE_TXFNF /*!< UART transmit data register empty */ 744 #define UART_FLAG_TXFNF USART_ISR_TXE_TXFNF /*!< UART TXFIFO not full */ 745 #define UART_FLAG_TC USART_ISR_TC /*!< UART transmission complete */ 746 #define UART_FLAG_RXNE USART_ISR_RXNE_RXFNE /*!< UART read data register not empty */ 747 #define UART_FLAG_RXFNE USART_ISR_RXNE_RXFNE /*!< UART RXFIFO not empty */ 748 #define UART_FLAG_IDLE USART_ISR_IDLE /*!< UART idle flag */ 749 #define UART_FLAG_ORE USART_ISR_ORE /*!< UART overrun error */ 750 #define UART_FLAG_NE USART_ISR_NE /*!< UART noise error */ 751 #define UART_FLAG_FE USART_ISR_FE /*!< UART frame error */ 752 #define UART_FLAG_PE USART_ISR_PE /*!< UART parity error */ 753 /** 754 * @} 755 */ 756 757 /** @defgroup UART_Interrupt_definition UART Interrupts Definition 758 * Elements values convention: 000ZZZZZ0XXYYYYYb 759 * - YYYYY : Interrupt source position in the XX register (5bits) 760 * - XX : Interrupt source register (2bits) 761 * - 01: CR1 register 762 * - 10: CR2 register 763 * - 11: CR3 register 764 * - ZZZZZ : Flag position in the ISR register(5bits) 765 * Elements values convention: 000000000XXYYYYYb 766 * - YYYYY : Interrupt source position in the XX register (5bits) 767 * - XX : Interrupt source register (2bits) 768 * - 01: CR1 register 769 * - 10: CR2 register 770 * - 11: CR3 register 771 * Elements values convention: 0000ZZZZ00000000b 772 * - ZZZZ : Flag position in the ISR register(4bits) 773 * @{ 774 */ 775 #define UART_IT_PE 0x0028U /*!< UART parity error interruption */ 776 #define UART_IT_TXE 0x0727U /*!< UART transmit data register empty interruption */ 777 #define UART_IT_TXFNF 0x0727U /*!< UART TX FIFO not full interruption */ 778 #define UART_IT_TC 0x0626U /*!< UART transmission complete interruption */ 779 #define UART_IT_RXNE 0x0525U /*!< UART read data register not empty interruption */ 780 #define UART_IT_RXFNE 0x0525U /*!< UART RXFIFO not empty interruption */ 781 #define UART_IT_IDLE 0x0424U /*!< UART idle interruption */ 782 #define UART_IT_LBD 0x0846U /*!< UART LIN break detection interruption */ 783 #define UART_IT_CTS 0x096AU /*!< UART CTS interruption */ 784 #define UART_IT_CM 0x112EU /*!< UART character match interruption */ 785 #define UART_IT_WUF 0x1476U /*!< UART wake-up from stop mode interruption */ 786 #define UART_IT_RXFF 0x183FU /*!< UART RXFIFO full interruption */ 787 #define UART_IT_TXFE 0x173EU /*!< UART TXFIFO empty interruption */ 788 #define UART_IT_RXFT 0x1A7CU /*!< UART RXFIFO threshold reached interruption */ 789 #define UART_IT_TXFT 0x1B77U /*!< UART TXFIFO threshold reached interruption */ 790 #define UART_IT_RTO 0x0B3AU /*!< UART receiver timeout interruption */ 791 792 #define UART_IT_ERR 0x0060U /*!< UART error interruption */ 793 794 #define UART_IT_ORE 0x0300U /*!< UART overrun error interruption */ 795 #define UART_IT_NE 0x0200U /*!< UART noise error interruption */ 796 #define UART_IT_FE 0x0100U /*!< UART frame error interruption */ 797 /** 798 * @} 799 */ 800 801 /** @defgroup UART_IT_CLEAR_Flags UART Interruption Clear Flags 802 * @{ 803 */ 804 #define UART_CLEAR_PEF USART_ICR_PECF /*!< Parity Error Clear Flag */ 805 #define UART_CLEAR_FEF USART_ICR_FECF /*!< Framing Error Clear Flag */ 806 #define UART_CLEAR_NEF USART_ICR_NECF /*!< Noise Error detected Clear Flag */ 807 #define UART_CLEAR_OREF USART_ICR_ORECF /*!< Overrun Error Clear Flag */ 808 #define UART_CLEAR_IDLEF USART_ICR_IDLECF /*!< IDLE line detected Clear Flag */ 809 #define UART_CLEAR_TXFECF USART_ICR_TXFECF /*!< TXFIFO empty clear flag */ 810 #define UART_CLEAR_TCF USART_ICR_TCCF /*!< Transmission Complete Clear Flag */ 811 #define UART_CLEAR_LBDF USART_ICR_LBDCF /*!< LIN Break Detection Clear Flag */ 812 #define UART_CLEAR_CTSF USART_ICR_CTSCF /*!< CTS Interrupt Clear Flag */ 813 #define UART_CLEAR_CMF USART_ICR_CMCF /*!< Character Match Clear Flag */ 814 #define UART_CLEAR_WUF USART_ICR_WUCF /*!< Wake Up from stop mode Clear Flag */ 815 #define UART_CLEAR_RTOF USART_ICR_RTOCF /*!< UART receiver timeout clear flag */ 816 /** 817 * @} 818 */ 819 820 /** @defgroup UART_Reception_Type_Values UART Reception type values 821 * @{ 822 */ 823 #define HAL_UART_RECEPTION_STANDARD (0x00000000U) /*!< Standard reception */ 824 #define HAL_UART_RECEPTION_TOIDLE (0x00000001U) /*!< Reception till completion or IDLE event */ 825 #define HAL_UART_RECEPTION_TORTO (0x00000002U) /*!< Reception till completion or RTO event */ 826 #define HAL_UART_RECEPTION_TOCHARMATCH (0x00000003U) /*!< Reception till completion or CM event */ 827 /** 828 * @} 829 */ 830 831 /** @defgroup UART_RxEvent_Type_Values UART RxEvent type values 832 * @{ 833 */ 834 #define HAL_UART_RXEVENT_TC (0x00000000U) /*!< RxEvent linked to Transfer Complete event */ 835 #define HAL_UART_RXEVENT_HT (0x00000001U) /*!< RxEvent linked to Half Transfer event */ 836 #define HAL_UART_RXEVENT_IDLE (0x00000002U) /*!< RxEvent linked to IDLE event */ 837 /** 838 * @} 839 */ 840 841 /** 842 * @} 843 */ 844 845 /* Exported macros -----------------------------------------------------------*/ 846 /** @defgroup UART_Exported_Macros UART Exported Macros 847 * @{ 848 */ 849 850 /** @brief Reset UART handle states. 851 * @param __HANDLE__ UART handle. 852 * @retval None 853 */ 854 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) 855 #define __HAL_UART_RESET_HANDLE_STATE(__HANDLE__) do{ \ 856 (__HANDLE__)->gState = HAL_UART_STATE_RESET; \ 857 (__HANDLE__)->RxState = HAL_UART_STATE_RESET; \ 858 (__HANDLE__)->MspInitCallback = NULL; \ 859 (__HANDLE__)->MspDeInitCallback = NULL; \ 860 } while(0U) 861 #else 862 #define __HAL_UART_RESET_HANDLE_STATE(__HANDLE__) do{ \ 863 (__HANDLE__)->gState = HAL_UART_STATE_RESET; \ 864 (__HANDLE__)->RxState = HAL_UART_STATE_RESET; \ 865 } while(0U) 866 #endif /*USE_HAL_UART_REGISTER_CALLBACKS */ 867 868 /** @brief Flush the UART Data registers. 869 * @param __HANDLE__ specifies the UART Handle. 870 * @retval None 871 */ 872 #define __HAL_UART_FLUSH_DRREGISTER(__HANDLE__) \ 873 do{ \ 874 SET_BIT((__HANDLE__)->Instance->RQR, UART_RXDATA_FLUSH_REQUEST); \ 875 SET_BIT((__HANDLE__)->Instance->RQR, UART_TXDATA_FLUSH_REQUEST); \ 876 } while(0U) 877 878 /** @brief Clear the specified UART pending flag. 879 * @param __HANDLE__ specifies the UART Handle. 880 * @param __FLAG__ specifies the flag to check. 881 * This parameter can be any combination of the following values: 882 * @arg @ref UART_CLEAR_PEF Parity Error Clear Flag 883 * @arg @ref UART_CLEAR_FEF Framing Error Clear Flag 884 * @arg @ref UART_CLEAR_NEF Noise detected Clear Flag 885 * @arg @ref UART_CLEAR_OREF Overrun Error Clear Flag 886 * @arg @ref UART_CLEAR_IDLEF IDLE line detected Clear Flag 887 * @arg @ref UART_CLEAR_TXFECF TXFIFO empty clear Flag 888 * @arg @ref UART_CLEAR_TCF Transmission Complete Clear Flag 889 * @arg @ref UART_CLEAR_RTOF Receiver Timeout clear flag 890 * @arg @ref UART_CLEAR_LBDF LIN Break Detection Clear Flag 891 * @arg @ref UART_CLEAR_CTSF CTS Interrupt Clear Flag 892 * @arg @ref UART_CLEAR_CMF Character Match Clear Flag 893 * @arg @ref UART_CLEAR_WUF Wake Up from stop mode Clear Flag 894 * @retval None 895 */ 896 #define __HAL_UART_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->ICR = (__FLAG__)) 897 898 /** @brief Clear the UART PE pending flag. 899 * @param __HANDLE__ specifies the UART Handle. 900 * @retval None 901 */ 902 #define __HAL_UART_CLEAR_PEFLAG(__HANDLE__) __HAL_UART_CLEAR_FLAG((__HANDLE__), UART_CLEAR_PEF) 903 904 /** @brief Clear the UART FE pending flag. 905 * @param __HANDLE__ specifies the UART Handle. 906 * @retval None 907 */ 908 #define __HAL_UART_CLEAR_FEFLAG(__HANDLE__) __HAL_UART_CLEAR_FLAG((__HANDLE__), UART_CLEAR_FEF) 909 910 /** @brief Clear the UART NE pending flag. 911 * @param __HANDLE__ specifies the UART Handle. 912 * @retval None 913 */ 914 #define __HAL_UART_CLEAR_NEFLAG(__HANDLE__) __HAL_UART_CLEAR_FLAG((__HANDLE__), UART_CLEAR_NEF) 915 916 /** @brief Clear the UART ORE pending flag. 917 * @param __HANDLE__ specifies the UART Handle. 918 * @retval None 919 */ 920 #define __HAL_UART_CLEAR_OREFLAG(__HANDLE__) __HAL_UART_CLEAR_FLAG((__HANDLE__), UART_CLEAR_OREF) 921 922 /** @brief Clear the UART IDLE pending flag. 923 * @param __HANDLE__ specifies the UART Handle. 924 * @retval None 925 */ 926 #define __HAL_UART_CLEAR_IDLEFLAG(__HANDLE__) __HAL_UART_CLEAR_FLAG((__HANDLE__), UART_CLEAR_IDLEF) 927 928 /** @brief Clear the UART TX FIFO empty clear flag. 929 * @param __HANDLE__ specifies the UART Handle. 930 * @retval None 931 */ 932 #define __HAL_UART_CLEAR_TXFECF(__HANDLE__) __HAL_UART_CLEAR_FLAG((__HANDLE__), UART_CLEAR_TXFECF) 933 934 /** @brief Check whether the specified UART flag is set or not. 935 * @param __HANDLE__ specifies the UART Handle. 936 * @param __FLAG__ specifies the flag to check. 937 * This parameter can be one of the following values: 938 * @arg @ref UART_FLAG_TXFT TXFIFO threshold flag 939 * @arg @ref UART_FLAG_RXFT RXFIFO threshold flag 940 * @arg @ref UART_FLAG_RXFF RXFIFO Full flag 941 * @arg @ref UART_FLAG_TXFE TXFIFO Empty flag 942 * @arg @ref UART_FLAG_REACK Receive enable acknowledge flag 943 * @arg @ref UART_FLAG_TEACK Transmit enable acknowledge flag 944 * @arg @ref UART_FLAG_WUF Wake up from stop mode flag 945 * @arg @ref UART_FLAG_RWU Receiver wake up flag (if the UART in mute mode) 946 * @arg @ref UART_FLAG_SBKF Send Break flag 947 * @arg @ref UART_FLAG_CMF Character match flag 948 * @arg @ref UART_FLAG_BUSY Busy flag 949 * @arg @ref UART_FLAG_ABRF Auto Baud rate detection flag 950 * @arg @ref UART_FLAG_ABRE Auto Baud rate detection error flag 951 * @arg @ref UART_FLAG_CTS CTS Change flag 952 * @arg @ref UART_FLAG_LBDF LIN Break detection flag 953 * @arg @ref UART_FLAG_TXE Transmit data register empty flag 954 * @arg @ref UART_FLAG_TXFNF UART TXFIFO not full flag 955 * @arg @ref UART_FLAG_TC Transmission Complete flag 956 * @arg @ref UART_FLAG_RXNE Receive data register not empty flag 957 * @arg @ref UART_FLAG_RXFNE UART RXFIFO not empty flag 958 * @arg @ref UART_FLAG_RTOF Receiver Timeout flag 959 * @arg @ref UART_FLAG_IDLE Idle Line detection flag 960 * @arg @ref UART_FLAG_ORE Overrun Error flag 961 * @arg @ref UART_FLAG_NE Noise Error flag 962 * @arg @ref UART_FLAG_FE Framing Error flag 963 * @arg @ref UART_FLAG_PE Parity Error flag 964 * @retval The new state of __FLAG__ (TRUE or FALSE). 965 */ 966 #define __HAL_UART_GET_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->ISR & (__FLAG__)) == (__FLAG__)) 967 968 /** @brief Enable the specified UART interrupt. 969 * @param __HANDLE__ specifies the UART Handle. 970 * @param __INTERRUPT__ specifies the UART interrupt source to enable. 971 * This parameter can be one of the following values: 972 * @arg @ref UART_IT_RXFF RXFIFO Full interrupt 973 * @arg @ref UART_IT_TXFE TXFIFO Empty interrupt 974 * @arg @ref UART_IT_RXFT RXFIFO threshold interrupt 975 * @arg @ref UART_IT_TXFT TXFIFO threshold interrupt 976 * @arg @ref UART_IT_WUF Wakeup from stop mode interrupt 977 * @arg @ref UART_IT_CM Character match interrupt 978 * @arg @ref UART_IT_CTS CTS change interrupt 979 * @arg @ref UART_IT_LBD LIN Break detection interrupt 980 * @arg @ref UART_IT_TXE Transmit Data Register empty interrupt 981 * @arg @ref UART_IT_TXFNF TX FIFO not full interrupt 982 * @arg @ref UART_IT_TC Transmission complete interrupt 983 * @arg @ref UART_IT_RXNE Receive Data register not empty interrupt 984 * @arg @ref UART_IT_RXFNE RXFIFO not empty interrupt 985 * @arg @ref UART_IT_RTO Receive Timeout interrupt 986 * @arg @ref UART_IT_IDLE Idle line detection interrupt 987 * @arg @ref UART_IT_PE Parity Error interrupt 988 * @arg @ref UART_IT_ERR Error interrupt (frame error, noise error, overrun error) 989 * @retval None 990 */ 991 #define __HAL_UART_ENABLE_IT(__HANDLE__, __INTERRUPT__) (\ 992 ((((uint8_t)(__INTERRUPT__)) >> 5U) == 1U)?\ 993 ((__HANDLE__)->Instance->CR1 |= (1U <<\ 994 ((__INTERRUPT__) & UART_IT_MASK))): \ 995 ((((uint8_t)(__INTERRUPT__)) >> 5U) == 2U)?\ 996 ((__HANDLE__)->Instance->CR2 |= (1U <<\ 997 ((__INTERRUPT__) & UART_IT_MASK))): \ 998 ((__HANDLE__)->Instance->CR3 |= (1U <<\ 999 ((__INTERRUPT__) & UART_IT_MASK)))) 1000 1001 /** @brief Disable the specified UART interrupt. 1002 * @param __HANDLE__ specifies the UART Handle. 1003 * @param __INTERRUPT__ specifies the UART interrupt source to disable. 1004 * This parameter can be one of the following values: 1005 * @arg @ref UART_IT_RXFF RXFIFO Full interrupt 1006 * @arg @ref UART_IT_TXFE TXFIFO Empty interrupt 1007 * @arg @ref UART_IT_RXFT RXFIFO threshold interrupt 1008 * @arg @ref UART_IT_TXFT TXFIFO threshold interrupt 1009 * @arg @ref UART_IT_WUF Wakeup from stop mode interrupt 1010 * @arg @ref UART_IT_CM Character match interrupt 1011 * @arg @ref UART_IT_CTS CTS change interrupt 1012 * @arg @ref UART_IT_LBD LIN Break detection interrupt 1013 * @arg @ref UART_IT_TXE Transmit Data Register empty interrupt 1014 * @arg @ref UART_IT_TXFNF TX FIFO not full interrupt 1015 * @arg @ref UART_IT_TC Transmission complete interrupt 1016 * @arg @ref UART_IT_RXNE Receive Data register not empty interrupt 1017 * @arg @ref UART_IT_RXFNE RXFIFO not empty interrupt 1018 * @arg @ref UART_IT_RTO Receive Timeout interrupt 1019 * @arg @ref UART_IT_IDLE Idle line detection interrupt 1020 * @arg @ref UART_IT_PE Parity Error interrupt 1021 * @arg @ref UART_IT_ERR Error interrupt (Frame error, noise error, overrun error) 1022 * @retval None 1023 */ 1024 #define __HAL_UART_DISABLE_IT(__HANDLE__, __INTERRUPT__) (\ 1025 ((((uint8_t)(__INTERRUPT__)) >> 5U) == 1U)?\ 1026 ((__HANDLE__)->Instance->CR1 &= ~ (1U <<\ 1027 ((__INTERRUPT__) & UART_IT_MASK))): \ 1028 ((((uint8_t)(__INTERRUPT__)) >> 5U) == 2U)?\ 1029 ((__HANDLE__)->Instance->CR2 &= ~ (1U <<\ 1030 ((__INTERRUPT__) & UART_IT_MASK))): \ 1031 ((__HANDLE__)->Instance->CR3 &= ~ (1U <<\ 1032 ((__INTERRUPT__) & UART_IT_MASK)))) 1033 1034 /** @brief Check whether the specified UART interrupt has occurred or not. 1035 * @param __HANDLE__ specifies the UART Handle. 1036 * @param __INTERRUPT__ specifies the UART interrupt to check. 1037 * This parameter can be one of the following values: 1038 * @arg @ref UART_IT_RXFF RXFIFO Full interrupt 1039 * @arg @ref UART_IT_TXFE TXFIFO Empty interrupt 1040 * @arg @ref UART_IT_RXFT RXFIFO threshold interrupt 1041 * @arg @ref UART_IT_TXFT TXFIFO threshold interrupt 1042 * @arg @ref UART_IT_WUF Wakeup from stop mode interrupt 1043 * @arg @ref UART_IT_CM Character match interrupt 1044 * @arg @ref UART_IT_CTS CTS change interrupt 1045 * @arg @ref UART_IT_LBD LIN Break detection interrupt 1046 * @arg @ref UART_IT_TXE Transmit Data Register empty interrupt 1047 * @arg @ref UART_IT_TXFNF TX FIFO not full interrupt 1048 * @arg @ref UART_IT_TC Transmission complete interrupt 1049 * @arg @ref UART_IT_RXNE Receive Data register not empty interrupt 1050 * @arg @ref UART_IT_RXFNE RXFIFO not empty interrupt 1051 * @arg @ref UART_IT_RTO Receive Timeout interrupt 1052 * @arg @ref UART_IT_IDLE Idle line detection interrupt 1053 * @arg @ref UART_IT_PE Parity Error interrupt 1054 * @arg @ref UART_IT_ERR Error interrupt (Frame error, noise error, overrun error) 1055 * @retval The new state of __INTERRUPT__ (SET or RESET). 1056 */ 1057 #define __HAL_UART_GET_IT(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->ISR\ 1058 & (1U << ((__INTERRUPT__)>> 8U))) != RESET) ? SET : RESET) 1059 1060 /** @brief Check whether the specified UART interrupt source is enabled or not. 1061 * @param __HANDLE__ specifies the UART Handle. 1062 * @param __INTERRUPT__ specifies the UART interrupt source to check. 1063 * This parameter can be one of the following values: 1064 * @arg @ref UART_IT_RXFF RXFIFO Full interrupt 1065 * @arg @ref UART_IT_TXFE TXFIFO Empty interrupt 1066 * @arg @ref UART_IT_RXFT RXFIFO threshold interrupt 1067 * @arg @ref UART_IT_TXFT TXFIFO threshold interrupt 1068 * @arg @ref UART_IT_WUF Wakeup from stop mode interrupt 1069 * @arg @ref UART_IT_CM Character match interrupt 1070 * @arg @ref UART_IT_CTS CTS change interrupt 1071 * @arg @ref UART_IT_LBD LIN Break detection interrupt 1072 * @arg @ref UART_IT_TXE Transmit Data Register empty interrupt 1073 * @arg @ref UART_IT_TXFNF TX FIFO not full interrupt 1074 * @arg @ref UART_IT_TC Transmission complete interrupt 1075 * @arg @ref UART_IT_RXNE Receive Data register not empty interrupt 1076 * @arg @ref UART_IT_RXFNE RXFIFO not empty interrupt 1077 * @arg @ref UART_IT_RTO Receive Timeout interrupt 1078 * @arg @ref UART_IT_IDLE Idle line detection interrupt 1079 * @arg @ref UART_IT_PE Parity Error interrupt 1080 * @arg @ref UART_IT_ERR Error interrupt (Frame error, noise error, overrun error) 1081 * @retval The new state of __INTERRUPT__ (SET or RESET). 1082 */ 1083 #define __HAL_UART_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((((((uint8_t)(__INTERRUPT__)) >> 5U) == 1U) ?\ 1084 (__HANDLE__)->Instance->CR1 : \ 1085 (((((uint8_t)(__INTERRUPT__)) >> 5U) == 2U) ?\ 1086 (__HANDLE__)->Instance->CR2 : \ 1087 (__HANDLE__)->Instance->CR3)) & (1U <<\ 1088 (((uint16_t)(__INTERRUPT__)) &\ 1089 UART_IT_MASK))) != RESET) ? SET : RESET) 1090 1091 /** @brief Clear the specified UART ISR flag, in setting the proper ICR register flag. 1092 * @param __HANDLE__ specifies the UART Handle. 1093 * @param __IT_CLEAR__ specifies the interrupt clear register flag that needs to be set 1094 * to clear the corresponding interrupt 1095 * This parameter can be one of the following values: 1096 * @arg @ref UART_CLEAR_PEF Parity Error Clear Flag 1097 * @arg @ref UART_CLEAR_FEF Framing Error Clear Flag 1098 * @arg @ref UART_CLEAR_NEF Noise detected Clear Flag 1099 * @arg @ref UART_CLEAR_OREF Overrun Error Clear Flag 1100 * @arg @ref UART_CLEAR_IDLEF IDLE line detected Clear Flag 1101 * @arg @ref UART_CLEAR_RTOF Receiver timeout clear flag 1102 * @arg @ref UART_CLEAR_TXFECF TXFIFO empty Clear Flag 1103 * @arg @ref UART_CLEAR_TCF Transmission Complete Clear Flag 1104 * @arg @ref UART_CLEAR_LBDF LIN Break Detection Clear Flag 1105 * @arg @ref UART_CLEAR_CTSF CTS Interrupt Clear Flag 1106 * @arg @ref UART_CLEAR_CMF Character Match Clear Flag 1107 * @arg @ref UART_CLEAR_WUF Wake Up from stop mode Clear Flag 1108 * @retval None 1109 */ 1110 #define __HAL_UART_CLEAR_IT(__HANDLE__, __IT_CLEAR__) ((__HANDLE__)->Instance->ICR = (uint32_t)(__IT_CLEAR__)) 1111 1112 /** @brief Set a specific UART request flag. 1113 * @param __HANDLE__ specifies the UART Handle. 1114 * @param __REQ__ specifies the request flag to set 1115 * This parameter can be one of the following values: 1116 * @arg @ref UART_AUTOBAUD_REQUEST Auto-Baud Rate Request 1117 * @arg @ref UART_SENDBREAK_REQUEST Send Break Request 1118 * @arg @ref UART_MUTE_MODE_REQUEST Mute Mode Request 1119 * @arg @ref UART_RXDATA_FLUSH_REQUEST Receive Data flush Request 1120 * @arg @ref UART_TXDATA_FLUSH_REQUEST Transmit data flush Request 1121 * @retval None 1122 */ 1123 #define __HAL_UART_SEND_REQ(__HANDLE__, __REQ__) ((__HANDLE__)->Instance->RQR |= (uint16_t)(__REQ__)) 1124 1125 /** @brief Enable the UART one bit sample method. 1126 * @param __HANDLE__ specifies the UART Handle. 1127 * @retval None 1128 */ 1129 #define __HAL_UART_ONE_BIT_SAMPLE_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR3|= USART_CR3_ONEBIT) 1130 1131 /** @brief Disable the UART one bit sample method. 1132 * @param __HANDLE__ specifies the UART Handle. 1133 * @retval None 1134 */ 1135 #define __HAL_UART_ONE_BIT_SAMPLE_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR3 &= ~USART_CR3_ONEBIT) 1136 1137 /** @brief Enable UART. 1138 * @param __HANDLE__ specifies the UART Handle. 1139 * @retval None 1140 */ 1141 #define __HAL_UART_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 |= USART_CR1_UE) 1142 1143 /** @brief Disable UART. 1144 * @param __HANDLE__ specifies the UART Handle. 1145 * @retval None 1146 */ 1147 #define __HAL_UART_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 &= ~USART_CR1_UE) 1148 1149 /** @brief Enable CTS flow control. 1150 * @note This macro allows to enable CTS hardware flow control for a given UART instance, 1151 * without need to call HAL_UART_Init() function. 1152 * As involving direct access to UART registers, usage of this macro should be fully endorsed by user. 1153 * @note As macro is expected to be used for modifying CTS Hw flow control feature activation, without need 1154 * for USART instance Deinit/Init, following conditions for macro call should be fulfilled : 1155 * - UART instance should have already been initialised (through call of HAL_UART_Init() ) 1156 * - macro could only be called when corresponding UART instance is disabled 1157 * (i.e. __HAL_UART_DISABLE(__HANDLE__)) and should be followed by an Enable 1158 * macro (i.e. __HAL_UART_ENABLE(__HANDLE__)). 1159 * @param __HANDLE__ specifies the UART Handle. 1160 * @retval None 1161 */ 1162 #define __HAL_UART_HWCONTROL_CTS_ENABLE(__HANDLE__) \ 1163 do{ \ 1164 ATOMIC_SET_BIT((__HANDLE__)->Instance->CR3, USART_CR3_CTSE); \ 1165 (__HANDLE__)->Init.HwFlowCtl |= USART_CR3_CTSE; \ 1166 } while(0U) 1167 1168 /** @brief Disable CTS flow control. 1169 * @note This macro allows to disable CTS hardware flow control for a given UART instance, 1170 * without need to call HAL_UART_Init() function. 1171 * As involving direct access to UART registers, usage of this macro should be fully endorsed by user. 1172 * @note As macro is expected to be used for modifying CTS Hw flow control feature activation, without need 1173 * for USART instance Deinit/Init, following conditions for macro call should be fulfilled : 1174 * - UART instance should have already been initialised (through call of HAL_UART_Init() ) 1175 * - macro could only be called when corresponding UART instance is disabled 1176 * (i.e. __HAL_UART_DISABLE(__HANDLE__)) and should be followed by an Enable 1177 * macro (i.e. __HAL_UART_ENABLE(__HANDLE__)). 1178 * @param __HANDLE__ specifies the UART Handle. 1179 * @retval None 1180 */ 1181 #define __HAL_UART_HWCONTROL_CTS_DISABLE(__HANDLE__) \ 1182 do{ \ 1183 ATOMIC_CLEAR_BIT((__HANDLE__)->Instance->CR3, USART_CR3_CTSE); \ 1184 (__HANDLE__)->Init.HwFlowCtl &= ~(USART_CR3_CTSE); \ 1185 } while(0U) 1186 1187 /** @brief Enable RTS flow control. 1188 * @note This macro allows to enable RTS hardware flow control for a given UART instance, 1189 * without need to call HAL_UART_Init() function. 1190 * As involving direct access to UART registers, usage of this macro should be fully endorsed by user. 1191 * @note As macro is expected to be used for modifying RTS Hw flow control feature activation, without need 1192 * for USART instance Deinit/Init, following conditions for macro call should be fulfilled : 1193 * - UART instance should have already been initialised (through call of HAL_UART_Init() ) 1194 * - macro could only be called when corresponding UART instance is disabled 1195 * (i.e. __HAL_UART_DISABLE(__HANDLE__)) and should be followed by an Enable 1196 * macro (i.e. __HAL_UART_ENABLE(__HANDLE__)). 1197 * @param __HANDLE__ specifies the UART Handle. 1198 * @retval None 1199 */ 1200 #define __HAL_UART_HWCONTROL_RTS_ENABLE(__HANDLE__) \ 1201 do{ \ 1202 ATOMIC_SET_BIT((__HANDLE__)->Instance->CR3, USART_CR3_RTSE); \ 1203 (__HANDLE__)->Init.HwFlowCtl |= USART_CR3_RTSE; \ 1204 } while(0U) 1205 1206 /** @brief Disable RTS flow control. 1207 * @note This macro allows to disable RTS hardware flow control for a given UART instance, 1208 * without need to call HAL_UART_Init() function. 1209 * As involving direct access to UART registers, usage of this macro should be fully endorsed by user. 1210 * @note As macro is expected to be used for modifying RTS Hw flow control feature activation, without need 1211 * for USART instance Deinit/Init, following conditions for macro call should be fulfilled : 1212 * - UART instance should have already been initialised (through call of HAL_UART_Init() ) 1213 * - macro could only be called when corresponding UART instance is disabled 1214 * (i.e. __HAL_UART_DISABLE(__HANDLE__)) and should be followed by an Enable 1215 * macro (i.e. __HAL_UART_ENABLE(__HANDLE__)). 1216 * @param __HANDLE__ specifies the UART Handle. 1217 * @retval None 1218 */ 1219 #define __HAL_UART_HWCONTROL_RTS_DISABLE(__HANDLE__) \ 1220 do{ \ 1221 ATOMIC_CLEAR_BIT((__HANDLE__)->Instance->CR3, USART_CR3_RTSE);\ 1222 (__HANDLE__)->Init.HwFlowCtl &= ~(USART_CR3_RTSE); \ 1223 } while(0U) 1224 /** 1225 * @} 1226 */ 1227 1228 /* Private macros --------------------------------------------------------*/ 1229 /** @defgroup UART_Private_Macros UART Private Macros 1230 * @{ 1231 */ 1232 /** @brief Get UART clok division factor from clock prescaler value. 1233 * @param __CLOCKPRESCALER__ UART prescaler value. 1234 * @retval UART clock division factor 1235 */ 1236 #define UART_GET_DIV_FACTOR(__CLOCKPRESCALER__) \ 1237 (((__CLOCKPRESCALER__) == UART_PRESCALER_DIV1) ? 1U : \ 1238 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV2) ? 2U : \ 1239 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV4) ? 4U : \ 1240 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV6) ? 6U : \ 1241 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV8) ? 8U : \ 1242 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV10) ? 10U : \ 1243 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV12) ? 12U : \ 1244 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV16) ? 16U : \ 1245 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV32) ? 32U : \ 1246 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV64) ? 64U : \ 1247 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV128) ? 128U : \ 1248 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV256) ? 256U : 1U) 1249 1250 /** @brief BRR division operation to set BRR register with LPUART. 1251 * @param __PCLK__ LPUART clock. 1252 * @param __BAUD__ Baud rate set by the user. 1253 * @param __CLOCKPRESCALER__ UART prescaler value. 1254 * @retval Division result 1255 */ 1256 #define UART_DIV_LPUART(__PCLK__, __BAUD__, __CLOCKPRESCALER__) \ 1257 ((uint32_t)((((((uint64_t)(__PCLK__))/(UARTPrescTable[(__CLOCKPRESCALER__)]))*256U)+ \ 1258 (uint32_t)((__BAUD__)/2U)) / (__BAUD__)) \ 1259 ) 1260 1261 /** @brief BRR division operation to set BRR register in 8-bit oversampling mode. 1262 * @param __PCLK__ UART clock. 1263 * @param __BAUD__ Baud rate set by the user. 1264 * @param __CLOCKPRESCALER__ UART prescaler value. 1265 * @retval Division result 1266 */ 1267 #define UART_DIV_SAMPLING8(__PCLK__, __BAUD__, __CLOCKPRESCALER__) \ 1268 (((((__PCLK__)/UARTPrescTable[(__CLOCKPRESCALER__)])*2U) + ((__BAUD__)/2U)) / (__BAUD__)) 1269 1270 /** @brief BRR division operation to set BRR register in 16-bit oversampling mode. 1271 * @param __PCLK__ UART clock. 1272 * @param __BAUD__ Baud rate set by the user. 1273 * @param __CLOCKPRESCALER__ UART prescaler value. 1274 * @retval Division result 1275 */ 1276 #define UART_DIV_SAMPLING16(__PCLK__, __BAUD__, __CLOCKPRESCALER__) \ 1277 ((((__PCLK__)/UARTPrescTable[(__CLOCKPRESCALER__)]) + ((__BAUD__)/2U)) / (__BAUD__)) 1278 1279 /** @brief Check whether or not UART instance is Low Power UART. 1280 * @param __HANDLE__ specifies the UART Handle. 1281 * @retval SET (instance is LPUART) or RESET (instance isn't LPUART) 1282 */ 1283 #define UART_INSTANCE_LOWPOWER(__HANDLE__) (IS_LPUART_INSTANCE((__HANDLE__)->Instance)) 1284 1285 /** @brief Check UART Baud rate. 1286 * @param __BAUDRATE__ Baudrate specified by the user. 1287 * The maximum Baud Rate is derived from the maximum clock on G0 (i.e. 64 MHz) 1288 * divided by the smallest oversampling used on the USART (i.e. 8) 1289 * @retval SET (__BAUDRATE__ is valid) or RESET (__BAUDRATE__ is invalid) 1290 */ 1291 #define IS_UART_BAUDRATE(__BAUDRATE__) ((__BAUDRATE__) < 8000001U) 1292 1293 /** @brief Check UART assertion time. 1294 * @param __TIME__ 5-bit value assertion time. 1295 * @retval Test result (TRUE or FALSE). 1296 */ 1297 #define IS_UART_ASSERTIONTIME(__TIME__) ((__TIME__) <= 0x1FU) 1298 1299 /** @brief Check UART deassertion time. 1300 * @param __TIME__ 5-bit value deassertion time. 1301 * @retval Test result (TRUE or FALSE). 1302 */ 1303 #define IS_UART_DEASSERTIONTIME(__TIME__) ((__TIME__) <= 0x1FU) 1304 1305 /** 1306 * @brief Ensure that UART frame number of stop bits is valid. 1307 * @param __STOPBITS__ UART frame number of stop bits. 1308 * @retval SET (__STOPBITS__ is valid) or RESET (__STOPBITS__ is invalid) 1309 */ 1310 #define IS_UART_STOPBITS(__STOPBITS__) (((__STOPBITS__) == UART_STOPBITS_0_5) || \ 1311 ((__STOPBITS__) == UART_STOPBITS_1) || \ 1312 ((__STOPBITS__) == UART_STOPBITS_1_5) || \ 1313 ((__STOPBITS__) == UART_STOPBITS_2)) 1314 1315 /** 1316 * @brief Ensure that LPUART frame number of stop bits is valid. 1317 * @param __STOPBITS__ LPUART frame number of stop bits. 1318 * @retval SET (__STOPBITS__ is valid) or RESET (__STOPBITS__ is invalid) 1319 */ 1320 #define IS_LPUART_STOPBITS(__STOPBITS__) (((__STOPBITS__) == UART_STOPBITS_1) || \ 1321 ((__STOPBITS__) == UART_STOPBITS_2)) 1322 1323 /** 1324 * @brief Ensure that UART frame parity is valid. 1325 * @param __PARITY__ UART frame parity. 1326 * @retval SET (__PARITY__ is valid) or RESET (__PARITY__ is invalid) 1327 */ 1328 #define IS_UART_PARITY(__PARITY__) (((__PARITY__) == UART_PARITY_NONE) || \ 1329 ((__PARITY__) == UART_PARITY_EVEN) || \ 1330 ((__PARITY__) == UART_PARITY_ODD)) 1331 1332 /** 1333 * @brief Ensure that UART hardware flow control is valid. 1334 * @param __CONTROL__ UART hardware flow control. 1335 * @retval SET (__CONTROL__ is valid) or RESET (__CONTROL__ is invalid) 1336 */ 1337 #define IS_UART_HARDWARE_FLOW_CONTROL(__CONTROL__)\ 1338 (((__CONTROL__) == UART_HWCONTROL_NONE) || \ 1339 ((__CONTROL__) == UART_HWCONTROL_RTS) || \ 1340 ((__CONTROL__) == UART_HWCONTROL_CTS) || \ 1341 ((__CONTROL__) == UART_HWCONTROL_RTS_CTS)) 1342 1343 /** 1344 * @brief Ensure that UART communication mode is valid. 1345 * @param __MODE__ UART communication mode. 1346 * @retval SET (__MODE__ is valid) or RESET (__MODE__ is invalid) 1347 */ 1348 #define IS_UART_MODE(__MODE__) ((((__MODE__) & (~((uint32_t)(UART_MODE_TX_RX)))) == 0x00U) && ((__MODE__) != 0x00U)) 1349 1350 /** 1351 * @brief Ensure that UART state is valid. 1352 * @param __STATE__ UART state. 1353 * @retval SET (__STATE__ is valid) or RESET (__STATE__ is invalid) 1354 */ 1355 #define IS_UART_STATE(__STATE__) (((__STATE__) == UART_STATE_DISABLE) || \ 1356 ((__STATE__) == UART_STATE_ENABLE)) 1357 1358 /** 1359 * @brief Ensure that UART oversampling is valid. 1360 * @param __SAMPLING__ UART oversampling. 1361 * @retval SET (__SAMPLING__ is valid) or RESET (__SAMPLING__ is invalid) 1362 */ 1363 #define IS_UART_OVERSAMPLING(__SAMPLING__) (((__SAMPLING__) == UART_OVERSAMPLING_16) || \ 1364 ((__SAMPLING__) == UART_OVERSAMPLING_8)) 1365 1366 /** 1367 * @brief Ensure that UART frame sampling is valid. 1368 * @param __ONEBIT__ UART frame sampling. 1369 * @retval SET (__ONEBIT__ is valid) or RESET (__ONEBIT__ is invalid) 1370 */ 1371 #define IS_UART_ONE_BIT_SAMPLE(__ONEBIT__) (((__ONEBIT__) == UART_ONE_BIT_SAMPLE_DISABLE) || \ 1372 ((__ONEBIT__) == UART_ONE_BIT_SAMPLE_ENABLE)) 1373 1374 /** 1375 * @brief Ensure that UART auto Baud rate detection mode is valid. 1376 * @param __MODE__ UART auto Baud rate detection mode. 1377 * @retval SET (__MODE__ is valid) or RESET (__MODE__ is invalid) 1378 */ 1379 #define IS_UART_ADVFEATURE_AUTOBAUDRATEMODE(__MODE__) (((__MODE__) == UART_ADVFEATURE_AUTOBAUDRATE_ONSTARTBIT) || \ 1380 ((__MODE__) == UART_ADVFEATURE_AUTOBAUDRATE_ONFALLINGEDGE) || \ 1381 ((__MODE__) == UART_ADVFEATURE_AUTOBAUDRATE_ON0X7FFRAME) || \ 1382 ((__MODE__) == UART_ADVFEATURE_AUTOBAUDRATE_ON0X55FRAME)) 1383 1384 /** 1385 * @brief Ensure that UART receiver timeout setting is valid. 1386 * @param __TIMEOUT__ UART receiver timeout setting. 1387 * @retval SET (__TIMEOUT__ is valid) or RESET (__TIMEOUT__ is invalid) 1388 */ 1389 #define IS_UART_RECEIVER_TIMEOUT(__TIMEOUT__) (((__TIMEOUT__) == UART_RECEIVER_TIMEOUT_DISABLE) || \ 1390 ((__TIMEOUT__) == UART_RECEIVER_TIMEOUT_ENABLE)) 1391 1392 /** @brief Check the receiver timeout value. 1393 * @note The maximum UART receiver timeout value is 0xFFFFFF. 1394 * @param __TIMEOUTVALUE__ receiver timeout value. 1395 * @retval Test result (TRUE or FALSE) 1396 */ 1397 #define IS_UART_RECEIVER_TIMEOUT_VALUE(__TIMEOUTVALUE__) ((__TIMEOUTVALUE__) <= 0xFFFFFFU) 1398 1399 /** 1400 * @brief Ensure that UART LIN state is valid. 1401 * @param __LIN__ UART LIN state. 1402 * @retval SET (__LIN__ is valid) or RESET (__LIN__ is invalid) 1403 */ 1404 #define IS_UART_LIN(__LIN__) (((__LIN__) == UART_LIN_DISABLE) || \ 1405 ((__LIN__) == UART_LIN_ENABLE)) 1406 1407 /** 1408 * @brief Ensure that UART LIN break detection length is valid. 1409 * @param __LENGTH__ UART LIN break detection length. 1410 * @retval SET (__LENGTH__ is valid) or RESET (__LENGTH__ is invalid) 1411 */ 1412 #define IS_UART_LIN_BREAK_DETECT_LENGTH(__LENGTH__) (((__LENGTH__) == UART_LINBREAKDETECTLENGTH_10B) || \ 1413 ((__LENGTH__) == UART_LINBREAKDETECTLENGTH_11B)) 1414 1415 /** 1416 * @brief Ensure that UART DMA TX state is valid. 1417 * @param __DMATX__ UART DMA TX state. 1418 * @retval SET (__DMATX__ is valid) or RESET (__DMATX__ is invalid) 1419 */ 1420 #define IS_UART_DMA_TX(__DMATX__) (((__DMATX__) == UART_DMA_TX_DISABLE) || \ 1421 ((__DMATX__) == UART_DMA_TX_ENABLE)) 1422 1423 /** 1424 * @brief Ensure that UART DMA RX state is valid. 1425 * @param __DMARX__ UART DMA RX state. 1426 * @retval SET (__DMARX__ is valid) or RESET (__DMARX__ is invalid) 1427 */ 1428 #define IS_UART_DMA_RX(__DMARX__) (((__DMARX__) == UART_DMA_RX_DISABLE) || \ 1429 ((__DMARX__) == UART_DMA_RX_ENABLE)) 1430 1431 /** 1432 * @brief Ensure that UART half-duplex state is valid. 1433 * @param __HDSEL__ UART half-duplex state. 1434 * @retval SET (__HDSEL__ is valid) or RESET (__HDSEL__ is invalid) 1435 */ 1436 #define IS_UART_HALF_DUPLEX(__HDSEL__) (((__HDSEL__) == UART_HALF_DUPLEX_DISABLE) || \ 1437 ((__HDSEL__) == UART_HALF_DUPLEX_ENABLE)) 1438 1439 /** 1440 * @brief Ensure that UART wake-up method is valid. 1441 * @param __WAKEUP__ UART wake-up method . 1442 * @retval SET (__WAKEUP__ is valid) or RESET (__WAKEUP__ is invalid) 1443 */ 1444 #define IS_UART_WAKEUPMETHOD(__WAKEUP__) (((__WAKEUP__) == UART_WAKEUPMETHOD_IDLELINE) || \ 1445 ((__WAKEUP__) == UART_WAKEUPMETHOD_ADDRESSMARK)) 1446 1447 /** 1448 * @brief Ensure that UART request parameter is valid. 1449 * @param __PARAM__ UART request parameter. 1450 * @retval SET (__PARAM__ is valid) or RESET (__PARAM__ is invalid) 1451 */ 1452 #define IS_UART_REQUEST_PARAMETER(__PARAM__) (((__PARAM__) == UART_AUTOBAUD_REQUEST) || \ 1453 ((__PARAM__) == UART_SENDBREAK_REQUEST) || \ 1454 ((__PARAM__) == UART_MUTE_MODE_REQUEST) || \ 1455 ((__PARAM__) == UART_RXDATA_FLUSH_REQUEST) || \ 1456 ((__PARAM__) == UART_TXDATA_FLUSH_REQUEST)) 1457 1458 /** 1459 * @brief Ensure that UART advanced features initialization is valid. 1460 * @param __INIT__ UART advanced features initialization. 1461 * @retval SET (__INIT__ is valid) or RESET (__INIT__ is invalid) 1462 */ 1463 #define IS_UART_ADVFEATURE_INIT(__INIT__) ((__INIT__) <= (UART_ADVFEATURE_NO_INIT | \ 1464 UART_ADVFEATURE_TXINVERT_INIT | \ 1465 UART_ADVFEATURE_RXINVERT_INIT | \ 1466 UART_ADVFEATURE_DATAINVERT_INIT | \ 1467 UART_ADVFEATURE_SWAP_INIT | \ 1468 UART_ADVFEATURE_RXOVERRUNDISABLE_INIT | \ 1469 UART_ADVFEATURE_DMADISABLEONERROR_INIT | \ 1470 UART_ADVFEATURE_AUTOBAUDRATE_INIT | \ 1471 UART_ADVFEATURE_MSBFIRST_INIT)) 1472 1473 /** 1474 * @brief Ensure that UART frame TX inversion setting is valid. 1475 * @param __TXINV__ UART frame TX inversion setting. 1476 * @retval SET (__TXINV__ is valid) or RESET (__TXINV__ is invalid) 1477 */ 1478 #define IS_UART_ADVFEATURE_TXINV(__TXINV__) (((__TXINV__) == UART_ADVFEATURE_TXINV_DISABLE) || \ 1479 ((__TXINV__) == UART_ADVFEATURE_TXINV_ENABLE)) 1480 1481 /** 1482 * @brief Ensure that UART frame RX inversion setting is valid. 1483 * @param __RXINV__ UART frame RX inversion setting. 1484 * @retval SET (__RXINV__ is valid) or RESET (__RXINV__ is invalid) 1485 */ 1486 #define IS_UART_ADVFEATURE_RXINV(__RXINV__) (((__RXINV__) == UART_ADVFEATURE_RXINV_DISABLE) || \ 1487 ((__RXINV__) == UART_ADVFEATURE_RXINV_ENABLE)) 1488 1489 /** 1490 * @brief Ensure that UART frame data inversion setting is valid. 1491 * @param __DATAINV__ UART frame data inversion setting. 1492 * @retval SET (__DATAINV__ is valid) or RESET (__DATAINV__ is invalid) 1493 */ 1494 #define IS_UART_ADVFEATURE_DATAINV(__DATAINV__) (((__DATAINV__) == UART_ADVFEATURE_DATAINV_DISABLE) || \ 1495 ((__DATAINV__) == UART_ADVFEATURE_DATAINV_ENABLE)) 1496 1497 /** 1498 * @brief Ensure that UART frame RX/TX pins swap setting is valid. 1499 * @param __SWAP__ UART frame RX/TX pins swap setting. 1500 * @retval SET (__SWAP__ is valid) or RESET (__SWAP__ is invalid) 1501 */ 1502 #define IS_UART_ADVFEATURE_SWAP(__SWAP__) (((__SWAP__) == UART_ADVFEATURE_SWAP_DISABLE) || \ 1503 ((__SWAP__) == UART_ADVFEATURE_SWAP_ENABLE)) 1504 1505 /** 1506 * @brief Ensure that UART frame overrun setting is valid. 1507 * @param __OVERRUN__ UART frame overrun setting. 1508 * @retval SET (__OVERRUN__ is valid) or RESET (__OVERRUN__ is invalid) 1509 */ 1510 #define IS_UART_OVERRUN(__OVERRUN__) (((__OVERRUN__) == UART_ADVFEATURE_OVERRUN_ENABLE) || \ 1511 ((__OVERRUN__) == UART_ADVFEATURE_OVERRUN_DISABLE)) 1512 1513 /** 1514 * @brief Ensure that UART auto Baud rate state is valid. 1515 * @param __AUTOBAUDRATE__ UART auto Baud rate state. 1516 * @retval SET (__AUTOBAUDRATE__ is valid) or RESET (__AUTOBAUDRATE__ is invalid) 1517 */ 1518 #define IS_UART_ADVFEATURE_AUTOBAUDRATE(__AUTOBAUDRATE__) (((__AUTOBAUDRATE__) == \ 1519 UART_ADVFEATURE_AUTOBAUDRATE_DISABLE) || \ 1520 ((__AUTOBAUDRATE__) == UART_ADVFEATURE_AUTOBAUDRATE_ENABLE)) 1521 1522 /** 1523 * @brief Ensure that UART DMA enabling or disabling on error setting is valid. 1524 * @param __DMA__ UART DMA enabling or disabling on error setting. 1525 * @retval SET (__DMA__ is valid) or RESET (__DMA__ is invalid) 1526 */ 1527 #define IS_UART_ADVFEATURE_DMAONRXERROR(__DMA__) (((__DMA__) == UART_ADVFEATURE_DMA_ENABLEONRXERROR) || \ 1528 ((__DMA__) == UART_ADVFEATURE_DMA_DISABLEONRXERROR)) 1529 1530 /** 1531 * @brief Ensure that UART frame MSB first setting is valid. 1532 * @param __MSBFIRST__ UART frame MSB first setting. 1533 * @retval SET (__MSBFIRST__ is valid) or RESET (__MSBFIRST__ is invalid) 1534 */ 1535 #define IS_UART_ADVFEATURE_MSBFIRST(__MSBFIRST__) (((__MSBFIRST__) == UART_ADVFEATURE_MSBFIRST_DISABLE) || \ 1536 ((__MSBFIRST__) == UART_ADVFEATURE_MSBFIRST_ENABLE)) 1537 1538 /** 1539 * @brief Ensure that UART stop mode state is valid. 1540 * @param __STOPMODE__ UART stop mode state. 1541 * @retval SET (__STOPMODE__ is valid) or RESET (__STOPMODE__ is invalid) 1542 */ 1543 #define IS_UART_ADVFEATURE_STOPMODE(__STOPMODE__) (((__STOPMODE__) == UART_ADVFEATURE_STOPMODE_DISABLE) || \ 1544 ((__STOPMODE__) == UART_ADVFEATURE_STOPMODE_ENABLE)) 1545 1546 /** 1547 * @brief Ensure that UART mute mode state is valid. 1548 * @param __MUTE__ UART mute mode state. 1549 * @retval SET (__MUTE__ is valid) or RESET (__MUTE__ is invalid) 1550 */ 1551 #define IS_UART_MUTE_MODE(__MUTE__) (((__MUTE__) == UART_ADVFEATURE_MUTEMODE_DISABLE) || \ 1552 ((__MUTE__) == UART_ADVFEATURE_MUTEMODE_ENABLE)) 1553 1554 /** 1555 * @brief Ensure that UART wake-up selection is valid. 1556 * @param __WAKE__ UART wake-up selection. 1557 * @retval SET (__WAKE__ is valid) or RESET (__WAKE__ is invalid) 1558 */ 1559 #define IS_UART_WAKEUP_SELECTION(__WAKE__) (((__WAKE__) == UART_WAKEUP_ON_ADDRESS) || \ 1560 ((__WAKE__) == UART_WAKEUP_ON_STARTBIT) || \ 1561 ((__WAKE__) == UART_WAKEUP_ON_READDATA_NONEMPTY)) 1562 1563 /** 1564 * @brief Ensure that UART driver enable polarity is valid. 1565 * @param __POLARITY__ UART driver enable polarity. 1566 * @retval SET (__POLARITY__ is valid) or RESET (__POLARITY__ is invalid) 1567 */ 1568 #define IS_UART_DE_POLARITY(__POLARITY__) (((__POLARITY__) == UART_DE_POLARITY_HIGH) || \ 1569 ((__POLARITY__) == UART_DE_POLARITY_LOW)) 1570 1571 /** 1572 * @brief Ensure that UART Prescaler is valid. 1573 * @param __CLOCKPRESCALER__ UART Prescaler value. 1574 * @retval SET (__CLOCKPRESCALER__ is valid) or RESET (__CLOCKPRESCALER__ is invalid) 1575 */ 1576 #define IS_UART_PRESCALER(__CLOCKPRESCALER__) (((__CLOCKPRESCALER__) == UART_PRESCALER_DIV1) || \ 1577 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV2) || \ 1578 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV4) || \ 1579 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV6) || \ 1580 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV8) || \ 1581 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV10) || \ 1582 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV12) || \ 1583 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV16) || \ 1584 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV32) || \ 1585 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV64) || \ 1586 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV128) || \ 1587 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV256)) 1588 1589 /** 1590 * @} 1591 */ 1592 1593 /* Include UART HAL Extended module */ 1594 #include "stm32g0xx_hal_uart_ex.h" 1595 1596 /* Exported functions --------------------------------------------------------*/ 1597 /** @addtogroup UART_Exported_Functions UART Exported Functions 1598 * @{ 1599 */ 1600 1601 /** @addtogroup UART_Exported_Functions_Group1 Initialization and de-initialization functions 1602 * @{ 1603 */ 1604 1605 /* Initialization and de-initialization functions ****************************/ 1606 HAL_StatusTypeDef HAL_UART_Init(UART_HandleTypeDef *huart); 1607 HAL_StatusTypeDef HAL_HalfDuplex_Init(UART_HandleTypeDef *huart); 1608 HAL_StatusTypeDef HAL_LIN_Init(UART_HandleTypeDef *huart, uint32_t BreakDetectLength); 1609 HAL_StatusTypeDef HAL_MultiProcessor_Init(UART_HandleTypeDef *huart, uint8_t Address, uint32_t WakeUpMethod); 1610 HAL_StatusTypeDef HAL_UART_DeInit(UART_HandleTypeDef *huart); 1611 void HAL_UART_MspInit(UART_HandleTypeDef *huart); 1612 void HAL_UART_MspDeInit(UART_HandleTypeDef *huart); 1613 1614 /* Callbacks Register/UnRegister functions ***********************************/ 1615 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) 1616 HAL_StatusTypeDef HAL_UART_RegisterCallback(UART_HandleTypeDef *huart, HAL_UART_CallbackIDTypeDef CallbackID, 1617 pUART_CallbackTypeDef pCallback); 1618 HAL_StatusTypeDef HAL_UART_UnRegisterCallback(UART_HandleTypeDef *huart, HAL_UART_CallbackIDTypeDef CallbackID); 1619 1620 HAL_StatusTypeDef HAL_UART_RegisterRxEventCallback(UART_HandleTypeDef *huart, pUART_RxEventCallbackTypeDef pCallback); 1621 HAL_StatusTypeDef HAL_UART_UnRegisterRxEventCallback(UART_HandleTypeDef *huart); 1622 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ 1623 1624 /** 1625 * @} 1626 */ 1627 1628 /** @addtogroup UART_Exported_Functions_Group2 IO operation functions 1629 * @{ 1630 */ 1631 1632 /* IO operation functions *****************************************************/ 1633 HAL_StatusTypeDef HAL_UART_Transmit(UART_HandleTypeDef *huart, const uint8_t *pData, uint16_t Size, uint32_t Timeout); 1634 HAL_StatusTypeDef HAL_UART_Receive(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size, uint32_t Timeout); 1635 HAL_StatusTypeDef HAL_UART_Transmit_IT(UART_HandleTypeDef *huart, const uint8_t *pData, uint16_t Size); 1636 HAL_StatusTypeDef HAL_UART_Receive_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size); 1637 HAL_StatusTypeDef HAL_UART_Transmit_DMA(UART_HandleTypeDef *huart, const uint8_t *pData, uint16_t Size); 1638 HAL_StatusTypeDef HAL_UART_Receive_DMA(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size); 1639 HAL_StatusTypeDef HAL_UART_DMAPause(UART_HandleTypeDef *huart); 1640 HAL_StatusTypeDef HAL_UART_DMAResume(UART_HandleTypeDef *huart); 1641 HAL_StatusTypeDef HAL_UART_DMAStop(UART_HandleTypeDef *huart); 1642 /* Transfer Abort functions */ 1643 HAL_StatusTypeDef HAL_UART_Abort(UART_HandleTypeDef *huart); 1644 HAL_StatusTypeDef HAL_UART_AbortTransmit(UART_HandleTypeDef *huart); 1645 HAL_StatusTypeDef HAL_UART_AbortReceive(UART_HandleTypeDef *huart); 1646 HAL_StatusTypeDef HAL_UART_Abort_IT(UART_HandleTypeDef *huart); 1647 HAL_StatusTypeDef HAL_UART_AbortTransmit_IT(UART_HandleTypeDef *huart); 1648 HAL_StatusTypeDef HAL_UART_AbortReceive_IT(UART_HandleTypeDef *huart); 1649 1650 void HAL_UART_IRQHandler(UART_HandleTypeDef *huart); 1651 void HAL_UART_TxHalfCpltCallback(UART_HandleTypeDef *huart); 1652 void HAL_UART_TxCpltCallback(UART_HandleTypeDef *huart); 1653 void HAL_UART_RxHalfCpltCallback(UART_HandleTypeDef *huart); 1654 void HAL_UART_RxCpltCallback(UART_HandleTypeDef *huart); 1655 void HAL_UART_ErrorCallback(UART_HandleTypeDef *huart); 1656 void HAL_UART_AbortCpltCallback(UART_HandleTypeDef *huart); 1657 void HAL_UART_AbortTransmitCpltCallback(UART_HandleTypeDef *huart); 1658 void HAL_UART_AbortReceiveCpltCallback(UART_HandleTypeDef *huart); 1659 1660 void HAL_UARTEx_RxEventCallback(UART_HandleTypeDef *huart, uint16_t Size); 1661 1662 /** 1663 * @} 1664 */ 1665 1666 /** @addtogroup UART_Exported_Functions_Group3 Peripheral Control functions 1667 * @{ 1668 */ 1669 1670 /* Peripheral Control functions ************************************************/ 1671 void HAL_UART_ReceiverTimeout_Config(UART_HandleTypeDef *huart, uint32_t TimeoutValue); 1672 HAL_StatusTypeDef HAL_UART_EnableReceiverTimeout(UART_HandleTypeDef *huart); 1673 HAL_StatusTypeDef HAL_UART_DisableReceiverTimeout(UART_HandleTypeDef *huart); 1674 1675 HAL_StatusTypeDef HAL_LIN_SendBreak(UART_HandleTypeDef *huart); 1676 HAL_StatusTypeDef HAL_MultiProcessor_EnableMuteMode(UART_HandleTypeDef *huart); 1677 HAL_StatusTypeDef HAL_MultiProcessor_DisableMuteMode(UART_HandleTypeDef *huart); 1678 void HAL_MultiProcessor_EnterMuteMode(UART_HandleTypeDef *huart); 1679 HAL_StatusTypeDef HAL_HalfDuplex_EnableTransmitter(UART_HandleTypeDef *huart); 1680 HAL_StatusTypeDef HAL_HalfDuplex_EnableReceiver(UART_HandleTypeDef *huart); 1681 1682 /** 1683 * @} 1684 */ 1685 1686 /** @addtogroup UART_Exported_Functions_Group4 Peripheral State and Error functions 1687 * @{ 1688 */ 1689 1690 /* Peripheral State and Errors functions **************************************************/ 1691 HAL_UART_StateTypeDef HAL_UART_GetState(const UART_HandleTypeDef *huart); 1692 uint32_t HAL_UART_GetError(const UART_HandleTypeDef *huart); 1693 1694 /** 1695 * @} 1696 */ 1697 1698 /** 1699 * @} 1700 */ 1701 1702 /* Private functions -----------------------------------------------------------*/ 1703 /** @addtogroup UART_Private_Functions UART Private Functions 1704 * @{ 1705 */ 1706 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) 1707 void UART_InitCallbacksToDefault(UART_HandleTypeDef *huart); 1708 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ 1709 HAL_StatusTypeDef UART_SetConfig(UART_HandleTypeDef *huart); 1710 HAL_StatusTypeDef UART_CheckIdleState(UART_HandleTypeDef *huart); 1711 HAL_StatusTypeDef UART_WaitOnFlagUntilTimeout(UART_HandleTypeDef *huart, uint32_t Flag, FlagStatus Status, 1712 uint32_t Tickstart, uint32_t Timeout); 1713 void UART_AdvFeatureConfig(UART_HandleTypeDef *huart); 1714 HAL_StatusTypeDef UART_Start_Receive_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size); 1715 HAL_StatusTypeDef UART_Start_Receive_DMA(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size); 1716 1717 /** 1718 * @} 1719 */ 1720 1721 /* Private variables -----------------------------------------------------------*/ 1722 /** @defgroup UART_Private_variables UART Private variables 1723 * @{ 1724 */ 1725 /* Prescaler Table used in BRR computation macros. 1726 Declared as extern here to allow use of private UART macros, outside of HAL UART functions */ 1727 extern const uint16_t UARTPrescTable[12]; 1728 /** 1729 * @} 1730 */ 1731 1732 /** 1733 * @} 1734 */ 1735 1736 /** 1737 * @} 1738 */ 1739 1740 #ifdef __cplusplus 1741 } 1742 #endif 1743 1744 #endif /* STM32G0xx_HAL_UART_H */ 1745 1746
