1 /** 2 ****************************************************************************** 3 * @file stm32g0xx_hal_dac.h 4 * @author MCD Application Team 5 * @brief Header file of DAC HAL module. 6 ****************************************************************************** 7 * @attention 8 * 9 * Copyright (c) 2018 STMicroelectronics. 10 * All rights reserved. 11 * 12 * This software is licensed under terms that can be found in the LICENSE file 13 * in the root directory of this software component. 14 * If no LICENSE file comes with this software, it is provided AS-IS. 15 * 16 ****************************************************************************** 17 */ 18 19 /* Define to prevent recursive inclusion -------------------------------------*/ 20 #ifndef STM32G0xx_HAL_DAC_H 21 #define STM32G0xx_HAL_DAC_H 22 23 #ifdef __cplusplus 24 extern "C" { 25 #endif 26 27 /** @addtogroup STM32G0xx_HAL_Driver 28 * @{ 29 */ 30 31 /* Includes ------------------------------------------------------------------*/ 32 #include "stm32g0xx_hal_def.h" 33 34 #if defined(DAC1) 35 36 /** @addtogroup DAC 37 * @{ 38 */ 39 40 /* Exported types ------------------------------------------------------------*/ 41 42 /** @defgroup DAC_Exported_Types DAC Exported Types 43 * @{ 44 */ 45 46 /** 47 * @brief HAL State structures definition 48 */ 49 typedef enum 50 { 51 HAL_DAC_STATE_RESET = 0x00U, /*!< DAC not yet initialized or disabled */ 52 HAL_DAC_STATE_READY = 0x01U, /*!< DAC initialized and ready for use */ 53 HAL_DAC_STATE_BUSY = 0x02U, /*!< DAC internal processing is ongoing */ 54 HAL_DAC_STATE_TIMEOUT = 0x03U, /*!< DAC timeout state */ 55 HAL_DAC_STATE_ERROR = 0x04U /*!< DAC error state */ 56 57 } HAL_DAC_StateTypeDef; 58 59 /** 60 * @brief DAC handle Structure definition 61 */ 62 #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1) 63 typedef struct __DAC_HandleTypeDef 64 #else 65 typedef struct 66 #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */ 67 { 68 DAC_TypeDef *Instance; /*!< Register base address */ 69 70 __IO HAL_DAC_StateTypeDef State; /*!< DAC communication state */ 71 72 HAL_LockTypeDef Lock; /*!< DAC locking object */ 73 74 DMA_HandleTypeDef *DMA_Handle1; /*!< Pointer DMA handler for channel 1 */ 75 76 DMA_HandleTypeDef *DMA_Handle2; /*!< Pointer DMA handler for channel 2 */ 77 78 __IO uint32_t ErrorCode; /*!< DAC Error code */ 79 80 #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1) 81 void (* ConvCpltCallbackCh1) (struct __DAC_HandleTypeDef *hdac); 82 void (* ConvHalfCpltCallbackCh1) (struct __DAC_HandleTypeDef *hdac); 83 void (* ErrorCallbackCh1) (struct __DAC_HandleTypeDef *hdac); 84 void (* DMAUnderrunCallbackCh1) (struct __DAC_HandleTypeDef *hdac); 85 86 void (* ConvCpltCallbackCh2) (struct __DAC_HandleTypeDef *hdac); 87 void (* ConvHalfCpltCallbackCh2) (struct __DAC_HandleTypeDef *hdac); 88 void (* ErrorCallbackCh2) (struct __DAC_HandleTypeDef *hdac); 89 void (* DMAUnderrunCallbackCh2) (struct __DAC_HandleTypeDef *hdac); 90 91 92 void (* MspInitCallback) (struct __DAC_HandleTypeDef *hdac); 93 void (* MspDeInitCallback) (struct __DAC_HandleTypeDef *hdac); 94 #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */ 95 96 } DAC_HandleTypeDef; 97 98 /** 99 * @brief DAC Configuration sample and hold Channel structure definition 100 */ 101 typedef struct 102 { 103 uint32_t DAC_SampleTime ; /*!< Specifies the Sample time for the selected channel. 104 This parameter applies when DAC_SampleAndHold is DAC_SAMPLEANDHOLD_ENABLE. 105 This parameter must be a number between Min_Data = 0 and Max_Data = 1023 */ 106 107 uint32_t DAC_HoldTime ; /*!< Specifies the hold time for the selected channel 108 This parameter applies when DAC_SampleAndHold is DAC_SAMPLEANDHOLD_ENABLE. 109 This parameter must be a number between Min_Data = 0 and Max_Data = 1023 */ 110 111 uint32_t DAC_RefreshTime ; /*!< Specifies the refresh time for the selected channel 112 This parameter applies when DAC_SampleAndHold is DAC_SAMPLEANDHOLD_ENABLE. 113 This parameter must be a number between Min_Data = 0 and Max_Data = 255 */ 114 } DAC_SampleAndHoldConfTypeDef; 115 116 /** 117 * @brief DAC Configuration regular Channel structure definition 118 */ 119 typedef struct 120 { 121 uint32_t DAC_SampleAndHold; /*!< Specifies whether the DAC mode. 122 This parameter can be a value of @ref DAC_SampleAndHold */ 123 124 uint32_t DAC_Trigger; /*!< Specifies the external trigger for the selected DAC channel. 125 This parameter can be a value of @ref DAC_trigger_selection */ 126 127 uint32_t DAC_OutputBuffer; /*!< Specifies whether the DAC channel output buffer is enabled or disabled. 128 This parameter can be a value of @ref DAC_output_buffer */ 129 130 uint32_t DAC_ConnectOnChipPeripheral ; /*!< Specifies whether the DAC output is connected or not to on chip peripheral . 131 This parameter can be a value of @ref DAC_ConnectOnChipPeripheral */ 132 133 uint32_t DAC_UserTrimming; /*!< Specifies the trimming mode 134 This parameter must be a value of @ref DAC_UserTrimming 135 DAC_UserTrimming is either factory or user trimming */ 136 137 uint32_t DAC_TrimmingValue; /*!< Specifies the offset trimming value 138 i.e. when DAC_SampleAndHold is DAC_TRIMMING_USER. 139 This parameter must be a number between Min_Data = 1 and Max_Data = 31 */ 140 DAC_SampleAndHoldConfTypeDef DAC_SampleAndHoldConfig; /*!< Sample and Hold settings */ 141 } DAC_ChannelConfTypeDef; 142 143 #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1) 144 /** 145 * @brief HAL DAC Callback ID enumeration definition 146 */ 147 typedef enum 148 { 149 HAL_DAC_CH1_COMPLETE_CB_ID = 0x00U, /*!< DAC CH1 Complete Callback ID */ 150 HAL_DAC_CH1_HALF_COMPLETE_CB_ID = 0x01U, /*!< DAC CH1 half Complete Callback ID */ 151 HAL_DAC_CH1_ERROR_ID = 0x02U, /*!< DAC CH1 error Callback ID */ 152 HAL_DAC_CH1_UNDERRUN_CB_ID = 0x03U, /*!< DAC CH1 underrun Callback ID */ 153 154 HAL_DAC_CH2_COMPLETE_CB_ID = 0x04U, /*!< DAC CH2 Complete Callback ID */ 155 HAL_DAC_CH2_HALF_COMPLETE_CB_ID = 0x05U, /*!< DAC CH2 half Complete Callback ID */ 156 HAL_DAC_CH2_ERROR_ID = 0x06U, /*!< DAC CH2 error Callback ID */ 157 HAL_DAC_CH2_UNDERRUN_CB_ID = 0x07U, /*!< DAC CH2 underrun Callback ID */ 158 159 HAL_DAC_MSPINIT_CB_ID = 0x08U, /*!< DAC MspInit Callback ID */ 160 HAL_DAC_MSPDEINIT_CB_ID = 0x09U, /*!< DAC MspDeInit Callback ID */ 161 HAL_DAC_ALL_CB_ID = 0x0AU /*!< DAC All ID */ 162 } HAL_DAC_CallbackIDTypeDef; 163 164 /** 165 * @brief HAL DAC Callback pointer definition 166 */ 167 typedef void (*pDAC_CallbackTypeDef)(DAC_HandleTypeDef *hdac); 168 #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */ 169 170 /** 171 * @} 172 */ 173 174 /* Exported constants --------------------------------------------------------*/ 175 176 /** @defgroup DAC_Exported_Constants DAC Exported Constants 177 * @{ 178 */ 179 180 /** @defgroup DAC_Error_Code DAC Error Code 181 * @{ 182 */ 183 #define HAL_DAC_ERROR_NONE 0x00U /*!< No error */ 184 #define HAL_DAC_ERROR_DMAUNDERRUNCH1 0x01U /*!< DAC channel1 DMA underrun error */ 185 #define HAL_DAC_ERROR_DMAUNDERRUNCH2 0x02U /*!< DAC channel2 DMA underrun error */ 186 #define HAL_DAC_ERROR_DMA 0x04U /*!< DMA error */ 187 #define HAL_DAC_ERROR_TIMEOUT 0x08U /*!< Timeout error */ 188 #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1) 189 #define HAL_DAC_ERROR_INVALID_CALLBACK 0x10U /*!< Invalid callback error */ 190 #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */ 191 192 /** 193 * @} 194 */ 195 196 /** @defgroup DAC_trigger_selection DAC trigger selection 197 * @{ 198 */ 199 #define DAC_TRIGGER_NONE 0x00000000UL /*!< Conversion is automatic once the DAC_DHRxxxx register has been loaded, and not by external trigger */ 200 #define DAC_TRIGGER_SOFTWARE (DAC_CR_TEN1) /*!< Conversion started by software trigger for DAC channel */ 201 #define DAC_TRIGGER_T1_TRGO (DAC_CR_TSEL1_0 | DAC_CR_TEN1) /*!< TIM1 TRGO selected as external conversion trigger for DAC channel */ 202 #define DAC_TRIGGER_T2_TRGO (DAC_CR_TSEL1_1 | DAC_CR_TEN1) /*!< TIM2 TRGO selected as external conversion trigger for DAC channel */ 203 #define DAC_TRIGGER_T3_TRGO (DAC_CR_TSEL1_1 | DAC_CR_TSEL1_0 | DAC_CR_TEN1) /*!< TIM3 TRGO selected as external conversion trigger for DAC channel */ 204 #define DAC_TRIGGER_T6_TRGO (DAC_CR_TSEL1_2 | DAC_CR_TSEL1_0 | DAC_CR_TEN1) /*!< TIM6 TRGO selected as external conversion trigger for DAC channel */ 205 #define DAC_TRIGGER_T7_TRGO (DAC_CR_TSEL1_2 | DAC_CR_TSEL1_1 | DAC_CR_TEN1) /*!< TIM7 TRGO selected as external conversion trigger for DAC channel */ 206 #define DAC_TRIGGER_T15_TRGO (DAC_CR_TSEL1_3 | DAC_CR_TEN1) /*!< TIM15 TRGO selected as external conversion trigger for DAC channel */ 207 #define DAC_TRIGGER_LPTIM1_OUT (DAC_CR_TSEL1_3 | DAC_CR_TSEL1_1 | DAC_CR_TSEL1_0 | DAC_CR_TEN1) /*!< LPTIM1_OUT selected as external conversion trigger for DAC channel */ 208 #define DAC_TRIGGER_LPTIM2_OUT (DAC_CR_TSEL1_3 | DAC_CR_TSEL1_2 | DAC_CR_TEN1) /*!< LPTIM2_OUT selected as external conversion trigger for DAC channel */ 209 #define DAC_TRIGGER_EXT_IT9 (DAC_CR_TSEL1_3 | DAC_CR_TSEL1_2 | DAC_CR_TSEL1_0 | DAC_CR_TEN1) /*!< EXTI Line9 event selected as external conversion trigger for DAC channel */ 210 211 /** 212 * @} 213 */ 214 215 /** @defgroup DAC_output_buffer DAC output buffer 216 * @{ 217 */ 218 #define DAC_OUTPUTBUFFER_ENABLE 0x00000000U 219 #define DAC_OUTPUTBUFFER_DISABLE (DAC_MCR_MODE1_1) 220 221 /** 222 * @} 223 */ 224 225 /** @defgroup DAC_Channel_selection DAC Channel selection 226 * @{ 227 */ 228 #define DAC_CHANNEL_1 0x00000000U 229 230 #define DAC_CHANNEL_2 0x00000010U 231 232 /** 233 * @} 234 */ 235 236 /** @defgroup DAC_data_alignment DAC data alignment 237 * @{ 238 */ 239 #define DAC_ALIGN_12B_R 0x00000000U 240 #define DAC_ALIGN_12B_L 0x00000004U 241 #define DAC_ALIGN_8B_R 0x00000008U 242 243 /** 244 * @} 245 */ 246 247 /** @defgroup DAC_flags_definition DAC flags definition 248 * @{ 249 */ 250 #define DAC_FLAG_DMAUDR1 (DAC_SR_DMAUDR1) 251 252 #define DAC_FLAG_DMAUDR2 (DAC_SR_DMAUDR2) 253 254 255 /** 256 * @} 257 */ 258 259 /** @defgroup DAC_IT_definition DAC IT definition 260 * @{ 261 */ 262 #define DAC_IT_DMAUDR1 (DAC_SR_DMAUDR1) 263 264 #define DAC_IT_DMAUDR2 (DAC_SR_DMAUDR2) 265 266 267 /** 268 * @} 269 */ 270 271 /** @defgroup DAC_ConnectOnChipPeripheral DAC ConnectOnChipPeripheral 272 * @{ 273 */ 274 #define DAC_CHIPCONNECT_DISABLE (0x00000000UL) 275 #define DAC_CHIPCONNECT_ENABLE (DAC_MCR_MODE1_0) 276 277 /** 278 * @} 279 */ 280 281 /** @defgroup DAC_UserTrimming DAC User Trimming 282 * @{ 283 */ 284 #define DAC_TRIMMING_FACTORY (0x00000000UL) /*!< Factory trimming */ 285 #define DAC_TRIMMING_USER (0x00000001UL) /*!< User trimming */ 286 /** 287 * @} 288 */ 289 290 /** @defgroup DAC_SampleAndHold DAC power mode 291 * @{ 292 */ 293 #define DAC_SAMPLEANDHOLD_DISABLE (0x00000000UL) 294 #define DAC_SAMPLEANDHOLD_ENABLE (DAC_MCR_MODE1_2) 295 296 /** 297 * @} 298 */ 299 /** 300 * @} 301 */ 302 303 /* Exported macro ------------------------------------------------------------*/ 304 305 /** @defgroup DAC_Exported_Macros DAC Exported Macros 306 * @{ 307 */ 308 309 /** @brief Reset DAC handle state. 310 * @param __HANDLE__ specifies the DAC handle. 311 * @retval None 312 */ 313 #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1) 314 #define __HAL_DAC_RESET_HANDLE_STATE(__HANDLE__) do { \ 315 (__HANDLE__)->State = HAL_DAC_STATE_RESET; \ 316 (__HANDLE__)->MspInitCallback = NULL; \ 317 (__HANDLE__)->MspDeInitCallback = NULL; \ 318 } while(0) 319 #else 320 #define __HAL_DAC_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_DAC_STATE_RESET) 321 #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */ 322 323 /** @brief Enable the DAC channel. 324 * @param __HANDLE__ specifies the DAC handle. 325 * @param __DAC_Channel__ specifies the DAC channel 326 * @retval None 327 */ 328 #define __HAL_DAC_ENABLE(__HANDLE__, __DAC_Channel__) \ 329 ((__HANDLE__)->Instance->CR |= (DAC_CR_EN1 << ((__DAC_Channel__) & 0x10UL))) 330 331 /** @brief Disable the DAC channel. 332 * @param __HANDLE__ specifies the DAC handle 333 * @param __DAC_Channel__ specifies the DAC channel. 334 * @retval None 335 */ 336 #define __HAL_DAC_DISABLE(__HANDLE__, __DAC_Channel__) \ 337 ((__HANDLE__)->Instance->CR &= ~(DAC_CR_EN1 << ((__DAC_Channel__) & 0x10UL))) 338 339 /** @brief Set DHR12R1 alignment. 340 * @param __ALIGNMENT__ specifies the DAC alignment 341 * @retval None 342 */ 343 #define DAC_DHR12R1_ALIGNMENT(__ALIGNMENT__) (0x00000008UL + (__ALIGNMENT__)) 344 345 346 /** @brief Set DHR12R2 alignment. 347 * @param __ALIGNMENT__ specifies the DAC alignment 348 * @retval None 349 */ 350 #define DAC_DHR12R2_ALIGNMENT(__ALIGNMENT__) (0x00000014UL + (__ALIGNMENT__)) 351 352 353 /** @brief Set DHR12RD alignment. 354 * @param __ALIGNMENT__ specifies the DAC alignment 355 * @retval None 356 */ 357 #define DAC_DHR12RD_ALIGNMENT(__ALIGNMENT__) (0x00000020UL + (__ALIGNMENT__)) 358 359 /** @brief Enable the DAC interrupt. 360 * @param __HANDLE__ specifies the DAC handle 361 * @param __INTERRUPT__ specifies the DAC interrupt. 362 * This parameter can be any combination of the following values: 363 * @arg DAC_IT_DMAUDR1 DAC channel 1 DMA underrun interrupt 364 * @arg DAC_IT_DMAUDR2 DAC channel 2 DMA underrun interrupt 365 * @retval None 366 */ 367 #define __HAL_DAC_ENABLE_IT(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->CR) |= (__INTERRUPT__)) 368 369 /** @brief Disable the DAC interrupt. 370 * @param __HANDLE__ specifies the DAC handle 371 * @param __INTERRUPT__ specifies the DAC interrupt. 372 * This parameter can be any combination of the following values: 373 * @arg DAC_IT_DMAUDR1 DAC channel 1 DMA underrun interrupt 374 * @arg DAC_IT_DMAUDR2 DAC channel 2 DMA underrun interrupt 375 * @retval None 376 */ 377 #define __HAL_DAC_DISABLE_IT(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->CR) &= ~(__INTERRUPT__)) 378 379 /** @brief Check whether the specified DAC interrupt source is enabled or not. 380 * @param __HANDLE__ DAC handle 381 * @param __INTERRUPT__ DAC interrupt source to check 382 * This parameter can be any combination of the following values: 383 * @arg DAC_IT_DMAUDR1 DAC channel 1 DMA underrun interrupt 384 * @arg DAC_IT_DMAUDR2 DAC channel 2 DMA underrun interrupt 385 * @retval State of interruption (SET or RESET) 386 */ 387 #define __HAL_DAC_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->CR\ 388 & (__INTERRUPT__)) == (__INTERRUPT__)) 389 390 /** @brief Get the selected DAC's flag status. 391 * @param __HANDLE__ specifies the DAC handle. 392 * @param __FLAG__ specifies the DAC flag to get. 393 * This parameter can be any combination of the following values: 394 * @arg DAC_FLAG_DMAUDR1 DAC channel 1 DMA underrun flag 395 * @arg DAC_FLAG_DMAUDR2 DAC channel 2 DMA underrun flag 396 * @retval None 397 */ 398 #define __HAL_DAC_GET_FLAG(__HANDLE__, __FLAG__) ((((__HANDLE__)->Instance->SR) & (__FLAG__)) == (__FLAG__)) 399 400 /** @brief Clear the DAC's flag. 401 * @param __HANDLE__ specifies the DAC handle. 402 * @param __FLAG__ specifies the DAC flag to clear. 403 * This parameter can be any combination of the following values: 404 * @arg DAC_FLAG_DMAUDR1 DAC channel 1 DMA underrun flag 405 * @arg DAC_FLAG_DMAUDR2 DAC channel 2 DMA underrun flag 406 * @retval None 407 */ 408 #define __HAL_DAC_CLEAR_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->SR) = (__FLAG__)) 409 410 /** 411 * @} 412 */ 413 414 /* Private macro -------------------------------------------------------------*/ 415 416 /** @defgroup DAC_Private_Macros DAC Private Macros 417 * @{ 418 */ 419 #define IS_DAC_OUTPUT_BUFFER_STATE(STATE) (((STATE) == DAC_OUTPUTBUFFER_ENABLE) || \ 420 ((STATE) == DAC_OUTPUTBUFFER_DISABLE)) 421 422 #define IS_DAC_CHANNEL(CHANNEL) (((CHANNEL) == DAC_CHANNEL_1) || \ 423 ((CHANNEL) == DAC_CHANNEL_2)) 424 425 #define IS_DAC_ALIGN(ALIGN) (((ALIGN) == DAC_ALIGN_12B_R) || \ 426 ((ALIGN) == DAC_ALIGN_12B_L) || \ 427 ((ALIGN) == DAC_ALIGN_8B_R)) 428 429 #define IS_DAC_DATA(DATA) ((DATA) <= 0xFFF0UL) 430 431 #define IS_DAC_REFRESHTIME(TIME) ((TIME) <= 0x000000FFUL) 432 433 /** 434 * @} 435 */ 436 437 /* Include DAC HAL Extended module */ 438 #include "stm32g0xx_hal_dac_ex.h" 439 440 /* Exported functions --------------------------------------------------------*/ 441 442 /** @addtogroup DAC_Exported_Functions 443 * @{ 444 */ 445 446 /** @addtogroup DAC_Exported_Functions_Group1 447 * @{ 448 */ 449 /* Initialization and de-initialization functions *****************************/ 450 HAL_StatusTypeDef HAL_DAC_Init(DAC_HandleTypeDef *hdac); 451 HAL_StatusTypeDef HAL_DAC_DeInit(DAC_HandleTypeDef *hdac); 452 void HAL_DAC_MspInit(DAC_HandleTypeDef *hdac); 453 void HAL_DAC_MspDeInit(DAC_HandleTypeDef *hdac); 454 455 /** 456 * @} 457 */ 458 459 /** @addtogroup DAC_Exported_Functions_Group2 460 * @{ 461 */ 462 /* IO operation functions *****************************************************/ 463 HAL_StatusTypeDef HAL_DAC_Start(DAC_HandleTypeDef *hdac, uint32_t Channel); 464 HAL_StatusTypeDef HAL_DAC_Stop(DAC_HandleTypeDef *hdac, uint32_t Channel); 465 HAL_StatusTypeDef HAL_DAC_Start_DMA(DAC_HandleTypeDef *hdac, uint32_t Channel, uint32_t *pData, uint32_t Length, 466 uint32_t Alignment); 467 HAL_StatusTypeDef HAL_DAC_Stop_DMA(DAC_HandleTypeDef *hdac, uint32_t Channel); 468 void HAL_DAC_IRQHandler(DAC_HandleTypeDef *hdac); 469 HAL_StatusTypeDef HAL_DAC_SetValue(DAC_HandleTypeDef *hdac, uint32_t Channel, uint32_t Alignment, uint32_t Data); 470 471 void HAL_DAC_ConvCpltCallbackCh1(DAC_HandleTypeDef *hdac); 472 void HAL_DAC_ConvHalfCpltCallbackCh1(DAC_HandleTypeDef *hdac); 473 void HAL_DAC_ErrorCallbackCh1(DAC_HandleTypeDef *hdac); 474 void HAL_DAC_DMAUnderrunCallbackCh1(DAC_HandleTypeDef *hdac); 475 476 #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1) 477 /* DAC callback registering/unregistering */ 478 HAL_StatusTypeDef HAL_DAC_RegisterCallback(DAC_HandleTypeDef *hdac, HAL_DAC_CallbackIDTypeDef CallbackID, 479 pDAC_CallbackTypeDef pCallback); 480 HAL_StatusTypeDef HAL_DAC_UnRegisterCallback(DAC_HandleTypeDef *hdac, HAL_DAC_CallbackIDTypeDef CallbackID); 481 #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */ 482 483 /** 484 * @} 485 */ 486 487 /** @addtogroup DAC_Exported_Functions_Group3 488 * @{ 489 */ 490 /* Peripheral Control functions ***********************************************/ 491 uint32_t HAL_DAC_GetValue(DAC_HandleTypeDef *hdac, uint32_t Channel); 492 HAL_StatusTypeDef HAL_DAC_ConfigChannel(DAC_HandleTypeDef *hdac, DAC_ChannelConfTypeDef *sConfig, uint32_t Channel); 493 /** 494 * @} 495 */ 496 497 /** @addtogroup DAC_Exported_Functions_Group4 498 * @{ 499 */ 500 /* Peripheral State and Error functions ***************************************/ 501 HAL_DAC_StateTypeDef HAL_DAC_GetState(DAC_HandleTypeDef *hdac); 502 uint32_t HAL_DAC_GetError(DAC_HandleTypeDef *hdac); 503 504 /** 505 * @} 506 */ 507 508 /** 509 * @} 510 */ 511 512 /** @defgroup DAC_Private_Functions DAC Private Functions 513 * @{ 514 */ 515 void DAC_DMAConvCpltCh1(DMA_HandleTypeDef *hdma); 516 void DAC_DMAErrorCh1(DMA_HandleTypeDef *hdma); 517 void DAC_DMAHalfConvCpltCh1(DMA_HandleTypeDef *hdma); 518 /** 519 * @} 520 */ 521 522 /** 523 * @} 524 */ 525 526 #endif /* DAC1 */ 527 528 /** 529 * @} 530 */ 531 532 #ifdef __cplusplus 533 } 534 #endif 535 536 537 #endif /* STM32G0xx_HAL_DAC_H */ 538 539
